stm32f3xx_hal_timebase_tim.lst 25 KB

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  1. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 2
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "stm32f3xx_hal_timebase_tim.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.HAL_InitTick,"ax",%progbits
  21. 20 .align 1
  22. 21 .p2align 2,,3
  23. 22 .global HAL_InitTick
  24. 23 .syntax unified
  25. 24 .thumb
  26. 25 .thumb_func
  27. 27 HAL_InitTick:
  28. 28 .LVL0:
  29. 29 .LFB130:
  30. 30 .file 1 "Core/Src/stm32f3xx_hal_timebase_tim.c"
  31. 1:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* USER CODE BEGIN Header */
  32. 2:Core/Src/stm32f3xx_hal_timebase_tim.c **** /**
  33. 3:Core/Src/stm32f3xx_hal_timebase_tim.c **** ******************************************************************************
  34. 4:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @file stm32f3xx_hal_timebase_tim.c
  35. 5:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief HAL time base based on the hardware TIM.
  36. 6:Core/Src/stm32f3xx_hal_timebase_tim.c **** ******************************************************************************
  37. 7:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @attention
  38. 8:Core/Src/stm32f3xx_hal_timebase_tim.c **** *
  39. 9:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Copyright (c) 2025 STMicroelectronics.
  40. 10:Core/Src/stm32f3xx_hal_timebase_tim.c **** * All rights reserved.
  41. 11:Core/Src/stm32f3xx_hal_timebase_tim.c **** *
  42. 12:Core/Src/stm32f3xx_hal_timebase_tim.c **** * This software is licensed under terms that can be found in the LICENSE file
  43. 13:Core/Src/stm32f3xx_hal_timebase_tim.c **** * in the root directory of this software component.
  44. 14:Core/Src/stm32f3xx_hal_timebase_tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
  45. 15:Core/Src/stm32f3xx_hal_timebase_tim.c **** *
  46. 16:Core/Src/stm32f3xx_hal_timebase_tim.c **** ******************************************************************************
  47. 17:Core/Src/stm32f3xx_hal_timebase_tim.c **** */
  48. 18:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* USER CODE END Header */
  49. 19:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  50. 20:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Includes ------------------------------------------------------------------*/
  51. 21:Core/Src/stm32f3xx_hal_timebase_tim.c **** #include "stm32f3xx_hal.h"
  52. 22:Core/Src/stm32f3xx_hal_timebase_tim.c **** #include "stm32f3xx_hal_tim.h"
  53. 23:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  54. 24:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private typedef -----------------------------------------------------------*/
  55. 25:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private define ------------------------------------------------------------*/
  56. 26:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private macro -------------------------------------------------------------*/
  57. 27:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private variables ---------------------------------------------------------*/
  58. 28:Core/Src/stm32f3xx_hal_timebase_tim.c **** TIM_HandleTypeDef htim1;
  59. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 2
  60. 29:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private function prototypes -----------------------------------------------*/
  61. 30:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private functions ---------------------------------------------------------*/
  62. 31:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  63. 32:Core/Src/stm32f3xx_hal_timebase_tim.c **** /**
  64. 33:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief This function configures the TIM1 as a time base source.
  65. 34:Core/Src/stm32f3xx_hal_timebase_tim.c **** * The time source is configured to have 1ms time base with a dedicated
  66. 35:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Tick interrupt priority.
  67. 36:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note This function is called automatically at the beginning of program after
  68. 37:Core/Src/stm32f3xx_hal_timebase_tim.c **** * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  69. 38:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param TickPriority: Tick interrupt priority.
  70. 39:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval HAL status
  71. 40:Core/Src/stm32f3xx_hal_timebase_tim.c **** */
  72. 41:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  73. 42:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  74. 31 .loc 1 42 1 view -0
  75. 32 .cfi_startproc
  76. 33 @ args = 0, pretend = 0, frame = 32
  77. 34 @ frame_needed = 0, uses_anonymous_args = 0
  78. 43:Core/Src/stm32f3xx_hal_timebase_tim.c **** RCC_ClkInitTypeDef clkconfig;
  79. 35 .loc 1 43 3 view .LVU1
  80. 44:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t uwTimclock = 0U;
  81. 36 .loc 1 44 3 view .LVU2
  82. 45:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  83. 46:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t uwPrescalerValue = 0U;
  84. 37 .loc 1 46 3 view .LVU3
  85. 47:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t pFLatency;
  86. 38 .loc 1 47 3 view .LVU4
  87. 48:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  88. 49:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_StatusTypeDef status;
  89. 39 .loc 1 49 3 view .LVU5
  90. 50:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  91. 51:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable TIM1 clock */
  92. 52:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_RCC_TIM1_CLK_ENABLE();
  93. 40 .loc 1 52 3 view .LVU6
  94. 41 .LBB2:
  95. 42 .loc 1 52 3 view .LVU7
  96. 43 .loc 1 52 3 view .LVU8
  97. 44 0000 1F4B ldr r3, .L8
  98. 45 .LBE2:
  99. 42:Core/Src/stm32f3xx_hal_timebase_tim.c **** RCC_ClkInitTypeDef clkconfig;
  100. 46 .loc 1 42 1 is_stmt 0 view .LVU9
  101. 47 0002 70B5 push {r4, r5, r6, lr}
  102. 48 .LCFI0:
  103. 49 .cfi_def_cfa_offset 16
  104. 50 .cfi_offset 4, -16
  105. 51 .cfi_offset 5, -12
  106. 52 .cfi_offset 6, -8
  107. 53 .cfi_offset 14, -4
  108. 54 .LBB3:
  109. 55 .loc 1 52 3 view .LVU10
  110. 56 0004 9A69 ldr r2, [r3, #24]
  111. 57 .LBE3:
  112. 53:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  113. 54:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Get clock configuration */
  114. 55:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
  115. 56:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  116. 57:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Compute TIM1 clock */
  117. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 3
  118. 58:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwTimclock = HAL_RCC_GetPCLK2Freq();
  119. 59:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  120. 60:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
  121. 61:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
  122. 62:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  123. 63:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Initialize TIM1 */
  124. 64:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Instance = TIM1;
  125. 58 .loc 1 64 18 view .LVU11
  126. 59 0006 1F4C ldr r4, .L8+4
  127. 60 .LBB4:
  128. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  129. 61 .loc 1 52 3 view .LVU12
  130. 62 0008 42F40062 orr r2, r2, #2048
  131. 63 000c 9A61 str r2, [r3, #24]
  132. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  133. 64 .loc 1 52 3 is_stmt 1 view .LVU13
  134. 65 000e 9B69 ldr r3, [r3, #24]
  135. 66 .LBE4:
  136. 42:Core/Src/stm32f3xx_hal_timebase_tim.c **** RCC_ClkInitTypeDef clkconfig;
  137. 67 .loc 1 42 1 is_stmt 0 view .LVU14
  138. 68 0010 88B0 sub sp, sp, #32
  139. 69 .LCFI1:
  140. 70 .cfi_def_cfa_offset 48
  141. 71 .LBB5:
  142. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  143. 72 .loc 1 52 3 view .LVU15
  144. 73 0012 03F40063 and r3, r3, #2048
  145. 74 .LBE5:
  146. 55:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  147. 75 .loc 1 55 3 view .LVU16
  148. 76 0016 01A9 add r1, sp, #4
  149. 77 .LBB6:
  150. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  151. 78 .loc 1 52 3 view .LVU17
  152. 79 0018 0293 str r3, [sp, #8]
  153. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  154. 80 .loc 1 52 3 is_stmt 1 view .LVU18
  155. 81 .LBE6:
  156. 42:Core/Src/stm32f3xx_hal_timebase_tim.c **** RCC_ClkInitTypeDef clkconfig;
  157. 82 .loc 1 42 1 is_stmt 0 view .LVU19
  158. 83 001a 0646 mov r6, r0
  159. 55:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  160. 84 .loc 1 55 3 view .LVU20
  161. 85 001c 03A8 add r0, sp, #12
  162. 86 .LVL1:
  163. 87 .LBB7:
  164. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  165. 88 .loc 1 52 3 view .LVU21
  166. 89 001e 029B ldr r3, [sp, #8]
  167. 90 .LBE7:
  168. 52:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  169. 91 .loc 1 52 3 is_stmt 1 view .LVU22
  170. 55:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  171. 92 .loc 1 55 3 view .LVU23
  172. 93 0020 FFF7FEFF bl HAL_RCC_GetClockConfig
  173. 94 .LVL2:
  174. 58:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  175. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 4
  176. 95 .loc 1 58 7 view .LVU24
  177. 58:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  178. 96 .loc 1 58 20 is_stmt 0 view .LVU25
  179. 97 0024 FFF7FEFF bl HAL_RCC_GetPCLK2Freq
  180. 98 .LVL3:
  181. 61:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  182. 99 .loc 1 61 46 view .LVU26
  183. 100 0028 174A ldr r2, .L8+8
  184. 101 .LVL4:
  185. 61:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  186. 102 .loc 1 61 3 is_stmt 1 view .LVU27
  187. 103 .loc 1 64 3 view .LVU28
  188. 104 .loc 1 64 18 is_stmt 0 view .LVU29
  189. 105 002a 1849 ldr r1, .L8+12
  190. 61:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  191. 106 .loc 1 61 46 view .LVU30
  192. 107 002c A2FB0023 umull r2, r3, r2, r0
  193. 108 0030 9B0C lsrs r3, r3, #18
  194. 61:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  195. 109 .loc 1 61 20 view .LVU31
  196. 110 0032 013B subs r3, r3, #1
  197. 65:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  198. 66:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Initialize TIMx peripheral as follow:
  199. 67:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
  200. 68:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  201. 69:Core/Src/stm32f3xx_hal_timebase_tim.c **** * ClockDivision = 0
  202. 70:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Counter direction = Up
  203. 71:Core/Src/stm32f3xx_hal_timebase_tim.c **** */
  204. 72:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Period = (1000000U / 1000U) - 1U;
  205. 73:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Prescaler = uwPrescalerValue;
  206. 74:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.ClockDivision = 0;
  207. 111 .loc 1 74 28 view .LVU32
  208. 112 0034 0022 movs r2, #0
  209. 73:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.ClockDivision = 0;
  210. 113 .loc 1 73 24 view .LVU33
  211. 114 0036 C4E90013 strd r1, r3, [r4]
  212. 75:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
  213. 76:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  214. 77:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  215. 78:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_TIM_Base_Init(&htim1);
  216. 115 .loc 1 78 12 view .LVU34
  217. 116 003a 2046 mov r0, r4
  218. 117 .LVL5:
  219. 72:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Prescaler = uwPrescalerValue;
  220. 118 .loc 1 72 21 view .LVU35
  221. 119 003c 40F2E733 movw r3, #999
  222. 74:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
  223. 120 .loc 1 74 28 view .LVU36
  224. 121 0040 2261 str r2, [r4, #16]
  225. 75:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
  226. 122 .loc 1 75 26 view .LVU37
  227. 123 0042 A260 str r2, [r4, #8]
  228. 76:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  229. 124 .loc 1 76 32 view .LVU38
  230. 125 0044 A261 str r2, [r4, #24]
  231. 72:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Prescaler = uwPrescalerValue;
  232. 126 .loc 1 72 21 view .LVU39
  233. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 5
  234. 127 0046 E360 str r3, [r4, #12]
  235. 73:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.ClockDivision = 0;
  236. 128 .loc 1 73 3 is_stmt 1 view .LVU40
  237. 74:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
  238. 129 .loc 1 74 3 view .LVU41
  239. 75:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  240. 130 .loc 1 75 3 view .LVU42
  241. 76:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  242. 131 .loc 1 76 3 view .LVU43
  243. 132 .loc 1 78 3 view .LVU44
  244. 133 .loc 1 78 12 is_stmt 0 view .LVU45
  245. 134 0048 FFF7FEFF bl HAL_TIM_Base_Init
  246. 135 .LVL6:
  247. 79:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK)
  248. 136 .loc 1 79 3 is_stmt 1 view .LVU46
  249. 137 .loc 1 79 6 is_stmt 0 view .LVU47
  250. 138 004c 0546 mov r5, r0
  251. 139 004e 10B1 cbz r0, .L6
  252. 140 .LVL7:
  253. 141 .L2:
  254. 80:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  255. 81:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Start the TIM time Base generation in interrupt mode */
  256. 82:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_TIM_Base_Start_IT(&htim1);
  257. 83:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK)
  258. 84:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  259. 85:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable the TIM1 global Interrupt */
  260. 86:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
  261. 87:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the SysTick IRQ priority */
  262. 88:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS))
  263. 89:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  264. 90:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the TIM IRQ priority */
  265. 91:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, TickPriority, 0U);
  266. 92:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwTickPrio = TickPriority;
  267. 93:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  268. 94:Core/Src/stm32f3xx_hal_timebase_tim.c **** else
  269. 95:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  270. 96:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_ERROR;
  271. 97:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  272. 98:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  273. 99:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  274. 100:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  275. 101:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Return function status */
  276. 102:Core/Src/stm32f3xx_hal_timebase_tim.c **** return status;
  277. 142 .loc 1 102 3 is_stmt 1 view .LVU48
  278. 103:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  279. 143 .loc 1 103 1 is_stmt 0 view .LVU49
  280. 144 0050 2846 mov r0, r5
  281. 145 0052 08B0 add sp, sp, #32
  282. 146 .LCFI2:
  283. 147 .cfi_remember_state
  284. 148 .cfi_def_cfa_offset 16
  285. 149 @ sp needed
  286. 150 0054 70BD pop {r4, r5, r6, pc}
  287. 151 .LVL8:
  288. 152 .L6:
  289. 153 .LCFI3:
  290. 154 .cfi_restore_state
  291. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 6
  292. 82:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK)
  293. 155 .loc 1 82 5 is_stmt 1 view .LVU50
  294. 82:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK)
  295. 156 .loc 1 82 14 is_stmt 0 view .LVU51
  296. 157 0056 2046 mov r0, r4
  297. 158 .LVL9:
  298. 82:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK)
  299. 159 .loc 1 82 14 view .LVU52
  300. 160 0058 FFF7FEFF bl HAL_TIM_Base_Start_IT
  301. 161 .LVL10:
  302. 83:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  303. 162 .loc 1 83 5 is_stmt 1 view .LVU53
  304. 83:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  305. 163 .loc 1 83 8 is_stmt 0 view .LVU54
  306. 164 005c 0546 mov r5, r0
  307. 165 005e 0028 cmp r0, #0
  308. 166 0060 F6D1 bne .L2
  309. 86:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the SysTick IRQ priority */
  310. 167 .loc 1 86 9 is_stmt 1 view .LVU55
  311. 168 0062 1920 movs r0, #25
  312. 169 .LVL11:
  313. 86:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the SysTick IRQ priority */
  314. 170 .loc 1 86 9 is_stmt 0 view .LVU56
  315. 171 0064 FFF7FEFF bl HAL_NVIC_EnableIRQ
  316. 172 .LVL12:
  317. 88:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  318. 173 .loc 1 88 7 is_stmt 1 view .LVU57
  319. 88:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  320. 174 .loc 1 88 10 is_stmt 0 view .LVU58
  321. 175 0068 0F2E cmp r6, #15
  322. 176 006a 01D9 bls .L7
  323. 96:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  324. 177 .loc 1 96 16 view .LVU59
  325. 178 006c 0125 movs r5, #1
  326. 179 006e EFE7 b .L2
  327. 180 .L7:
  328. 91:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwTickPrio = TickPriority;
  329. 181 .loc 1 91 9 is_stmt 1 view .LVU60
  330. 182 0070 2A46 mov r2, r5
  331. 183 0072 3146 mov r1, r6
  332. 184 0074 1920 movs r0, #25
  333. 185 0076 FFF7FEFF bl HAL_NVIC_SetPriority
  334. 186 .LVL13:
  335. 92:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  336. 187 .loc 1 92 9 view .LVU61
  337. 92:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  338. 188 .loc 1 92 20 is_stmt 0 view .LVU62
  339. 189 007a 054B ldr r3, .L8+16
  340. 190 007c 1E60 str r6, [r3]
  341. 191 007e E7E7 b .L2
  342. 192 .L9:
  343. 193 .align 2
  344. 194 .L8:
  345. 195 0080 00100240 .word 1073876992
  346. 196 0084 00000000 .word .LANCHOR0
  347. 197 0088 83DE1B43 .word 1125899907
  348. 198 008c 002C0140 .word 1073818624
  349. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 7
  350. 199 0090 00000000 .word uwTickPrio
  351. 200 .cfi_endproc
  352. 201 .LFE130:
  353. 203 .section .text.HAL_SuspendTick,"ax",%progbits
  354. 204 .align 1
  355. 205 .p2align 2,,3
  356. 206 .global HAL_SuspendTick
  357. 207 .syntax unified
  358. 208 .thumb
  359. 209 .thumb_func
  360. 211 HAL_SuspendTick:
  361. 212 .LFB131:
  362. 104:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  363. 105:Core/Src/stm32f3xx_hal_timebase_tim.c **** /**
  364. 106:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief Suspend Tick increment.
  365. 107:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note Disable the tick increment by disabling TIM1 update interrupt.
  366. 108:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param None
  367. 109:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval None
  368. 110:Core/Src/stm32f3xx_hal_timebase_tim.c **** */
  369. 111:Core/Src/stm32f3xx_hal_timebase_tim.c **** void HAL_SuspendTick(void)
  370. 112:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  371. 213 .loc 1 112 1 is_stmt 1 view -0
  372. 214 .cfi_startproc
  373. 215 @ args = 0, pretend = 0, frame = 0
  374. 216 @ frame_needed = 0, uses_anonymous_args = 0
  375. 217 @ link register save eliminated.
  376. 113:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Disable TIM1 update Interrupt */
  377. 114:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
  378. 218 .loc 1 114 3 view .LVU64
  379. 219 0000 034B ldr r3, .L11
  380. 220 0002 1A68 ldr r2, [r3]
  381. 221 0004 D368 ldr r3, [r2, #12]
  382. 222 0006 23F00103 bic r3, r3, #1
  383. 223 000a D360 str r3, [r2, #12]
  384. 115:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  385. 224 .loc 1 115 1 is_stmt 0 view .LVU65
  386. 225 000c 7047 bx lr
  387. 226 .L12:
  388. 227 000e 00BF .align 2
  389. 228 .L11:
  390. 229 0010 00000000 .word .LANCHOR0
  391. 230 .cfi_endproc
  392. 231 .LFE131:
  393. 233 .section .text.HAL_ResumeTick,"ax",%progbits
  394. 234 .align 1
  395. 235 .p2align 2,,3
  396. 236 .global HAL_ResumeTick
  397. 237 .syntax unified
  398. 238 .thumb
  399. 239 .thumb_func
  400. 241 HAL_ResumeTick:
  401. 242 .LFB132:
  402. 116:Core/Src/stm32f3xx_hal_timebase_tim.c ****
  403. 117:Core/Src/stm32f3xx_hal_timebase_tim.c **** /**
  404. 118:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief Resume Tick increment.
  405. 119:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note Enable the tick increment by Enabling TIM1 update interrupt.
  406. 120:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param None
  407. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 8
  408. 121:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval None
  409. 122:Core/Src/stm32f3xx_hal_timebase_tim.c **** */
  410. 123:Core/Src/stm32f3xx_hal_timebase_tim.c **** void HAL_ResumeTick(void)
  411. 124:Core/Src/stm32f3xx_hal_timebase_tim.c **** {
  412. 243 .loc 1 124 1 is_stmt 1 view -0
  413. 244 .cfi_startproc
  414. 245 @ args = 0, pretend = 0, frame = 0
  415. 246 @ frame_needed = 0, uses_anonymous_args = 0
  416. 247 @ link register save eliminated.
  417. 125:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable TIM1 Update interrupt */
  418. 126:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
  419. 248 .loc 1 126 3 view .LVU67
  420. 249 0000 034B ldr r3, .L14
  421. 250 0002 1A68 ldr r2, [r3]
  422. 251 0004 D368 ldr r3, [r2, #12]
  423. 252 0006 43F00103 orr r3, r3, #1
  424. 253 000a D360 str r3, [r2, #12]
  425. 127:Core/Src/stm32f3xx_hal_timebase_tim.c **** }
  426. 254 .loc 1 127 1 is_stmt 0 view .LVU68
  427. 255 000c 7047 bx lr
  428. 256 .L15:
  429. 257 000e 00BF .align 2
  430. 258 .L14:
  431. 259 0010 00000000 .word .LANCHOR0
  432. 260 .cfi_endproc
  433. 261 .LFE132:
  434. 263 .global htim1
  435. 264 .section .bss.htim1,"aw",%nobits
  436. 265 .align 2
  437. 266 .set .LANCHOR0,. + 0
  438. 269 htim1:
  439. 270 0000 00000000 .space 76
  440. 270 00000000
  441. 270 00000000
  442. 270 00000000
  443. 270 00000000
  444. 271 .text
  445. 272 .Letext0:
  446. 273 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
  447. 274 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
  448. 275 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
  449. 276 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
  450. 277 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
  451. 278 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
  452. 279 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h"
  453. 280 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
  454. 281 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h"
  455. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s page 9
  456. DEFINED SYMBOLS
  457. *ABS*:00000000 stm32f3xx_hal_timebase_tim.c
  458. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:20 .text.HAL_InitTick:00000000 $t
  459. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:27 .text.HAL_InitTick:00000000 HAL_InitTick
  460. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:195 .text.HAL_InitTick:00000080 $d
  461. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:204 .text.HAL_SuspendTick:00000000 $t
  462. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:211 .text.HAL_SuspendTick:00000000 HAL_SuspendTick
  463. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:229 .text.HAL_SuspendTick:00000010 $d
  464. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:234 .text.HAL_ResumeTick:00000000 $t
  465. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:241 .text.HAL_ResumeTick:00000000 HAL_ResumeTick
  466. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:259 .text.HAL_ResumeTick:00000010 $d
  467. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:269 .bss.htim1:00000000 htim1
  468. C:\Users\zl835\AppData\Local\Temp\ccd3ZBta.s:265 .bss.htim1:00000000 $d
  469. UNDEFINED SYMBOLS
  470. HAL_RCC_GetClockConfig
  471. HAL_RCC_GetPCLK2Freq
  472. HAL_TIM_Base_Init
  473. HAL_TIM_Base_Start_IT
  474. HAL_NVIC_EnableIRQ
  475. HAL_NVIC_SetPriority
  476. uwTickPrio