V9_PMU302_Bootloader/build/stm32f3xx_hal_pwr.lst

ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 2
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"stm32f3xx_hal_pwr.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.section	.text.HAL_PWR_DeInit,"ax",%progbits
  20              		.align	1
  21              		.p2align 2,,3
  22              		.global	HAL_PWR_DeInit
  23              		.syntax unified
  24              		.thumb
  25              		.thumb_func
  27              	HAL_PWR_DeInit:
  28              	.LFB130:
  29              		.file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c"
   1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
   2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   ******************************************************************************
   3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @file    stm32f3xx_hal_pwr.c
   4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @author  MCD Application Team
   5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief   PWR HAL module driver.
   6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          This file provides firmware functions to manage the following
   7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          functionalities of the Power Controller (PWR) peripheral:
   8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           + Initialization/de-initialization functions
   9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           + Peripheral Control functions
  10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
  11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   ******************************************************************************
  12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @attention
  13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
  14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * Copyright (c) 2016 STMicroelectronics.
  15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * All rights reserved.
  16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
  17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * This software is licensed under terms that can be found in the LICENSE file
  18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * in the root directory of this software component.
  19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
  21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   ******************************************************************************
  22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/
  25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #include "stm32f3xx_hal.h"
  26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @addtogroup STM32F3xx_HAL_Driver
  28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @{
  29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 2


  30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR PWR
  32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief PWR HAL module driver
  33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @{
  34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED
  37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/
  39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/
  40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/
  41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/
  42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/
  43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/
  44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions
  46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @{
  47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
  50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *  @brief    Initialization and de-initialization functions
  51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
  52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim
  53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****  ===============================================================================
  54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****               ##### Initialization and de-initialization functions #####
  55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****  ===============================================================================
  56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
  57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       After reset, the backup domain (RTC registers, RTC backup data
  58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       registers and backup SRAM) is protected against possible unwanted
  59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       write accesses.
  60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       To enable access to the RTC Domain and RTC registers, proceed as follows:
  61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****         (+) Enable the Power Controller (PWR) APB1 interface clock using the
  62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****             __HAL_RCC_PWR_CLK_ENABLE() macro.
  63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****         (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim
  66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @{
  67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
  70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Deinitializes the PWR peripheral registers to their default reset values.
  71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
  72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DeInit(void)
  74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
  30              		.loc 1 74 1 view -0
  31              		.cfi_startproc
  32              		@ args = 0, pretend = 0, frame = 0
  33              		@ frame_needed = 0, uses_anonymous_args = 0
  34              		@ link register save eliminated.
  75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   __HAL_RCC_PWR_FORCE_RESET();
  35              		.loc 1 75 3 view .LVU1
  36 0000 044B     		ldr	r3, .L3
  37 0002 1A69     		ldr	r2, [r3, #16]
  38 0004 42F08052 		orr	r2, r2, #268435456
  39 0008 1A61     		str	r2, [r3, #16]
  76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   __HAL_RCC_PWR_RELEASE_RESET();
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 3


  40              		.loc 1 76 3 view .LVU2
  41 000a 1A69     		ldr	r2, [r3, #16]
  42 000c 22F08052 		bic	r2, r2, #268435456
  43 0010 1A61     		str	r2, [r3, #16]
  77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
  44              		.loc 1 77 1 is_stmt 0 view .LVU3
  45 0012 7047     		bx	lr
  46              	.L4:
  47              		.align	2
  48              	.L3:
  49 0014 00100240 		.word	1073876992
  50              		.cfi_endproc
  51              	.LFE130:
  53              		.section	.text.HAL_PWR_EnableBkUpAccess,"ax",%progbits
  54              		.align	1
  55              		.p2align 2,,3
  56              		.global	HAL_PWR_EnableBkUpAccess
  57              		.syntax unified
  58              		.thumb
  59              		.thumb_func
  61              	HAL_PWR_EnableBkUpAccess:
  62              	.LFB131:
  78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
  80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enables access to the backup domain (RTC registers, RTC
  81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         backup data registers and backup SRAM).
  82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  If the HSE divided by 32 is used as the RTC clock, the
  83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         Backup Domain Access should be kept enabled.
  84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
  85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void)
  87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
  63              		.loc 1 87 1 is_stmt 1 view -0
  64              		.cfi_startproc
  65              		@ args = 0, pretend = 0, frame = 0
  66              		@ frame_needed = 0, uses_anonymous_args = 0
  67              		@ link register save eliminated.
  88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SET_BIT(PWR->CR, PWR_CR_DBP);  
  68              		.loc 1 88 3 view .LVU5
  69 0000 024A     		ldr	r2, .L6
  70 0002 1368     		ldr	r3, [r2]
  71 0004 43F48073 		orr	r3, r3, #256
  72 0008 1360     		str	r3, [r2]
  89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
  73              		.loc 1 89 1 is_stmt 0 view .LVU6
  74 000a 7047     		bx	lr
  75              	.L7:
  76              		.align	2
  77              	.L6:
  78 000c 00700040 		.word	1073770496
  79              		.cfi_endproc
  80              	.LFE131:
  82              		.section	.text.HAL_PWR_DisableBkUpAccess,"ax",%progbits
  83              		.align	1
  84              		.p2align 2,,3
  85              		.global	HAL_PWR_DisableBkUpAccess
  86              		.syntax unified
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 4


  87              		.thumb
  88              		.thumb_func
  90              	HAL_PWR_DisableBkUpAccess:
  91              	.LFB132:
  90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
  91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
  92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Disables access to the backup domain (RTC registers, RTC
  93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         backup data registers and backup SRAM).
  94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  If the HSE divided by 32 is used as the RTC clock, the
  95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         Backup Domain Access should be kept enabled.
  96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
  97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
  98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void)
  99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
  92              		.loc 1 99 1 is_stmt 1 view -0
  93              		.cfi_startproc
  94              		@ args = 0, pretend = 0, frame = 0
  95              		@ frame_needed = 0, uses_anonymous_args = 0
  96              		@ link register save eliminated.
 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   CLEAR_BIT(PWR->CR, PWR_CR_DBP);  
  97              		.loc 1 100 3 view .LVU8
  98 0000 024A     		ldr	r2, .L9
  99 0002 1368     		ldr	r3, [r2]
 100 0004 23F48073 		bic	r3, r3, #256
 101 0008 1360     		str	r3, [r2]
 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 102              		.loc 1 101 1 is_stmt 0 view .LVU9
 103 000a 7047     		bx	lr
 104              	.L10:
 105              		.align	2
 106              	.L9:
 107 000c 00700040 		.word	1073770496
 108              		.cfi_endproc
 109              	.LFE132:
 111              		.section	.rodata.HAL_PWR_EnableWakeUpPin.str1.4,"aMS",%progbits,1
 112              		.align	2
 113              	.LC0:
 114 0000 44726976 		.ascii	"Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr."
 114      6572732F 
 114      53544D33 
 114      32463378 
 114      785F4841 
 115 0033 6300     		.ascii	"c\000"
 116              		.section	.text.HAL_PWR_EnableWakeUpPin,"ax",%progbits
 117              		.align	1
 118              		.p2align 2,,3
 119              		.global	HAL_PWR_EnableWakeUpPin
 120              		.syntax unified
 121              		.thumb
 122              		.thumb_func
 124              	HAL_PWR_EnableWakeUpPin:
 125              	.LVL0:
 126              	.LFB133:
 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @}
 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 5


 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions 
 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *  @brief Low Power modes configuration functions
 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *
 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim
 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****  ===============================================================================
 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                  ##### Peripheral Control functions #####
 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****  ===============================================================================
 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     
 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     *** WakeUp pin configuration ***
 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     ================================
 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           forced in input pull down configuration and is active on rising edges.
 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) There are up to three WakeUp pins:
 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++)WakeUp Pin 1 on PA.00.
 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++)WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only).
 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++)WakeUp Pin 3 on PE.06.
 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     *** Main and Backup Regulators configuration ***
 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     ================================================
 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           the backup SRAM is powered from VDD which replaces the VBAT power supply to
 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           save battery life.
 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) The backup SRAM is not mass erased by a tamper event. It is read
 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           protected to prevent confidential data, such as cryptographic private
 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           key, from being accessed. The backup SRAM can be erased only through
 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           the Flash interface when a protection level change from level 1 to
 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           level 0 is requested.
 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       -@- Refer to the description of Read protection (RDP) in the Flash
 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           programming manual.
 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****         Refer to the datasheets for more details.
 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     *** Low Power modes configuration ***
 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     =====================================
 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The devices feature 3 low-power modes:
 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Stop mode: all clocks are stopped, regulator running, regulator
 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           in low power mode
 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices).
 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    *** Sleep mode ***
 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    ==================
 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Entry:
 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S
 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****               functions with
 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****      
 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Exit:
 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 6


 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****               controller (NVIC) can wake up the device from Sleep mode.
 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    *** Stop mode ***
 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    =================
 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       and the HSE RC oscillators are disabled. Internal SRAM and register contents
 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       are preserved.
 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The voltage regulator can be configured either in normal or low-power mode to minimize the co
 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Entry:
 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN
 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****              function with:
 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) Main regulator ON or
 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) Low Power regulator ON.
 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction or
 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Exit:
 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, 
 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                when programmed in wakeup mode (the peripheral must be 
 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                programmed in wakeup mode and the corresponding interrupt vector 
 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                must be enabled in the NVIC).
 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    *** Standby mode ***
 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    ====================
 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****      [..]
 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The Standby mode allows to achieve the lowest power consumption. It is based
 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       the HSE oscillator are also switched off. SRAM and register contents are lost
 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       except for the RTC registers, RTC backup registers, backup SRAM and Standby
 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       circuitry.
 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The voltage regulator is OFF.
 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Entry:
 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (+) Exit:
 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****           (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    *** Auto-wakeup (AWU) from low-power mode ***
 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****    =============================================
 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     [..]
 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       Wakeup event, a tamper event, a time-stamp event, or a comparator event, 
 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       without depending on an external interrupt (Auto-wakeup mode).
 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****             configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****            is necessary to configure the RTC to detect the tamper or time stamp event using the
 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****            HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 7


 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****            configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT()
 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     (+) Comparator auto-wakeup (AWU) from the Stop mode
 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****       (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****            (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c
 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                  to be sensitive to to the selected edges (falling, rising or falling 
 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****                  and rising) (Interrupt or Event modes) using the EXTI_Init() function.
 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****            (+++) Configure the comparator to generate the event.      
 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim
 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @{
 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enables the WakeUp PINx functionality.
 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         This parameter can be value of :
 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           @ref PWR_WakeUp_Pins
 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 127              		.loc 1 242 1 is_stmt 1 view -0
 128              		.cfi_startproc
 129              		@ args = 0, pretend = 0, frame = 0
 130              		@ frame_needed = 0, uses_anonymous_args = 0
 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 131              		.loc 1 244 3 view .LVU11
 132 0000 B0F5807F 		cmp	r0, #256
 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 133              		.loc 1 242 1 is_stmt 0 view .LVU12
 134 0004 10B5     		push	{r4, lr}
 135              	.LCFI0:
 136              		.cfi_def_cfa_offset 8
 137              		.cfi_offset 4, -8
 138              		.cfi_offset 14, -4
 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 139              		.loc 1 242 1 view .LVU13
 140 0006 0446     		mov	r4, r0
 141              		.loc 1 244 3 view .LVU14
 142 0008 09D0     		beq	.L12
 143              		.loc 1 244 3 discriminator 1 view .LVU15
 144 000a B0F5007F 		cmp	r0, #512
 145 000e 06D0     		beq	.L12
 146              		.loc 1 244 3 discriminator 2 view .LVU16
 147 0010 B0F5806F 		cmp	r0, #1024
 148 0014 03D0     		beq	.L12
 149              		.loc 1 244 3 discriminator 3 view .LVU17
 150 0016 0448     		ldr	r0, .L23
 151              	.LVL1:
 152              		.loc 1 244 3 discriminator 3 view .LVU18
 153 0018 F421     		movs	r1, #244
 154 001a FFF7FEFF 		bl	assert_failed
 155              	.LVL2:
 156              	.L12:
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 8


 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Enable the EWUPx pin */
 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SET_BIT(PWR->CSR, WakeUpPinx);
 157              		.loc 1 246 3 is_stmt 1 view .LVU19
 158 001e 034B     		ldr	r3, .L23+4
 159 0020 5868     		ldr	r0, [r3, #4]
 160 0022 0443     		orrs	r4, r4, r0
 161              	.LVL3:
 162              		.loc 1 246 3 is_stmt 0 view .LVU20
 163 0024 5C60     		str	r4, [r3, #4]
 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 164              		.loc 1 247 1 view .LVU21
 165 0026 10BD     		pop	{r4, pc}
 166              	.L24:
 167              		.align	2
 168              	.L23:
 169 0028 00000000 		.word	.LC0
 170 002c 00700040 		.word	1073770496
 171              		.cfi_endproc
 172              	.LFE133:
 174              		.section	.text.HAL_PWR_DisableWakeUpPin,"ax",%progbits
 175              		.align	1
 176              		.p2align 2,,3
 177              		.global	HAL_PWR_DisableWakeUpPin
 178              		.syntax unified
 179              		.thumb
 180              		.thumb_func
 182              	HAL_PWR_DisableWakeUpPin:
 183              	.LVL4:
 184              	.LFB134:
 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Disables the WakeUp PINx functionality.
 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         This parameter can be values of :
 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           @ref PWR_WakeUp_Pins
 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 185              		.loc 1 257 1 is_stmt 1 view -0
 186              		.cfi_startproc
 187              		@ args = 0, pretend = 0, frame = 0
 188              		@ frame_needed = 0, uses_anonymous_args = 0
 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
 189              		.loc 1 259 3 view .LVU23
 190 0000 B0F5807F 		cmp	r0, #256
 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 191              		.loc 1 257 1 is_stmt 0 view .LVU24
 192 0004 10B5     		push	{r4, lr}
 193              	.LCFI1:
 194              		.cfi_def_cfa_offset 8
 195              		.cfi_offset 4, -8
 196              		.cfi_offset 14, -4
 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 197              		.loc 1 257 1 view .LVU25
 198 0006 0446     		mov	r4, r0
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 9


 199              		.loc 1 259 3 view .LVU26
 200 0008 0AD0     		beq	.L26
 201              		.loc 1 259 3 discriminator 1 view .LVU27
 202 000a B0F5007F 		cmp	r0, #512
 203 000e 07D0     		beq	.L26
 204              		.loc 1 259 3 discriminator 2 view .LVU28
 205 0010 B0F5806F 		cmp	r0, #1024
 206 0014 04D0     		beq	.L26
 207              		.loc 1 259 3 discriminator 3 view .LVU29
 208 0016 0548     		ldr	r0, .L37
 209              	.LVL5:
 210              		.loc 1 259 3 discriminator 3 view .LVU30
 211 0018 40F20311 		movw	r1, #259
 212 001c FFF7FEFF 		bl	assert_failed
 213              	.LVL6:
 214              	.L26:
 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Disable the EWUPx pin */
 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   CLEAR_BIT(PWR->CSR, WakeUpPinx);
 215              		.loc 1 261 3 is_stmt 1 view .LVU31
 216 0020 034B     		ldr	r3, .L37+4
 217 0022 5868     		ldr	r0, [r3, #4]
 218 0024 20EA0404 		bic	r4, r0, r4
 219              	.LVL7:
 220              		.loc 1 261 3 is_stmt 0 view .LVU32
 221 0028 5C60     		str	r4, [r3, #4]
 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 222              		.loc 1 262 1 view .LVU33
 223 002a 10BD     		pop	{r4, pc}
 224              	.L38:
 225              		.align	2
 226              	.L37:
 227 002c 00000000 		.word	.LC0
 228 0030 00700040 		.word	1073770496
 229              		.cfi_endproc
 230              	.LFE134:
 232              		.section	.text.HAL_PWR_EnterSLEEPMode,"ax",%progbits
 233              		.align	1
 234              		.p2align 2,,3
 235              		.global	HAL_PWR_EnterSLEEPMode
 236              		.syntax unified
 237              		.thumb
 238              		.thumb_func
 240              	HAL_PWR_EnterSLEEPMode:
 241              	.LVL8:
 242              	.LFB135:
 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enters Sleep mode.
 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param Regulator Specifies the regulator state in SLEEP mode.
 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          This parameter can be one of the following values:
 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note This parameter has no effect in F3 family and is just maintained to 
 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       offer full portability of other STM32 families software.
 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction.
 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           When WFI entry is used, tick interrupt have to be disabled if not desired as 
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 10


 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           the interrupt wake up source.
 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *           This parameter can be one of the following values:
 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 243              		.loc 1 282 1 is_stmt 1 view -0
 244              		.cfi_startproc
 245              		@ args = 0, pretend = 0, frame = 0
 246              		@ frame_needed = 0, uses_anonymous_args = 0
 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
 247              		.loc 1 284 3 view .LVU35
 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 248              		.loc 1 282 1 is_stmt 0 view .LVU36
 249 0000 08B5     		push	{r3, lr}
 250              	.LCFI2:
 251              		.cfi_def_cfa_offset 8
 252              		.cfi_offset 3, -8
 253              		.cfi_offset 14, -4
 254              		.loc 1 284 3 view .LVU37
 255 0002 4B1E     		subs	r3, r1, #1
 256 0004 012B     		cmp	r3, #1
 257 0006 08D8     		bhi	.L44
 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Prevent unused argument(s) compilation warning */
 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   UNUSED(Regulator);
 258              		.loc 1 287 3 is_stmt 1 view .LVU38
 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Clear SLEEPDEEP bit of Cortex System Control Register */
 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
 259              		.loc 1 290 3 view .LVU39
 260              		.loc 1 290 12 is_stmt 0 view .LVU40
 261 0008 0B4A     		ldr	r2, .L45
 262 000a 1369     		ldr	r3, [r2, #16]
 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Select SLEEP mode entry -------------------------------------------------*/
 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
 263              		.loc 1 293 5 view .LVU41
 264 000c 0129     		cmp	r1, #1
 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 265              		.loc 1 290 12 view .LVU42
 266 000e 23F00403 		bic	r3, r3, #4
 267 0012 1361     		str	r3, [r2, #16]
 268              		.loc 1 293 3 is_stmt 1 view .LVU43
 269              		.loc 1 293 5 is_stmt 0 view .LVU44
 270 0014 0BD1     		bne	.L41
 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     /* Request Wait For Interrupt */
 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFI();
 271              		.loc 1 296 5 is_stmt 1 view .LVU45
 272              		.syntax unified
 273              	@ 296 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 274 0016 30BF     		wfi
 275              	@ 0 "" 2
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 11


 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   }
 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   else
 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     /* Request Wait For Event */
 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __SEV();
 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   }
 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 276              		.loc 1 305 1 is_stmt 0 view .LVU46
 277              		.thumb
 278              		.syntax unified
 279 0018 08BD     		pop	{r3, pc}
 280              	.L44:
 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 281              		.loc 1 284 3 discriminator 1 view .LVU47
 282 001a 0848     		ldr	r0, .L45+4
 283              	.LVL9:
 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 284              		.loc 1 284 3 discriminator 1 view .LVU48
 285 001c 4FF48E71 		mov	r1, #284
 286              	.LVL10:
 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 287              		.loc 1 284 3 discriminator 1 view .LVU49
 288 0020 FFF7FEFF 		bl	assert_failed
 289              	.LVL11:
 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 290              		.loc 1 287 3 is_stmt 1 discriminator 1 view .LVU50
 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 291              		.loc 1 290 3 discriminator 1 view .LVU51
 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 292              		.loc 1 290 12 is_stmt 0 discriminator 1 view .LVU52
 293 0024 044A     		ldr	r2, .L45
 294 0026 1369     		ldr	r3, [r2, #16]
 295 0028 23F00403 		bic	r3, r3, #4
 296 002c 1361     		str	r3, [r2, #16]
 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 297              		.loc 1 293 3 is_stmt 1 discriminator 1 view .LVU53
 298              	.L41:
 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 299              		.loc 1 301 5 view .LVU54
 300              		.syntax unified
 301              	@ 301 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 302 002e 40BF     		sev
 303              	@ 0 "" 2
 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 304              		.loc 1 302 5 view .LVU55
 305              	@ 302 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 306 0030 20BF     		wfe
 307              	@ 0 "" 2
 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   }
 308              		.loc 1 303 5 view .LVU56
 309              	@ 303 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 310 0032 20BF     		wfe
 311              	@ 0 "" 2
 312              		.loc 1 305 1 is_stmt 0 view .LVU57
 313              		.thumb
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 12


 314              		.syntax unified
 315 0034 08BD     		pop	{r3, pc}
 316              	.L46:
 317 0036 00BF     		.align	2
 318              	.L45:
 319 0038 00ED00E0 		.word	-536810240
 320 003c 00000000 		.word	.LC0
 321              		.cfi_endproc
 322              	.LFE135:
 324              		.section	.text.HAL_PWR_EnterSTOPMode,"ax",%progbits
 325              		.align	1
 326              		.p2align 2,,3
 327              		.global	HAL_PWR_EnterSTOPMode
 328              		.syntax unified
 329              		.thumb
 330              		.thumb_func
 332              	HAL_PWR_EnterSTOPMode:
 333              	.LVL12:
 334              	.LFB136:
 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enters STOP mode.
 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  When exiting Stop mode by issuing an interrupt or a wakeup event,
 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         the HSI RC oscillator is selected as system clock.
 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  When the voltage regulator operates in low power mode, an additional
 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         startup delay is incurred when waking up from Stop mode.
 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         By keeping the internal regulator ON during Stop mode, the consumption
 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *         is higher although the startup time is reduced.
 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param Regulator Specifies the regulator state in STOP mode.
 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          This parameter can be one of the following values:
 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          This parameter can be one of the following values:
 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 335              		.loc 1 327 1 is_stmt 1 view -0
 336              		.cfi_startproc
 337              		@ args = 0, pretend = 0, frame = 0
 338              		@ frame_needed = 0, uses_anonymous_args = 0
 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   uint32_t tmpreg = 0U;
 339              		.loc 1 328 3 view .LVU59
 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Check the parameters */
 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   assert_param(IS_PWR_REGULATOR(Regulator));
 340              		.loc 1 331 3 view .LVU60
 341 0000 0128     		cmp	r0, #1
 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   uint32_t tmpreg = 0U;
 342              		.loc 1 327 1 is_stmt 0 view .LVU61
 343 0002 38B5     		push	{r3, r4, r5, lr}
 344              	.LCFI3:
 345              		.cfi_def_cfa_offset 16
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 13


 346              		.cfi_offset 3, -16
 347              		.cfi_offset 4, -12
 348              		.cfi_offset 5, -8
 349              		.cfi_offset 14, -4
 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   uint32_t tmpreg = 0U;
 350              		.loc 1 327 1 view .LVU62
 351 0004 0446     		mov	r4, r0
 352 0006 0D46     		mov	r5, r1
 353              		.loc 1 331 3 view .LVU63
 354 0008 04D9     		bls	.L48
 355              		.loc 1 331 3 discriminator 1 view .LVU64
 356 000a 1848     		ldr	r0, .L54
 357              	.LVL13:
 358              		.loc 1 331 3 discriminator 1 view .LVU65
 359 000c 40F24B11 		movw	r1, #331
 360              	.LVL14:
 361              		.loc 1 331 3 discriminator 1 view .LVU66
 362 0010 FFF7FEFF 		bl	assert_failed
 363              	.LVL15:
 364              	.L48:
 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
 365              		.loc 1 332 3 is_stmt 1 view .LVU67
 366 0014 6B1E     		subs	r3, r5, #1
 367 0016 012B     		cmp	r3, #1
 368 0018 0ED8     		bhi	.L53
 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Select the regulator state in STOP mode ---------------------------------*/
 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   tmpreg = PWR->CR;
 369              		.loc 1 335 3 view .LVU68
 370              		.loc 1 335 10 is_stmt 0 view .LVU69
 371 001a 154B     		ldr	r3, .L54+4
 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   
 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Clear PDDS and LPDS bits */
 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Set LPDS bit according to Regulator value */
 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   tmpreg |= Regulator;
 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Store the new value */
 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   PWR->CR = tmpreg;
 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Set SLEEPDEEP bit of Cortex System Control Register */
 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 372              		.loc 1 347 12 view .LVU70
 373 001c 154A     		ldr	r2, .L54+8
 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   
 374              		.loc 1 335 10 view .LVU71
 375 001e 1868     		ldr	r0, [r3]
 376              	.LVL16:
 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 377              		.loc 1 338 3 is_stmt 1 view .LVU72
 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 378              		.loc 1 338 10 is_stmt 0 view .LVU73
 379 0020 20F00300 		bic	r0, r0, #3
 380              	.LVL17:
 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 381              		.loc 1 341 3 is_stmt 1 view .LVU74
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 14


 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 382              		.loc 1 341 10 is_stmt 0 view .LVU75
 383 0024 0443     		orrs	r4, r4, r0
 384              	.LVL18:
 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 385              		.loc 1 344 3 is_stmt 1 view .LVU76
 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 386              		.loc 1 344 11 is_stmt 0 view .LVU77
 387 0026 1C60     		str	r4, [r3]
 388              		.loc 1 347 3 is_stmt 1 view .LVU78
 389              		.loc 1 347 12 is_stmt 0 view .LVU79
 390 0028 1369     		ldr	r3, [r2, #16]
 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Select STOP mode entry --------------------------------------------------*/
 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   if(STOPEntry == PWR_STOPENTRY_WFI)
 391              		.loc 1 350 5 view .LVU80
 392 002a 012D     		cmp	r5, #1
 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 393              		.loc 1 347 12 view .LVU81
 394 002c 43F00403 		orr	r3, r3, #4
 395 0030 1361     		str	r3, [r2, #16]
 396              		.loc 1 350 3 is_stmt 1 view .LVU82
 397              		.loc 1 350 5 is_stmt 0 view .LVU83
 398 0032 11D1     		bne	.L50
 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     /* Request Wait For Interrupt */
 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFI();
 399              		.loc 1 353 5 is_stmt 1 view .LVU84
 400              		.syntax unified
 401              	@ 353 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 402 0034 30BF     		wfi
 403              	@ 0 "" 2
 404              		.thumb
 405              		.syntax unified
 406 0036 12E0     		b	.L51
 407              	.LVL19:
 408              	.L53:
 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 409              		.loc 1 332 3 is_stmt 0 discriminator 1 view .LVU85
 410 0038 0C48     		ldr	r0, .L54
 411 003a 4FF4A671 		mov	r1, #332
 412 003e FFF7FEFF 		bl	assert_failed
 413              	.LVL20:
 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   
 414              		.loc 1 335 3 is_stmt 1 discriminator 1 view .LVU86
 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   
 415              		.loc 1 335 10 is_stmt 0 discriminator 1 view .LVU87
 416 0042 0B4B     		ldr	r3, .L54+4
 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 417              		.loc 1 347 12 discriminator 1 view .LVU88
 418 0044 0B4A     		ldr	r2, .L54+8
 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   
 419              		.loc 1 335 10 discriminator 1 view .LVU89
 420 0046 1868     		ldr	r0, [r3]
 421              	.LVL21:
 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 422              		.loc 1 338 3 is_stmt 1 discriminator 1 view .LVU90
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 15


 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 423              		.loc 1 338 10 is_stmt 0 discriminator 1 view .LVU91
 424 0048 20F00300 		bic	r0, r0, #3
 425              	.LVL22:
 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 426              		.loc 1 341 3 is_stmt 1 discriminator 1 view .LVU92
 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 427              		.loc 1 341 10 is_stmt 0 discriminator 1 view .LVU93
 428 004c 0443     		orrs	r4, r4, r0
 429              	.LVL23:
 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 430              		.loc 1 344 3 is_stmt 1 discriminator 1 view .LVU94
 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 431              		.loc 1 344 11 is_stmt 0 discriminator 1 view .LVU95
 432 004e 1C60     		str	r4, [r3]
 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 433              		.loc 1 347 3 is_stmt 1 discriminator 1 view .LVU96
 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 434              		.loc 1 347 12 is_stmt 0 discriminator 1 view .LVU97
 435 0050 1369     		ldr	r3, [r2, #16]
 436 0052 43F00403 		orr	r3, r3, #4
 437 0056 1361     		str	r3, [r2, #16]
 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 438              		.loc 1 350 3 is_stmt 1 discriminator 1 view .LVU98
 439              	.L50:
 440              	.LVL24:
 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   }
 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   else
 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   {
 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     /* Request Wait For Event */
 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __SEV();
 441              		.loc 1 358 5 view .LVU99
 442              		.syntax unified
 443              	@ 358 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 444 0058 40BF     		sev
 445              	@ 0 "" 2
 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 446              		.loc 1 359 5 view .LVU100
 447              	@ 359 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 448 005a 20BF     		wfe
 449              	@ 0 "" 2
 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****     __WFE();
 450              		.loc 1 360 5 view .LVU101
 451              	@ 360 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 452 005c 20BF     		wfe
 453              	@ 0 "" 2
 454              		.thumb
 455              		.syntax unified
 456              	.L51:
 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   }
 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Reset SLEEPDEEP bit of Cortex System Control Register */
 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
 457              		.loc 1 364 3 view .LVU102
 458              		.loc 1 364 12 is_stmt 0 view .LVU103
 459 005e 054A     		ldr	r2, .L54+8
 460 0060 1369     		ldr	r3, [r2, #16]
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 16


 461 0062 23F00403 		bic	r3, r3, #4
 462 0066 1361     		str	r3, [r2, #16]
 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 463              		.loc 1 365 1 view .LVU104
 464 0068 38BD     		pop	{r3, r4, r5, pc}
 465              	.L55:
 466 006a 00BF     		.align	2
 467              	.L54:
 468 006c 00000000 		.word	.LC0
 469 0070 00700040 		.word	1073770496
 470 0074 00ED00E0 		.word	-536810240
 471              		.cfi_endproc
 472              	.LFE136:
 474              		.section	.text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits
 475              		.align	1
 476              		.p2align 2,,3
 477              		.global	HAL_PWR_EnterSTANDBYMode
 478              		.syntax unified
 479              		.thumb
 480              		.thumb_func
 482              	HAL_PWR_EnterSTANDBYMode:
 483              	.LFB137:
 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enters STANDBY mode.
 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note  In Standby mode, all I/O pins are high impedance except for:
 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          - Reset pad (still available), 
 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          - RTC alternate function pins if configured for tamper, time-stamp, RTC
 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *            Alarm out, or RTC clock calibration out, 
 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *          - WKUP pins if enabled.
 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void)
 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 484              		.loc 1 377 1 is_stmt 1 view -0
 485              		.cfi_startproc
 486              		@ args = 0, pretend = 0, frame = 0
 487              		@ frame_needed = 0, uses_anonymous_args = 0
 488              		@ link register save eliminated.
 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Select STANDBY mode */
 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   PWR->CR |= PWR_CR_PDDS;
 489              		.loc 1 379 3 view .LVU106
 490              		.loc 1 379 11 is_stmt 0 view .LVU107
 491 0000 0549     		ldr	r1, .L57
 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Set SLEEPDEEP bit of Cortex System Control Register */
 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
 492              		.loc 1 382 12 view .LVU108
 493 0002 064A     		ldr	r2, .L57+4
 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 494              		.loc 1 379 11 view .LVU109
 495 0004 0B68     		ldr	r3, [r1]
 496 0006 43F00203 		orr	r3, r3, #2
 497 000a 0B60     		str	r3, [r1]
 498              		.loc 1 382 3 is_stmt 1 view .LVU110
 499              		.loc 1 382 12 is_stmt 0 view .LVU111
 500 000c 1369     		ldr	r3, [r2, #16]
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 17


 501 000e 43F00403 		orr	r3, r3, #4
 502 0012 1361     		str	r3, [r2, #16]
 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* This option is used to ensure that store operations are completed */
 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #if defined ( __CC_ARM)
 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   __force_stores();
 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #endif
 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Request Wait For Interrupt */
 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   __WFI();
 503              		.loc 1 389 3 is_stmt 1 view .LVU112
 504              		.syntax unified
 505              	@ 389 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
 506 0014 30BF     		wfi
 507              	@ 0 "" 2
 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 508              		.loc 1 390 1 is_stmt 0 view .LVU113
 509              		.thumb
 510              		.syntax unified
 511 0016 7047     		bx	lr
 512              	.L58:
 513              		.align	2
 514              	.L57:
 515 0018 00700040 		.word	1073770496
 516 001c 00ED00E0 		.word	-536810240
 517              		.cfi_endproc
 518              	.LFE137:
 520              		.section	.text.HAL_PWR_EnableSleepOnExit,"ax",%progbits
 521              		.align	1
 522              		.p2align 2,,3
 523              		.global	HAL_PWR_EnableSleepOnExit
 524              		.syntax unified
 525              		.thumb
 526              		.thumb_func
 528              	HAL_PWR_EnableSleepOnExit:
 529              	.LFB138:
 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. 
 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       re-enters SLEEP mode when an interruption handling is over.
 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       Setting this bit is useful when the processor is expected to run only on
 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       interruptions handling.         
 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void)
 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 530              		.loc 1 401 1 is_stmt 1 view -0
 531              		.cfi_startproc
 532              		@ args = 0, pretend = 0, frame = 0
 533              		@ frame_needed = 0, uses_anonymous_args = 0
 534              		@ link register save eliminated.
 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Set SLEEPONEXIT bit of Cortex System Control Register */
 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 535              		.loc 1 403 3 view .LVU115
 536 0000 024A     		ldr	r2, .L60
 537 0002 1369     		ldr	r3, [r2, #16]
 538 0004 43F00203 		orr	r3, r3, #2
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 18


 539 0008 1361     		str	r3, [r2, #16]
 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 540              		.loc 1 404 1 is_stmt 0 view .LVU116
 541 000a 7047     		bx	lr
 542              	.L61:
 543              		.align	2
 544              	.L60:
 545 000c 00ED00E0 		.word	-536810240
 546              		.cfi_endproc
 547              	.LFE138:
 549              		.section	.text.HAL_PWR_DisableSleepOnExit,"ax",%progbits
 550              		.align	1
 551              		.p2align 2,,3
 552              		.global	HAL_PWR_DisableSleepOnExit
 553              		.syntax unified
 554              		.thumb
 555              		.thumb_func
 557              	HAL_PWR_DisableSleepOnExit:
 558              	.LFB139:
 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. 
 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       re-enters SLEEP mode when an interruption handling is over.          
 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void)
 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 559              		.loc 1 414 1 is_stmt 1 view -0
 560              		.cfi_startproc
 561              		@ args = 0, pretend = 0, frame = 0
 562              		@ frame_needed = 0, uses_anonymous_args = 0
 563              		@ link register save eliminated.
 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
 564              		.loc 1 416 3 view .LVU118
 565 0000 024A     		ldr	r2, .L63
 566 0002 1369     		ldr	r3, [r2, #16]
 567 0004 23F00203 		bic	r3, r3, #2
 568 0008 1361     		str	r3, [r2, #16]
 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 569              		.loc 1 417 1 is_stmt 0 view .LVU119
 570 000a 7047     		bx	lr
 571              	.L64:
 572              		.align	2
 573              	.L63:
 574 000c 00ED00E0 		.word	-536810240
 575              		.cfi_endproc
 576              	.LFE139:
 578              		.section	.text.HAL_PWR_EnableSEVOnPend,"ax",%progbits
 579              		.align	1
 580              		.p2align 2,,3
 581              		.global	HAL_PWR_EnableSEVOnPend
 582              		.syntax unified
 583              		.thumb
 584              		.thumb_func
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 19


 586              	HAL_PWR_EnableSEVOnPend:
 587              	.LFB140:
 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Enables CORTEX M4 SEVONPEND bit. 
 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes 
 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       WFE to wake up when an interrupt moves from inactive to pended.
 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void)
 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 588              		.loc 1 428 1 is_stmt 1 view -0
 589              		.cfi_startproc
 590              		@ args = 0, pretend = 0, frame = 0
 591              		@ frame_needed = 0, uses_anonymous_args = 0
 592              		@ link register save eliminated.
 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Set SEVONPEND bit of Cortex System Control Register */
 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 593              		.loc 1 430 3 view .LVU121
 594 0000 024A     		ldr	r2, .L66
 595 0002 1369     		ldr	r3, [r2, #16]
 596 0004 43F01003 		orr	r3, r3, #16
 597 0008 1361     		str	r3, [r2, #16]
 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 598              		.loc 1 431 1 is_stmt 0 view .LVU122
 599 000a 7047     		bx	lr
 600              	.L67:
 601              		.align	2
 602              	.L66:
 603 000c 00ED00E0 		.word	-536810240
 604              		.cfi_endproc
 605              	.LFE140:
 607              		.section	.text.HAL_PWR_DisableSEVOnPend,"ax",%progbits
 608              		.align	1
 609              		.p2align 2,,3
 610              		.global	HAL_PWR_DisableSEVOnPend
 611              		.syntax unified
 612              		.thumb
 613              		.thumb_func
 615              	HAL_PWR_DisableSEVOnPend:
 616              	.LFB141:
 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** 
 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @brief Disables CORTEX M4 SEVONPEND bit. 
 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes 
 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   *       WFE to wake up when an interrupt moves from inactive to pended.         
 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   * @retval None
 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   */
 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void)
 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
 617              		.loc 1 441 1 is_stmt 1 view -0
 618              		.cfi_startproc
 619              		@ args = 0, pretend = 0, frame = 0
 620              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 20


 621              		@ link register save eliminated.
 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   /* Clear SEVONPEND bit of Cortex System Control Register */
 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
 622              		.loc 1 443 3 view .LVU124
 623 0000 024A     		ldr	r2, .L69
 624 0002 1369     		ldr	r3, [r2, #16]
 625 0004 23F01003 		bic	r3, r3, #16
 626 0008 1361     		str	r3, [r2, #16]
 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
 627              		.loc 1 444 1 is_stmt 0 view .LVU125
 628 000a 7047     		bx	lr
 629              	.L70:
 630              		.align	2
 631              	.L69:
 632 000c 00ED00E0 		.word	-536810240
 633              		.cfi_endproc
 634              	.LFE141:
 636              		.text
 637              	.Letext0:
 638              		.file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
 639              		.file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
 640              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
 641              		.file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
 642              		.file 6 "Core/Inc/stm32f3xx_hal_conf.h"
ARM GAS  C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s 			page 21


DEFINED SYMBOLS
                            *ABS*:00000000 stm32f3xx_hal_pwr.c
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:20     .text.HAL_PWR_DeInit:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:27     .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:49     .text.HAL_PWR_DeInit:00000014 $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:54     .text.HAL_PWR_EnableBkUpAccess:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:61     .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:78     .text.HAL_PWR_EnableBkUpAccess:0000000c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:83     .text.HAL_PWR_DisableBkUpAccess:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:90     .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:107    .text.HAL_PWR_DisableBkUpAccess:0000000c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:112    .rodata.HAL_PWR_EnableWakeUpPin.str1.4:00000000 $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:117    .text.HAL_PWR_EnableWakeUpPin:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:124    .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:169    .text.HAL_PWR_EnableWakeUpPin:00000028 $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:175    .text.HAL_PWR_DisableWakeUpPin:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:182    .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:227    .text.HAL_PWR_DisableWakeUpPin:0000002c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:233    .text.HAL_PWR_EnterSLEEPMode:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:240    .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:319    .text.HAL_PWR_EnterSLEEPMode:00000038 $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:325    .text.HAL_PWR_EnterSTOPMode:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:332    .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:468    .text.HAL_PWR_EnterSTOPMode:0000006c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:475    .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:482    .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:515    .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:521    .text.HAL_PWR_EnableSleepOnExit:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:528    .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:545    .text.HAL_PWR_EnableSleepOnExit:0000000c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:550    .text.HAL_PWR_DisableSleepOnExit:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:557    .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:574    .text.HAL_PWR_DisableSleepOnExit:0000000c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:579    .text.HAL_PWR_EnableSEVOnPend:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:586    .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:603    .text.HAL_PWR_EnableSEVOnPend:0000000c $d
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:608    .text.HAL_PWR_DisableSEVOnPend:00000000 $t
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:615    .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
C:\Users\zl835\AppData\Local\Temp\ccHmHWYD.s:632    .text.HAL_PWR_DisableSEVOnPend:0000000c $d

UNDEFINED SYMBOLS
assert_failed