stm32f3xx_hal_hrtim.c 322 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_hrtim.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the High Resolution Timer (HRTIM) peripheral:
  8. * + HRTIM Initialization
  9. * + DLL Calibration Start
  10. * + Timer Time Base Unit Configuration
  11. * + Simple Time Base Start/Stop
  12. * + Simple Time Base Start/Stop Interrupt
  13. * + Simple Time Base Start/Stop DMA Request
  14. * + Simple Output Compare/PWM Channel Configuration
  15. * + Simple Output Compare/PWM Channel Start/Stop Interrupt
  16. * + Simple Output Compare/PWM Channel Start/Stop DMA Request
  17. * + Simple Input Capture Channel Configuration
  18. * + Simple Input Capture Channel Start/Stop Interrupt
  19. * + Simple Input Capture Channel Start/Stop DMA Request
  20. * + Simple One Pulse Channel Configuration
  21. * + Simple One Pulse Channel Start/Stop Interrupt
  22. * + HRTIM External Synchronization Configuration
  23. * + HRTIM Burst Mode Controller Configuration
  24. * + HRTIM Burst Mode Controller Enabling
  25. * + HRTIM External Events Conditioning Configuration
  26. * + HRTIM Faults Conditioning Configuration
  27. * + HRTIM Faults Enabling
  28. * + HRTIM ADC trigger Configuration
  29. * + Waveform Timer Configuration
  30. * + Waveform Event Filtering Configuration
  31. * + Waveform Dead Time Insertion Configuration
  32. * + Waveform Chopper Mode Configuration
  33. * + Waveform Compare Unit Configuration
  34. * + Waveform Capture Unit Configuration
  35. * + Waveform Output Configuration
  36. * + Waveform Counter Start/Stop
  37. * + Waveform Counter Start/Stop Interrupt
  38. * + Waveform Counter Start/Stop DMA Request
  39. * + Waveform Output Enabling
  40. * + Waveform Output Level Set/Get
  41. * + Waveform Output State Get
  42. * + Waveform Burst DMA Operation Configuration
  43. * + Waveform Burst DMA Operation Start
  44. * + Waveform Timer Counter Software Reset
  45. * + Waveform Capture Software Trigger
  46. * + Waveform Burst Mode Controller Software Trigger
  47. * + Waveform Timer Pre-loadable Registers Update Enabling
  48. * + Waveform Timer Pre-loadable Registers Software Update
  49. * + Waveform Timer Delayed Protection Status Get
  50. * + Waveform Timer Burst Status Get
  51. * + Waveform Timer Push-Pull Status Get
  52. * + Peripheral State Get
  53. *
  54. ******************************************************************************
  55. * @attention
  56. *
  57. * Copyright (c) 2016 STMicroelectronics.
  58. * All rights reserved.
  59. *
  60. * This software is licensed under terms that can be found in the LICENSE file
  61. * in the root directory of this software component.
  62. * If no LICENSE file comes with this software, it is provided AS-IS.
  63. *
  64. ******************************************************************************
  65. @verbatim
  66. ==============================================================================
  67. ##### Simple mode v.s. waveform mode #####
  68. ==============================================================================
  69. [..] The HRTIM HAL API is split into 2 categories:
  70. (#)Simple functions: these functions allow for using a HRTIM timer as a
  71. general purpose timer with high resolution capabilities.
  72. HRTIM simple modes are managed through the set of functions named
  73. HAL_HRTIM_Simple<Function>. These functions are similar in name and usage
  74. to the one defined for the TIM peripheral. When a HRTIM timer operates in
  75. simple mode, only a very limited set of HRTIM features are used.
  76. Following simple modes are proposed:
  77. (++)Output compare mode,
  78. (++)PWM output mode,
  79. (++)Input capture mode,
  80. (++)One pulse mode.
  81. (#)Waveform functions: These functions allow taking advantage of the HRTIM
  82. flexibility to produce numerous types of control signal. When a HRTIM timer
  83. operates in waveform mode, all the HRTIM features are accessible without
  84. any restriction. HRTIM waveform modes are managed through the set of
  85. functions named HAL_HRTIM_Waveform<Function>
  86. ##### How to use this driver #####
  87. ==============================================================================
  88. [..]
  89. (#)Initialize the HRTIM low level resources by implementing the
  90. HAL_HRTIM_MspInit() function:
  91. (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE()
  92. (##)Connect HRTIM pins to MCU I/Os
  93. (+++) Enable the clock for the HRTIM GPIOs using the following
  94. function: __HAL_RCC_GPIOx_CLK_ENABLE()
  95. (+++) Configure these GPIO pins in Alternate Function mode using
  96. HAL_GPIO_Init()
  97. (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA())
  98. (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
  99. (+++)Initialize the DMA handle
  100. (+++)Associate the initialized DMA handle to the appropriate DMA
  101. handle of the HRTIM handle using __HAL_LINKDMA()
  102. (+++)Initialize the DMA channel using HAL_DMA_Init()
  103. (+++)Configure the priority and enable the NVIC for the transfer
  104. complete interrupt on the DMA channel using HAL_NVIC_SetPriority()
  105. and HAL_NVIC_EnableIRQ()
  106. (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT())
  107. (+++)Configure the priority and enable the NVIC for the concerned
  108. HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
  109. (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration
  110. structure (field of the HRTIM handle) specifies which global interrupt of
  111. whole HRTIM must be enabled (Burst mode period, System fault, Faults).
  112. It also contains the HRTIM external synchronization configuration. HRTIM
  113. can act as a master (generating a synchronization signal) or as a slave
  114. (waiting for a trigger to be synchronized).
  115. (#)Start the high resolution unit using HAL_HRTIM_DLLCalibrationStart(). DLL
  116. calibration is executed periodically and compensate for potential voltage
  117. and temperature drifts. DLL calibration period is specified by the
  118. CalibrationRate argument.
  119. (#)HRTIM timers cannot be used until the high resolution unit is ready. This
  120. can be checked using HAL_HRTIM_PollForDLLCalibration(): this function returns
  121. HAL_OK if DLL calibration is completed or HAL_TIMEOUT if the DLL calibration
  122. is still going on when timeout given as argument expires. DLL calibration
  123. can also be started in interrupt mode using HAL_HRTIM_DLLCalibrationStart_IT().
  124. In that case an interrupt is generated when the DLL calibration is completed.
  125. Note that as DLL calibration is executed on a periodic basis an interrupt
  126. will be generated at the end of every DLL calibration operation
  127. (worst case: one interrupt every 14 micro seconds !).
  128. (#) Configure HRTIM resources shared by all HRTIM timers
  129. (##)Burst Mode Controller:
  130. (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode
  131. controller: operating mode (continuous or one-shot mode), clock
  132. (source, prescaler) , trigger(s), period, idle duration.
  133. (##)External Events Conditioning:
  134. (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an
  135. external event channel: source, polarity, edge-sensitivity.
  136. External event can be used as triggers (timer reset, input
  137. capture, burst mode, ADC triggers, delayed protection)
  138. They can also be used to set or reset timer outputs. Up to
  139. 10 event channels are available.
  140. (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external
  141. event sampling clock (used for digital filtering).
  142. (##)Fault Conditioning:
  143. (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a
  144. fault channel: source, polarity, edge-sensitivity. Fault
  145. channels are used to disable the outputs in case of an
  146. abnormal operation. Up to 5 fault channels are available.
  147. (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault
  148. sampling clock (used for digital filtering).
  149. (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s)
  150. circuitry. By default all fault inputs are disabled.
  151. (##)ADC trigger:
  152. (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering
  153. the update of the ADC trigger register and the ADC trigger.
  154. 4 independent triggers are available to start both the regular
  155. and the injected sequencers of the 2 ADCs
  156. (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This
  157. function must be called whatever the HRTIM timer operating mode is
  158. (simple v.s. waveform). It configures mainly:
  159. (##)The HRTIM timer counter operating mode (continuous v.s. one shot)
  160. (##)The HRTIM timer clock prescaler
  161. (##)The HRTIM timer period
  162. (##)The HRTIM timer repetition counter
  163. *** If the HRTIM timer operates in simple mode ***
  164. ===================================================
  165. [..]
  166. (#) Start or Stop simple timers
  167. (++)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(),
  168. HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(),
  169. HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA().
  170. (++)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(),
  171. HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(),
  172. HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(),
  173. HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(),
  174. (++)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(),
  175. HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(),
  176. HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(),
  177. HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(),
  178. (++)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(),
  179. HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(),
  180. HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(),
  181. HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA().
  182. (++)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(),
  183. HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(),
  184. HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It().
  185. *** If the HRTIM timer operates in waveform mode ***
  186. ====================================================
  187. [..]
  188. (#) Completes waveform timer configuration
  189. (++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM timer
  190. operating in wave form mode mainly consists in:
  191. (+++)Enabling the HRTIM timer interrupts and DMA requests.
  192. (+++)Enabling the half mode for the HRTIM timer.
  193. (+++)Defining how the HRTIM timer reacts to external synchronization input.
  194. (+++)Enabling the push-pull mode for the HRTIM timer.
  195. (+++)Enabling the fault channels for the HRTIM timer.
  196. (+++)Enabling the dead-time insertion for the HRTIM timer.
  197. (+++)Setting the delayed protection mode for the HRTIM timer (source and outputs
  198. on which the delayed protection are applied).
  199. (+++)Specifying the HRTIM timer update and reset triggers.
  200. (+++)Specifying the HRTIM timer registers update policy (e.g. pre-load enabling).
  201. (++)HAL_HRTIM_TimerEventFilteringConfig(): configures external
  202. event blanking and windowing circuitry of a HRTIM timer:
  203. (+++)Blanking: to mask external events during a defined time period a defined time period
  204. (+++)Windowing, to enable external events only during a defined time period
  205. (++)HAL_HRTIM_DeadTimeConfig(): configures the dead-time insertion
  206. unit for a HRTIM timer. Allows to generate a couple of
  207. complementary signals from a single reference waveform,
  208. with programmable delays between active state.
  209. (++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of
  210. the high-frequency carrier signal added on top of the timing
  211. unit output. Chopper mode can be enabled or disabled for each
  212. timer output separately (see HAL_HRTIM_WaveformOutputConfig()).
  213. (++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst
  214. controller. Allows having multiple HRTIM registers updated
  215. with a single DMA request. The burst DMA operation is started
  216. by calling HAL_HRTIM_BurstDMATransfer().
  217. (++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit
  218. of a HRTIM timer. This operation consists in setting the
  219. compare value and possibly specifying the auto delayed mode
  220. for compare units 2 and 4 (allows to have compare events
  221. generated relatively to capture events). Note that when auto
  222. delayed mode is needed, the capture unit associated to the
  223. compare unit must be configured separately.
  224. (++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit
  225. of a HRTIM timer. This operation consists in specifying the
  226. source(s) triggering the capture (timer register update event,
  227. external event, timer output set/reset event, other HRTIM
  228. timer related events).
  229. (++)HAL_HRTIM_WaveformOutputConfig(): configuration of a HRTIM timer
  230. output mainly consists in:
  231. (+++)Setting the output polarity (active high or active low),
  232. (+++)Defining the set/reset crossbar for the output,
  233. (+++)Specifying the fault level (active or inactive) in IDLE and FAULT states.,
  234. (#) Set waveform timer output(s) level
  235. (++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its
  236. active or inactive level. For example, when deadtime insertion
  237. is enabled it is necessary to force the output level by software
  238. to have the outputs in a complementary state as soon as the RUN mode is entered.
  239. (#) Enable or Disable waveform timer output(s)
  240. (++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop().
  241. (#) Start or Stop waveform HRTIM timer(s).
  242. (++)HAL_HRTIM_WaveformCountStart(),HAL_HRTIM_WaveformCountStop(),
  243. (++)HAL_HRTIM_WaveformCountStart_IT(),HAL_HRTIM_WaveformCountStop_IT(),
  244. (++)HAL_HRTIM_WaveformCountStart_DMA(),HAL_HRTIM_WaveformCountStop_DMA(),
  245. (#) Burst mode controller enabling:
  246. (++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the
  247. burst mode controller.
  248. (#) Some HRTIM operations can be triggered by software:
  249. (++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function
  250. trigs the burst operation.
  251. (++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the
  252. capture of the HRTIM timer counter.
  253. (++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the
  254. update of the pre-loadable registers of the HRTIM timer
  255. (++)HAL_HRTIM_SoftwareReset():calling this function resets the
  256. HRTIM timer counter.
  257. (#) Some functions can be used any time to retrieve HRTIM timer related
  258. information
  259. (++)HAL_HRTIM_GetCapturedValue(): returns actual value of the
  260. capture register of the designated capture unit.
  261. (++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level
  262. (ACTIVE/INACTIVE) of the designated timer output.
  263. (++)HAL_HRTIM_WaveformGetOutputState():returns actual state
  264. (IDLE/RUN/FAULT) of the designated timer output.
  265. (++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level
  266. (ACTIVE/INACTIVE) of the designated output when the delayed
  267. protection was triggered.
  268. (++)HAL_HRTIM_GetBurstStatus(): returns the actual status
  269. (ACTIVE/INACTIVE) of the burst mode controller.
  270. (++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode
  271. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  272. the push-pull status indicates on which output the signal is currently
  273. active (e.g signal applied on output 1 and output 2 forced
  274. inactive or vice versa).
  275. (++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode
  276. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  277. the idle push-pull status indicates during which period the
  278. delayed protection request occurred (e.g. protection occurred
  279. when the output 1 was active and output 2 forced inactive or
  280. vice versa).
  281. (#) Some functions can be used any time to retrieve actual HRTIM status
  282. (++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state.
  283. *** Callback registration ***
  284. =============================
  285. [..]
  286. The compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS when set to 1
  287. allows the user to configure dynamically the driver callbacks.
  288. Use Functions HAL_HRTIM_RegisterCallback() or HAL_HRTIM_TIMxRegisterCallback()
  289. to register an interrupt callback.
  290. [..]
  291. Function HAL_HRTIM_RegisterCallback() allows to register following callbacks:
  292. (+) Fault1Callback : Fault 1 interrupt callback function
  293. (+) Fault2Callback : Fault 2 interrupt callback function
  294. (+) Fault3Callback : Fault 3 interrupt callback function
  295. (+) Fault4Callback : Fault 4 interrupt callback function
  296. (+) Fault5Callback : Fault 5 interrupt callback function
  297. (+) SystemFaultCallback : System fault interrupt callback function
  298. (+) DLLCalibrationReadyCallback : DLL Ready interrupt callback function
  299. (+) BurstModePeriodCallback : Burst mode period interrupt callback function
  300. (+) SynchronizationEventCallback : Sync Input interrupt callback function
  301. (+) ErrorCallback : DMA error callback function
  302. (+) MspInitCallback : HRTIM MspInit callback function
  303. (+) MspDeInitCallback : HRTIM MspInit callback function
  304. [..]
  305. Function HAL_HRTIM_TIMxRegisterCallback() allows to register following callbacks:
  306. (+) RegistersUpdateCallback : Timer x Update interrupt callback function
  307. (+) RepetitionEventCallback : Timer x Repetition interrupt callback function
  308. (+) Compare1EventCallback : Timer x Compare 1 match interrupt callback function
  309. (+) Compare2EventCallback : Timer x Compare 2 match interrupt callback function
  310. (+) Compare3EventCallback : Timer x Compare 3 match interrupt callback function
  311. (+) Compare4EventCallback : Timer x Compare 4 match interrupt callback function
  312. (+) Capture1EventCallback : Timer x Capture 1 interrupts callback function
  313. (+) Capture2EventCallback : Timer x Capture 2 interrupts callback function
  314. (+) DelayedProtectionCallback : Timer x Delayed protection interrupt callback function
  315. (+) CounterResetCallback : Timer x counter reset/roll-over interrupt callback function
  316. (+) Output1SetCallback : Timer x output 1 set interrupt callback function
  317. (+) Output1ResetCallback : Timer x output 1 reset interrupt callback function
  318. (+) Output2SetCallback : Timer x output 2 set interrupt callback function
  319. (+) Output2ResetCallback : Timer x output 2 reset interrupt callback function
  320. (+) BurstDMATransferCallback : Timer x Burst DMA completed interrupt callback function
  321. [..]
  322. Both functions take as parameters the HAL peripheral handle, the Callback ID
  323. and a pointer to the user callback function.
  324. [..]
  325. Use function HAL_HRTIM_UnRegisterCallback or HAL_HRTIM_TIMxUnRegisterCallback
  326. to reset a callback to the default weak function. Both functions take as parameters
  327. the HAL peripheral handle and the Callback ID.
  328. [..]
  329. By default, after the HAL_HRTIM_Init() and when the state is HAL_HRTIM_STATE_RESET
  330. all callbacks are set to the corresponding weak functions (e.g HAL_HRTIM_Fault1Callback)
  331. Exception done for MspInit and MspDeInit functions that are reset to the legacy
  332. weak functions in the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() only when these
  333. callbacks are null (not registered beforehand). If MspInit or MspDeInit are
  334. not null, the HAL_HRTIM_Init()/ HAL_HRTIM_DeInit() keep and use the user
  335. MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  336. [..]
  337. Callbacks can be registered/unregistered in HAL_HRTIM_STATE_READY state only.
  338. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  339. in HAL_HRTIM_STATE_READY or HAL_HRTIM_STATE_RESET states, thus registered
  340. (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  341. Then, the user first registers the MspInit/MspDeInit user callbacks
  342. using HAL_HRTIM_RegisterCallback() before calling HAL_HRTIM_DeInit()
  343. or HAL_HRTIM_Init() function.
  344. [..]
  345. When the compilation flag USE_HAL_HRTIM_REGISTER_CALLBACKS is set to 0 or
  346. not defined, the callback registration feature is not available and all
  347. callbacks are set to the corresponding weak functions.
  348. @endverbatim
  349. ******************************************************************************
  350. */
  351. /* Includes ------------------------------------------------------------------*/
  352. #include "stm32f3xx_hal.h"
  353. /** @addtogroup STM32F3xx_HAL_Driver
  354. * @{
  355. */
  356. #ifdef HAL_HRTIM_MODULE_ENABLED
  357. #if defined(HRTIM1)
  358. /** @defgroup HRTIM HRTIM
  359. * @brief HRTIM HAL module driver
  360. * @{
  361. */
  362. /* Private typedef -----------------------------------------------------------*/
  363. /* Private define ------------------------------------------------------------*/
  364. /** @defgroup HRTIM_Private_Defines HRTIM Private Define
  365. * @{
  366. */
  367. #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\
  368. HRTIM_FLTR_FLT2EN |\
  369. HRTIM_FLTR_FLT3EN |\
  370. HRTIM_FLTR_FLT4EN | \
  371. HRTIM_FLTR_FLT5EN)
  372. #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\
  373. HRTIM_TIMUPDATETRIGGER_TIMER_A |\
  374. HRTIM_TIMUPDATETRIGGER_TIMER_B |\
  375. HRTIM_TIMUPDATETRIGGER_TIMER_C |\
  376. HRTIM_TIMUPDATETRIGGER_TIMER_D |\
  377. HRTIM_TIMUPDATETRIGGER_TIMER_E)
  378. #define HRTIM_FLTINR1_FLTxLCK ((HRTIM_FAULTLOCK_READONLY) | \
  379. (HRTIM_FAULTLOCK_READONLY << 8U) | \
  380. (HRTIM_FAULTLOCK_READONLY << 16U) | \
  381. (HRTIM_FAULTLOCK_READONLY << 24U))
  382. #define HRTIM_FLTINR2_FLTxLCK ((HRTIM_FAULTLOCK_READONLY) | \
  383. (HRTIM_FAULTLOCK_READONLY << 8U))
  384. /**
  385. * @}
  386. */
  387. /* Private macro -------------------------------------------------------------*/
  388. /* Private variables ---------------------------------------------------------*/
  389. /** @defgroup HRTIM_Private_Variables HRTIM Private Variables
  390. * @{
  391. */
  392. static uint32_t TimerIdxToTimerId[] =
  393. {
  394. HRTIM_TIMERID_TIMER_A,
  395. HRTIM_TIMERID_TIMER_B,
  396. HRTIM_TIMERID_TIMER_C,
  397. HRTIM_TIMERID_TIMER_D,
  398. HRTIM_TIMERID_TIMER_E,
  399. HRTIM_TIMERID_MASTER,
  400. };
  401. /**
  402. * @}
  403. */
  404. /* Private function prototypes -----------------------------------------------*/
  405. /** @defgroup HRTIM_Private_Functions HRTIM Private Functions
  406. * @{
  407. */
  408. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  409. const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  410. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  411. uint32_t TimerIdx,
  412. const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  413. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  414. const HRTIM_TimerCfgTypeDef * pTimerCfg);
  415. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  416. uint32_t TimerIdx,
  417. const HRTIM_TimerCfgTypeDef * pTimerCfg);
  418. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  419. uint32_t TimerIdx,
  420. uint32_t CaptureUnit,
  421. uint32_t Event);
  422. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  423. uint32_t TimerIdx,
  424. uint32_t Output,
  425. const HRTIM_OutputCfgTypeDef * pOutputCfg);
  426. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  427. uint32_t Event,
  428. const HRTIM_EventCfgTypeDef * pEventCfg);
  429. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  430. uint32_t TimerIdx,
  431. uint32_t Event);
  432. static uint32_t HRTIM_GetITFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
  433. uint32_t TimerIdx,
  434. uint32_t OCChannel);
  435. static uint32_t HRTIM_GetDMAFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
  436. uint32_t TimerIdx,
  437. uint32_t OCChannel);
  438. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(const HRTIM_HandleTypeDef * hhrtim,
  439. uint32_t TimerIdx);
  440. static uint32_t GetTimerIdxFromDMAHandle(const HRTIM_HandleTypeDef * hhrtim,
  441. const DMA_HandleTypeDef * hdma);
  442. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  443. uint32_t TimerIdx);
  444. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim);
  445. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim);
  446. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  447. uint32_t TimerIdx);
  448. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma);
  449. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma);
  450. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma);
  451. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma);
  452. /**
  453. * @}
  454. */
  455. /* Exported functions ---------------------------------------------------------*/
  456. /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions
  457. * @{
  458. */
  459. /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
  460. * @brief Initialization and Configuration functions
  461. @verbatim
  462. ===============================================================================
  463. ##### Initialization and Time Base Configuration functions #####
  464. ===============================================================================
  465. [..] This section provides functions allowing to:
  466. (+) Initialize a HRTIM instance
  467. (+) De-initialize a HRTIM instance
  468. (+) Initialize the HRTIM MSP
  469. (+) De-initialize the HRTIM MSP
  470. (+) Start the high-resolution unit (start DLL calibration)
  471. (+) Check that the high resolution unit is ready (DLL calibration done)
  472. (+) Configure the time base unit of a HRTIM timer
  473. @endverbatim
  474. * @{
  475. */
  476. /**
  477. * @brief Initialize a HRTIM instance
  478. * @param hhrtim pointer to HAL HRTIM handle
  479. * @retval HAL status
  480. */
  481. HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
  482. {
  483. uint8_t timer_idx;
  484. uint32_t hrtim_mcr;
  485. /* Check the HRTIM handle allocation */
  486. if(hhrtim == NULL)
  487. {
  488. return HAL_ERROR;
  489. }
  490. /* Check the parameters */
  491. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  492. assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests));
  493. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  494. if (hhrtim->State == HAL_HRTIM_STATE_RESET)
  495. {
  496. /* Initialize callback function pointers to their default values */
  497. hhrtim->Fault1Callback = HAL_HRTIM_Fault1Callback;
  498. hhrtim->Fault2Callback = HAL_HRTIM_Fault2Callback;
  499. hhrtim->Fault3Callback = HAL_HRTIM_Fault3Callback;
  500. hhrtim->Fault4Callback = HAL_HRTIM_Fault4Callback;
  501. hhrtim->Fault5Callback = HAL_HRTIM_Fault5Callback;
  502. hhrtim->SystemFaultCallback = HAL_HRTIM_SystemFaultCallback;
  503. hhrtim->DLLCalibrationReadyCallback = HAL_HRTIM_DLLCalibrationReadyCallback;
  504. hhrtim->BurstModePeriodCallback = HAL_HRTIM_BurstModePeriodCallback;
  505. hhrtim->SynchronizationEventCallback = HAL_HRTIM_SynchronizationEventCallback;
  506. hhrtim->ErrorCallback = HAL_HRTIM_ErrorCallback;
  507. hhrtim->RegistersUpdateCallback = HAL_HRTIM_RegistersUpdateCallback;
  508. hhrtim->RepetitionEventCallback = HAL_HRTIM_RepetitionEventCallback;
  509. hhrtim->Compare1EventCallback = HAL_HRTIM_Compare1EventCallback;
  510. hhrtim->Compare2EventCallback = HAL_HRTIM_Compare2EventCallback;
  511. hhrtim->Compare3EventCallback = HAL_HRTIM_Compare3EventCallback;
  512. hhrtim->Compare4EventCallback = HAL_HRTIM_Compare4EventCallback;
  513. hhrtim->Capture1EventCallback = HAL_HRTIM_Capture1EventCallback;
  514. hhrtim->Capture2EventCallback = HAL_HRTIM_Capture2EventCallback;
  515. hhrtim->DelayedProtectionCallback = HAL_HRTIM_DelayedProtectionCallback;
  516. hhrtim->CounterResetCallback = HAL_HRTIM_CounterResetCallback;
  517. hhrtim->Output1SetCallback = HAL_HRTIM_Output1SetCallback;
  518. hhrtim->Output1ResetCallback = HAL_HRTIM_Output1ResetCallback;
  519. hhrtim->Output2SetCallback = HAL_HRTIM_Output2SetCallback;
  520. hhrtim->Output2ResetCallback = HAL_HRTIM_Output2ResetCallback;
  521. hhrtim->BurstDMATransferCallback = HAL_HRTIM_BurstDMATransferCallback;
  522. if (hhrtim->MspInitCallback == NULL)
  523. {
  524. hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
  525. }
  526. }
  527. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  528. /* Set the HRTIM state */
  529. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  530. /* Initialize the DMA handles */
  531. hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
  532. hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
  533. hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
  534. hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
  535. hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
  536. hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
  537. /* HRTIM output synchronization configuration (if required) */
  538. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != (uint32_t)RESET)
  539. {
  540. /* Check parameters */
  541. assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource));
  542. assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity));
  543. /* The synchronization output initialization procedure must be done prior
  544. to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit)
  545. */
  546. if (hhrtim->Instance == HRTIM1)
  547. {
  548. /* Enable the HRTIM peripheral clock */
  549. __HAL_RCC_HRTIM1_CLK_ENABLE();
  550. }
  551. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  552. /* Set the event to be sent on the synchronization output */
  553. hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC);
  554. hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC);
  555. /* Set the polarity of the synchronization output */
  556. hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT);
  557. hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT);
  558. /* Update the HRTIM registers */
  559. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  560. }
  561. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  562. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  563. hhrtim->MspInitCallback(hhrtim);
  564. #else
  565. HAL_HRTIM_MspInit(hhrtim);
  566. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  567. /* HRTIM input synchronization configuration (if required) */
  568. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != (uint32_t)RESET)
  569. {
  570. /* Check parameters */
  571. assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource));
  572. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  573. /* Set the synchronization input source */
  574. hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN);
  575. hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN);
  576. /* Update the HRTIM registers */
  577. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  578. }
  579. /* Initialize the HRTIM state*/
  580. hhrtim->State = HAL_HRTIM_STATE_READY;
  581. /* Initialize the lock status of the HRTIM HAL API */
  582. __HAL_UNLOCK(hhrtim);
  583. /* Initialize timer related parameters */
  584. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  585. timer_idx <= HRTIM_TIMERINDEX_MASTER ;
  586. timer_idx++)
  587. {
  588. hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE;
  589. hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE;
  590. hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE;
  591. hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE;
  592. hhrtim->TimerParam[timer_idx].DMASrcAddress = 0U;
  593. hhrtim->TimerParam[timer_idx].DMASize = 0U;
  594. }
  595. return HAL_OK;
  596. }
  597. /**
  598. * @brief De-initialize a HRTIM instance
  599. * @param hhrtim pointer to HAL HRTIM handle
  600. * @retval HAL status
  601. */
  602. HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
  603. {
  604. /* Check the HRTIM handle allocation */
  605. if(hhrtim == NULL)
  606. {
  607. return HAL_ERROR;
  608. }
  609. /* Check the parameters */
  610. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  611. /* Set the HRTIM state */
  612. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  613. /* DeInit the low level hardware */
  614. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  615. if (hhrtim->MspDeInitCallback == NULL)
  616. {
  617. hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
  618. }
  619. hhrtim->MspDeInitCallback(hhrtim);
  620. #else
  621. HAL_HRTIM_MspDeInit(hhrtim);
  622. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  623. hhrtim->State = HAL_HRTIM_STATE_READY;
  624. return HAL_OK;
  625. }
  626. /**
  627. * @brief MSP initialization for a HRTIM instance
  628. * @param hhrtim pointer to HAL HRTIM handle
  629. * @retval None
  630. */
  631. __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim)
  632. {
  633. /* Prevent unused argument(s) compilation warning */
  634. UNUSED(hhrtim);
  635. /* NOTE: This function should not be modified, when the callback is needed,
  636. the HAL_HRTIM_MspInit could be implemented in the user file
  637. */
  638. }
  639. /**
  640. * @brief MSP de-initialization of a HRTIM instance
  641. * @param hhrtim pointer to HAL HRTIM handle
  642. * @retval None
  643. */
  644. __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim)
  645. {
  646. /* Prevent unused argument(s) compilation warning */
  647. UNUSED(hhrtim);
  648. /* NOTE: This function should not be modified, when the callback is needed,
  649. the HAL_HRTIM_MspDeInit could be implemented in the user file
  650. */
  651. }
  652. /**
  653. * @brief Start the DLL calibration
  654. * @param hhrtim pointer to HAL HRTIM handle
  655. * @param CalibrationRate DLL calibration period
  656. * This parameter can be one of the following values:
  657. * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
  658. * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.300 ms
  659. * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=0.910 ms
  660. * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=0.114 ms
  661. * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=0.014 ms
  662. * @retval HAL status
  663. * @note This function locks the HRTIM instance. HRTIM instance is unlocked
  664. * within the HAL_HRTIM_PollForDLLCalibration function, just before
  665. * exiting the function.
  666. */
  667. HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef * hhrtim,
  668. uint32_t CalibrationRate)
  669. {
  670. /* Check the parameters */
  671. assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
  672. /* Process Locked */
  673. __HAL_LOCK(hhrtim);
  674. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  675. if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
  676. {
  677. /* One shot DLL calibration */
  678. CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);
  679. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);
  680. }
  681. else
  682. {
  683. /* Periodic DLL calibration */
  684. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);
  685. MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate);
  686. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);
  687. }
  688. /* Set HRTIM state */
  689. hhrtim->State = HAL_HRTIM_STATE_READY;
  690. return HAL_OK;
  691. }
  692. /**
  693. * @brief Start the DLL calibration.
  694. * DLL ready interrupt is enabled
  695. * @param hhrtim pointer to HAL HRTIM handle
  696. * @param CalibrationRate DLL calibration period
  697. * This parameter can be one of the following values:
  698. * @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
  699. * @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.300 ms
  700. * @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=0.910 ms
  701. * @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=0.114 ms
  702. * @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=0.014 ms
  703. * @retval HAL status
  704. * @note This function locks the HRTIM instance. HRTIM instance is unlocked
  705. * within the IRQ processing function when processing the DLL ready
  706. * interrupt.
  707. * @note If this function is called for periodic calibration, the DLLRDY
  708. * interrupt is generated every time the calibration completes which
  709. * will significantly increases the overall interrupt rate.
  710. */
  711. HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef * hhrtim,
  712. uint32_t CalibrationRate)
  713. {
  714. /* Check the parameters */
  715. assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
  716. /* Process Locked */
  717. __HAL_LOCK(hhrtim);
  718. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  719. /* Enable DLL Ready interrupt flag */
  720. __HAL_HRTIM_ENABLE_IT(hhrtim, HRTIM_IT_DLLRDY);
  721. if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
  722. {
  723. /* One shot DLL calibration */
  724. CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);
  725. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);
  726. }
  727. else
  728. {
  729. /* Periodic DLL calibration */
  730. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);
  731. MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate);
  732. SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);
  733. }
  734. /* Set HRTIM state */
  735. hhrtim->State = HAL_HRTIM_STATE_READY;
  736. return HAL_OK;
  737. }
  738. /**
  739. * @brief Poll the DLL calibration ready flag and returns when the flag is
  740. * set (DLL calibration completed) or upon timeout expiration.
  741. * @param hhrtim pointer to HAL HRTIM handle
  742. * @param Timeout Timeout duration in millisecond
  743. * @retval HAL status
  744. */
  745. HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef * hhrtim,
  746. uint32_t Timeout)
  747. {
  748. uint32_t tickstart;
  749. tickstart = HAL_GetTick();
  750. /* Check End of conversion flag */
  751. while(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_IT_DLLRDY) == (uint32_t)RESET)
  752. {
  753. if (Timeout != HAL_MAX_DELAY)
  754. {
  755. if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
  756. {
  757. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  758. return HAL_TIMEOUT;
  759. }
  760. }
  761. }
  762. /* Set HRTIM State */
  763. hhrtim->State = HAL_HRTIM_STATE_READY;
  764. /* Process unlocked */
  765. __HAL_UNLOCK(hhrtim);
  766. return HAL_OK;
  767. }
  768. /**
  769. * @brief Configure the time base unit of a timer
  770. * @param hhrtim pointer to HAL HRTIM handle
  771. * @param TimerIdx Timer index
  772. * This parameter can be one of the following values:
  773. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  774. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  775. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  776. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  777. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  778. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  779. * @param pTimeBaseCfg pointer to the time base configuration structure
  780. * @note This function must be called prior starting the timer
  781. * @note The time-base unit initialization parameters specify:
  782. * The timer counter operating mode (continuous, one shot),
  783. * The timer clock prescaler,
  784. * The timer period,
  785. * The timer repetition counter.
  786. * @retval HAL status
  787. */
  788. HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
  789. uint32_t TimerIdx,
  790. const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  791. {
  792. /* Check the parameters */
  793. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  794. assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio));
  795. assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode));
  796. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  797. {
  798. return HAL_BUSY;
  799. }
  800. /* Set the HRTIM state */
  801. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  802. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  803. {
  804. /* Configure master timer time base unit */
  805. HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg);
  806. }
  807. else
  808. {
  809. /* Configure timing unit time base unit */
  810. HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg);
  811. }
  812. /* Set HRTIM state */
  813. hhrtim->State = HAL_HRTIM_STATE_READY;
  814. return HAL_OK;
  815. }
  816. /**
  817. * @}
  818. */
  819. /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
  820. * @brief Simple time base mode functions.
  821. @verbatim
  822. ===============================================================================
  823. ##### Simple time base mode functions #####
  824. ===============================================================================
  825. [..] This section provides functions allowing to:
  826. (+) Start simple time base
  827. (+) Stop simple time base
  828. (+) Start simple time base and enable interrupt
  829. (+) Stop simple time base and disable interrupt
  830. (+) Start simple time base and enable DMA transfer
  831. (+) Stop simple time base and disable DMA transfer
  832. -@- When a HRTIM timer operates in simple time base mode, the timer
  833. counter counts from 0 to the period value.
  834. @endverbatim
  835. * @{
  836. */
  837. /**
  838. * @brief Start the counter of a timer operating in simple time base mode.
  839. * @param hhrtim pointer to HAL HRTIM handle
  840. * @param TimerIdx Timer index.
  841. * This parameter can be one of the following values:
  842. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  843. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  844. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  845. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  846. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  847. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  848. * @retval HAL status
  849. */
  850. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim,
  851. uint32_t TimerIdx)
  852. {
  853. /* Check the parameters */
  854. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  855. /* Process Locked */
  856. __HAL_LOCK(hhrtim);
  857. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  858. /* Enable the timer counter */
  859. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  860. hhrtim->State = HAL_HRTIM_STATE_READY;
  861. /* Process Unlocked */
  862. __HAL_UNLOCK(hhrtim);
  863. return HAL_OK;
  864. }
  865. /**
  866. * @brief Stop the counter of a timer operating in simple time base mode.
  867. * @param hhrtim pointer to HAL HRTIM handle
  868. * @param TimerIdx Timer index.
  869. * This parameter can be one of the following values:
  870. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  871. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  872. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  873. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  874. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  875. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  876. * @retval HAL status
  877. */
  878. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim,
  879. uint32_t TimerIdx)
  880. {
  881. /* Check the parameters */
  882. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  883. /* Process Locked */
  884. __HAL_LOCK(hhrtim);
  885. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  886. /* Disable the timer counter */
  887. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  888. hhrtim->State = HAL_HRTIM_STATE_READY;
  889. /* Process Unlocked */
  890. __HAL_UNLOCK(hhrtim);
  891. return HAL_OK;
  892. }
  893. /**
  894. * @brief Start the counter of a timer operating in simple time base mode
  895. * (Timer repetition interrupt is enabled).
  896. * @param hhrtim pointer to HAL HRTIM handle
  897. * @param TimerIdx Timer index.
  898. * This parameter can be one of the following values:
  899. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  900. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  901. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  902. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  903. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  904. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  905. * @retval HAL status
  906. */
  907. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  908. uint32_t TimerIdx)
  909. {
  910. /* Check the parameters */
  911. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  912. /* Process Locked */
  913. __HAL_LOCK(hhrtim);
  914. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  915. /* Enable the repetition interrupt */
  916. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  917. {
  918. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  919. }
  920. else
  921. {
  922. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  923. }
  924. /* Enable the timer counter */
  925. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  926. hhrtim->State = HAL_HRTIM_STATE_READY;
  927. /* Process Unlocked */
  928. __HAL_UNLOCK(hhrtim);
  929. return HAL_OK;
  930. }
  931. /**
  932. * @brief Stop the counter of a timer operating in simple time base mode
  933. * (Timer repetition interrupt is disabled).
  934. * @param hhrtim pointer to HAL HRTIM handle
  935. * @param TimerIdx Timer index.
  936. * This parameter can be one of the following values:
  937. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  938. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  939. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  940. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  941. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  942. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  943. * @retval HAL status
  944. */
  945. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  946. uint32_t TimerIdx)
  947. {
  948. /* Check the parameters */
  949. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  950. /* Process Locked */
  951. __HAL_LOCK(hhrtim);
  952. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  953. /* Disable the repetition interrupt */
  954. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  955. {
  956. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  957. }
  958. else
  959. {
  960. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  961. }
  962. /* Disable the timer counter */
  963. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  964. hhrtim->State = HAL_HRTIM_STATE_READY;
  965. /* Process Unlocked */
  966. __HAL_UNLOCK(hhrtim);
  967. return HAL_OK;
  968. }
  969. /**
  970. * @brief Start the counter of a timer operating in simple time base mode
  971. * (Timer repetition DMA request is enabled).
  972. * @param hhrtim pointer to HAL HRTIM handle
  973. * @param TimerIdx Timer index.
  974. * This parameter can be one of the following values:
  975. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  976. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  977. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  978. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  979. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  980. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  981. * @param SrcAddr DMA transfer source address
  982. * @param DestAddr DMA transfer destination address
  983. * @param Length The length of data items (data size) to be transferred
  984. * from source to destination
  985. */
  986. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  987. uint32_t TimerIdx,
  988. uint32_t SrcAddr,
  989. uint32_t DestAddr,
  990. uint32_t Length)
  991. {
  992. DMA_HandleTypeDef * hdma;
  993. /* Check the parameters */
  994. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  995. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  996. {
  997. return HAL_BUSY;
  998. }
  999. if(hhrtim->State == HAL_HRTIM_STATE_READY)
  1000. {
  1001. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  1002. {
  1003. return HAL_ERROR;
  1004. }
  1005. else
  1006. {
  1007. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1008. }
  1009. }
  1010. /* Process Locked */
  1011. __HAL_LOCK(hhrtim);
  1012. /* Get the timer DMA handler */
  1013. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1014. if (hdma == NULL)
  1015. {
  1016. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1017. /* Process Unlocked */
  1018. __HAL_UNLOCK(hhrtim);
  1019. return HAL_ERROR;
  1020. }
  1021. /* Set the DMA transfer completed callback */
  1022. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  1023. {
  1024. hdma->XferCpltCallback = HRTIM_DMAMasterCplt;
  1025. }
  1026. else
  1027. {
  1028. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1029. }
  1030. /* Set the DMA error callback */
  1031. hdma->XferErrorCallback = HRTIM_DMAError ;
  1032. /* Enable the DMA channel */
  1033. if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
  1034. {
  1035. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1036. /* Process Unlocked */
  1037. __HAL_UNLOCK(hhrtim);
  1038. return HAL_ERROR;
  1039. }
  1040. /* Enable the timer repetition DMA request */
  1041. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  1042. {
  1043. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  1044. }
  1045. else
  1046. {
  1047. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  1048. }
  1049. /* Enable the timer counter */
  1050. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1051. hhrtim->State = HAL_HRTIM_STATE_READY;
  1052. /* Process Unlocked */
  1053. __HAL_UNLOCK(hhrtim);
  1054. return HAL_OK;
  1055. }
  1056. /**
  1057. * @brief Stop the counter of a timer operating in simple time base mode
  1058. * (Timer repetition DMA request is disabled).
  1059. * @param hhrtim pointer to HAL HRTIM handle
  1060. * @param TimerIdx Timer index.
  1061. * This parameter can be one of the following values:
  1062. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  1063. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1064. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1065. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1066. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1067. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1068. * @retval HAL status
  1069. */
  1070. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1071. uint32_t TimerIdx)
  1072. {
  1073. DMA_HandleTypeDef * hdma;
  1074. /* Check the parameters */
  1075. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  1076. /* Process Locked */
  1077. __HAL_LOCK(hhrtim);
  1078. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  1079. {
  1080. hhrtim->State = HAL_HRTIM_STATE_READY;
  1081. /* Disable the DMA */
  1082. if (HAL_DMA_Abort(hhrtim->hdmaMaster) != HAL_OK)
  1083. {
  1084. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1085. }
  1086. /* Disable the timer repetition DMA request */
  1087. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  1088. }
  1089. else
  1090. {
  1091. /* Get the timer DMA handler */
  1092. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1093. if (hdma == NULL)
  1094. {
  1095. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1096. }
  1097. else
  1098. {
  1099. hhrtim->State = HAL_HRTIM_STATE_READY;
  1100. /* Disable the DMA */
  1101. if (HAL_DMA_Abort(hdma) != HAL_OK)
  1102. {
  1103. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1104. }
  1105. /* Disable the timer repetition DMA request */
  1106. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  1107. }
  1108. }
  1109. /* Disable the timer counter */
  1110. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1111. /* Process Unlocked */
  1112. __HAL_UNLOCK(hhrtim);
  1113. if (hhrtim->State == HAL_HRTIM_STATE_ERROR)
  1114. {
  1115. return HAL_ERROR;
  1116. }
  1117. else
  1118. {
  1119. return HAL_OK;
  1120. }
  1121. }
  1122. /**
  1123. * @}
  1124. */
  1125. /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
  1126. * @brief Simple output compare functions
  1127. @verbatim
  1128. ===============================================================================
  1129. ##### Simple output compare functions #####
  1130. ===============================================================================
  1131. [..] This section provides functions allowing to:
  1132. (+) Configure simple output channel
  1133. (+) Start simple output compare
  1134. (+) Stop simple output compare
  1135. (+) Start simple output compare and enable interrupt
  1136. (+) Stop simple output compare and disable interrupt
  1137. (+) Start simple output compare and enable DMA transfer
  1138. (+) Stop simple output compare and disable DMA transfer
  1139. -@- When a HRTIM timer operates in simple output compare mode
  1140. the output level is set to a programmable value when a match
  1141. is found between the compare register and the counter.
  1142. Compare unit 1 is automatically associated to output 1
  1143. Compare unit 2 is automatically associated to output 2
  1144. @endverbatim
  1145. * @{
  1146. */
  1147. /**
  1148. * @brief Configure an output in simple output compare mode
  1149. * @param hhrtim pointer to HAL HRTIM handle
  1150. * @param TimerIdx Timer index
  1151. * This parameter can be one of the following values:
  1152. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1153. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1154. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1155. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1156. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1157. * @param OCChannel Timer output
  1158. * This parameter can be one of the following values:
  1159. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1160. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1161. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1162. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1163. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1164. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1165. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1166. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1167. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1168. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1169. * @param pSimpleOCChannelCfg pointer to the simple output compare output configuration structure
  1170. * @note When the timer operates in simple output compare mode:
  1171. * Output 1 is implicitly controlled by the compare unit 1
  1172. * Output 2 is implicitly controlled by the compare unit 2
  1173. * Output Set/Reset crossbar is set according to the selected output compare mode:
  1174. * Toggle: SETxyR = RSTxyR = CMPy
  1175. * Active: SETxyR = CMPy, RSTxyR = 0
  1176. * Inactive: SETxy =0, RSTxy = CMPy
  1177. * @retval HAL status
  1178. */
  1179. HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1180. uint32_t TimerIdx,
  1181. uint32_t OCChannel,
  1182. const HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
  1183. {
  1184. uint32_t CompareUnit = (uint32_t)RESET;
  1185. HRTIM_OutputCfgTypeDef OutputCfg;
  1186. /* Check parameters */
  1187. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1188. assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode));
  1189. assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOCChannelCfg->Pulse));
  1190. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity));
  1191. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel));
  1192. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1193. {
  1194. return HAL_BUSY;
  1195. }
  1196. /* Process Locked */
  1197. __HAL_LOCK(hhrtim);
  1198. /* Set HRTIM state */
  1199. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1200. /* Configure timer compare unit */
  1201. switch (OCChannel)
  1202. {
  1203. case HRTIM_OUTPUT_TA1:
  1204. case HRTIM_OUTPUT_TB1:
  1205. case HRTIM_OUTPUT_TC1:
  1206. case HRTIM_OUTPUT_TD1:
  1207. case HRTIM_OUTPUT_TE1:
  1208. {
  1209. CompareUnit = HRTIM_COMPAREUNIT_1;
  1210. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOCChannelCfg->Pulse;
  1211. break;
  1212. }
  1213. case HRTIM_OUTPUT_TA2:
  1214. case HRTIM_OUTPUT_TB2:
  1215. case HRTIM_OUTPUT_TC2:
  1216. case HRTIM_OUTPUT_TD2:
  1217. case HRTIM_OUTPUT_TE2:
  1218. {
  1219. CompareUnit = HRTIM_COMPAREUNIT_2;
  1220. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOCChannelCfg->Pulse;
  1221. break;
  1222. }
  1223. default:
  1224. {
  1225. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1226. /* Process Unlocked */
  1227. __HAL_UNLOCK(hhrtim);
  1228. break;
  1229. }
  1230. }
  1231. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  1232. {
  1233. return HAL_ERROR;
  1234. }
  1235. /* Configure timer output */
  1236. OutputCfg.Polarity = (pSimpleOCChannelCfg->Polarity & HRTIM_OUTR_POL1);
  1237. OutputCfg.IdleLevel = (pSimpleOCChannelCfg->IdleLevel & HRTIM_OUTR_IDLES1);
  1238. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  1239. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  1240. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  1241. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  1242. switch (pSimpleOCChannelCfg->Mode)
  1243. {
  1244. case HRTIM_BASICOCMODE_TOGGLE:
  1245. {
  1246. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1247. {
  1248. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1249. }
  1250. else
  1251. {
  1252. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1253. }
  1254. OutputCfg.ResetSource = OutputCfg.SetSource;
  1255. break;
  1256. }
  1257. case HRTIM_BASICOCMODE_ACTIVE:
  1258. {
  1259. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1260. {
  1261. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1262. }
  1263. else
  1264. {
  1265. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1266. }
  1267. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  1268. break;
  1269. }
  1270. case HRTIM_BASICOCMODE_INACTIVE:
  1271. {
  1272. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1273. {
  1274. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
  1275. }
  1276. else
  1277. {
  1278. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
  1279. }
  1280. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  1281. break;
  1282. }
  1283. default:
  1284. {
  1285. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  1286. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  1287. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1288. /* Process Unlocked */
  1289. __HAL_UNLOCK(hhrtim);
  1290. break;
  1291. }
  1292. }
  1293. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  1294. {
  1295. return HAL_ERROR;
  1296. }
  1297. HRTIM_OutputConfig(hhrtim,
  1298. TimerIdx,
  1299. OCChannel,
  1300. &OutputCfg);
  1301. /* Set HRTIM state */
  1302. hhrtim->State = HAL_HRTIM_STATE_READY;
  1303. /* Process Unlocked */
  1304. __HAL_UNLOCK(hhrtim);
  1305. return HAL_OK;
  1306. }
  1307. /**
  1308. * @brief Start the output compare signal generation on the designed timer output
  1309. * @param hhrtim pointer to HAL HRTIM handle
  1310. * @param TimerIdx Timer index
  1311. * This parameter can be one of the following values:
  1312. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1313. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1314. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1315. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1316. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1317. * @param OCChannel Timer output
  1318. * This parameter can be one of the following values:
  1319. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1320. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1321. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1322. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1323. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1324. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1325. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1326. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1327. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1328. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1329. * @retval HAL status
  1330. */
  1331. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim,
  1332. uint32_t TimerIdx,
  1333. uint32_t OCChannel)
  1334. {
  1335. /* Check the parameters */
  1336. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1337. /* Process Locked */
  1338. __HAL_LOCK(hhrtim);
  1339. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1340. /* Enable the timer output */
  1341. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1342. /* Enable the timer counter */
  1343. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1344. hhrtim->State = HAL_HRTIM_STATE_READY;
  1345. /* Process Unlocked */
  1346. __HAL_UNLOCK(hhrtim);
  1347. return HAL_OK;
  1348. }
  1349. /**
  1350. * @brief Stop the output compare signal generation on the designed timer output
  1351. * @param hhrtim pointer to HAL HRTIM handle
  1352. * @param TimerIdx Timer index
  1353. * This parameter can be one of the following values:
  1354. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1355. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1356. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1357. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1358. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1359. * @param OCChannel Timer output
  1360. * This parameter can be one of the following values:
  1361. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1362. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1363. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1364. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1365. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1366. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1367. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1368. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1369. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1370. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1371. * @retval HAL status
  1372. */
  1373. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim,
  1374. uint32_t TimerIdx,
  1375. uint32_t OCChannel)
  1376. {
  1377. /* Check the parameters */
  1378. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1379. /* Process Locked */
  1380. __HAL_LOCK(hhrtim);
  1381. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1382. /* Disable the timer output */
  1383. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1384. /* Disable the timer counter */
  1385. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1386. hhrtim->State = HAL_HRTIM_STATE_READY;
  1387. /* Process Unlocked */
  1388. __HAL_UNLOCK(hhrtim);
  1389. return HAL_OK;
  1390. }
  1391. /**
  1392. * @brief Start the output compare signal generation on the designed timer output
  1393. * (Interrupt is enabled (see note note below)).
  1394. * @param hhrtim pointer to HAL HRTIM handle
  1395. * @param TimerIdx Timer index
  1396. * This parameter can be one of the following values:
  1397. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1398. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1399. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1400. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1401. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1402. * @param OCChannel Timer output
  1403. * This parameter can be one of the following values:
  1404. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1405. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1406. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1407. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1408. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1409. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1410. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1411. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1412. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1413. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1414. * @note Interrupt enabling depends on the chosen output compare mode
  1415. * Output toggle: compare match interrupt is enabled
  1416. * Output set active: output set interrupt is enabled
  1417. * Output set inactive: output reset interrupt is enabled
  1418. * @retval HAL status
  1419. */
  1420. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1421. uint32_t TimerIdx,
  1422. uint32_t OCChannel)
  1423. {
  1424. uint32_t interrupt;
  1425. /* Check the parameters */
  1426. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1427. /* Process Locked */
  1428. __HAL_LOCK(hhrtim);
  1429. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1430. /* Get the interrupt to enable (depends on the output compare mode) */
  1431. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1432. /* Enable the timer output */
  1433. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1434. /* Enable the timer interrupt (depends on the output compare mode) */
  1435. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt);
  1436. /* Enable the timer counter */
  1437. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1438. hhrtim->State = HAL_HRTIM_STATE_READY;
  1439. /* Process Unlocked */
  1440. __HAL_UNLOCK(hhrtim);
  1441. return HAL_OK;
  1442. }
  1443. /**
  1444. * @brief Stop the output compare signal generation on the designed timer output
  1445. * (Interrupt is disabled).
  1446. * @param hhrtim pointer to HAL HRTIM handle
  1447. * @param TimerIdx Timer index
  1448. * This parameter can be one of the following values:
  1449. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1450. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1451. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1452. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1453. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1454. * @param OCChannel Timer output
  1455. * This parameter can be one of the following values:
  1456. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1457. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1458. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1459. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1460. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1461. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1462. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1463. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1464. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1465. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1466. * @retval HAL status
  1467. */
  1468. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1469. uint32_t TimerIdx,
  1470. uint32_t OCChannel)
  1471. {
  1472. uint32_t interrupt;
  1473. /* Check the parameters */
  1474. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1475. /* Process Locked */
  1476. __HAL_LOCK(hhrtim);
  1477. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1478. /* Disable the timer output */
  1479. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1480. /* Get the interrupt to disable (depends on the output compare mode) */
  1481. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1482. /* Disable the timer interrupt */
  1483. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt);
  1484. /* Disable the timer counter */
  1485. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1486. hhrtim->State = HAL_HRTIM_STATE_READY;
  1487. /* Process Unlocked */
  1488. __HAL_UNLOCK(hhrtim);
  1489. return HAL_OK;
  1490. }
  1491. /**
  1492. * @brief Start the output compare signal generation on the designed timer output
  1493. * (DMA request is enabled (see note below)).
  1494. * @param hhrtim pointer to HAL HRTIM handle
  1495. * @param TimerIdx Timer index
  1496. * This parameter can be one of the following values:
  1497. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1498. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1499. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1500. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1501. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1502. * @param OCChannel Timer output
  1503. * This parameter can be one of the following values:
  1504. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1505. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1506. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1507. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1508. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1509. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1510. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1511. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1512. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1513. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1514. * @param SrcAddr DMA transfer source address
  1515. * @param DestAddr DMA transfer destination address
  1516. * @param Length The length of data items (data size) to be transferred
  1517. * from source to destination
  1518. * @note DMA request enabling depends on the chosen output compare mode
  1519. * Output toggle: compare match DMA request is enabled
  1520. * Output set active: output set DMA request is enabled
  1521. * Output set inactive: output reset DMA request is enabled
  1522. * @retval HAL status
  1523. */
  1524. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  1525. uint32_t TimerIdx,
  1526. uint32_t OCChannel,
  1527. uint32_t SrcAddr,
  1528. uint32_t DestAddr,
  1529. uint32_t Length)
  1530. {
  1531. DMA_HandleTypeDef * hdma;
  1532. uint32_t dma_request;
  1533. /* Check the parameters */
  1534. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1535. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1536. {
  1537. return HAL_BUSY;
  1538. }
  1539. if(hhrtim->State == HAL_HRTIM_STATE_READY)
  1540. {
  1541. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  1542. {
  1543. return HAL_ERROR;
  1544. }
  1545. else
  1546. {
  1547. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1548. }
  1549. }
  1550. /* Process Locked */
  1551. __HAL_LOCK(hhrtim);
  1552. /* Enable the timer output */
  1553. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1554. /* Get the DMA request to enable */
  1555. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1556. /* Get the timer DMA handler */
  1557. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1558. if (hdma == NULL)
  1559. {
  1560. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1561. /* Process Unlocked */
  1562. __HAL_UNLOCK(hhrtim);
  1563. return HAL_ERROR;
  1564. }
  1565. /* Set the DMA error callback */
  1566. hdma->XferErrorCallback = HRTIM_DMAError ;
  1567. /* Set the DMA transfer completed callback */
  1568. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1569. /* Enable the DMA channel */
  1570. if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
  1571. {
  1572. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1573. /* Process Unlocked */
  1574. __HAL_UNLOCK(hhrtim);
  1575. return HAL_ERROR;
  1576. }
  1577. /* Enable the timer DMA request */
  1578. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request);
  1579. /* Enable the timer counter */
  1580. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1581. hhrtim->State = HAL_HRTIM_STATE_READY;
  1582. /* Process Unlocked */
  1583. __HAL_UNLOCK(hhrtim);
  1584. return HAL_OK;
  1585. }
  1586. /**
  1587. * @brief Stop the output compare signal generation on the designed timer output
  1588. * (DMA request is disabled).
  1589. * @param hhrtim pointer to HAL HRTIM handle
  1590. * @param TimerIdx Timer index
  1591. * This parameter can be one of the following values:
  1592. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1593. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1594. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1595. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1596. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1597. * @param OCChannel Timer output
  1598. * This parameter can be one of the following values:
  1599. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1600. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1601. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1602. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1603. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1604. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1605. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1606. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1607. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1608. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1609. * @retval HAL status
  1610. */
  1611. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1612. uint32_t TimerIdx,
  1613. uint32_t OCChannel)
  1614. {
  1615. uint32_t dma_request;
  1616. /* Check the parameters */
  1617. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1618. /* Process Locked */
  1619. __HAL_LOCK(hhrtim);
  1620. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1621. /* Disable the timer output */
  1622. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1623. /* Get the timer DMA handler */
  1624. /* Disable the DMA */
  1625. if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
  1626. {
  1627. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1628. /* Process Unlocked */
  1629. __HAL_UNLOCK(hhrtim);
  1630. return HAL_ERROR;
  1631. }
  1632. /* Get the DMA request to disable */
  1633. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1634. /* Disable the timer DMA request */
  1635. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request);
  1636. /* Disable the timer counter */
  1637. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1638. hhrtim->State = HAL_HRTIM_STATE_READY;
  1639. /* Process Unlocked */
  1640. __HAL_UNLOCK(hhrtim);
  1641. return HAL_OK;
  1642. }
  1643. /**
  1644. * @}
  1645. */
  1646. /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
  1647. * @brief Simple PWM output functions
  1648. @verbatim
  1649. ===============================================================================
  1650. ##### Simple PWM output functions #####
  1651. ===============================================================================
  1652. [..] This section provides functions allowing to:
  1653. (+) Configure simple PWM output channel
  1654. (+) Start simple PWM output
  1655. (+) Stop simple PWM output
  1656. (+) Start simple PWM output and enable interrupt
  1657. (+) Stop simple PWM output and disable interrupt
  1658. (+) Start simple PWM output and enable DMA transfer
  1659. (+) Stop simple PWM output and disable DMA transfer
  1660. -@- When a HRTIM timer operates in simple PWM output mode
  1661. the output level is set to a programmable value when a match is
  1662. found between the compare register and the counter and reset when
  1663. the timer period is reached. Duty cycle is determined by the
  1664. comparison value.
  1665. Compare unit 1 is automatically associated to output 1
  1666. Compare unit 2 is automatically associated to output 2
  1667. @endverbatim
  1668. * @{
  1669. */
  1670. /**
  1671. * @brief Configure an output in simple PWM mode
  1672. * @param hhrtim pointer to HAL HRTIM handle
  1673. * @param TimerIdx Timer index
  1674. * This parameter can be one of the following values:
  1675. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1676. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1677. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1678. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1679. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1680. * @param PWMChannel Timer output
  1681. * This parameter can be one of the following values:
  1682. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1683. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1684. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1685. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1686. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1687. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1688. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1689. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1690. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1691. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1692. * @param pSimplePWMChannelCfg pointer to the simple PWM output configuration structure
  1693. * @note When the timer operates in simple PWM output mode:
  1694. * Output 1 is implicitly controlled by the compare unit 1
  1695. * Output 2 is implicitly controlled by the compare unit 2
  1696. * Output Set/Reset crossbar is set as follows:
  1697. * Output 1: SETx1R = CMP1, RSTx1R = PER
  1698. * Output 2: SETx2R = CMP2, RST2R = PER
  1699. * @note When Simple PWM mode is used the registers preload mechanism is
  1700. * enabled (otherwise the behavior is not guaranteed).
  1701. * @retval HAL status
  1702. */
  1703. HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1704. uint32_t TimerIdx,
  1705. uint32_t PWMChannel,
  1706. const HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg)
  1707. {
  1708. HRTIM_OutputCfgTypeDef OutputCfg;
  1709. uint32_t hrtim_timcr;
  1710. /* Check parameters */
  1711. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1712. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity));
  1713. assert_param(IS_HRTIM_OUTPUTPULSE(pSimplePWMChannelCfg->Pulse));
  1714. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel));
  1715. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1716. {
  1717. return HAL_BUSY;
  1718. }
  1719. /* Process Locked */
  1720. __HAL_LOCK(hhrtim);
  1721. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1722. /* Configure timer compare unit */
  1723. switch (PWMChannel)
  1724. {
  1725. case HRTIM_OUTPUT_TA1:
  1726. case HRTIM_OUTPUT_TB1:
  1727. case HRTIM_OUTPUT_TC1:
  1728. case HRTIM_OUTPUT_TD1:
  1729. case HRTIM_OUTPUT_TE1:
  1730. {
  1731. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimplePWMChannelCfg->Pulse;
  1732. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1733. break;
  1734. }
  1735. case HRTIM_OUTPUT_TA2:
  1736. case HRTIM_OUTPUT_TB2:
  1737. case HRTIM_OUTPUT_TC2:
  1738. case HRTIM_OUTPUT_TD2:
  1739. case HRTIM_OUTPUT_TE2:
  1740. {
  1741. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimplePWMChannelCfg->Pulse;
  1742. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1743. break;
  1744. }
  1745. default:
  1746. {
  1747. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  1748. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  1749. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1750. /* Process Unlocked */
  1751. __HAL_UNLOCK(hhrtim);
  1752. break;
  1753. }
  1754. }
  1755. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  1756. {
  1757. return HAL_ERROR;
  1758. }
  1759. /* Configure timer output */
  1760. OutputCfg.Polarity = (pSimplePWMChannelCfg->Polarity & HRTIM_OUTR_POL1);
  1761. OutputCfg.IdleLevel = (pSimplePWMChannelCfg->IdleLevel& HRTIM_OUTR_IDLES1);
  1762. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  1763. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  1764. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  1765. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  1766. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER;
  1767. HRTIM_OutputConfig(hhrtim,
  1768. TimerIdx,
  1769. PWMChannel,
  1770. &OutputCfg);
  1771. /* Enable the registers preload mechanism */
  1772. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  1773. hrtim_timcr |= HRTIM_TIMCR_PREEN;
  1774. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  1775. hhrtim->State = HAL_HRTIM_STATE_READY;
  1776. /* Process Unlocked */
  1777. __HAL_UNLOCK(hhrtim);
  1778. return HAL_OK;
  1779. }
  1780. /**
  1781. * @brief Start the PWM output signal generation on the designed timer output
  1782. * @param hhrtim pointer to HAL HRTIM handle
  1783. * @param TimerIdx Timer index
  1784. * This parameter can be one of the following values:
  1785. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1786. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1787. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1788. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1789. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1790. * @param PWMChannel Timer output
  1791. * This parameter can be one of the following values:
  1792. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1793. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1794. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1795. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1796. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1797. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1798. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1799. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1800. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1801. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1802. * @retval HAL status
  1803. */
  1804. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim,
  1805. uint32_t TimerIdx,
  1806. uint32_t PWMChannel)
  1807. {
  1808. /* Check the parameters */
  1809. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1810. /* Process Locked */
  1811. __HAL_LOCK(hhrtim);
  1812. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1813. /* Enable the timer output */
  1814. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1815. /* Enable the timer counter */
  1816. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1817. hhrtim->State = HAL_HRTIM_STATE_READY;
  1818. /* Process Unlocked */
  1819. __HAL_UNLOCK(hhrtim);
  1820. return HAL_OK;
  1821. }
  1822. /**
  1823. * @brief Stop the PWM output signal generation on the designed timer output
  1824. * @param hhrtim pointer to HAL HRTIM handle
  1825. * @param TimerIdx Timer index
  1826. * This parameter can be one of the following values:
  1827. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1828. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1829. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1830. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1831. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1832. * @param PWMChannel Timer output
  1833. * This parameter can be one of the following values:
  1834. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1835. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1836. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1837. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1838. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1839. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1840. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1841. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1842. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1843. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1844. * @retval HAL status
  1845. */
  1846. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim,
  1847. uint32_t TimerIdx,
  1848. uint32_t PWMChannel)
  1849. {
  1850. /* Check the parameters */
  1851. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1852. /* Process Locked */
  1853. __HAL_LOCK(hhrtim);
  1854. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1855. /* Disable the timer output */
  1856. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1857. /* Disable the timer counter */
  1858. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1859. hhrtim->State = HAL_HRTIM_STATE_READY;
  1860. /* Process Unlocked */
  1861. __HAL_UNLOCK(hhrtim);
  1862. return HAL_OK;
  1863. }
  1864. /**
  1865. * @brief Start the PWM output signal generation on the designed timer output
  1866. * (The compare interrupt is enabled).
  1867. * @param hhrtim pointer to HAL HRTIM handle
  1868. * @param TimerIdx Timer index
  1869. * This parameter can be one of the following values:
  1870. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1871. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1872. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1873. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1874. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1875. * @param PWMChannel Timer output
  1876. * This parameter can be one of the following values:
  1877. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1878. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1879. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1880. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1881. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1882. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1883. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1884. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1885. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1886. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1887. * @retval HAL status
  1888. */
  1889. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1890. uint32_t TimerIdx,
  1891. uint32_t PWMChannel)
  1892. {
  1893. /* Check the parameters */
  1894. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1895. /* Process Locked */
  1896. __HAL_LOCK(hhrtim);
  1897. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1898. /* Enable the timer output */
  1899. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1900. /* Enable the timer interrupt (depends on the PWM output) */
  1901. switch (PWMChannel)
  1902. {
  1903. case HRTIM_OUTPUT_TA1:
  1904. case HRTIM_OUTPUT_TB1:
  1905. case HRTIM_OUTPUT_TC1:
  1906. case HRTIM_OUTPUT_TD1:
  1907. case HRTIM_OUTPUT_TE1:
  1908. {
  1909. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1910. break;
  1911. }
  1912. case HRTIM_OUTPUT_TA2:
  1913. case HRTIM_OUTPUT_TB2:
  1914. case HRTIM_OUTPUT_TC2:
  1915. case HRTIM_OUTPUT_TD2:
  1916. case HRTIM_OUTPUT_TE2:
  1917. {
  1918. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1919. break;
  1920. }
  1921. default:
  1922. {
  1923. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  1924. /* Process Unlocked */
  1925. __HAL_UNLOCK(hhrtim);
  1926. break;
  1927. }
  1928. }
  1929. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  1930. {
  1931. return HAL_ERROR;
  1932. }
  1933. /* Enable the timer counter */
  1934. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1935. hhrtim->State = HAL_HRTIM_STATE_READY;
  1936. /* Process Unlocked */
  1937. __HAL_UNLOCK(hhrtim);
  1938. return HAL_OK;
  1939. }
  1940. /**
  1941. * @brief Stop the PWM output signal generation on the designed timer output
  1942. * (The compare interrupt is disabled).
  1943. * @param hhrtim pointer to HAL HRTIM handle
  1944. * @param TimerIdx Timer index
  1945. * This parameter can be one of the following values:
  1946. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1947. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1948. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1949. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1950. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1951. * @param PWMChannel Timer output
  1952. * This parameter can be one of the following values:
  1953. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1954. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1955. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1956. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1957. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1958. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1959. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1960. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1961. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1962. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1963. * @retval HAL status
  1964. */
  1965. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1966. uint32_t TimerIdx,
  1967. uint32_t PWMChannel)
  1968. {
  1969. /* Check the parameters */
  1970. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1971. /* Process Locked */
  1972. __HAL_LOCK(hhrtim);
  1973. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1974. /* Disable the timer output */
  1975. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1976. /* Disable the timer interrupt (depends on the PWM output) */
  1977. switch (PWMChannel)
  1978. {
  1979. case HRTIM_OUTPUT_TA1:
  1980. case HRTIM_OUTPUT_TB1:
  1981. case HRTIM_OUTPUT_TC1:
  1982. case HRTIM_OUTPUT_TD1:
  1983. case HRTIM_OUTPUT_TE1:
  1984. {
  1985. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1986. break;
  1987. }
  1988. case HRTIM_OUTPUT_TA2:
  1989. case HRTIM_OUTPUT_TB2:
  1990. case HRTIM_OUTPUT_TC2:
  1991. case HRTIM_OUTPUT_TD2:
  1992. case HRTIM_OUTPUT_TE2:
  1993. {
  1994. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1995. break;
  1996. }
  1997. default:
  1998. {
  1999. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2000. /* Process Unlocked */
  2001. __HAL_UNLOCK(hhrtim);
  2002. break;
  2003. }
  2004. }
  2005. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2006. {
  2007. return HAL_ERROR;
  2008. }
  2009. /* Disable the timer counter */
  2010. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2011. hhrtim->State = HAL_HRTIM_STATE_READY;
  2012. /* Process Unlocked */
  2013. __HAL_UNLOCK(hhrtim);
  2014. return HAL_OK;
  2015. }
  2016. /**
  2017. * @brief Start the PWM output signal generation on the designed timer output
  2018. * (The compare DMA request is enabled).
  2019. * @param hhrtim pointer to HAL HRTIM handle
  2020. * @param TimerIdx Timer index
  2021. * This parameter can be one of the following values:
  2022. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2023. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2024. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2025. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2026. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2027. * @param PWMChannel Timer output
  2028. * This parameter can be one of the following values:
  2029. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2030. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2031. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2032. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2033. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2034. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2035. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2036. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2037. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2038. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2039. * @param SrcAddr DMA transfer source address
  2040. * @param DestAddr DMA transfer destination address
  2041. * @param Length The length of data items (data size) to be transferred
  2042. * from source to destination
  2043. * @retval HAL status
  2044. */
  2045. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  2046. uint32_t TimerIdx,
  2047. uint32_t PWMChannel,
  2048. uint32_t SrcAddr,
  2049. uint32_t DestAddr,
  2050. uint32_t Length)
  2051. {
  2052. DMA_HandleTypeDef * hdma;
  2053. /* Check the parameters */
  2054. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  2055. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2056. {
  2057. return HAL_BUSY;
  2058. }
  2059. if(hhrtim->State == HAL_HRTIM_STATE_READY)
  2060. {
  2061. if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
  2062. {
  2063. return HAL_ERROR;
  2064. }
  2065. else
  2066. {
  2067. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2068. }
  2069. }
  2070. /* Process Locked */
  2071. __HAL_LOCK(hhrtim);
  2072. /* Enable the timer output */
  2073. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  2074. /* Get the timer DMA handler */
  2075. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2076. if (hdma == NULL)
  2077. {
  2078. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2079. /* Process Unlocked */
  2080. __HAL_UNLOCK(hhrtim);
  2081. return HAL_ERROR;
  2082. }
  2083. /* Set the DMA error callback */
  2084. hdma->XferErrorCallback = HRTIM_DMAError ;
  2085. /* Set the DMA transfer completed callback */
  2086. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  2087. /* Enable the DMA channel */
  2088. if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
  2089. {
  2090. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2091. /* Process Unlocked */
  2092. __HAL_UNLOCK(hhrtim);
  2093. return HAL_ERROR;
  2094. }
  2095. /* Enable the timer DMA request */
  2096. switch (PWMChannel)
  2097. {
  2098. case HRTIM_OUTPUT_TA1:
  2099. case HRTIM_OUTPUT_TB1:
  2100. case HRTIM_OUTPUT_TC1:
  2101. case HRTIM_OUTPUT_TD1:
  2102. case HRTIM_OUTPUT_TE1:
  2103. {
  2104. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  2105. break;
  2106. }
  2107. case HRTIM_OUTPUT_TA2:
  2108. case HRTIM_OUTPUT_TB2:
  2109. case HRTIM_OUTPUT_TC2:
  2110. case HRTIM_OUTPUT_TD2:
  2111. case HRTIM_OUTPUT_TE2:
  2112. {
  2113. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  2114. break;
  2115. }
  2116. default:
  2117. {
  2118. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2119. /* Process Unlocked */
  2120. __HAL_UNLOCK(hhrtim);
  2121. break;
  2122. }
  2123. }
  2124. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2125. {
  2126. return HAL_ERROR;
  2127. }
  2128. /* Enable the timer counter */
  2129. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2130. hhrtim->State = HAL_HRTIM_STATE_READY;
  2131. /* Process Unlocked */
  2132. __HAL_UNLOCK(hhrtim);
  2133. return HAL_OK;
  2134. }
  2135. /**
  2136. * @brief Stop the PWM output signal generation on the designed timer output
  2137. * (The compare DMA request is disabled).
  2138. * @param hhrtim pointer to HAL HRTIM handle
  2139. * @param TimerIdx Timer index
  2140. * This parameter can be one of the following values:
  2141. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2142. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2143. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2144. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2145. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2146. * @param PWMChannel Timer output
  2147. * This parameter can be one of the following values:
  2148. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2149. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2150. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2151. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2152. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2153. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2154. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2155. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2156. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2157. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2158. * @retval HAL status
  2159. */
  2160. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  2161. uint32_t TimerIdx,
  2162. uint32_t PWMChannel)
  2163. {
  2164. /* Check the parameters */
  2165. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  2166. /* Process Locked */
  2167. __HAL_LOCK(hhrtim);
  2168. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2169. /* Disable the timer output */
  2170. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  2171. /* Get the timer DMA handler */
  2172. /* Disable the DMA */
  2173. if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
  2174. {
  2175. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2176. /* Process Unlocked */
  2177. __HAL_UNLOCK(hhrtim);
  2178. return HAL_ERROR;
  2179. }
  2180. /* Disable the timer DMA request */
  2181. switch (PWMChannel)
  2182. {
  2183. case HRTIM_OUTPUT_TA1:
  2184. case HRTIM_OUTPUT_TB1:
  2185. case HRTIM_OUTPUT_TC1:
  2186. case HRTIM_OUTPUT_TD1:
  2187. case HRTIM_OUTPUT_TE1:
  2188. {
  2189. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  2190. break;
  2191. }
  2192. case HRTIM_OUTPUT_TA2:
  2193. case HRTIM_OUTPUT_TB2:
  2194. case HRTIM_OUTPUT_TC2:
  2195. case HRTIM_OUTPUT_TD2:
  2196. case HRTIM_OUTPUT_TE2:
  2197. {
  2198. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  2199. break;
  2200. }
  2201. default:
  2202. {
  2203. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2204. /* Process Unlocked */
  2205. __HAL_UNLOCK(hhrtim);
  2206. break;
  2207. }
  2208. }
  2209. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2210. {
  2211. return HAL_ERROR;
  2212. }
  2213. /* Disable the timer counter */
  2214. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2215. hhrtim->State = HAL_HRTIM_STATE_READY;
  2216. /* Process Unlocked */
  2217. __HAL_UNLOCK(hhrtim);
  2218. return HAL_OK;
  2219. }
  2220. /**
  2221. * @}
  2222. */
  2223. /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions
  2224. * @brief Simple input capture functions
  2225. @verbatim
  2226. ===============================================================================
  2227. ##### Simple input capture functions #####
  2228. ===============================================================================
  2229. [..] This section provides functions allowing to:
  2230. (+) Configure simple input capture channel
  2231. (+) Start simple input capture
  2232. (+) Stop simple input capture
  2233. (+) Start simple input capture and enable interrupt
  2234. (+) Stop simple input capture and disable interrupt
  2235. (+) Start simple input capture and enable DMA transfer
  2236. (+) Stop simple input capture and disable DMA transfer
  2237. -@- When a HRTIM timer operates in simple input capture mode
  2238. the Capture Register (HRTIM_CPT1/2xR) is used to latch the
  2239. value of the timer counter counter after a transition detected
  2240. on a given external event input.
  2241. @endverbatim
  2242. * @{
  2243. */
  2244. /**
  2245. * @brief Configure a simple capture
  2246. * @param hhrtim pointer to HAL HRTIM handle
  2247. * @param TimerIdx Timer index
  2248. * This parameter can be one of the following values:
  2249. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2250. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2251. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2252. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2253. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2254. * @param CaptureChannel Capture unit
  2255. * This parameter can be one of the following values:
  2256. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2257. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2258. * @param pSimpleCaptureChannelCfg pointer to the simple capture configuration structure
  2259. * @note When the timer operates in simple capture mode the capture is triggered
  2260. * by the designated external event and GPIO input is implicitly used as event source.
  2261. * The cature can be triggered by a rising edge, a falling edge or both
  2262. * edges on event channel.
  2263. * @retval HAL status
  2264. */
  2265. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  2266. uint32_t TimerIdx,
  2267. uint32_t CaptureChannel,
  2268. const HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg)
  2269. {
  2270. HRTIM_EventCfgTypeDef EventCfg;
  2271. /* Check parameters */
  2272. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2273. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2274. assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event));
  2275. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity,
  2276. pSimpleCaptureChannelCfg->EventPolarity));
  2277. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity));
  2278. assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event,
  2279. pSimpleCaptureChannelCfg->EventFilter));
  2280. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2281. {
  2282. return HAL_BUSY;
  2283. }
  2284. /* Process Locked */
  2285. __HAL_LOCK(hhrtim);
  2286. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2287. /* Configure external event channel */
  2288. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  2289. EventCfg.Filter = (pSimpleCaptureChannelCfg->EventFilter & HRTIM_EECR3_EE6F);
  2290. EventCfg.Polarity = (pSimpleCaptureChannelCfg->EventPolarity & HRTIM_EECR1_EE1POL);
  2291. EventCfg.Sensitivity = (pSimpleCaptureChannelCfg->EventSensitivity & HRTIM_EECR1_EE1SNS);
  2292. EventCfg.Source = HRTIM_EVENTSRC_1;
  2293. HRTIM_EventConfig(hhrtim,
  2294. pSimpleCaptureChannelCfg->Event,
  2295. &EventCfg);
  2296. /* Memorize capture trigger (will be configured when the capture is started */
  2297. HRTIM_CaptureUnitConfig(hhrtim,
  2298. TimerIdx,
  2299. CaptureChannel,
  2300. pSimpleCaptureChannelCfg->Event);
  2301. hhrtim->State = HAL_HRTIM_STATE_READY;
  2302. /* Process Unlocked */
  2303. __HAL_UNLOCK(hhrtim);
  2304. return HAL_OK;
  2305. }
  2306. /**
  2307. * @brief Enable a simple capture on the designed capture unit
  2308. * @param hhrtim pointer to HAL HRTIM handle
  2309. * @param TimerIdx Timer index
  2310. * This parameter can be one of the following values:
  2311. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2312. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2313. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2314. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2315. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2316. * @param CaptureChannel Timer output
  2317. * This parameter can be one of the following values:
  2318. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2319. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2320. * @retval HAL status
  2321. * @note The external event triggering the capture is available for all timing
  2322. * units. It can be used directly and is active as soon as the timing
  2323. * unit counter is enabled.
  2324. */
  2325. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim,
  2326. uint32_t TimerIdx,
  2327. uint32_t CaptureChannel)
  2328. {
  2329. /* Check the parameters */
  2330. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2331. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2332. /* Process Locked */
  2333. __HAL_LOCK(hhrtim);
  2334. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2335. /* Set the capture unit trigger */
  2336. switch (CaptureChannel)
  2337. {
  2338. case HRTIM_CAPTUREUNIT_1:
  2339. {
  2340. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2341. break;
  2342. }
  2343. case HRTIM_CAPTUREUNIT_2:
  2344. {
  2345. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2346. break;
  2347. }
  2348. default:
  2349. {
  2350. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2351. /* Process Unlocked */
  2352. __HAL_UNLOCK(hhrtim);
  2353. break;
  2354. }
  2355. }
  2356. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2357. {
  2358. return HAL_ERROR;
  2359. }
  2360. /* Enable the timer counter */
  2361. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2362. hhrtim->State = HAL_HRTIM_STATE_READY;
  2363. /* Process Unlocked */
  2364. __HAL_UNLOCK(hhrtim);
  2365. return HAL_OK;
  2366. }
  2367. /**
  2368. * @brief Disable a simple capture on the designed capture unit
  2369. * @param hhrtim pointer to HAL HRTIM handle
  2370. * @param TimerIdx Timer index
  2371. * This parameter can be one of the following values:
  2372. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2373. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2374. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2375. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2376. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2377. * @param CaptureChannel Timer output
  2378. * This parameter can be one of the following values:
  2379. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2380. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2381. * @retval HAL status
  2382. */
  2383. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim,
  2384. uint32_t TimerIdx,
  2385. uint32_t CaptureChannel)
  2386. {
  2387. uint32_t hrtim_cpt1cr;
  2388. uint32_t hrtim_cpt2cr;
  2389. /* Check the parameters */
  2390. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2391. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2392. /* Process Locked */
  2393. __HAL_LOCK(hhrtim);
  2394. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2395. /* Set the capture unit trigger */
  2396. switch (CaptureChannel)
  2397. {
  2398. case HRTIM_CAPTUREUNIT_1:
  2399. {
  2400. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2401. break;
  2402. }
  2403. case HRTIM_CAPTUREUNIT_2:
  2404. {
  2405. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2406. break;
  2407. }
  2408. default:
  2409. {
  2410. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2411. /* Process Unlocked */
  2412. __HAL_UNLOCK(hhrtim);
  2413. break;
  2414. }
  2415. }
  2416. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2417. {
  2418. return HAL_ERROR;
  2419. }
  2420. hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
  2421. hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
  2422. /* Disable the timer counter */
  2423. if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
  2424. (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
  2425. {
  2426. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2427. }
  2428. hhrtim->State = HAL_HRTIM_STATE_READY;
  2429. /* Process Unlocked */
  2430. __HAL_UNLOCK(hhrtim);
  2431. return HAL_OK;
  2432. }
  2433. /**
  2434. * @brief Enable a simple capture on the designed capture unit
  2435. * (Capture interrupt is enabled).
  2436. * @param hhrtim pointer to HAL HRTIM handle
  2437. * @param TimerIdx Timer index
  2438. * This parameter can be one of the following values:
  2439. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2440. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2441. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2442. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2443. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2444. * @param CaptureChannel Timer output
  2445. * This parameter can be one of the following values:
  2446. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2447. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2448. * @retval HAL status
  2449. */
  2450. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim,
  2451. uint32_t TimerIdx,
  2452. uint32_t CaptureChannel)
  2453. {
  2454. /* Check the parameters */
  2455. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2456. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2457. /* Process Locked */
  2458. __HAL_LOCK(hhrtim);
  2459. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2460. /* Set the capture unit trigger */
  2461. switch (CaptureChannel)
  2462. {
  2463. case HRTIM_CAPTUREUNIT_1:
  2464. {
  2465. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2466. /* Enable the capture unit 1 interrupt */
  2467. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2468. break;
  2469. }
  2470. case HRTIM_CAPTUREUNIT_2:
  2471. {
  2472. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2473. /* Enable the capture unit 2 interrupt */
  2474. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2475. break;
  2476. }
  2477. default:
  2478. {
  2479. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2480. /* Process Unlocked */
  2481. __HAL_UNLOCK(hhrtim);
  2482. break;
  2483. }
  2484. }
  2485. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2486. {
  2487. return HAL_ERROR;
  2488. }
  2489. /* Enable the timer counter */
  2490. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2491. hhrtim->State = HAL_HRTIM_STATE_READY;
  2492. /* Process Unlocked */
  2493. __HAL_UNLOCK(hhrtim);
  2494. return HAL_OK;
  2495. }
  2496. /**
  2497. * @brief Disable a simple capture on the designed capture unit
  2498. * (Capture interrupt is disabled).
  2499. * @param hhrtim pointer to HAL HRTIM handle
  2500. * @param TimerIdx Timer index
  2501. * This parameter can be one of the following values:
  2502. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2503. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2504. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2505. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2506. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2507. * @param CaptureChannel Timer output
  2508. * This parameter can be one of the following values:
  2509. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2510. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2511. * @retval HAL status
  2512. */
  2513. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim,
  2514. uint32_t TimerIdx,
  2515. uint32_t CaptureChannel)
  2516. {
  2517. uint32_t hrtim_cpt1cr;
  2518. uint32_t hrtim_cpt2cr;
  2519. /* Check the parameters */
  2520. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2521. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2522. /* Process Locked */
  2523. __HAL_LOCK(hhrtim);
  2524. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2525. /* Set the capture unit trigger */
  2526. switch (CaptureChannel)
  2527. {
  2528. case HRTIM_CAPTUREUNIT_1:
  2529. {
  2530. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2531. /* Disable the capture unit 1 interrupt */
  2532. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2533. break;
  2534. }
  2535. case HRTIM_CAPTUREUNIT_2:
  2536. {
  2537. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2538. /* Disable the capture unit 2 interrupt */
  2539. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2540. break;
  2541. }
  2542. default:
  2543. {
  2544. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2545. /* Process Unlocked */
  2546. __HAL_UNLOCK(hhrtim);
  2547. break;
  2548. }
  2549. }
  2550. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2551. {
  2552. return HAL_ERROR;
  2553. }
  2554. hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
  2555. hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
  2556. /* Disable the timer counter */
  2557. if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
  2558. (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
  2559. {
  2560. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2561. }
  2562. hhrtim->State = HAL_HRTIM_STATE_READY;
  2563. /* Process Unlocked */
  2564. __HAL_UNLOCK(hhrtim);
  2565. return HAL_OK;
  2566. }
  2567. /**
  2568. * @brief Enable a simple capture on the designed capture unit
  2569. * (Capture DMA request is enabled).
  2570. * @param hhrtim pointer to HAL HRTIM handle
  2571. * @param TimerIdx Timer index
  2572. * This parameter can be one of the following values:
  2573. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2574. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2575. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2576. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2577. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2578. * @param CaptureChannel Timer output
  2579. * This parameter can be one of the following values:
  2580. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2581. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2582. * @param SrcAddr DMA transfer source address
  2583. * @param DestAddr DMA transfer destination address
  2584. * @param Length The length of data items (data size) to be transferred
  2585. * from source to destination
  2586. * @retval HAL status
  2587. */
  2588. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  2589. uint32_t TimerIdx,
  2590. uint32_t CaptureChannel,
  2591. uint32_t SrcAddr,
  2592. uint32_t DestAddr,
  2593. uint32_t Length)
  2594. {
  2595. DMA_HandleTypeDef * hdma;
  2596. /* Check the parameters */
  2597. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2598. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2599. /* Process Locked */
  2600. __HAL_LOCK(hhrtim);
  2601. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2602. /* Get the timer DMA handler */
  2603. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2604. if (hdma == NULL)
  2605. {
  2606. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2607. /* Process Unlocked */
  2608. __HAL_UNLOCK(hhrtim);
  2609. return HAL_ERROR;
  2610. }
  2611. /* Set the DMA error callback */
  2612. hdma->XferErrorCallback = HRTIM_DMAError ;
  2613. /* Set the DMA transfer completed callback */
  2614. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  2615. /* Enable the DMA channel */
  2616. if (HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length) != HAL_OK)
  2617. {
  2618. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2619. /* Process Unlocked */
  2620. __HAL_UNLOCK(hhrtim);
  2621. return HAL_ERROR;
  2622. }
  2623. switch (CaptureChannel)
  2624. {
  2625. case HRTIM_CAPTUREUNIT_1:
  2626. {
  2627. /* Set the capture unit trigger */
  2628. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2629. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2630. break;
  2631. }
  2632. case HRTIM_CAPTUREUNIT_2:
  2633. {
  2634. /* Set the capture unit trigger */
  2635. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2636. /* Enable the timer DMA request */
  2637. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2638. break;
  2639. }
  2640. default:
  2641. {
  2642. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2643. /* Process Unlocked */
  2644. __HAL_UNLOCK(hhrtim);
  2645. break;
  2646. }
  2647. }
  2648. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2649. {
  2650. return HAL_ERROR;
  2651. }
  2652. /* Enable the timer counter */
  2653. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2654. hhrtim->State = HAL_HRTIM_STATE_READY;
  2655. /* Process Unlocked */
  2656. __HAL_UNLOCK(hhrtim);
  2657. return HAL_OK;
  2658. }
  2659. /**
  2660. * @brief Disable a simple capture on the designed capture unit
  2661. * (Capture DMA request is disabled).
  2662. * @param hhrtim pointer to HAL HRTIM handle
  2663. * @param TimerIdx Timer index
  2664. * This parameter can be one of the following values:
  2665. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2666. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2667. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2668. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2669. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2670. * @param CaptureChannel Timer output
  2671. * This parameter can be one of the following values:
  2672. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2673. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2674. * @retval HAL status
  2675. */
  2676. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  2677. uint32_t TimerIdx,
  2678. uint32_t CaptureChannel)
  2679. {
  2680. uint32_t hrtim_cpt1cr;
  2681. uint32_t hrtim_cpt2cr;
  2682. /* Check the parameters */
  2683. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2684. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2685. /* Process Locked */
  2686. __HAL_LOCK(hhrtim);
  2687. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2688. /* Get the timer DMA handler */
  2689. /* Disable the DMA */
  2690. if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx)) != HAL_OK)
  2691. {
  2692. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2693. /* Process Unlocked */
  2694. __HAL_UNLOCK(hhrtim);
  2695. return HAL_ERROR;
  2696. }
  2697. switch (CaptureChannel)
  2698. {
  2699. case HRTIM_CAPTUREUNIT_1:
  2700. {
  2701. /* Reset the capture unit trigger */
  2702. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2703. /* Disable the capture unit 1 DMA request */
  2704. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2705. break;
  2706. }
  2707. case HRTIM_CAPTUREUNIT_2:
  2708. {
  2709. /* Reset the capture unit trigger */
  2710. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2711. /* Disable the capture unit 2 DMA request */
  2712. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2713. break;
  2714. }
  2715. default:
  2716. {
  2717. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2718. /* Process Unlocked */
  2719. __HAL_UNLOCK(hhrtim);
  2720. break;
  2721. }
  2722. }
  2723. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2724. {
  2725. return HAL_ERROR;
  2726. }
  2727. hrtim_cpt1cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR;
  2728. hrtim_cpt2cr = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR;
  2729. /* Disable the timer counter */
  2730. if ((hrtim_cpt1cr == HRTIM_CAPTURETRIGGER_NONE) &&
  2731. (hrtim_cpt2cr == HRTIM_CAPTURETRIGGER_NONE))
  2732. {
  2733. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2734. }
  2735. hhrtim->State = HAL_HRTIM_STATE_READY;
  2736. /* Process Unlocked */
  2737. __HAL_UNLOCK(hhrtim);
  2738. return HAL_OK;
  2739. }
  2740. /**
  2741. * @}
  2742. */
  2743. /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
  2744. * @brief Simple one pulse functions
  2745. @verbatim
  2746. ===============================================================================
  2747. ##### Simple one pulse functions #####
  2748. ===============================================================================
  2749. [..] This section provides functions allowing to:
  2750. (+) Configure one pulse channel
  2751. (+) Start one pulse generation
  2752. (+) Stop one pulse generation
  2753. (+) Start one pulse generation and enable interrupt
  2754. (+) Stop one pulse generation and disable interrupt
  2755. -@- When a HRTIM timer operates in simple one pulse mode
  2756. the timer counter is started in response to transition detected
  2757. on a given external event input to generate a pulse with a
  2758. programmable length after a programmable delay.
  2759. @endverbatim
  2760. * @{
  2761. */
  2762. /**
  2763. * @brief Configure an output simple one pulse mode
  2764. * @param hhrtim pointer to HAL HRTIM handle
  2765. * @param TimerIdx Timer index
  2766. * This parameter can be one of the following values:
  2767. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2768. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2769. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2770. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2771. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2772. * @param OnePulseChannel Timer output
  2773. * This parameter can be one of the following values:
  2774. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2775. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2776. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2777. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2778. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2779. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2780. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2781. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2782. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2783. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2784. * @param pSimpleOnePulseChannelCfg pointer to the simple one pulse output configuration structure
  2785. * @note When the timer operates in simple one pulse mode:
  2786. * the timer counter is implicitly started by the reset event,
  2787. * the reset of the timer counter is triggered by the designated external event
  2788. * GPIO input is implicitly used as event source,
  2789. * Output 1 is implicitly controlled by the compare unit 1,
  2790. * Output 2 is implicitly controlled by the compare unit 2.
  2791. * Output Set/Reset crossbar is set as follows:
  2792. * Output 1: SETx1R = CMP1, RSTx1R = PER
  2793. * Output 2: SETx2R = CMP2, RST2R = PER
  2794. * @retval HAL status
  2795. * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer
  2796. * outputs, the reset event related configuration data provided in the
  2797. * second call will override the reset event related configuration data
  2798. * provided in the first call.
  2799. */
  2800. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  2801. uint32_t TimerIdx,
  2802. uint32_t OnePulseChannel,
  2803. const HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg)
  2804. {
  2805. HRTIM_OutputCfgTypeDef OutputCfg;
  2806. HRTIM_EventCfgTypeDef EventCfg;
  2807. /* Check parameters */
  2808. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2809. assert_param(IS_HRTIM_OUTPUTPULSE(pSimpleOnePulseChannelCfg->Pulse));
  2810. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity));
  2811. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel));
  2812. assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event));
  2813. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity,
  2814. pSimpleOnePulseChannelCfg->EventPolarity));
  2815. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity));
  2816. assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event,
  2817. pSimpleOnePulseChannelCfg->EventFilter));
  2818. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2819. {
  2820. return HAL_BUSY;
  2821. }
  2822. /* Process Locked */
  2823. __HAL_LOCK(hhrtim);
  2824. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2825. /* Configure timer compare unit */
  2826. switch (OnePulseChannel)
  2827. {
  2828. case HRTIM_OUTPUT_TA1:
  2829. case HRTIM_OUTPUT_TB1:
  2830. case HRTIM_OUTPUT_TC1:
  2831. case HRTIM_OUTPUT_TD1:
  2832. case HRTIM_OUTPUT_TE1:
  2833. {
  2834. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pSimpleOnePulseChannelCfg->Pulse;
  2835. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  2836. break;
  2837. }
  2838. case HRTIM_OUTPUT_TA2:
  2839. case HRTIM_OUTPUT_TB2:
  2840. case HRTIM_OUTPUT_TC2:
  2841. case HRTIM_OUTPUT_TD2:
  2842. case HRTIM_OUTPUT_TE2:
  2843. {
  2844. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pSimpleOnePulseChannelCfg->Pulse;
  2845. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  2846. break;
  2847. }
  2848. default:
  2849. {
  2850. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  2851. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  2852. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  2853. /* Process Unlocked */
  2854. __HAL_UNLOCK(hhrtim);
  2855. break;
  2856. }
  2857. }
  2858. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  2859. {
  2860. return HAL_ERROR;
  2861. }
  2862. /* Configure timer output */
  2863. OutputCfg.Polarity = (pSimpleOnePulseChannelCfg->OutputPolarity & HRTIM_OUTR_POL1);
  2864. OutputCfg.IdleLevel = (pSimpleOnePulseChannelCfg->OutputIdleLevel & HRTIM_OUTR_IDLES1);
  2865. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  2866. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  2867. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  2868. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  2869. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMPER;
  2870. HRTIM_OutputConfig(hhrtim,
  2871. TimerIdx,
  2872. OnePulseChannel,
  2873. &OutputCfg);
  2874. /* Configure external event channel */
  2875. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  2876. EventCfg.Filter = (pSimpleOnePulseChannelCfg->EventFilter & HRTIM_EECR3_EE6F);
  2877. EventCfg.Polarity = (pSimpleOnePulseChannelCfg->EventPolarity & HRTIM_OUTR_POL1);
  2878. EventCfg.Sensitivity = (pSimpleOnePulseChannelCfg->EventSensitivity &HRTIM_EECR1_EE1SNS);
  2879. EventCfg.Source = HRTIM_EVENTSRC_1;
  2880. HRTIM_EventConfig(hhrtim,
  2881. pSimpleOnePulseChannelCfg->Event,
  2882. &EventCfg);
  2883. /* Configure the timer reset register */
  2884. HRTIM_TIM_ResetConfig(hhrtim,
  2885. TimerIdx,
  2886. pSimpleOnePulseChannelCfg->Event);
  2887. hhrtim->State = HAL_HRTIM_STATE_READY;
  2888. /* Process Unlocked */
  2889. __HAL_UNLOCK(hhrtim);
  2890. return HAL_OK;
  2891. }
  2892. /**
  2893. * @brief Enable the simple one pulse signal generation on the designed output
  2894. * @param hhrtim pointer to HAL HRTIM handle
  2895. * @param TimerIdx Timer index
  2896. * This parameter can be one of the following values:
  2897. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2898. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2899. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2900. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2901. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2902. * @param OnePulseChannel Timer output
  2903. * This parameter can be one of the following values:
  2904. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2905. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2906. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2907. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2908. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2909. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2910. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2911. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2912. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2913. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2914. * @retval HAL status
  2915. */
  2916. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim,
  2917. uint32_t TimerIdx,
  2918. uint32_t OnePulseChannel)
  2919. {
  2920. /* Check the parameters */
  2921. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2922. /* Process Locked */
  2923. __HAL_LOCK(hhrtim);
  2924. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2925. /* Enable the timer output */
  2926. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  2927. /* Enable the timer counter */
  2928. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2929. hhrtim->State = HAL_HRTIM_STATE_READY;
  2930. /* Process Unlocked */
  2931. __HAL_UNLOCK(hhrtim);
  2932. return HAL_OK;
  2933. }
  2934. /**
  2935. * @brief Disable the simple one pulse signal generation on the designed output
  2936. * @param hhrtim pointer to HAL HRTIM handle
  2937. * @param TimerIdx Timer index
  2938. * This parameter can be one of the following values:
  2939. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2940. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2941. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2942. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2943. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2944. * @param OnePulseChannel Timer output
  2945. * This parameter can be one of the following values:
  2946. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2947. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2948. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2949. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2950. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2951. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2952. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2953. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2954. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2955. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2956. * @retval HAL status
  2957. */
  2958. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim,
  2959. uint32_t TimerIdx,
  2960. uint32_t OnePulseChannel)
  2961. {
  2962. /* Check the parameters */
  2963. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2964. /* Process Locked */
  2965. __HAL_LOCK(hhrtim);
  2966. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2967. /* Disable the timer output */
  2968. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  2969. /* Disable the timer counter */
  2970. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2971. hhrtim->State = HAL_HRTIM_STATE_READY;
  2972. /* Process Unlocked */
  2973. __HAL_UNLOCK(hhrtim);
  2974. return HAL_OK;
  2975. }
  2976. /**
  2977. * @brief Enable the simple one pulse signal generation on the designed output
  2978. * (The compare interrupt is enabled (pulse start)).
  2979. * @param hhrtim pointer to HAL HRTIM handle
  2980. * @param TimerIdx Timer index
  2981. * This parameter can be one of the following values:
  2982. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2983. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2984. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2985. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2986. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2987. * @param OnePulseChannel Timer output
  2988. * This parameter can be one of the following values:
  2989. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2990. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2991. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2992. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2993. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2994. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2995. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2996. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2997. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2998. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2999. * @retval HAL status
  3000. */
  3001. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  3002. uint32_t TimerIdx,
  3003. uint32_t OnePulseChannel)
  3004. {
  3005. /* Check the parameters */
  3006. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  3007. /* Process Locked */
  3008. __HAL_LOCK(hhrtim);
  3009. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3010. /* Enable the timer output */
  3011. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  3012. /* Enable the timer interrupt (depends on the OnePulse output) */
  3013. switch (OnePulseChannel)
  3014. {
  3015. case HRTIM_OUTPUT_TA1:
  3016. case HRTIM_OUTPUT_TB1:
  3017. case HRTIM_OUTPUT_TC1:
  3018. case HRTIM_OUTPUT_TD1:
  3019. case HRTIM_OUTPUT_TE1:
  3020. {
  3021. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  3022. break;
  3023. }
  3024. case HRTIM_OUTPUT_TA2:
  3025. case HRTIM_OUTPUT_TB2:
  3026. case HRTIM_OUTPUT_TC2:
  3027. case HRTIM_OUTPUT_TD2:
  3028. case HRTIM_OUTPUT_TE2:
  3029. {
  3030. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  3031. break;
  3032. }
  3033. default:
  3034. {
  3035. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3036. /* Process Unlocked */
  3037. __HAL_UNLOCK(hhrtim);
  3038. break;
  3039. }
  3040. }
  3041. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3042. {
  3043. return HAL_ERROR;
  3044. }
  3045. /* Enable the timer counter */
  3046. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  3047. hhrtim->State = HAL_HRTIM_STATE_READY;
  3048. /* Process Unlocked */
  3049. __HAL_UNLOCK(hhrtim);
  3050. return HAL_OK;
  3051. }
  3052. /**
  3053. * @brief Disable the simple one pulse signal generation on the designed output
  3054. * (The compare interrupt is disabled).
  3055. * @param hhrtim pointer to HAL HRTIM handle
  3056. * @param TimerIdx Timer index
  3057. * This parameter can be one of the following values:
  3058. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3059. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3060. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3061. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3062. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3063. * @param OnePulseChannel Timer output
  3064. * This parameter can be one of the following values:
  3065. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3066. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3067. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3068. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3069. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3070. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3071. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3072. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3073. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3074. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3075. * @retval HAL status
  3076. */
  3077. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  3078. uint32_t TimerIdx,
  3079. uint32_t OnePulseChannel)
  3080. {
  3081. /* Check the parameters */
  3082. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  3083. /* Process Locked */
  3084. __HAL_LOCK(hhrtim);
  3085. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3086. /* Disable the timer output */
  3087. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  3088. /* Disable the timer interrupt (depends on the OnePulse output) */
  3089. switch (OnePulseChannel)
  3090. {
  3091. case HRTIM_OUTPUT_TA1:
  3092. case HRTIM_OUTPUT_TB1:
  3093. case HRTIM_OUTPUT_TC1:
  3094. case HRTIM_OUTPUT_TD1:
  3095. case HRTIM_OUTPUT_TE1:
  3096. {
  3097. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  3098. break;
  3099. }
  3100. case HRTIM_OUTPUT_TA2:
  3101. case HRTIM_OUTPUT_TB2:
  3102. case HRTIM_OUTPUT_TC2:
  3103. case HRTIM_OUTPUT_TD2:
  3104. case HRTIM_OUTPUT_TE2:
  3105. {
  3106. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  3107. break;
  3108. }
  3109. default:
  3110. {
  3111. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3112. /* Process Unlocked */
  3113. __HAL_UNLOCK(hhrtim);
  3114. break;
  3115. }
  3116. }
  3117. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3118. {
  3119. return HAL_ERROR;
  3120. }
  3121. /* Disable the timer counter */
  3122. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  3123. hhrtim->State = HAL_HRTIM_STATE_READY;
  3124. /* Process Unlocked */
  3125. __HAL_UNLOCK(hhrtim);
  3126. return HAL_OK;
  3127. }
  3128. /**
  3129. * @}
  3130. */
  3131. /** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions
  3132. * @brief HRTIM configuration functions
  3133. @verbatim
  3134. ===============================================================================
  3135. ##### HRTIM configuration functions #####
  3136. ===============================================================================
  3137. [..] This section provides functions allowing to configure the HRTIM
  3138. resources shared by all the HRTIM timers operating in waveform mode:
  3139. (+) Configure the burst mode controller
  3140. (+) Configure an external event conditioning
  3141. (+) Configure the external events sampling clock
  3142. (+) Configure a fault conditioning
  3143. (+) Enable or disable fault inputs
  3144. (+) Configure the faults sampling clock
  3145. (+) Configure an ADC trigger
  3146. @endverbatim
  3147. * @{
  3148. */
  3149. /**
  3150. * @brief Configure the burst mode feature of the HRTIM
  3151. * @param hhrtim pointer to HAL HRTIM handle
  3152. * @param pBurstModeCfg pointer to the burst mode configuration structure
  3153. * @retval HAL status
  3154. * @note This function must be called before starting the burst mode
  3155. * controller
  3156. */
  3157. HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim,
  3158. const HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
  3159. {
  3160. uint32_t hrtim_bmcr;
  3161. /* Check parameters */
  3162. assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
  3163. assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
  3164. assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
  3165. assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
  3166. assert_param(IS_HRTIM_BURSTMODETRIGGER(pBurstModeCfg->Trigger));
  3167. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3168. {
  3169. return HAL_BUSY;
  3170. }
  3171. /* Process Locked */
  3172. __HAL_LOCK(hhrtim);
  3173. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3174. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  3175. /* Set the burst mode operating mode */
  3176. hrtim_bmcr &= ~(HRTIM_BMCR_BMOM);
  3177. hrtim_bmcr |= (pBurstModeCfg->Mode & HRTIM_BMCR_BMOM);
  3178. /* Set the burst mode clock source */
  3179. hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK);
  3180. hrtim_bmcr |= (pBurstModeCfg->ClockSource & HRTIM_BMCR_BMCLK);
  3181. /* Set the burst mode prescaler */
  3182. hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC);
  3183. hrtim_bmcr |= pBurstModeCfg->Prescaler;
  3184. /* Enable/disable burst mode registers preload */
  3185. hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN);
  3186. hrtim_bmcr |= (pBurstModeCfg->PreloadEnable & HRTIM_BMCR_BMPREN);
  3187. /* Set the burst mode trigger */
  3188. hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;
  3189. /* Set the burst mode compare value */
  3190. hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;
  3191. /* Set the burst mode period */
  3192. hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;
  3193. /* Update the HRTIM registers */
  3194. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  3195. hhrtim->State = HAL_HRTIM_STATE_READY;
  3196. /* Process Unlocked */
  3197. __HAL_UNLOCK(hhrtim);
  3198. return HAL_OK;
  3199. }
  3200. /**
  3201. * @brief Configure the conditioning of an external event
  3202. * @param hhrtim pointer to HAL HRTIM handle
  3203. * @param Event external event to configure
  3204. * This parameter can be one of the following values:
  3205. * @arg HRTIM_EVENT_NONE: no external Event
  3206. * @arg HRTIM_EVENT_1: External event 1
  3207. * @arg HRTIM_EVENT_2: External event 2
  3208. * @arg HRTIM_EVENT_3: External event 3
  3209. * @arg HRTIM_EVENT_4: External event 4
  3210. * @arg HRTIM_EVENT_5: External event 5
  3211. * @arg HRTIM_EVENT_6: External event 6
  3212. * @arg HRTIM_EVENT_7: External event 7
  3213. * @arg HRTIM_EVENT_8: External event 8
  3214. * @arg HRTIM_EVENT_9: External event 9
  3215. * @arg HRTIM_EVENT_10: External event 10
  3216. * @param pEventCfg pointer to the event conditioning configuration structure
  3217. * @note This function must be called before starting the timer
  3218. * @retval HAL status
  3219. */
  3220. HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  3221. uint32_t Event,
  3222. const HRTIM_EventCfgTypeDef* pEventCfg)
  3223. {
  3224. /* Check parameters */
  3225. assert_param(IS_HRTIM_EVENT(Event));
  3226. assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
  3227. assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity));
  3228. assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
  3229. assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode));
  3230. assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter));
  3231. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3232. {
  3233. return HAL_BUSY;
  3234. }
  3235. /* Process Locked */
  3236. __HAL_LOCK(hhrtim);
  3237. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3238. /* Configure the event channel */
  3239. HRTIM_EventConfig(hhrtim, Event, pEventCfg);
  3240. hhrtim->State = HAL_HRTIM_STATE_READY;
  3241. /* Process Unlocked */
  3242. __HAL_UNLOCK(hhrtim);
  3243. return HAL_OK;
  3244. }
  3245. /**
  3246. * @brief Configure the external event conditioning block prescaler
  3247. * @param hhrtim pointer to HAL HRTIM handle
  3248. * @param Prescaler Prescaler value
  3249. * This parameter can be one of the following values:
  3250. * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM
  3251. * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2
  3252. * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4
  3253. * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8
  3254. * @note This function must be called before starting the timer
  3255. * @retval HAL status
  3256. */
  3257. HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  3258. uint32_t Prescaler)
  3259. {
  3260. /* Check parameters */
  3261. assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
  3262. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3263. {
  3264. return HAL_BUSY;
  3265. }
  3266. /* Process Locked */
  3267. __HAL_LOCK(hhrtim);
  3268. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3269. /* Set the external event prescaler */
  3270. MODIFY_REG(hhrtim->Instance->sCommonRegs.EECR3, HRTIM_EECR3_EEVSD, (Prescaler & HRTIM_EECR3_EEVSD));
  3271. hhrtim->State = HAL_HRTIM_STATE_READY;
  3272. /* Process Unlocked */
  3273. __HAL_UNLOCK(hhrtim);
  3274. return HAL_OK;
  3275. }
  3276. /**
  3277. * @brief Configure the conditioning of fault input
  3278. * @param hhrtim pointer to HAL HRTIM handle
  3279. * @param Fault fault input to configure
  3280. * This parameter can be one of the following values:
  3281. * @arg HRTIM_FAULT_1: Fault input 1
  3282. * @arg HRTIM_FAULT_2: Fault input 2
  3283. * @arg HRTIM_FAULT_3: Fault input 3
  3284. * @arg HRTIM_FAULT_4: Fault input 4
  3285. * @arg HRTIM_FAULT_5: Fault input 5
  3286. * @param pFaultCfg pointer to the fault conditioning configuration structure
  3287. * @note This function must be called before starting the timer and before
  3288. * enabling faults inputs
  3289. * @retval HAL status
  3290. */
  3291. HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim,
  3292. uint32_t Fault,
  3293. const HRTIM_FaultCfgTypeDef* pFaultCfg)
  3294. {
  3295. uint32_t hrtim_fltinr1;
  3296. uint32_t hrtim_fltinr2;
  3297. /* Check parameters */
  3298. assert_param(IS_HRTIM_FAULT(Fault));
  3299. assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
  3300. assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
  3301. assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
  3302. assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
  3303. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3304. {
  3305. return HAL_BUSY;
  3306. }
  3307. /* Process Locked */
  3308. __HAL_LOCK(hhrtim);
  3309. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3310. /* Configure fault channel */
  3311. hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
  3312. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  3313. switch (Fault)
  3314. {
  3315. case HRTIM_FAULT_1:
  3316. {
  3317. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK);
  3318. hrtim_fltinr1 |= (pFaultCfg->Polarity & HRTIM_FLTINR1_FLT1P);
  3319. hrtim_fltinr1 |= (pFaultCfg->Source & HRTIM_FLTINR1_FLT1SRC);
  3320. hrtim_fltinr1 |= (pFaultCfg->Filter & HRTIM_FLTINR1_FLT1F);
  3321. hrtim_fltinr1 |= (pFaultCfg->Lock & HRTIM_FLTINR1_FLT1LCK);
  3322. break;
  3323. }
  3324. case HRTIM_FAULT_2:
  3325. {
  3326. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK);
  3327. hrtim_fltinr1 |= ((pFaultCfg->Polarity << 8U) & HRTIM_FLTINR1_FLT2P);
  3328. hrtim_fltinr1 |= ((pFaultCfg->Source << 8U) & HRTIM_FLTINR1_FLT2SRC);
  3329. hrtim_fltinr1 |= ((pFaultCfg->Filter << 8U) & HRTIM_FLTINR1_FLT2F);
  3330. hrtim_fltinr1 |= ((pFaultCfg->Lock << 8U) & HRTIM_FLTINR1_FLT2LCK);
  3331. break;
  3332. }
  3333. case HRTIM_FAULT_3:
  3334. {
  3335. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK);
  3336. hrtim_fltinr1 |= ((pFaultCfg->Polarity << 16U) & HRTIM_FLTINR1_FLT3P);
  3337. hrtim_fltinr1 |= ((pFaultCfg->Source << 16U) & HRTIM_FLTINR1_FLT3SRC);
  3338. hrtim_fltinr1 |= ((pFaultCfg->Filter << 16U) & HRTIM_FLTINR1_FLT3F);
  3339. hrtim_fltinr1 |= ((pFaultCfg->Lock << 16U) & HRTIM_FLTINR1_FLT3LCK);
  3340. break;
  3341. }
  3342. case HRTIM_FAULT_4:
  3343. {
  3344. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK);
  3345. hrtim_fltinr1 |= ((pFaultCfg->Polarity << 24U) & HRTIM_FLTINR1_FLT4P);
  3346. hrtim_fltinr1 |= ((pFaultCfg->Source << 24U) & HRTIM_FLTINR1_FLT4SRC);
  3347. hrtim_fltinr1 |= ((pFaultCfg->Filter << 24U) & HRTIM_FLTINR1_FLT4F);
  3348. hrtim_fltinr1 |= ((pFaultCfg->Lock << 24U) & HRTIM_FLTINR1_FLT4LCK);
  3349. break;
  3350. }
  3351. case HRTIM_FAULT_5:
  3352. {
  3353. hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK);
  3354. hrtim_fltinr2 |= (pFaultCfg->Polarity & HRTIM_FLTINR2_FLT5P);
  3355. hrtim_fltinr2 |= (pFaultCfg->Source & HRTIM_FLTINR2_FLT5SRC);
  3356. hrtim_fltinr2 |= (pFaultCfg->Filter & HRTIM_FLTINR2_FLT5F);
  3357. hrtim_fltinr2 |= (pFaultCfg->Lock & HRTIM_FLTINR2_FLT5LCK);
  3358. break;
  3359. }
  3360. default:
  3361. {
  3362. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3363. /* Process Unlocked */
  3364. __HAL_UNLOCK(hhrtim);
  3365. break;
  3366. }
  3367. }
  3368. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3369. {
  3370. return HAL_ERROR;
  3371. }
  3372. /* Update the HRTIM registers except LOCK bit */
  3373. hhrtim->Instance->sCommonRegs.FLTINR1 = (hrtim_fltinr1 & (~(HRTIM_FLTINR1_FLTxLCK)));
  3374. hhrtim->Instance->sCommonRegs.FLTINR2 = (hrtim_fltinr2 & (~(HRTIM_FLTINR2_FLTxLCK)));
  3375. /* Update the HRTIM registers LOCK bit */
  3376. SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR1,(hrtim_fltinr1 & HRTIM_FLTINR1_FLTxLCK));
  3377. SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR2,(hrtim_fltinr2 & HRTIM_FLTINR2_FLTxLCK));
  3378. hhrtim->State = HAL_HRTIM_STATE_READY;
  3379. /* Process Unlocked */
  3380. __HAL_UNLOCK(hhrtim);
  3381. return HAL_OK;
  3382. }
  3383. /**
  3384. * @brief Configure the fault conditioning block prescaler
  3385. * @param hhrtim pointer to HAL HRTIM handle
  3386. * @param Prescaler Prescaler value
  3387. * This parameter can be one of the following values:
  3388. * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM
  3389. * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2
  3390. * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4
  3391. * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8
  3392. * @retval HAL status
  3393. * @note This function must be called before starting the timer and before
  3394. * enabling faults inputs
  3395. */
  3396. HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  3397. uint32_t Prescaler)
  3398. {
  3399. /* Check parameters */
  3400. assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
  3401. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3402. {
  3403. return HAL_BUSY;
  3404. }
  3405. /* Process Locked */
  3406. __HAL_LOCK(hhrtim);
  3407. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3408. /* Set the external event prescaler */
  3409. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLTSD, (Prescaler & HRTIM_FLTINR2_FLTSD));
  3410. hhrtim->State = HAL_HRTIM_STATE_READY;
  3411. /* Process Unlocked */
  3412. __HAL_UNLOCK(hhrtim);
  3413. return HAL_OK;
  3414. }
  3415. /**
  3416. * @brief Enable or disables the HRTIMx Fault mode.
  3417. * @param hhrtim pointer to HAL HRTIM handle
  3418. * @param Faults fault input(s) to enable or disable
  3419. * This parameter can be any combination of the following values:
  3420. * @arg HRTIM_FAULT_1: Fault input 1
  3421. * @arg HRTIM_FAULT_2: Fault input 2
  3422. * @arg HRTIM_FAULT_3: Fault input 3
  3423. * @arg HRTIM_FAULT_4: Fault input 4
  3424. * @arg HRTIM_FAULT_5: Fault input 5
  3425. * @param Enable Fault(s) enabling
  3426. * This parameter can be one of the following values:
  3427. * @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled
  3428. * @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled
  3429. * @retval None
  3430. */
  3431. void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
  3432. uint32_t Faults,
  3433. uint32_t Enable)
  3434. {
  3435. /* Check parameters */
  3436. assert_param(IS_HRTIM_FAULT(Faults));
  3437. assert_param(IS_HRTIM_FAULTMODECTL(Enable));
  3438. if ((Faults & HRTIM_FAULT_1) != (uint32_t)RESET)
  3439. {
  3440. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT1E, (Enable & HRTIM_FLTINR1_FLT1E));
  3441. }
  3442. if ((Faults & HRTIM_FAULT_2) != (uint32_t)RESET)
  3443. {
  3444. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT2E, ((Enable << 8U) & HRTIM_FLTINR1_FLT2E));
  3445. }
  3446. if ((Faults & HRTIM_FAULT_3) != (uint32_t)RESET)
  3447. {
  3448. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT3E, ((Enable << 16U) & HRTIM_FLTINR1_FLT3E));
  3449. }
  3450. if ((Faults & HRTIM_FAULT_4) != (uint32_t)RESET)
  3451. {
  3452. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT4E, ((Enable << 24U) & HRTIM_FLTINR1_FLT4E));
  3453. }
  3454. if ((Faults & HRTIM_FAULT_5) != (uint32_t)RESET)
  3455. {
  3456. MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLT5E, ((Enable) & HRTIM_FLTINR2_FLT5E));
  3457. }
  3458. }
  3459. /**
  3460. * @brief Configure both the ADC trigger register update source and the ADC
  3461. * trigger source.
  3462. * @param hhrtim pointer to HAL HRTIM handle
  3463. * @param ADCTrigger ADC trigger to configure
  3464. * This parameter can be one of the following values:
  3465. * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
  3466. * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
  3467. * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
  3468. * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
  3469. * @param pADCTriggerCfg pointer to the ADC trigger configuration structure
  3470. * @retval HAL status
  3471. * @note This function must be called before starting the timer
  3472. */
  3473. HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim,
  3474. uint32_t ADCTrigger,
  3475. const HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
  3476. {
  3477. uint32_t hrtim_cr1;
  3478. /* Check parameters */
  3479. assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
  3480. assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
  3481. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3482. {
  3483. return HAL_BUSY;
  3484. }
  3485. /* Process Locked */
  3486. __HAL_LOCK(hhrtim);
  3487. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3488. /* Set the ADC trigger update source */
  3489. hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;
  3490. switch (ADCTrigger)
  3491. {
  3492. case HRTIM_ADCTRIGGER_1:
  3493. {
  3494. hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC);
  3495. hrtim_cr1 |= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC);
  3496. /* Set the ADC trigger 1 source */
  3497. hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;
  3498. break;
  3499. }
  3500. case HRTIM_ADCTRIGGER_2:
  3501. {
  3502. hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC);
  3503. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 3U) & HRTIM_CR1_ADC2USRC);
  3504. /* Set the ADC trigger 2 source */
  3505. hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;
  3506. break;
  3507. }
  3508. case HRTIM_ADCTRIGGER_3:
  3509. {
  3510. hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC);
  3511. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 6U) & HRTIM_CR1_ADC3USRC);
  3512. /* Set the ADC trigger 3 source */
  3513. hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;
  3514. break;
  3515. }
  3516. case HRTIM_ADCTRIGGER_4:
  3517. {
  3518. hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC);
  3519. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 9U) & HRTIM_CR1_ADC4USRC);
  3520. /* Set the ADC trigger 4 source */
  3521. hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;
  3522. break;
  3523. }
  3524. default:
  3525. {
  3526. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3527. /* Process Unlocked */
  3528. __HAL_UNLOCK(hhrtim);
  3529. break;
  3530. }
  3531. }
  3532. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3533. {
  3534. return HAL_ERROR;
  3535. }
  3536. /* Update the HRTIM registers */
  3537. hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;
  3538. hhrtim->State = HAL_HRTIM_STATE_READY;
  3539. /* Process Unlocked */
  3540. __HAL_UNLOCK(hhrtim);
  3541. return HAL_OK;
  3542. }
  3543. /**
  3544. * @}
  3545. */
  3546. /** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
  3547. * @brief HRTIM timer configuration and control functions
  3548. @verbatim
  3549. ===============================================================================
  3550. ##### HRTIM timer configuration and control functions #####
  3551. ===============================================================================
  3552. [..] This section provides functions used to configure and control a
  3553. HRTIM timer operating in waveform mode:
  3554. (+) Configure HRTIM timer general behavior
  3555. (+) Configure HRTIM timer event filtering
  3556. (+) Configure HRTIM timer deadtime insertion
  3557. (+) Configure HRTIM timer chopper mode
  3558. (+) Configure HRTIM timer burst DMA
  3559. (+) Configure HRTIM timer compare unit
  3560. (+) Configure HRTIM timer capture unit
  3561. (+) Configure HRTIM timer output
  3562. (+) Set HRTIM timer output level
  3563. (+) Enable HRTIM timer output
  3564. (+) Disable HRTIM timer output
  3565. (+) Start HRTIM timer
  3566. (+) Stop HRTIM timer
  3567. (+) Start HRTIM timer and enable interrupt
  3568. (+) Stop HRTIM timer and disable interrupt
  3569. (+) Start HRTIM timer and enable DMA transfer
  3570. (+) Stop HRTIM timer and disable DMA transfer
  3571. (+) Enable or disable the burst mode controller
  3572. (+) Start the burst mode controller (by software)
  3573. (+) Trigger a Capture (by software)
  3574. (+) Update the HRTIM timer preloadable registers (by software)
  3575. (+) Reset the HRTIM timer counter (by software)
  3576. (+) Start a burst DMA transfer
  3577. (+) Enable timer register update
  3578. (+) Disable timer register update
  3579. @endverbatim
  3580. * @{
  3581. */
  3582. /**
  3583. * @brief Configure the general behavior of a timer operating in waveform mode
  3584. * @param hhrtim pointer to HAL HRTIM handle
  3585. * @param TimerIdx Timer index
  3586. * This parameter can be one of the following values:
  3587. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3588. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3589. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3590. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3591. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3592. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3593. * @param pTimerCfg pointer to the timer configuration structure
  3594. * @note When the timer operates in waveform mode, all the features supported by
  3595. * the HRTIM are available without any limitation.
  3596. * @retval HAL status
  3597. * @note This function must be called before starting the timer
  3598. */
  3599. HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
  3600. uint32_t TimerIdx,
  3601. const HRTIM_TimerCfgTypeDef * pTimerCfg)
  3602. {
  3603. /* Check parameters */
  3604. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  3605. /* Relevant for all HRTIM timers, including the master */
  3606. assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable));
  3607. assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync));
  3608. assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync));
  3609. assert_param(IS_HRTIM_DACSYNC(pTimerCfg->DACSynchro));
  3610. assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable));
  3611. assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode));
  3612. assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate));
  3613. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3614. {
  3615. return HAL_BUSY;
  3616. }
  3617. /* Process Locked */
  3618. __HAL_LOCK(hhrtim);
  3619. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3620. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  3621. {
  3622. /* Check parameters */
  3623. assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating));
  3624. assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests));
  3625. assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests));
  3626. /* Configure master timer */
  3627. HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg);
  3628. }
  3629. else
  3630. {
  3631. /* Check parameters */
  3632. assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating));
  3633. assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests));
  3634. assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests));
  3635. assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
  3636. assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
  3637. assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
  3638. assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull,
  3639. pTimerCfg->DeadTimeInsertion));
  3640. assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull,
  3641. pTimerCfg->DelayedProtectionMode));
  3642. assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
  3643. assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
  3644. assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
  3645. /* Configure timing unit */
  3646. HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg);
  3647. }
  3648. /* Update timer parameters */
  3649. hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests;
  3650. hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests;
  3651. hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress;
  3652. hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress;
  3653. hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize;
  3654. /* Force a software update */
  3655. HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
  3656. hhrtim->State = HAL_HRTIM_STATE_READY;
  3657. /* Process Unlocked */
  3658. __HAL_UNLOCK(hhrtim);
  3659. return HAL_OK;
  3660. }
  3661. /**
  3662. * @brief Configure the event filtering capabilities of a timer (blanking, windowing)
  3663. * @param hhrtim pointer to HAL HRTIM handle
  3664. * @param TimerIdx Timer index
  3665. * This parameter can be one of the following values:
  3666. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3667. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3668. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3669. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3670. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3671. * @param Event external event for which timer event filtering must be configured
  3672. * This parameter can be one of the following values:
  3673. * @arg HRTIM_EVENT_1: External event 1
  3674. * @arg HRTIM_EVENT_2: External event 2
  3675. * @arg HRTIM_EVENT_3: External event 3
  3676. * @arg HRTIM_EVENT_4: External event 4
  3677. * @arg HRTIM_EVENT_5: External event 5
  3678. * @arg HRTIM_EVENT_6: External event 6
  3679. * @arg HRTIM_EVENT_7: External event 7
  3680. * @arg HRTIM_EVENT_8: External event 8
  3681. * @arg HRTIM_EVENT_9: External event 9
  3682. * @arg HRTIM_EVENT_10: External event 10
  3683. * @param pTimerEventFilteringCfg pointer to the timer event filtering configuration structure
  3684. * @note This function must be called before starting the timer
  3685. * @retval HAL status
  3686. */
  3687. HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim,
  3688. uint32_t TimerIdx,
  3689. uint32_t Event,
  3690. const HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
  3691. {
  3692. /* Check parameters */
  3693. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3694. assert_param(IS_HRTIM_EVENT(Event));
  3695. assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
  3696. assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
  3697. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3698. {
  3699. return HAL_BUSY;
  3700. }
  3701. /* Process Locked */
  3702. __HAL_LOCK(hhrtim);
  3703. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3704. /* Configure timer event filtering capabilities */
  3705. switch (Event)
  3706. {
  3707. case HRTIM_EVENT_NONE:
  3708. {
  3709. CLEAR_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1);
  3710. CLEAR_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2);
  3711. break;
  3712. }
  3713. case HRTIM_EVENT_1:
  3714. {
  3715. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH), (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch));
  3716. break;
  3717. }
  3718. case HRTIM_EVENT_2:
  3719. {
  3720. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U) );
  3721. break;
  3722. }
  3723. case HRTIM_EVENT_3:
  3724. {
  3725. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U) );
  3726. break;
  3727. }
  3728. case HRTIM_EVENT_4:
  3729. {
  3730. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U) );
  3731. break;
  3732. }
  3733. case HRTIM_EVENT_5:
  3734. {
  3735. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1, (HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U) );
  3736. break;
  3737. }
  3738. case HRTIM_EVENT_6:
  3739. {
  3740. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH), (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) );
  3741. break;
  3742. }
  3743. case HRTIM_EVENT_7:
  3744. {
  3745. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6U) );
  3746. break;
  3747. }
  3748. case HRTIM_EVENT_8:
  3749. {
  3750. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12U) );
  3751. break;
  3752. }
  3753. case HRTIM_EVENT_9:
  3754. {
  3755. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18U) );
  3756. break;
  3757. }
  3758. case HRTIM_EVENT_10:
  3759. {
  3760. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2, (HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH), ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24U) );
  3761. break;
  3762. }
  3763. default:
  3764. {
  3765. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3766. /* Process Unlocked */
  3767. __HAL_UNLOCK(hhrtim);
  3768. break;
  3769. }
  3770. }
  3771. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3772. {
  3773. return HAL_ERROR;
  3774. }
  3775. hhrtim->State = HAL_HRTIM_STATE_READY;
  3776. /* Process Unlocked */
  3777. __HAL_UNLOCK(hhrtim);
  3778. return HAL_OK;
  3779. }
  3780. /**
  3781. * @brief Configure the dead-time insertion feature for a timer
  3782. * @param hhrtim pointer to HAL HRTIM handle
  3783. * @param TimerIdx Timer index
  3784. * This parameter can be one of the following values:
  3785. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3786. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3787. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3788. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3789. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3790. * @param pDeadTimeCfg pointer to the deadtime insertion configuration structure
  3791. * @retval HAL status
  3792. * @note This function must be called before starting the timer
  3793. */
  3794. HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim,
  3795. uint32_t TimerIdx,
  3796. const HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
  3797. {
  3798. uint32_t hrtim_dtr;
  3799. /* Check parameters */
  3800. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3801. assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler));
  3802. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
  3803. assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
  3804. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
  3805. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
  3806. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
  3807. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
  3808. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3809. {
  3810. return HAL_BUSY;
  3811. }
  3812. /* Process Locked */
  3813. __HAL_LOCK(hhrtim);
  3814. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3815. /* Set timer deadtime configuration */
  3816. hrtim_dtr = (pDeadTimeCfg->Prescaler & HRTIM_DTR_DTPRSC);
  3817. hrtim_dtr |= (pDeadTimeCfg->RisingValue & HRTIM_DTR_DTR);
  3818. hrtim_dtr |= (pDeadTimeCfg->RisingSign & HRTIM_DTR_SDTR);
  3819. hrtim_dtr |= (pDeadTimeCfg->RisingSignLock & HRTIM_DTR_DTRSLK);
  3820. hrtim_dtr |= (pDeadTimeCfg->RisingLock & HRTIM_DTR_DTRLK);
  3821. hrtim_dtr |= ((pDeadTimeCfg->FallingValue << 16U) & HRTIM_DTR_DTF);
  3822. hrtim_dtr |= (pDeadTimeCfg->FallingSign & HRTIM_DTR_SDTF);
  3823. hrtim_dtr |= (pDeadTimeCfg->FallingSignLock & HRTIM_DTR_DTFSLK);
  3824. hrtim_dtr |= (pDeadTimeCfg->FallingLock & HRTIM_DTR_DTFLK);
  3825. /* Update the HRTIM registers */
  3826. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR, (
  3827. HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC |
  3828. HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_DTF |
  3829. HRTIM_DTR_SDTF | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK), hrtim_dtr);
  3830. hhrtim->State = HAL_HRTIM_STATE_READY;
  3831. /* Process Unlocked */
  3832. __HAL_UNLOCK(hhrtim);
  3833. return HAL_OK;
  3834. }
  3835. /**
  3836. * @brief Configure the chopper mode feature for a timer
  3837. * @param hhrtim pointer to HAL HRTIM handle
  3838. * @param TimerIdx Timer index
  3839. * This parameter can be one of the following values:
  3840. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3841. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3842. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3843. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3844. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3845. * @param pChopperModeCfg pointer to the chopper mode configuration structure
  3846. * @retval HAL status
  3847. * @note This function must be called before configuring the timer output(s)
  3848. */
  3849. HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim,
  3850. uint32_t TimerIdx,
  3851. const HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
  3852. {
  3853. uint32_t hrtim_chpr;
  3854. /* Check parameters */
  3855. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3856. assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq));
  3857. assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle));
  3858. assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse));
  3859. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3860. {
  3861. return HAL_BUSY;
  3862. }
  3863. /* Process Locked */
  3864. __HAL_LOCK(hhrtim);
  3865. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3866. /* Set timer choppe mode configuration */
  3867. hrtim_chpr = (pChopperModeCfg->CarrierFreq & HRTIM_CHPR_CARFRQ);
  3868. hrtim_chpr |= (pChopperModeCfg->DutyCycle & HRTIM_CHPR_CARDTY);
  3869. hrtim_chpr |= (pChopperModeCfg->StartPulse & HRTIM_CHPR_STRPW);
  3870. /* Update the HRTIM registers */
  3871. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR,
  3872. (HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW),
  3873. hrtim_chpr);
  3874. hhrtim->State = HAL_HRTIM_STATE_READY;
  3875. /* Process Unlocked */
  3876. __HAL_UNLOCK(hhrtim);
  3877. return HAL_OK;
  3878. }
  3879. /**
  3880. * @brief Configure the burst DMA controller for a timer
  3881. * @param hhrtim pointer to HAL HRTIM handle
  3882. * @param TimerIdx Timer index
  3883. * This parameter can be one of the following values:
  3884. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3885. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3886. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3887. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3888. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3889. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3890. * @param RegistersToUpdate registers to be written by DMA
  3891. * This parameter can be any combination of the following values:
  3892. * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
  3893. * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
  3894. * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
  3895. * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
  3896. * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
  3897. * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
  3898. * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
  3899. * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
  3900. * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
  3901. * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
  3902. * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
  3903. * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
  3904. * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
  3905. * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
  3906. * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
  3907. * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
  3908. * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
  3909. * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
  3910. * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
  3911. * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
  3912. * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
  3913. * @retval HAL status
  3914. * @note This function must be called before starting the timer
  3915. */
  3916. HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim,
  3917. uint32_t TimerIdx,
  3918. uint32_t RegistersToUpdate)
  3919. {
  3920. /* Check parameters */
  3921. assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
  3922. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3923. {
  3924. return HAL_BUSY;
  3925. }
  3926. /* Process Locked */
  3927. __HAL_LOCK(hhrtim);
  3928. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3929. /* Set the burst DMA timer update register */
  3930. switch (TimerIdx)
  3931. {
  3932. case HRTIM_TIMERINDEX_TIMER_A:
  3933. {
  3934. hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;
  3935. break;
  3936. }
  3937. case HRTIM_TIMERINDEX_TIMER_B:
  3938. {
  3939. hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;
  3940. break;
  3941. }
  3942. case HRTIM_TIMERINDEX_TIMER_C:
  3943. {
  3944. hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;
  3945. break;
  3946. }
  3947. case HRTIM_TIMERINDEX_TIMER_D:
  3948. {
  3949. hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;
  3950. break;
  3951. }
  3952. case HRTIM_TIMERINDEX_TIMER_E:
  3953. {
  3954. hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;
  3955. break;
  3956. }
  3957. case HRTIM_TIMERINDEX_MASTER:
  3958. {
  3959. hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;
  3960. break;
  3961. }
  3962. default:
  3963. {
  3964. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  3965. /* Process Unlocked */
  3966. __HAL_UNLOCK(hhrtim);
  3967. break;
  3968. }
  3969. }
  3970. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  3971. {
  3972. return HAL_ERROR;
  3973. }
  3974. hhrtim->State = HAL_HRTIM_STATE_READY;
  3975. /* Process Unlocked */
  3976. __HAL_UNLOCK(hhrtim);
  3977. return HAL_OK;
  3978. }
  3979. /**
  3980. * @brief Configure the compare unit of a timer operating in waveform mode
  3981. * @param hhrtim pointer to HAL HRTIM handle
  3982. * @param TimerIdx Timer index
  3983. * This parameter can be one of the following values:
  3984. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3985. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3986. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3987. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3988. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3989. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3990. * @param CompareUnit Compare unit to configure
  3991. * This parameter can be one of the following values:
  3992. * @arg HRTIM_COMPAREUNIT_1: Compare unit 1
  3993. * @arg HRTIM_COMPAREUNIT_2: Compare unit 2
  3994. * @arg HRTIM_COMPAREUNIT_3: Compare unit 3
  3995. * @arg HRTIM_COMPAREUNIT_4: Compare unit 4
  3996. * @param pCompareCfg pointer to the compare unit configuration structure
  3997. * @note When auto delayed mode is required for compare unit 2 or compare unit 4,
  3998. * application has to configure separately the capture unit. Capture unit
  3999. * to configure in that case depends on the compare unit auto delayed mode
  4000. * is applied to (see below):
  4001. * Auto delayed on output compare 2: capture unit 1 must be configured
  4002. * Auto delayed on output compare 4: capture unit 2 must be configured
  4003. * @retval HAL status
  4004. * @note This function must be called before starting the timer
  4005. */
  4006. HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim,
  4007. uint32_t TimerIdx,
  4008. uint32_t CompareUnit,
  4009. const HRTIM_CompareCfgTypeDef* pCompareCfg)
  4010. {
  4011. /* Check parameters */
  4012. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  4013. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4014. {
  4015. return HAL_BUSY;
  4016. }
  4017. /* Process Locked */
  4018. __HAL_LOCK(hhrtim);
  4019. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4020. /* Configure the compare unit */
  4021. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  4022. {
  4023. switch (CompareUnit)
  4024. {
  4025. case HRTIM_COMPAREUNIT_1:
  4026. {
  4027. hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
  4028. break;
  4029. }
  4030. case HRTIM_COMPAREUNIT_2:
  4031. {
  4032. hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
  4033. break;
  4034. }
  4035. case HRTIM_COMPAREUNIT_3:
  4036. {
  4037. hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
  4038. break;
  4039. }
  4040. case HRTIM_COMPAREUNIT_4:
  4041. {
  4042. hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
  4043. break;
  4044. }
  4045. default:
  4046. {
  4047. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4048. /* Process Unlocked */
  4049. __HAL_UNLOCK(hhrtim);
  4050. break;
  4051. }
  4052. }
  4053. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4054. {
  4055. return HAL_ERROR;
  4056. }
  4057. }
  4058. else
  4059. {
  4060. switch (CompareUnit)
  4061. {
  4062. case HRTIM_COMPAREUNIT_1:
  4063. {
  4064. /* Set the compare value */
  4065. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
  4066. break;
  4067. }
  4068. case HRTIM_COMPAREUNIT_2:
  4069. {
  4070. /* Check parameters */
  4071. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  4072. /* Set the compare value */
  4073. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
  4074. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  4075. {
  4076. /* Configure auto-delayed mode */
  4077. /* DELCMP2 bitfield must be reset when reprogrammed from one value */
  4078. /* to the other to reinitialize properly the auto-delayed mechanism */
  4079. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2;
  4080. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= pCompareCfg->AutoDelayedMode;
  4081. /* Set the compare value for timeout compare unit (if any) */
  4082. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  4083. {
  4084. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  4085. }
  4086. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  4087. {
  4088. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  4089. }
  4090. else
  4091. {
  4092. /* nothing to do */
  4093. }
  4094. }
  4095. else
  4096. {
  4097. /* Clear HRTIM_TIMxCR.DELCMP2 bitfield */
  4098. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR, HRTIM_TIMCR_DELCMP2, 0U);
  4099. }
  4100. break;
  4101. }
  4102. case HRTIM_COMPAREUNIT_3:
  4103. {
  4104. /* Set the compare value */
  4105. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
  4106. break;
  4107. }
  4108. case HRTIM_COMPAREUNIT_4:
  4109. {
  4110. /* Check parameters */
  4111. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  4112. /* Set the compare value */
  4113. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
  4114. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  4115. {
  4116. /* Configure auto-delayed mode */
  4117. /* DELCMP4 bitfield must be reset when reprogrammed from one value */
  4118. /* to the other to reinitialize properly the auto-delayed mechanism */
  4119. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4;
  4120. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= (pCompareCfg->AutoDelayedMode << 2U);
  4121. /* Set the compare value for timeout compare unit (if any) */
  4122. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  4123. {
  4124. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  4125. }
  4126. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  4127. {
  4128. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  4129. }
  4130. else
  4131. {
  4132. /* nothing to do */
  4133. }
  4134. }
  4135. else
  4136. {
  4137. /* Clear HRTIM_TIMxCR.DELCMP4 bitfield */
  4138. MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR, HRTIM_TIMCR_DELCMP4, 0U);
  4139. }
  4140. break;
  4141. }
  4142. default:
  4143. {
  4144. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4145. /* Process Unlocked */
  4146. __HAL_UNLOCK(hhrtim);
  4147. break;
  4148. }
  4149. }
  4150. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4151. {
  4152. return HAL_ERROR;
  4153. }
  4154. }
  4155. hhrtim->State = HAL_HRTIM_STATE_READY;
  4156. /* Process Unlocked */
  4157. __HAL_UNLOCK(hhrtim);
  4158. return HAL_OK;
  4159. }
  4160. /**
  4161. * @brief Configure the capture unit of a timer operating in waveform mode
  4162. * @param hhrtim pointer to HAL HRTIM handle
  4163. * @param TimerIdx Timer index
  4164. * This parameter can be one of the following values:
  4165. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4166. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4167. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4168. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4169. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4170. * @param CaptureUnit Capture unit to configure
  4171. * This parameter can be one of the following values:
  4172. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4173. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4174. * @param pCaptureCfg pointer to the compare unit configuration structure
  4175. * @retval HAL status
  4176. * @note This function must be called before starting the timer
  4177. */
  4178. HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim,
  4179. uint32_t TimerIdx,
  4180. uint32_t CaptureUnit,
  4181. const HRTIM_CaptureCfgTypeDef* pCaptureCfg)
  4182. {
  4183. /* Check parameters */
  4184. assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger));
  4185. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4186. {
  4187. return HAL_BUSY;
  4188. }
  4189. /* Process Locked */
  4190. __HAL_LOCK(hhrtim);
  4191. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4192. /* Configure the capture unit */
  4193. switch (CaptureUnit)
  4194. {
  4195. case HRTIM_CAPTUREUNIT_1:
  4196. {
  4197. WRITE_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR, pCaptureCfg->Trigger);
  4198. break;
  4199. }
  4200. case HRTIM_CAPTUREUNIT_2:
  4201. {
  4202. WRITE_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR, pCaptureCfg->Trigger);
  4203. break;
  4204. }
  4205. default:
  4206. {
  4207. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4208. /* Process Unlocked */
  4209. __HAL_UNLOCK(hhrtim);
  4210. break;
  4211. }
  4212. }
  4213. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4214. {
  4215. return HAL_ERROR;
  4216. }
  4217. hhrtim->State = HAL_HRTIM_STATE_READY;
  4218. /* Process Unlocked */
  4219. __HAL_UNLOCK(hhrtim);
  4220. return HAL_OK;
  4221. }
  4222. /**
  4223. * @brief Configure the output of a timer operating in waveform mode
  4224. * @param hhrtim pointer to HAL HRTIM handle
  4225. * @param TimerIdx Timer index
  4226. * This parameter can be one of the following values:
  4227. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4228. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4229. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4230. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4231. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4232. * @param Output Timer output
  4233. * This parameter can be one of the following values:
  4234. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4235. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4236. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4237. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4238. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4239. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4240. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4241. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4242. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4243. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4244. * @param pOutputCfg pointer to the timer output configuration structure
  4245. * @retval HAL status
  4246. * @note This function must be called before configuring the timer and after
  4247. * configuring the deadtime insertion feature (if required).
  4248. */
  4249. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim,
  4250. uint32_t TimerIdx,
  4251. uint32_t Output,
  4252. const HRTIM_OutputCfgTypeDef * pOutputCfg)
  4253. {
  4254. /* Check parameters */
  4255. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4256. assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
  4257. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel));
  4258. assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
  4259. assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel));
  4260. assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
  4261. assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
  4262. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4263. {
  4264. return HAL_BUSY;
  4265. }
  4266. /* Process Locked */
  4267. __HAL_LOCK(hhrtim);
  4268. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4269. /* Configure the timer output */
  4270. HRTIM_OutputConfig(hhrtim,
  4271. TimerIdx,
  4272. Output,
  4273. pOutputCfg);
  4274. hhrtim->State = HAL_HRTIM_STATE_READY;
  4275. /* Process Unlocked */
  4276. __HAL_UNLOCK(hhrtim);
  4277. return HAL_OK;
  4278. }
  4279. /**
  4280. * @brief Force the timer output to its active or inactive state
  4281. * @param hhrtim pointer to HAL HRTIM handle
  4282. * @param TimerIdx Timer index
  4283. * This parameter can be one of the following values:
  4284. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4285. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4286. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4287. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4288. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4289. * @param Output Timer output
  4290. * This parameter can be one of the following values:
  4291. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4292. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4293. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4294. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4295. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4296. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4297. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4298. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4299. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4300. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4301. * @param OutputLevel indicates whether the output is forced to its active or inactive level
  4302. * This parameter can be one of the following values:
  4303. * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level
  4304. * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level
  4305. * @retval HAL status
  4306. * @note The 'software set/reset trigger' bit in the output set/reset registers
  4307. * is automatically reset by hardware
  4308. */
  4309. HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
  4310. uint32_t TimerIdx,
  4311. uint32_t Output,
  4312. uint32_t OutputLevel)
  4313. {
  4314. /* Check parameters */
  4315. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4316. assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
  4317. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4318. {
  4319. return HAL_BUSY;
  4320. }
  4321. /* Process Locked */
  4322. __HAL_LOCK(hhrtim);
  4323. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4324. /* Force timer output level */
  4325. switch (Output)
  4326. {
  4327. case HRTIM_OUTPUT_TA1:
  4328. case HRTIM_OUTPUT_TB1:
  4329. case HRTIM_OUTPUT_TC1:
  4330. case HRTIM_OUTPUT_TD1:
  4331. case HRTIM_OUTPUT_TE1:
  4332. {
  4333. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  4334. {
  4335. /* Force output to its active state */
  4336. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R,HRTIM_SET1R_SST);
  4337. }
  4338. else
  4339. {
  4340. /* Force output to its inactive state */
  4341. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R, HRTIM_RST1R_SRT);
  4342. }
  4343. break;
  4344. }
  4345. case HRTIM_OUTPUT_TA2:
  4346. case HRTIM_OUTPUT_TB2:
  4347. case HRTIM_OUTPUT_TC2:
  4348. case HRTIM_OUTPUT_TD2:
  4349. case HRTIM_OUTPUT_TE2:
  4350. {
  4351. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  4352. {
  4353. /* Force output to its active state */
  4354. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R, HRTIM_SET2R_SST);
  4355. }
  4356. else
  4357. {
  4358. /* Force output to its inactive state */
  4359. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R, HRTIM_RST2R_SRT);
  4360. }
  4361. break;
  4362. }
  4363. default:
  4364. {
  4365. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4366. /* Process Unlocked */
  4367. __HAL_UNLOCK(hhrtim);
  4368. break;
  4369. }
  4370. }
  4371. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4372. {
  4373. return HAL_ERROR;
  4374. }
  4375. hhrtim->State = HAL_HRTIM_STATE_READY;
  4376. /* Process Unlocked */
  4377. __HAL_UNLOCK(hhrtim);
  4378. return HAL_OK;
  4379. }
  4380. /**
  4381. * @brief Enable the generation of the waveform signal on the designated output(s)
  4382. * Outputs can be combined (ORed) to allow for simultaneous output enabling.
  4383. * @param hhrtim pointer to HAL HRTIM handle
  4384. * @param OutputsToStart Timer output(s) to enable
  4385. * This parameter can be any combination of the following values:
  4386. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4387. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4388. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4389. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4390. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4391. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4392. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4393. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4394. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4395. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4396. * @retval HAL status
  4397. */
  4398. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim,
  4399. uint32_t OutputsToStart)
  4400. {
  4401. /* Check the parameters */
  4402. assert_param(IS_HRTIM_OUTPUT(OutputsToStart));
  4403. /* Process Locked */
  4404. __HAL_LOCK(hhrtim);
  4405. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4406. /* Enable the HRTIM outputs */
  4407. hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart);
  4408. hhrtim->State = HAL_HRTIM_STATE_READY;
  4409. /* Process Unlocked */
  4410. __HAL_UNLOCK(hhrtim);
  4411. return HAL_OK;
  4412. }
  4413. /**
  4414. * @brief Disable the generation of the waveform signal on the designated output(s)
  4415. * Outputs can be combined (ORed) to allow for simultaneous output disabling.
  4416. * @param hhrtim pointer to HAL HRTIM handle
  4417. * @param OutputsToStop Timer output(s) to disable
  4418. * This parameter can be any combination of the following values:
  4419. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4420. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4421. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4422. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4423. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4424. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4425. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4426. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4427. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4428. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4429. * @retval HAL status
  4430. */
  4431. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim,
  4432. uint32_t OutputsToStop)
  4433. {
  4434. /* Check the parameters */
  4435. assert_param(IS_HRTIM_OUTPUT(OutputsToStop));
  4436. /* Process Locked */
  4437. __HAL_LOCK(hhrtim);
  4438. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4439. /* Enable the HRTIM outputs */
  4440. hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop);
  4441. hhrtim->State = HAL_HRTIM_STATE_READY;
  4442. /* Process Unlocked */
  4443. __HAL_UNLOCK(hhrtim);
  4444. return HAL_OK;
  4445. }
  4446. /**
  4447. * @brief Start the counter of the designated timer(s) operating in waveform mode
  4448. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4449. * @param hhrtim pointer to HAL HRTIM handle
  4450. * @param Timers Timer counter(s) to start
  4451. * This parameter can be any combination of the following values:
  4452. * @arg HRTIM_TIMERID_MASTER
  4453. * @arg HRTIM_TIMERID_TIMER_A
  4454. * @arg HRTIM_TIMERID_TIMER_B
  4455. * @arg HRTIM_TIMERID_TIMER_C
  4456. * @arg HRTIM_TIMERID_TIMER_D
  4457. * @arg HRTIM_TIMERID_TIMER_E
  4458. * @retval HAL status
  4459. */
  4460. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart(HRTIM_HandleTypeDef * hhrtim,
  4461. uint32_t Timers)
  4462. {
  4463. /* Check the parameters */
  4464. assert_param(IS_HRTIM_TIMERID(Timers));
  4465. /* Process Locked */
  4466. __HAL_LOCK(hhrtim);
  4467. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4468. /* Enable timer(s) counter */
  4469. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  4470. hhrtim->State = HAL_HRTIM_STATE_READY;
  4471. /* Process Unlocked */
  4472. __HAL_UNLOCK(hhrtim);
  4473. return HAL_OK;
  4474. }
  4475. /**
  4476. * @brief Stop the counter of the designated timer(s) operating in waveform mode
  4477. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4478. * @param hhrtim pointer to HAL HRTIM handle
  4479. * @param Timers Timer counter(s) to stop
  4480. * This parameter can be any combination of the following values:
  4481. * @arg HRTIM_TIMERID_MASTER
  4482. * @arg HRTIM_TIMERID_TIMER_A
  4483. * @arg HRTIM_TIMERID_TIMER_B
  4484. * @arg HRTIM_TIMERID_TIMER_C
  4485. * @arg HRTIM_TIMERID_TIMER_D
  4486. * @arg HRTIM_TIMERID_TIMER_E
  4487. * @retval HAL status
  4488. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4489. */
  4490. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop(HRTIM_HandleTypeDef * hhrtim,
  4491. uint32_t Timers)
  4492. {
  4493. /* Check the parameters */
  4494. assert_param(IS_HRTIM_TIMERID(Timers));
  4495. /* Process Locked */
  4496. __HAL_LOCK(hhrtim);
  4497. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4498. /* Disable timer(s) counter */
  4499. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  4500. hhrtim->State = HAL_HRTIM_STATE_READY;
  4501. /* Process Unlocked */
  4502. __HAL_UNLOCK(hhrtim);
  4503. return HAL_OK;
  4504. }
  4505. /**
  4506. * @brief Start the counter of the designated timer(s) operating in waveform mode
  4507. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4508. * @param hhrtim pointer to HAL HRTIM handle
  4509. * @param Timers Timer counter(s) to start
  4510. * This parameter can be any combination of the following values:
  4511. * @arg HRTIM_TIMERID_MASTER
  4512. * @arg HRTIM_TIMERID_TIMER_A
  4513. * @arg HRTIM_TIMERID_TIMER_B
  4514. * @arg HRTIM_TIMERID_TIMER_C
  4515. * @arg HRTIM_TIMERID_TIMER_D
  4516. * @arg HRTIM_TIMERID_TIMER_E
  4517. * @note HRTIM interrupts (e.g. faults interrupts) and interrupts related
  4518. * to the timers to start are enabled within this function.
  4519. * Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig
  4520. * function.
  4521. * @retval HAL status
  4522. */
  4523. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_IT(HRTIM_HandleTypeDef * hhrtim,
  4524. uint32_t Timers)
  4525. {
  4526. uint8_t timer_idx;
  4527. /* Check the parameters */
  4528. assert_param(IS_HRTIM_TIMERID(Timers));
  4529. /* Process Locked */
  4530. __HAL_LOCK(hhrtim);
  4531. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4532. /* Enable HRTIM interrupts (if required) */
  4533. __HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4534. /* Enable master timer related interrupts (if required) */
  4535. if ((Timers & HRTIM_TIMERID_MASTER) != 0U)
  4536. {
  4537. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim,
  4538. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4539. }
  4540. /* Enable timing unit related interrupts (if required) */
  4541. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4542. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4543. timer_idx++)
  4544. {
  4545. if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)
  4546. {
  4547. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim,
  4548. timer_idx,
  4549. hhrtim->TimerParam[timer_idx].InterruptRequests);
  4550. }
  4551. }
  4552. /* Enable timer(s) counter */
  4553. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  4554. hhrtim->State = HAL_HRTIM_STATE_READY;
  4555. /* Process Unlocked */
  4556. __HAL_UNLOCK(hhrtim);
  4557. return HAL_OK;}
  4558. /**
  4559. * @brief Stop the counter of the designated timer(s) operating in waveform mode
  4560. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4561. * @param hhrtim pointer to HAL HRTIM handle
  4562. * @param Timers Timer counter(s) to stop
  4563. * This parameter can be any combination of the following values:
  4564. * @arg HRTIM_TIMERID_MASTER
  4565. * @arg HRTIM_TIMERID_TIMER_A
  4566. * @arg HRTIM_TIMERID_TIMER_B
  4567. * @arg HRTIM_TIMERID_TIMER_C
  4568. * @arg HRTIM_TIMERID_TIMER_D
  4569. * @arg HRTIM_TIMERID_TIMER_E
  4570. * @retval HAL status
  4571. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4572. * @note All enabled timer related interrupts are disabled.
  4573. */
  4574. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_IT(HRTIM_HandleTypeDef * hhrtim,
  4575. uint32_t Timers)
  4576. {
  4577. /* ++ WA */
  4578. __IO uint32_t delai = (uint32_t)(0x17FU);
  4579. /* -- WA */
  4580. uint8_t timer_idx;
  4581. /* Check the parameters */
  4582. assert_param(IS_HRTIM_TIMERID(Timers));
  4583. /* Process Locked */
  4584. __HAL_LOCK(hhrtim);
  4585. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4586. /* Disable HRTIM interrupts (if required) */
  4587. __HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4588. /* Disable master timer related interrupts (if required) */
  4589. if ((Timers & HRTIM_TIMERID_MASTER) != 0U)
  4590. {
  4591. /* Interrupts enable flag must be cleared one by one */
  4592. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4593. }
  4594. /* Disable timing unit related interrupts (if required) */
  4595. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4596. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4597. timer_idx++)
  4598. {
  4599. if ((Timers & TimerIdxToTimerId[timer_idx]) != 0U)
  4600. {
  4601. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests);
  4602. }
  4603. }
  4604. /* ++ WA */
  4605. do { delai--; } while (delai != 0U);
  4606. /* -- WA */
  4607. /* Disable timer(s) counter */
  4608. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  4609. hhrtim->State = HAL_HRTIM_STATE_READY;
  4610. /* Process Unlocked */
  4611. __HAL_UNLOCK(hhrtim);
  4612. return HAL_OK;
  4613. }
  4614. /**
  4615. * @brief Start the counter of the designated timer(s) operating in waveform mode
  4616. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4617. * @param hhrtim pointer to HAL HRTIM handle
  4618. * @param Timers Timer counter(s) to start
  4619. * This parameter can be any combination of the following values:
  4620. * @arg HRTIM_TIMERID_MASTER
  4621. * @arg HRTIM_TIMERID_TIMER_A
  4622. * @arg HRTIM_TIMERID_TIMER_B
  4623. * @arg HRTIM_TIMERID_TIMER_C
  4624. * @arg HRTIM_TIMERID_TIMER_D
  4625. * @arg HRTIM_TIMERID_TIMER_E
  4626. * @retval HAL status
  4627. * @note This function enables the dma request(s) mentioned in the timer
  4628. * configuration data structure for every timers to start.
  4629. * @note The source memory address, the destination memory address and the
  4630. * size of each DMA transfer are specified at timer configuration time
  4631. * (see HAL_HRTIM_WaveformTimerConfig)
  4632. */
  4633. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  4634. uint32_t Timers)
  4635. {
  4636. uint8_t timer_idx;
  4637. DMA_HandleTypeDef * hdma;
  4638. /* Check the parameters */
  4639. assert_param(IS_HRTIM_TIMERID(Timers));
  4640. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4641. {
  4642. return HAL_BUSY;
  4643. }
  4644. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4645. /* Process Locked */
  4646. __HAL_LOCK(hhrtim);
  4647. if (((Timers & HRTIM_TIMERID_MASTER) != (uint32_t)RESET) &&
  4648. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
  4649. {
  4650. /* Set the DMA error callback */
  4651. hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ;
  4652. /* Set the DMA transfer completed callback */
  4653. hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt;
  4654. /* Enable the DMA channel */
  4655. if (HAL_DMA_Start_IT(hhrtim->hdmaMaster,
  4656. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress,
  4657. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress,
  4658. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize) != HAL_OK)
  4659. {
  4660. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4661. /* Process Unlocked */
  4662. __HAL_UNLOCK(hhrtim);
  4663. return HAL_ERROR;
  4664. }
  4665. /* Enable the timer DMA request */
  4666. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim,
  4667. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4668. }
  4669. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4670. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4671. timer_idx++)
  4672. {
  4673. if (((Timers & TimerIdxToTimerId[timer_idx]) != (uint32_t)RESET) &&
  4674. (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
  4675. {
  4676. /* Get the timer DMA handler */
  4677. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
  4678. if (hdma == NULL)
  4679. {
  4680. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4681. /* Process Unlocked */
  4682. __HAL_UNLOCK(hhrtim);
  4683. return HAL_ERROR;
  4684. }
  4685. /* Set the DMA error callback */
  4686. hdma->XferErrorCallback = HRTIM_DMAError ;
  4687. /* Set the DMA transfer completed callback */
  4688. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  4689. /* Enable the DMA channel */
  4690. if (HAL_DMA_Start_IT(hdma,
  4691. hhrtim->TimerParam[timer_idx].DMASrcAddress,
  4692. hhrtim->TimerParam[timer_idx].DMADstAddress,
  4693. hhrtim->TimerParam[timer_idx].DMASize) != HAL_OK)
  4694. {
  4695. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4696. /* Process Unlocked */
  4697. __HAL_UNLOCK(hhrtim);
  4698. return HAL_ERROR;
  4699. }
  4700. /* Enable the timer DMA request */
  4701. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim,
  4702. timer_idx,
  4703. hhrtim->TimerParam[timer_idx].DMARequests);
  4704. }
  4705. }
  4706. /* Enable the timer counter */
  4707. __HAL_HRTIM_ENABLE(hhrtim, Timers);
  4708. hhrtim->State = HAL_HRTIM_STATE_READY;
  4709. /* Process Unlocked */
  4710. __HAL_UNLOCK(hhrtim);
  4711. return HAL_OK;
  4712. }
  4713. /**
  4714. * @brief Stop the counter of the designated timer(s) operating in waveform mode
  4715. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4716. * @param hhrtim pointer to HAL HRTIM handle
  4717. * @param Timers Timer counter(s) to stop
  4718. * This parameter can be any combination of the following values:
  4719. * @arg HRTIM_TIMERID_MASTER
  4720. * @arg HRTIM_TIMERID_TIMER_A
  4721. * @arg HRTIM_TIMERID_TIMER_B
  4722. * @arg HRTIM_TIMERID_TIMER_C
  4723. * @arg HRTIM_TIMERID_TIMER_D
  4724. * @arg HRTIM_TIMERID_TIMER_E
  4725. * @retval HAL status
  4726. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4727. * @note All enabled timer related DMA requests are disabled.
  4728. */
  4729. HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  4730. uint32_t Timers)
  4731. {
  4732. uint8_t timer_idx;
  4733. /* Check the parameters */
  4734. assert_param(IS_HRTIM_TIMERID(Timers));
  4735. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4736. if (((Timers & HRTIM_TIMERID_MASTER) != 0U) &&
  4737. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0U))
  4738. {
  4739. /* Disable the DMA */
  4740. if (HAL_DMA_Abort(hhrtim->hdmaMaster) != HAL_OK)
  4741. {
  4742. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4743. }
  4744. else
  4745. {
  4746. hhrtim->State = HAL_HRTIM_STATE_READY;
  4747. /* Disable the DMA request(s) */
  4748. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim,
  4749. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4750. }
  4751. }
  4752. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4753. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4754. timer_idx++)
  4755. {
  4756. if (((Timers & TimerIdxToTimerId[timer_idx]) != 0U) &&
  4757. (hhrtim->TimerParam[timer_idx].DMARequests != 0U))
  4758. {
  4759. /* Get the timer DMA handler */
  4760. /* Disable the DMA */
  4761. if (HAL_DMA_Abort(HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx)) != HAL_OK)
  4762. {
  4763. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4764. }
  4765. else
  4766. {
  4767. hhrtim->State = HAL_HRTIM_STATE_READY;
  4768. /* Disable the DMA request(s) */
  4769. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
  4770. timer_idx,
  4771. hhrtim->TimerParam[timer_idx].DMARequests);
  4772. }
  4773. }
  4774. }
  4775. /* Disable the timer counter */
  4776. __HAL_HRTIM_DISABLE(hhrtim, Timers);
  4777. if (hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4778. {
  4779. return HAL_ERROR;
  4780. }
  4781. else
  4782. {
  4783. return HAL_OK;
  4784. }
  4785. }
  4786. /**
  4787. * @brief Enable or disables the HRTIM burst mode controller.
  4788. * @param hhrtim pointer to HAL HRTIM handle
  4789. * @param Enable Burst mode controller enabling
  4790. * This parameter can be one of the following values:
  4791. * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
  4792. * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
  4793. * @retval HAL status
  4794. * @note This function must be called after starting the timer(s)
  4795. */
  4796. HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim,
  4797. uint32_t Enable)
  4798. {
  4799. /* Check parameters */
  4800. assert_param(IS_HRTIM_BURSTMODECTL(Enable));
  4801. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4802. {
  4803. return HAL_BUSY;
  4804. }
  4805. /* Process Locked */
  4806. __HAL_LOCK(hhrtim);
  4807. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4808. /* Enable/Disable the burst mode controller */
  4809. MODIFY_REG(hhrtim->Instance->sCommonRegs.BMCR, HRTIM_BMCR_BME, Enable);
  4810. hhrtim->State = HAL_HRTIM_STATE_READY;
  4811. /* Process Unlocked */
  4812. __HAL_UNLOCK(hhrtim);
  4813. return HAL_OK;
  4814. }
  4815. /**
  4816. * @brief Trig the burst mode operation.
  4817. * @param hhrtim pointer to HAL HRTIM handle
  4818. * @retval HAL status
  4819. */
  4820. HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim)
  4821. {
  4822. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4823. {
  4824. return HAL_BUSY;
  4825. }
  4826. /* Process Locked */
  4827. __HAL_LOCK(hhrtim);
  4828. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4829. /* Software trigger of the burst mode controller */
  4830. SET_BIT(hhrtim->Instance->sCommonRegs.BMTRGR, HRTIM_BMTRGR_SW);
  4831. hhrtim->State = HAL_HRTIM_STATE_READY;
  4832. /* Process Unlocked */
  4833. __HAL_UNLOCK(hhrtim);
  4834. return HAL_OK;
  4835. }
  4836. /**
  4837. * @brief Trig a software capture on the designed capture unit
  4838. * @param hhrtim pointer to HAL HRTIM handle
  4839. * @param TimerIdx Timer index
  4840. * This parameter can be one of the following values:
  4841. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4842. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4843. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4844. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4845. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4846. * @param CaptureUnit Capture unit to trig
  4847. * This parameter can be one of the following values:
  4848. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4849. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4850. * @retval HAL status
  4851. * @note The 'software capture' bit in the capure configuration register is
  4852. * automatically reset by hardware
  4853. */
  4854. HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim,
  4855. uint32_t TimerIdx,
  4856. uint32_t CaptureUnit)
  4857. {
  4858. /* Check parameters */
  4859. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4860. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  4861. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4862. {
  4863. return HAL_BUSY;
  4864. }
  4865. /* Process Locked */
  4866. __HAL_LOCK(hhrtim);
  4867. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4868. /* Force a software capture on concerned capture unit */
  4869. switch (CaptureUnit)
  4870. {
  4871. case HRTIM_CAPTUREUNIT_1:
  4872. {
  4873. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR, HRTIM_CPT1CR_SWCPT);
  4874. break;
  4875. }
  4876. case HRTIM_CAPTUREUNIT_2:
  4877. {
  4878. SET_BIT(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR, HRTIM_CPT2CR_SWCPT);
  4879. break;
  4880. }
  4881. default:
  4882. {
  4883. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  4884. /* Process Unlocked */
  4885. __HAL_UNLOCK(hhrtim);
  4886. break;
  4887. }
  4888. }
  4889. if(hhrtim->State == HAL_HRTIM_STATE_ERROR)
  4890. {
  4891. return HAL_ERROR;
  4892. }
  4893. hhrtim->State = HAL_HRTIM_STATE_READY;
  4894. /* Process Unlocked */
  4895. __HAL_UNLOCK(hhrtim);
  4896. return HAL_OK;
  4897. }
  4898. /**
  4899. * @brief Trig the update of the registers of one or several timers
  4900. * @param hhrtim pointer to HAL HRTIM handle
  4901. * @param Timers timers concerned with the software register update
  4902. * This parameter can be any combination of the following values:
  4903. * @arg HRTIM_TIMERUPDATE_MASTER
  4904. * @arg HRTIM_TIMERUPDATE_A
  4905. * @arg HRTIM_TIMERUPDATE_B
  4906. * @arg HRTIM_TIMERUPDATE_C
  4907. * @arg HRTIM_TIMERUPDATE_D
  4908. * @arg HRTIM_TIMERUPDATE_E
  4909. * @retval HAL status
  4910. * @note The 'software update' bits in the HRTIM control register 2 register are
  4911. * automatically reset by hardware
  4912. */
  4913. HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim,
  4914. uint32_t Timers)
  4915. {
  4916. /* Check parameters */
  4917. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4918. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4919. {
  4920. return HAL_BUSY;
  4921. }
  4922. /* Process Locked */
  4923. __HAL_LOCK(hhrtim);
  4924. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4925. /* Force timer(s) registers update */
  4926. hhrtim->Instance->sCommonRegs.CR2 |= Timers;
  4927. hhrtim->State = HAL_HRTIM_STATE_READY;
  4928. /* Process Unlocked */
  4929. __HAL_UNLOCK(hhrtim);
  4930. return HAL_OK;
  4931. }
  4932. /**
  4933. * @brief Trig the reset of one or several timers
  4934. * @param hhrtim pointer to HAL HRTIM handle
  4935. * @param Timers timers concerned with the software counter reset
  4936. * This parameter can be any combination of the following values:
  4937. * @arg HRTIM_TIMERRESET_MASTER
  4938. * @arg HRTIM_TIMERRESET_TIMER_A
  4939. * @arg HRTIM_TIMERRESET_TIMER_B
  4940. * @arg HRTIM_TIMERRESET_TIMER_C
  4941. * @arg HRTIM_TIMERRESET_TIMER_D
  4942. * @arg HRTIM_TIMERRESET_TIMER_E
  4943. * @retval HAL status
  4944. * @note The 'software reset' bits in the HRTIM control register 2 are
  4945. * automatically reset by hardware
  4946. */
  4947. HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim,
  4948. uint32_t Timers)
  4949. {
  4950. /* Check parameters */
  4951. assert_param(IS_HRTIM_TIMERRESET(Timers));
  4952. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4953. {
  4954. return HAL_BUSY;
  4955. }
  4956. /* Process Locked */
  4957. __HAL_LOCK(hhrtim);
  4958. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4959. /* Force timer(s) registers reset */
  4960. hhrtim->Instance->sCommonRegs.CR2 = Timers;
  4961. hhrtim->State = HAL_HRTIM_STATE_READY;
  4962. /* Process Unlocked */
  4963. __HAL_UNLOCK(hhrtim);
  4964. return HAL_OK;
  4965. }
  4966. /**
  4967. * @brief Start a burst DMA operation to update HRTIM control registers content
  4968. * @param hhrtim pointer to HAL HRTIM handle
  4969. * @param TimerIdx Timer index
  4970. * This parameter can be one of the following values:
  4971. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  4972. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4973. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4974. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4975. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4976. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4977. * @param BurstBufferAddress address of the buffer the HRTIM control registers
  4978. * content will be updated from.
  4979. * @param BurstBufferLength size (in WORDS) of the burst buffer.
  4980. * @retval HAL status
  4981. * @note The TimerIdx parameter determines the dma channel to be used by the
  4982. * DMA burst controller (see below)
  4983. * HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller
  4984. * HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller
  4985. * HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller
  4986. * HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller
  4987. * HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller
  4988. * HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller
  4989. */
  4990. HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
  4991. uint32_t TimerIdx,
  4992. uint32_t BurstBufferAddress,
  4993. uint32_t BurstBufferLength)
  4994. {
  4995. DMA_HandleTypeDef * hdma;
  4996. /* Check the parameters */
  4997. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  4998. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4999. {
  5000. return HAL_BUSY;
  5001. }
  5002. if(hhrtim->State == HAL_HRTIM_STATE_READY)
  5003. {
  5004. if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U))
  5005. {
  5006. return HAL_ERROR;
  5007. }
  5008. else
  5009. {
  5010. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  5011. }
  5012. }
  5013. /* Process Locked */
  5014. __HAL_LOCK(hhrtim);
  5015. /* Get the timer DMA handler */
  5016. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  5017. if (hdma == NULL)
  5018. {
  5019. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  5020. /* Process Unlocked */
  5021. __HAL_UNLOCK(hhrtim);
  5022. return HAL_ERROR;
  5023. }
  5024. /* Set the DMA transfer completed callback */
  5025. hdma->XferCpltCallback = HRTIM_BurstDMACplt;
  5026. /* Set the DMA error callback */
  5027. hdma->XferErrorCallback = HRTIM_DMAError ;
  5028. /* Enable the DMA channel */
  5029. if (HAL_DMA_Start_IT(hdma,
  5030. BurstBufferAddress,
  5031. (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),
  5032. BurstBufferLength) != HAL_OK)
  5033. {
  5034. hhrtim->State = HAL_HRTIM_STATE_ERROR;
  5035. /* Process Unlocked */
  5036. __HAL_UNLOCK(hhrtim);
  5037. return HAL_ERROR;
  5038. }
  5039. hhrtim->State = HAL_HRTIM_STATE_READY;
  5040. /* Process Unlocked */
  5041. __HAL_UNLOCK(hhrtim);
  5042. return HAL_OK;
  5043. }
  5044. /**
  5045. * @brief Enable the transfer from preload to active registers for one
  5046. * or several timing units (including master timer).
  5047. * @param hhrtim pointer to HAL HRTIM handle
  5048. * @param Timers Timer(s) concerned by the register preload enabling command
  5049. * This parameter can be any combination of the following values:
  5050. * @arg HRTIM_TIMERUPDATE_MASTER
  5051. * @arg HRTIM_TIMERUPDATE_A
  5052. * @arg HRTIM_TIMERUPDATE_B
  5053. * @arg HRTIM_TIMERUPDATE_C
  5054. * @arg HRTIM_TIMERUPDATE_D
  5055. * @arg HRTIM_TIMERUPDATE_E
  5056. * @retval HAL status
  5057. */
  5058. HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
  5059. uint32_t Timers)
  5060. {
  5061. /* Check the parameters */
  5062. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  5063. /* Process Locked */
  5064. __HAL_LOCK(hhrtim);
  5065. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  5066. /* Enable timer(s) registers update */
  5067. hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);
  5068. hhrtim->State = HAL_HRTIM_STATE_READY;
  5069. /* Process Unlocked */
  5070. __HAL_UNLOCK(hhrtim);
  5071. return HAL_OK;
  5072. }
  5073. /**
  5074. * @brief Disable the transfer from preload to active registers for one
  5075. * or several timing units (including master timer).
  5076. * @param hhrtim pointer to HAL HRTIM handle
  5077. * @param Timers Timer(s) concerned by the register preload disabling command
  5078. * This parameter can be any combination of the following values:
  5079. * @arg HRTIM_TIMERUPDATE_MASTER
  5080. * @arg HRTIM_TIMERUPDATE_A
  5081. * @arg HRTIM_TIMERUPDATE_B
  5082. * @arg HRTIM_TIMERUPDATE_C
  5083. * @arg HRTIM_TIMERUPDATE_D
  5084. * @arg HRTIM_TIMERUPDATE_E
  5085. * @retval HAL status
  5086. */
  5087. HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
  5088. uint32_t Timers)
  5089. {
  5090. /* Check the parameters */
  5091. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  5092. /* Process Locked */
  5093. __HAL_LOCK(hhrtim);
  5094. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  5095. /* Enable timer(s) registers update */
  5096. hhrtim->Instance->sCommonRegs.CR1 |= (Timers);
  5097. hhrtim->State = HAL_HRTIM_STATE_READY;
  5098. /* Process Unlocked */
  5099. __HAL_UNLOCK(hhrtim);
  5100. return HAL_OK;
  5101. }
  5102. /**
  5103. * @}
  5104. */
  5105. /** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions
  5106. * @brief Peripheral State functions
  5107. @verbatim
  5108. ===============================================================================
  5109. ##### Peripheral State functions #####
  5110. ===============================================================================
  5111. [..] This section provides functions used to get HRTIM or HRTIM timer
  5112. specific information:
  5113. (+) Get HRTIM HAL state
  5114. (+) Get captured value
  5115. (+) Get HRTIM timer output level
  5116. (+) Get HRTIM timer output state
  5117. (+) Get delayed protection status
  5118. (+) Get burst status
  5119. (+) Get current push-pull status
  5120. (+) Get idle push-pull status
  5121. @endverbatim
  5122. * @{
  5123. */
  5124. /**
  5125. * @brief Return the HRTIM HAL state
  5126. * @param hhrtim pointer to HAL HRTIM handle
  5127. * @retval HAL state
  5128. */
  5129. HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(const HRTIM_HandleTypeDef* hhrtim)
  5130. {
  5131. /* Return HRTIM state */
  5132. return hhrtim->State;
  5133. }
  5134. /**
  5135. * @brief Return actual value of the capture register of the designated capture unit
  5136. * @param hhrtim pointer to HAL HRTIM handle
  5137. * @param TimerIdx Timer index
  5138. * This parameter can be one of the following values:
  5139. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5140. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5141. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5142. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5143. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5144. * @param CaptureUnit Capture unit to trig
  5145. * This parameter can be one of the following values:
  5146. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  5147. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  5148. * @retval Captured value
  5149. */
  5150. uint32_t HAL_HRTIM_GetCapturedValue(const HRTIM_HandleTypeDef * hhrtim,
  5151. uint32_t TimerIdx,
  5152. uint32_t CaptureUnit)
  5153. {
  5154. uint32_t captured_value;
  5155. /* Check parameters */
  5156. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  5157. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  5158. /* Read captured value */
  5159. switch (CaptureUnit)
  5160. {
  5161. case HRTIM_CAPTUREUNIT_1:
  5162. {
  5163. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR;
  5164. break;
  5165. }
  5166. case HRTIM_CAPTUREUNIT_2:
  5167. {
  5168. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR;
  5169. break;
  5170. }
  5171. default:
  5172. {
  5173. captured_value = 0xFFFFFFFFUL;
  5174. break;
  5175. }
  5176. }
  5177. return captured_value;
  5178. }
  5179. /**
  5180. * @brief Return actual level (active or inactive) of the designated output
  5181. * @param hhrtim pointer to HAL HRTIM handle
  5182. * @param TimerIdx Timer index
  5183. * This parameter can be one of the following values:
  5184. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5185. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5186. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5187. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5188. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5189. * @param Output Timer output
  5190. * This parameter can be one of the following values:
  5191. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  5192. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  5193. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  5194. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  5195. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  5196. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  5197. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  5198. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  5199. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  5200. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  5201. * @retval Output level
  5202. * @note Returned output level is taken before the output stage (chopper,
  5203. * polarity).
  5204. */
  5205. uint32_t HAL_HRTIM_WaveformGetOutputLevel(const HRTIM_HandleTypeDef * hhrtim,
  5206. uint32_t TimerIdx,
  5207. uint32_t Output)
  5208. {
  5209. uint32_t output_level;
  5210. /* Check parameters */
  5211. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  5212. /* Read the output level */
  5213. switch (Output)
  5214. {
  5215. case HRTIM_OUTPUT_TA1:
  5216. case HRTIM_OUTPUT_TB1:
  5217. case HRTIM_OUTPUT_TC1:
  5218. case HRTIM_OUTPUT_TD1:
  5219. case HRTIM_OUTPUT_TE1:
  5220. {
  5221. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != (uint32_t)RESET)
  5222. {
  5223. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  5224. }
  5225. else
  5226. {
  5227. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  5228. }
  5229. break;
  5230. }
  5231. case HRTIM_OUTPUT_TA2:
  5232. case HRTIM_OUTPUT_TB2:
  5233. case HRTIM_OUTPUT_TC2:
  5234. case HRTIM_OUTPUT_TD2:
  5235. case HRTIM_OUTPUT_TE2:
  5236. {
  5237. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != (uint32_t)RESET)
  5238. {
  5239. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  5240. }
  5241. else
  5242. {
  5243. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  5244. }
  5245. break;
  5246. }
  5247. default:
  5248. {
  5249. output_level = 0xFFFFFFFFUL;
  5250. break;
  5251. }
  5252. }
  5253. return output_level;
  5254. }
  5255. /**
  5256. * @brief Return actual state (RUN, IDLE, FAULT) of the designated output
  5257. * @param hhrtim pointer to HAL HRTIM handle
  5258. * @param TimerIdx Timer index
  5259. * This parameter can be one of the following values:
  5260. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5261. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5262. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5263. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5264. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5265. * @param Output Timer output
  5266. * This parameter can be one of the following values:
  5267. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  5268. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  5269. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  5270. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  5271. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  5272. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  5273. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  5274. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  5275. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  5276. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  5277. * @retval Output state
  5278. */
  5279. uint32_t HAL_HRTIM_WaveformGetOutputState(const HRTIM_HandleTypeDef * hhrtim,
  5280. uint32_t TimerIdx,
  5281. uint32_t Output)
  5282. {
  5283. uint32_t output_bit;
  5284. uint32_t output_state;
  5285. /* Check parameters */
  5286. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  5287. /* Prevent unused argument(s) compilation warning */
  5288. UNUSED(TimerIdx);
  5289. /* Set output state according to output control status and output disable status */
  5290. switch (Output)
  5291. {
  5292. case HRTIM_OUTPUT_TA1:
  5293. {
  5294. output_bit = HRTIM_OENR_TA1OEN;
  5295. break;
  5296. }
  5297. case HRTIM_OUTPUT_TA2:
  5298. {
  5299. output_bit = HRTIM_OENR_TA2OEN;
  5300. break;
  5301. }
  5302. case HRTIM_OUTPUT_TB1:
  5303. {
  5304. output_bit = HRTIM_OENR_TB1OEN;
  5305. break;
  5306. }
  5307. case HRTIM_OUTPUT_TB2:
  5308. {
  5309. output_bit = HRTIM_OENR_TB2OEN;
  5310. break;
  5311. }
  5312. case HRTIM_OUTPUT_TC1:
  5313. {
  5314. output_bit = HRTIM_OENR_TC1OEN;
  5315. break;
  5316. }
  5317. case HRTIM_OUTPUT_TC2:
  5318. {
  5319. output_bit = HRTIM_OENR_TC2OEN;
  5320. break;
  5321. }
  5322. case HRTIM_OUTPUT_TD1:
  5323. {
  5324. output_bit = HRTIM_OENR_TD1OEN;
  5325. break;
  5326. }
  5327. case HRTIM_OUTPUT_TD2:
  5328. {
  5329. output_bit = HRTIM_OENR_TD2OEN;
  5330. break;
  5331. }
  5332. case HRTIM_OUTPUT_TE1:
  5333. {
  5334. output_bit = HRTIM_OENR_TE1OEN;
  5335. break;
  5336. }
  5337. case HRTIM_OUTPUT_TE2:
  5338. {
  5339. output_bit = HRTIM_OENR_TE2OEN;
  5340. break;
  5341. }
  5342. default:
  5343. {
  5344. output_bit = 0UL;
  5345. break;
  5346. }
  5347. }
  5348. if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET)
  5349. {
  5350. /* Output is enabled: output in RUN state (whatever output disable status is)*/
  5351. output_state = HRTIM_OUTPUTSTATE_RUN;
  5352. }
  5353. else
  5354. {
  5355. if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != (uint32_t)RESET)
  5356. {
  5357. /* Output is disabled: output in FAULT state */
  5358. output_state = HRTIM_OUTPUTSTATE_FAULT;
  5359. }
  5360. else
  5361. {
  5362. /* Output is disabled: output in IDLE state */
  5363. output_state = HRTIM_OUTPUTSTATE_IDLE;
  5364. }
  5365. }
  5366. return(output_state);
  5367. }
  5368. /**
  5369. * @brief Return the level (active or inactive) of the designated output
  5370. * when the delayed protection was triggered.
  5371. * @param hhrtim pointer to HAL HRTIM handle
  5372. * @param TimerIdx Timer index
  5373. * This parameter can be one of the following values:
  5374. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5375. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5376. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5377. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5378. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5379. * @param Output Timer output
  5380. * This parameter can be one of the following values:
  5381. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  5382. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  5383. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  5384. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  5385. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  5386. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  5387. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  5388. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  5389. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  5390. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  5391. * @retval Delayed protection status
  5392. */
  5393. uint32_t HAL_HRTIM_GetDelayedProtectionStatus(const HRTIM_HandleTypeDef * hhrtim,
  5394. uint32_t TimerIdx,
  5395. uint32_t Output)
  5396. {
  5397. uint32_t delayed_protection_status;
  5398. /* Check parameters */
  5399. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  5400. /* Read the delayed protection status */
  5401. switch (Output)
  5402. {
  5403. case HRTIM_OUTPUT_TA1:
  5404. case HRTIM_OUTPUT_TB1:
  5405. case HRTIM_OUTPUT_TC1:
  5406. case HRTIM_OUTPUT_TD1:
  5407. case HRTIM_OUTPUT_TE1:
  5408. {
  5409. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != (uint32_t)RESET)
  5410. {
  5411. /* Output 1 was active when the delayed idle protection was triggered */
  5412. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  5413. }
  5414. else
  5415. {
  5416. /* Output 1 was inactive when the delayed idle protection was triggered */
  5417. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  5418. }
  5419. break;
  5420. }
  5421. case HRTIM_OUTPUT_TA2:
  5422. case HRTIM_OUTPUT_TB2:
  5423. case HRTIM_OUTPUT_TC2:
  5424. case HRTIM_OUTPUT_TD2:
  5425. case HRTIM_OUTPUT_TE2:
  5426. {
  5427. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != (uint32_t)RESET)
  5428. {
  5429. /* Output 2 was active when the delayed idle protection was triggered */
  5430. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  5431. }
  5432. else
  5433. {
  5434. /* Output 2 was inactive when the delayed idle protection was triggered */
  5435. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  5436. }
  5437. break;
  5438. }
  5439. default:
  5440. {
  5441. delayed_protection_status = 0xFFFFFFFFUL;
  5442. break;
  5443. }
  5444. }
  5445. return delayed_protection_status;
  5446. }
  5447. /**
  5448. * @brief Return the actual status (active or inactive) of the burst mode controller
  5449. * @param hhrtim pointer to HAL HRTIM handle
  5450. * @retval Burst mode controller status
  5451. */
  5452. uint32_t HAL_HRTIM_GetBurstStatus(const HRTIM_HandleTypeDef * hhrtim)
  5453. {
  5454. uint32_t burst_mode_status;
  5455. /* Read burst mode status */
  5456. burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);
  5457. return burst_mode_status;
  5458. }
  5459. /**
  5460. * @brief Indicate on which output the signal is currently active (when the
  5461. * push pull mode is enabled).
  5462. * @param hhrtim pointer to HAL HRTIM handle
  5463. * @param TimerIdx Timer index
  5464. * This parameter can be one of the following values:
  5465. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5466. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5467. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5468. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5469. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5470. * @retval Burst mode controller status
  5471. */
  5472. uint32_t HAL_HRTIM_GetCurrentPushPullStatus(const HRTIM_HandleTypeDef * hhrtim,
  5473. uint32_t TimerIdx)
  5474. {
  5475. uint32_t current_pushpull_status;
  5476. /* Check the parameters */
  5477. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  5478. /* Read current push pull status */
  5479. current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
  5480. return current_pushpull_status;
  5481. }
  5482. /**
  5483. * @brief Indicate on which output the signal was applied, in push-pull mode,
  5484. balanced fault mode or delayed idle mode, when the protection was triggered.
  5485. * @param hhrtim pointer to HAL HRTIM handle
  5486. * @param TimerIdx Timer index
  5487. * This parameter can be one of the following values:
  5488. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5489. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5490. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5491. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5492. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5493. * @retval Idle Push Pull Status
  5494. */
  5495. uint32_t HAL_HRTIM_GetIdlePushPullStatus(const HRTIM_HandleTypeDef * hhrtim,
  5496. uint32_t TimerIdx)
  5497. {
  5498. uint32_t idle_pushpull_status;
  5499. /* Check the parameters */
  5500. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  5501. /* Read current push pull status */
  5502. idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
  5503. return idle_pushpull_status;
  5504. }
  5505. /**
  5506. * @}
  5507. */
  5508. /** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling
  5509. * @brief Functions called when HRTIM generates an interrupt
  5510. * 7 interrupts can be generated by the master timer:
  5511. * - Master timer registers update
  5512. * - Synchronization event received
  5513. * - Master timer repetition event
  5514. * - Master Compare 1 to 4 event
  5515. * 14 interrupts can be generated by each timing unit:
  5516. * - Delayed protection triggered
  5517. * - Counter reset or roll-over event
  5518. * - Output 1 and output 2 reset (transition active to inactive)
  5519. * - Output 1 and output 2 set (transition inactive to active)
  5520. * - Capture 1 and 2 events
  5521. * - Timing unit registers update
  5522. * - Repetition event
  5523. * - Compare 1 to 4 event
  5524. * 8 global interrupts are generated for the whole HRTIM:
  5525. * - System fault and Fault 1 to 5 (regardless of the timing unit attribution)
  5526. * - DLL calibration done
  5527. * - Burst mode period completed
  5528. @verbatim
  5529. ===============================================================================
  5530. ##### HRTIM interrupts handling #####
  5531. ===============================================================================
  5532. [..]
  5533. This subsection provides a set of functions allowing to manage the HRTIM
  5534. interrupts:
  5535. (+) HRTIM interrupt handler
  5536. (+) Callback function called when Fault1 interrupt occurs
  5537. (+) Callback function called when Fault2 interrupt occurs
  5538. (+) Callback function called when Fault3 interrupt occurs
  5539. (+) Callback function called when Fault4 interrupt occurs
  5540. (+) Callback function called when Fault5 interrupt occurs
  5541. (+) Callback function called when system Fault interrupt occurs
  5542. (+) Callback function called when DLL ready interrupt occurs
  5543. (+) Callback function called when burst mode period interrupt occurs
  5544. (+) Callback function called when synchronization input interrupt occurs
  5545. (+) Callback function called when a timer register update interrupt occurs
  5546. (+) Callback function called when a timer repetition interrupt occurs
  5547. (+) Callback function called when a compare 1 match interrupt occurs
  5548. (+) Callback function called when a compare 2 match interrupt occurs
  5549. (+) Callback function called when a compare 3 match interrupt occurs
  5550. (+) Callback function called when a compare 4 match interrupt occurs
  5551. (+) Callback function called when a capture 1 interrupt occurs
  5552. (+) Callback function called when a capture 2 interrupt occurs
  5553. (+) Callback function called when a delayed protection interrupt occurs
  5554. (+) Callback function called when a timer counter reset interrupt occurs
  5555. (+) Callback function called when a timer output 1 set interrupt occurs
  5556. (+) Callback function called when a timer output 1 reset interrupt occurs
  5557. (+) Callback function called when a timer output 2 set interrupt occurs
  5558. (+) Callback function called when a timer output 2 reset interrupt occurs
  5559. (+) Callback function called when a timer output 2 reset interrupt occurs
  5560. (+) Callback function called upon completion of a burst DMA transfer
  5561. (+) HRTIM callback function registration
  5562. (+) HRTIM callback function unregistration
  5563. (+) HRTIM Timer x callback function registration
  5564. (+) HRTIM Timer x callback function unregistration
  5565. @endverbatim
  5566. * @{
  5567. */
  5568. /**
  5569. * @brief This function handles HRTIM interrupt request.
  5570. * @param hhrtim pointer to HAL HRTIM handle
  5571. * @param TimerIdx Timer index
  5572. * This parameter can be any value of HRTIM_Timer_Index
  5573. * @retval None
  5574. */
  5575. void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim,
  5576. uint32_t TimerIdx)
  5577. {
  5578. /* HRTIM interrupts handling */
  5579. if (TimerIdx == HRTIM_TIMERINDEX_COMMON)
  5580. {
  5581. HRTIM_HRTIM_ISR(hhrtim);
  5582. }
  5583. else if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  5584. {
  5585. /* Master related interrupts handling */
  5586. HRTIM_Master_ISR(hhrtim);
  5587. }
  5588. else
  5589. {
  5590. /* Timing unit related interrupts handling */
  5591. HRTIM_Timer_ISR(hhrtim, TimerIdx);
  5592. }
  5593. }
  5594. /**
  5595. * @brief Callback function invoked when a fault 1 interrupt occurred
  5596. * @param hhrtim pointer to HAL HRTIM handle * @retval None
  5597. * @retval None
  5598. */
  5599. __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim)
  5600. {
  5601. /* Prevent unused argument(s) compilation warning */
  5602. UNUSED(hhrtim);
  5603. /* NOTE : This function should not be modified, when the callback is needed,
  5604. the HAL_HRTIM_Fault1Callback could be implemented in the user file
  5605. */
  5606. }
  5607. /**
  5608. * @brief Callback function invoked when a fault 2 interrupt occurred
  5609. * @param hhrtim pointer to HAL HRTIM handle
  5610. * @retval None
  5611. */
  5612. __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim)
  5613. {
  5614. /* Prevent unused argument(s) compilation warning */
  5615. UNUSED(hhrtim);
  5616. /* NOTE : This function should not be modified, when the callback is needed,
  5617. the HAL_HRTIM_Fault2Callback could be implemented in the user file
  5618. */
  5619. }
  5620. /**
  5621. * @brief Callback function invoked when a fault 3 interrupt occurred
  5622. * @param hhrtim pointer to HAL HRTIM handle
  5623. * @retval None
  5624. */
  5625. __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim)
  5626. {
  5627. /* Prevent unused argument(s) compilation warning */
  5628. UNUSED(hhrtim);
  5629. /* NOTE : This function should not be modified, when the callback is needed,
  5630. the HAL_HRTIM_Fault3Callback could be implemented in the user file
  5631. */
  5632. }
  5633. /**
  5634. * @brief Callback function invoked when a fault 4 interrupt occurred
  5635. * @param hhrtim pointer to HAL HRTIM handle
  5636. * @retval None
  5637. */
  5638. __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim)
  5639. {
  5640. /* Prevent unused argument(s) compilation warning */
  5641. UNUSED(hhrtim);
  5642. /* NOTE : This function should not be modified, when the callback is needed,
  5643. the HAL_HRTIM_Fault4Callback could be implemented in the user file
  5644. */
  5645. }
  5646. /**
  5647. * @brief Callback function invoked when a fault 5 interrupt occurred
  5648. * @param hhrtim pointer to HAL HRTIM handle
  5649. * @retval None
  5650. */
  5651. __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim)
  5652. {
  5653. /* Prevent unused argument(s) compilation warning */
  5654. UNUSED(hhrtim);
  5655. /* NOTE : This function should not be modified, when the callback is needed,
  5656. the HAL_HRTIM_Fault5Callback could be implemented in the user file
  5657. */
  5658. }
  5659. /**
  5660. * @brief Callback function invoked when a system fault interrupt occurred
  5661. * @param hhrtim pointer to HAL HRTIM handle
  5662. * @retval None
  5663. */
  5664. __weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim)
  5665. {
  5666. /* Prevent unused argument(s) compilation warning */
  5667. UNUSED(hhrtim);
  5668. /* NOTE : This function should not be modified, when the callback is needed,
  5669. the HAL_HRTIM_SystemFaultCallback could be implemented in the user file
  5670. */
  5671. }
  5672. /**
  5673. * @brief Callback function invoked when the DLL calibration is completed
  5674. * @param hhrtim pointer to HAL HRTIM handle
  5675. * @retval None
  5676. */
  5677. __weak void HAL_HRTIM_DLLCalibrationReadyCallback(HRTIM_HandleTypeDef * hhrtim)
  5678. {
  5679. /* Prevent unused argument(s) compilation warning */
  5680. UNUSED(hhrtim);
  5681. /* NOTE : This function should not be modified, when the callback is needed,
  5682. the HAL_HRTIM_DLLCalibrationCallback could be implemented in the user file
  5683. */
  5684. }
  5685. /**
  5686. * @brief Callback function invoked when the end of the burst mode period is reached
  5687. * @param hhrtim pointer to HAL HRTIM handle
  5688. * @retval None
  5689. */
  5690. __weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim)
  5691. {
  5692. /* Prevent unused argument(s) compilation warning */
  5693. UNUSED(hhrtim);
  5694. /* NOTE : This function should not be modified, when the callback is needed,
  5695. the HAL_HRTIM_BurstModeCallback could be implemented in the user file
  5696. */
  5697. }
  5698. /**
  5699. * @brief Callback function invoked when a synchronization input event is received
  5700. * @param hhrtim pointer to HAL HRTIM handle
  5701. * @retval None
  5702. */
  5703. __weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim)
  5704. {
  5705. /* Prevent unused argument(s) compilation warning */
  5706. UNUSED(hhrtim);
  5707. /* NOTE : This function should not be modified, when the callback is needed,
  5708. the HAL_HRTIM_SynchronizationEventCallback could be implemented in the user file
  5709. */
  5710. }
  5711. /**
  5712. * @brief Callback function invoked when timer registers are updated
  5713. * @param hhrtim pointer to HAL HRTIM handle
  5714. * @param TimerIdx Timer index
  5715. * This parameter can be one of the following values:
  5716. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5717. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5718. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5719. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5720. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5721. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5722. * @retval None
  5723. */
  5724. __weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim,
  5725. uint32_t TimerIdx)
  5726. {
  5727. /* Prevent unused argument(s) compilation warning */
  5728. UNUSED(hhrtim);
  5729. UNUSED(TimerIdx);
  5730. /* NOTE : This function should not be modified, when the callback is needed,
  5731. the HAL_HRTIM_Master_RegistersUpdateCallback could be implemented in the user file
  5732. */
  5733. }
  5734. /**
  5735. * @brief Callback function invoked when timer repetition period has elapsed
  5736. * @param hhrtim pointer to HAL HRTIM handle
  5737. * @param TimerIdx Timer index
  5738. * This parameter can be one of the following values:
  5739. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5740. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5741. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5742. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5743. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5744. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5745. * @retval None
  5746. */
  5747. __weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim,
  5748. uint32_t TimerIdx)
  5749. {
  5750. /* Prevent unused argument(s) compilation warning */
  5751. UNUSED(hhrtim);
  5752. UNUSED(TimerIdx);
  5753. /* NOTE : This function should not be modified, when the callback is needed,
  5754. the HAL_HRTIM_Master_RepetitionEventCallback could be implemented in the user file
  5755. */
  5756. }
  5757. /**
  5758. * @brief Callback function invoked when the timer counter matches the value
  5759. * programmed in the compare 1 register
  5760. * @param hhrtim pointer to HAL HRTIM handle
  5761. * @param TimerIdx Timer index
  5762. * This parameter can be one of the following values:
  5763. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5764. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5765. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5766. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5767. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5768. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5769. * @retval None
  5770. */
  5771. __weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5772. uint32_t TimerIdx)
  5773. {
  5774. /* Prevent unused argument(s) compilation warning */
  5775. UNUSED(hhrtim);
  5776. UNUSED(TimerIdx);
  5777. /* NOTE : This function should not be modified, when the callback is needed,
  5778. the HAL_HRTIM_Master_Compare1EventCallback could be implemented in the user file
  5779. */
  5780. }
  5781. /**
  5782. * @brief Callback function invoked when the timer counter matches the value
  5783. * programmed in the compare 2 register
  5784. * @param hhrtim pointer to HAL HRTIM handle
  5785. * @retval None
  5786. * @param TimerIdx Timer index
  5787. * This parameter can be one of the following values:
  5788. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5789. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5790. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5791. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5792. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5793. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5794. */
  5795. __weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5796. uint32_t TimerIdx)
  5797. {
  5798. /* Prevent unused argument(s) compilation warning */
  5799. UNUSED(hhrtim);
  5800. UNUSED(TimerIdx);
  5801. /* NOTE : This function should not be modified, when the callback is needed,
  5802. the HAL_HRTIM_Master_Compare2EventCallback could be implemented in the user file
  5803. */
  5804. }
  5805. /**
  5806. * @brief Callback function invoked when the timer counter matches the value
  5807. * programmed in the compare 3 register
  5808. * @param hhrtim pointer to HAL HRTIM handle
  5809. * @param TimerIdx Timer index
  5810. * This parameter can be one of the following values:
  5811. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5812. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5813. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5814. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5815. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5816. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5817. * @retval None
  5818. */
  5819. __weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5820. uint32_t TimerIdx)
  5821. {
  5822. /* Prevent unused argument(s) compilation warning */
  5823. UNUSED(hhrtim);
  5824. UNUSED(TimerIdx);
  5825. /* NOTE : This function should not be modified, when the callback is needed,
  5826. the HAL_HRTIM_Master_Compare3EventCallback could be implemented in the user file
  5827. */
  5828. }
  5829. /**
  5830. * @brief Callback function invoked when the timer counter matches the value
  5831. * programmed in the compare 4 register.
  5832. * @param hhrtim pointer to HAL HRTIM handle
  5833. * @param TimerIdx Timer index
  5834. * This parameter can be one of the following values:
  5835. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5836. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5837. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5838. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5839. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5840. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5841. * @retval None
  5842. */
  5843. __weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5844. uint32_t TimerIdx)
  5845. {
  5846. /* Prevent unused argument(s) compilation warning */
  5847. UNUSED(hhrtim);
  5848. UNUSED(TimerIdx);
  5849. /* NOTE : This function should not be modified, when the callback is needed,
  5850. the HAL_HRTIM_Master_Compare4EventCallback could be implemented in the user file
  5851. */
  5852. }
  5853. /**
  5854. * @brief Callback function invoked when the timer x capture 1 event occurs
  5855. * @param hhrtim pointer to HAL HRTIM handle
  5856. * @param TimerIdx Timer index
  5857. * This parameter can be one of the following values:
  5858. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5859. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5860. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5861. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5862. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5863. * @retval None
  5864. */
  5865. __weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5866. uint32_t TimerIdx)
  5867. {
  5868. /* Prevent unused argument(s) compilation warning */
  5869. UNUSED(hhrtim);
  5870. UNUSED(TimerIdx);
  5871. /* NOTE : This function should not be modified, when the callback is needed,
  5872. the HAL_HRTIM_Timer_Capture1EventCallback could be implemented in the user file
  5873. */
  5874. }
  5875. /**
  5876. * @brief Callback function invoked when the timer x capture 2 event occurs
  5877. * @param hhrtim pointer to HAL HRTIM handle
  5878. * @param TimerIdx Timer index
  5879. * This parameter can be one of the following values:
  5880. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5881. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5882. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5883. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5884. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5885. * @retval None
  5886. */
  5887. __weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5888. uint32_t TimerIdx)
  5889. {
  5890. /* Prevent unused argument(s) compilation warning */
  5891. UNUSED(hhrtim);
  5892. UNUSED(TimerIdx);
  5893. /* NOTE : This function should not be modified, when the callback is needed,
  5894. the HAL_HRTIM_Timer_Capture2EventCallback could be implemented in the user file
  5895. */
  5896. }
  5897. /**
  5898. * @brief Callback function invoked when the delayed idle or balanced idle mode is
  5899. * entered.
  5900. * @param hhrtim pointer to HAL HRTIM handle
  5901. * @param TimerIdx Timer index
  5902. * This parameter can be one of the following values:
  5903. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5904. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5905. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5906. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5907. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5908. * @retval None
  5909. */
  5910. __weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim,
  5911. uint32_t TimerIdx)
  5912. {
  5913. /* Prevent unused argument(s) compilation warning */
  5914. UNUSED(hhrtim);
  5915. UNUSED(TimerIdx);
  5916. /* NOTE : This function should not be modified, when the callback is needed,
  5917. the HAL_HRTIM_Timer_DelayedProtectionCallback could be implemented in the user file
  5918. */
  5919. }
  5920. /**
  5921. * @brief Callback function invoked when the timer x counter reset/roll-over
  5922. * event occurs.
  5923. * @param hhrtim pointer to HAL HRTIM handle
  5924. * @param TimerIdx Timer index
  5925. * This parameter can be one of the following values:
  5926. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5927. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5928. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5929. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5930. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5931. * @retval None
  5932. */
  5933. __weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5934. uint32_t TimerIdx)
  5935. {
  5936. /* Prevent unused argument(s) compilation warning */
  5937. UNUSED(hhrtim);
  5938. UNUSED(TimerIdx);
  5939. /* NOTE : This function should not be modified, when the callback is needed,
  5940. the HAL_HRTIM_Timer_CounterResetCallback could be implemented in the user file
  5941. */
  5942. }
  5943. /**
  5944. * @brief Callback function invoked when the timer x output 1 is set
  5945. * @param hhrtim pointer to HAL HRTIM handle
  5946. * @param TimerIdx Timer index
  5947. * This parameter can be one of the following values:
  5948. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5949. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5950. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5951. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5952. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5953. * @retval None
  5954. */
  5955. __weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim,
  5956. uint32_t TimerIdx)
  5957. {
  5958. /* Prevent unused argument(s) compilation warning */
  5959. UNUSED(hhrtim);
  5960. UNUSED(TimerIdx);
  5961. /* NOTE : This function should not be modified, when the callback is needed,
  5962. the HAL_HRTIM_Timer_Output1SetCallback could be implemented in the user file
  5963. */
  5964. }
  5965. /**
  5966. * @brief Callback function invoked when the timer x output 1 is reset
  5967. * @param hhrtim pointer to HAL HRTIM handle
  5968. * @param TimerIdx Timer index
  5969. * This parameter can be one of the following values:
  5970. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5971. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5972. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5973. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5974. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5975. * @retval None
  5976. */
  5977. __weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5978. uint32_t TimerIdx)
  5979. {
  5980. /* Prevent unused argument(s) compilation warning */
  5981. UNUSED(hhrtim);
  5982. UNUSED(TimerIdx);
  5983. /* NOTE : This function should not be modified, when the callback is needed,
  5984. the HAL_HRTIM_Timer_Output1ResetCallback could be implemented in the user file
  5985. */
  5986. }
  5987. /**
  5988. * @brief Callback function invoked when the timer x output 2 is set
  5989. * @param hhrtim pointer to HAL HRTIM handle
  5990. * @param TimerIdx Timer index
  5991. * This parameter can be one of the following values:
  5992. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5993. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5994. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5995. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5996. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5997. * @retval None
  5998. */
  5999. __weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim,
  6000. uint32_t TimerIdx)
  6001. {
  6002. /* Prevent unused argument(s) compilation warning */
  6003. UNUSED(hhrtim);
  6004. UNUSED(TimerIdx);
  6005. /* NOTE : This function should not be modified, when the callback is needed,
  6006. the HAL_HRTIM_Timer_Output2SetCallback could be implemented in the user file
  6007. */
  6008. }
  6009. /**
  6010. * @brief Callback function invoked when the timer x output 2 is reset
  6011. * @param hhrtim pointer to HAL HRTIM handle
  6012. * @param TimerIdx Timer index
  6013. * This parameter can be one of the following values:
  6014. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  6015. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  6016. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  6017. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  6018. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  6019. * @retval None
  6020. */
  6021. __weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  6022. uint32_t TimerIdx)
  6023. {
  6024. /* Prevent unused argument(s) compilation warning */
  6025. UNUSED(hhrtim);
  6026. UNUSED(TimerIdx);
  6027. /* NOTE : This function should not be modified, when the callback is needed,
  6028. the HAL_HRTIM_Timer_Output2ResetCallback could be implemented in the user file
  6029. */
  6030. }
  6031. /**
  6032. * @brief Callback function invoked when a DMA burst transfer is completed
  6033. * @param hhrtim pointer to HAL HRTIM handle
  6034. * @param TimerIdx Timer index
  6035. * This parameter can be one of the following values:
  6036. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  6037. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  6038. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  6039. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  6040. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  6041. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  6042. * @retval None
  6043. */
  6044. __weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim,
  6045. uint32_t TimerIdx)
  6046. {
  6047. /* Prevent unused argument(s) compilation warning */
  6048. UNUSED(hhrtim);
  6049. UNUSED(TimerIdx);
  6050. /* NOTE : This function should not be modified, when the callback is needed,
  6051. the HAL_HRTIM_BurstDMATransferCallback could be implemented in the user file
  6052. */
  6053. }
  6054. /**
  6055. * @brief Callback function invoked when a DMA error occurs
  6056. * @param hhrtim pointer to HAL HRTIM handle
  6057. * @retval None
  6058. */
  6059. __weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim)
  6060. {
  6061. /* Prevent unused argument(s) compilation warning */
  6062. UNUSED(hhrtim);
  6063. /* NOTE : This function should not be modified, when the callback is needed,
  6064. the HAL_HRTIM_ErrorCallback could be implemented in the user file
  6065. */
  6066. }
  6067. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  6068. /**
  6069. * @brief HRTIM callback function registration
  6070. * @param hhrtim pointer to HAL HRTIM handle
  6071. * @param CallbackID ID of the HRTIM callback function to register
  6072. * This parameter can be one of the following values:
  6073. * @arg HAL_HRTIM_FAULT1CALLBACK_CB_ID
  6074. * @arg HAL_HRTIM_FAULT2CALLBACK_CB_ID
  6075. * @arg HAL_HRTIM_FAULT3CALLBACK_CB_ID
  6076. * @arg HAL_HRTIM_FAULT4CALLBACK_CB_ID
  6077. * @arg HAL_HRTIM_FAULT5CALLBACK_CB_ID
  6078. * @arg HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID
  6079. * @arg HAL_HRTIM_DLLCALBRATIONREADYCALLBACK_CB_ID
  6080. * @arg HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID
  6081. * @arg HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID
  6082. * @arg HAL_HRTIM_ERRORCALLBACK_CB_ID
  6083. * @arg HAL_HRTIM_MSPINIT_CB_ID
  6084. * @arg HAL_HRTIM_MSPDEINIT_CB_ID
  6085. * @param pCallback Callback function pointer
  6086. * @retval HAL status
  6087. */
  6088. HAL_StatusTypeDef HAL_HRTIM_RegisterCallback(HRTIM_HandleTypeDef * hhrtim,
  6089. HAL_HRTIM_CallbackIDTypeDef CallbackID,
  6090. pHRTIM_CallbackTypeDef pCallback)
  6091. {
  6092. HAL_StatusTypeDef status = HAL_OK;
  6093. if (pCallback == NULL)
  6094. {
  6095. /* Update the state */
  6096. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6097. return HAL_ERROR;
  6098. }
  6099. /* Process locked */
  6100. __HAL_LOCK(hhrtim);
  6101. if (HAL_HRTIM_STATE_READY == hhrtim->State)
  6102. {
  6103. switch (CallbackID)
  6104. {
  6105. case HAL_HRTIM_FAULT1CALLBACK_CB_ID :
  6106. hhrtim->Fault1Callback = pCallback;
  6107. break;
  6108. case HAL_HRTIM_FAULT2CALLBACK_CB_ID :
  6109. hhrtim->Fault2Callback = pCallback;
  6110. break;
  6111. case HAL_HRTIM_FAULT3CALLBACK_CB_ID :
  6112. hhrtim->Fault3Callback = pCallback;
  6113. break;
  6114. case HAL_HRTIM_FAULT4CALLBACK_CB_ID :
  6115. hhrtim->Fault4Callback = pCallback;
  6116. break;
  6117. case HAL_HRTIM_FAULT5CALLBACK_CB_ID :
  6118. hhrtim->Fault5Callback = pCallback;
  6119. break;
  6120. case HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID :
  6121. hhrtim->SystemFaultCallback = pCallback;
  6122. break;
  6123. case HAL_HRTIM_DLLCALBRATIONREADYCALLBACK_CB_ID :
  6124. hhrtim->DLLCalibrationReadyCallback = pCallback;
  6125. break;
  6126. case HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID :
  6127. hhrtim->BurstModePeriodCallback = pCallback;
  6128. break;
  6129. case HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID :
  6130. hhrtim->SynchronizationEventCallback = pCallback;
  6131. break;
  6132. case HAL_HRTIM_ERRORCALLBACK_CB_ID :
  6133. hhrtim->ErrorCallback = pCallback;
  6134. break;
  6135. case HAL_HRTIM_MSPINIT_CB_ID :
  6136. hhrtim->MspInitCallback = pCallback;
  6137. break;
  6138. case HAL_HRTIM_MSPDEINIT_CB_ID :
  6139. hhrtim->MspDeInitCallback = pCallback;
  6140. break;
  6141. default :
  6142. /* Update the state */
  6143. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6144. /* Return error status */
  6145. status = HAL_ERROR;
  6146. break;
  6147. }
  6148. }
  6149. else if (HAL_HRTIM_STATE_RESET == hhrtim->State)
  6150. {
  6151. switch (CallbackID)
  6152. {
  6153. case HAL_HRTIM_MSPINIT_CB_ID :
  6154. hhrtim->MspInitCallback = pCallback;
  6155. break;
  6156. case HAL_HRTIM_MSPDEINIT_CB_ID :
  6157. hhrtim->MspDeInitCallback = pCallback;
  6158. break;
  6159. default :
  6160. /* Update the state */
  6161. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6162. /* Return error status */
  6163. status = HAL_ERROR;
  6164. break;
  6165. }
  6166. }
  6167. else
  6168. {
  6169. /* Update the state */
  6170. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6171. /* Return error status */
  6172. status = HAL_ERROR;
  6173. }
  6174. /* Release Lock */
  6175. __HAL_UNLOCK(hhrtim);
  6176. return status;
  6177. }
  6178. /**
  6179. * @brief HRTIM callback function un-registration
  6180. * @param hhrtim pointer to HAL HRTIM handle
  6181. * @param CallbackID ID of the HRTIM callback function to unregister
  6182. * This parameter can be one of the following values:
  6183. * @arg HAL_HRTIM_FAULT1CALLBACK_CB_ID
  6184. * @arg HAL_HRTIM_FAULT2CALLBACK_CB_ID
  6185. * @arg HAL_HRTIM_FAULT3CALLBACK_CB_ID
  6186. * @arg HAL_HRTIM_FAULT4CALLBACK_CB_ID
  6187. * @arg HAL_HRTIM_FAULT5CALLBACK_CB_ID
  6188. * @arg HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID
  6189. * @arg HAL_HRTIM_DLLCALBRATIONREADYCALLBACK_CB_ID
  6190. * @arg HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID
  6191. * @arg HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID
  6192. * @arg HAL_HRTIM_ERRORCALLBACK_CB_ID
  6193. * @arg HAL_HRTIM_MSPINIT_CB_ID
  6194. * @arg HAL_HRTIM_MSPDEINIT_CB_ID
  6195. * @retval HAL status
  6196. */
  6197. HAL_StatusTypeDef HAL_HRTIM_UnRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
  6198. HAL_HRTIM_CallbackIDTypeDef CallbackID)
  6199. {
  6200. HAL_StatusTypeDef status = HAL_OK;
  6201. /* Process locked */
  6202. __HAL_LOCK(hhrtim);
  6203. if (HAL_HRTIM_STATE_READY == hhrtim->State)
  6204. {
  6205. switch (CallbackID)
  6206. {
  6207. case HAL_HRTIM_FAULT1CALLBACK_CB_ID :
  6208. hhrtim->Fault1Callback = HAL_HRTIM_Fault1Callback;
  6209. break;
  6210. case HAL_HRTIM_FAULT2CALLBACK_CB_ID :
  6211. hhrtim->Fault2Callback = HAL_HRTIM_Fault2Callback;
  6212. break;
  6213. case HAL_HRTIM_FAULT3CALLBACK_CB_ID :
  6214. hhrtim->Fault3Callback = HAL_HRTIM_Fault3Callback;
  6215. break;
  6216. case HAL_HRTIM_FAULT4CALLBACK_CB_ID :
  6217. hhrtim->Fault4Callback = HAL_HRTIM_Fault4Callback;
  6218. break;
  6219. case HAL_HRTIM_FAULT5CALLBACK_CB_ID :
  6220. hhrtim->Fault5Callback = HAL_HRTIM_Fault5Callback;
  6221. break;
  6222. case HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID :
  6223. hhrtim->SystemFaultCallback = HAL_HRTIM_SystemFaultCallback;
  6224. break;
  6225. case HAL_HRTIM_DLLCALBRATIONREADYCALLBACK_CB_ID :
  6226. hhrtim->DLLCalibrationReadyCallback = HAL_HRTIM_DLLCalibrationReadyCallback;
  6227. break;
  6228. case HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID :
  6229. hhrtim->BurstModePeriodCallback = HAL_HRTIM_BurstModePeriodCallback;
  6230. break;
  6231. case HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID :
  6232. hhrtim->SynchronizationEventCallback = HAL_HRTIM_SynchronizationEventCallback;
  6233. break;
  6234. case HAL_HRTIM_ERRORCALLBACK_CB_ID :
  6235. hhrtim->ErrorCallback = HAL_HRTIM_ErrorCallback;
  6236. break;
  6237. case HAL_HRTIM_MSPINIT_CB_ID :
  6238. hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
  6239. break;
  6240. case HAL_HRTIM_MSPDEINIT_CB_ID :
  6241. hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
  6242. break;
  6243. default :
  6244. /* Update the state */
  6245. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6246. /* Return error status */
  6247. status = HAL_ERROR;
  6248. break;
  6249. }
  6250. }
  6251. else if (HAL_HRTIM_STATE_RESET == hhrtim->State)
  6252. {
  6253. switch (CallbackID)
  6254. {
  6255. case HAL_HRTIM_MSPINIT_CB_ID :
  6256. hhrtim->MspInitCallback = HAL_HRTIM_MspInit;
  6257. break;
  6258. case HAL_HRTIM_MSPDEINIT_CB_ID :
  6259. hhrtim->MspDeInitCallback = HAL_HRTIM_MspDeInit;
  6260. break;
  6261. default :
  6262. /* Update the state */
  6263. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6264. /* Return error status */
  6265. status = HAL_ERROR;
  6266. break;
  6267. }
  6268. }
  6269. else
  6270. {
  6271. /* Update the state */
  6272. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6273. /* Return error status */
  6274. status = HAL_ERROR;
  6275. }
  6276. /* Release Lock */
  6277. __HAL_UNLOCK(hhrtim);
  6278. return status;
  6279. }
  6280. /**
  6281. * @brief HRTIM Timer x callback function registration
  6282. * @param hhrtim pointer to HAL HRTIM handle
  6283. * @param CallbackID ID of the HRTIM Timer x callback function to register
  6284. * This parameter can be one of the following values:
  6285. * @arg HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID
  6286. * @arg HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID
  6287. * @arg HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID
  6288. * @arg HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID
  6289. * @arg HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID
  6290. * @arg HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID
  6291. * @arg HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID
  6292. * @arg HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID
  6293. * @arg HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID
  6294. * @arg HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID
  6295. * @arg HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID
  6296. * @arg HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID
  6297. * @arg HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID
  6298. * @arg HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID
  6299. * @arg HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID
  6300. * @param pCallback Callback function pointer
  6301. * @retval HAL status
  6302. */
  6303. HAL_StatusTypeDef HAL_HRTIM_TIMxRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
  6304. HAL_HRTIM_CallbackIDTypeDef CallbackID,
  6305. pHRTIM_TIMxCallbackTypeDef pCallback)
  6306. {
  6307. HAL_StatusTypeDef status = HAL_OK;
  6308. if (pCallback == NULL)
  6309. {
  6310. /* Update the state */
  6311. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6312. return HAL_ERROR;
  6313. }
  6314. /* Process locked */
  6315. __HAL_LOCK(hhrtim);
  6316. if (HAL_HRTIM_STATE_READY == hhrtim->State)
  6317. {
  6318. switch (CallbackID)
  6319. {
  6320. case HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID :
  6321. hhrtim->RegistersUpdateCallback = pCallback;
  6322. break;
  6323. case HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID :
  6324. hhrtim->RepetitionEventCallback = pCallback;
  6325. break;
  6326. case HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID :
  6327. hhrtim->Compare1EventCallback = pCallback;
  6328. break;
  6329. case HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID :
  6330. hhrtim->Compare2EventCallback = pCallback;
  6331. break;
  6332. case HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID :
  6333. hhrtim->Compare3EventCallback = pCallback;
  6334. break;
  6335. case HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID :
  6336. hhrtim->Compare4EventCallback = pCallback;
  6337. break;
  6338. case HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID :
  6339. hhrtim->Capture1EventCallback = pCallback;
  6340. break;
  6341. case HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID :
  6342. hhrtim->Capture2EventCallback = pCallback;
  6343. break;
  6344. case HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID :
  6345. hhrtim->DelayedProtectionCallback = pCallback;
  6346. break;
  6347. case HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID :
  6348. hhrtim->CounterResetCallback = pCallback;
  6349. break;
  6350. case HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID :
  6351. hhrtim->Output1SetCallback = pCallback;
  6352. break;
  6353. case HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID :
  6354. hhrtim->Output1ResetCallback = pCallback;
  6355. break;
  6356. case HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID :
  6357. hhrtim->Output2SetCallback = pCallback;
  6358. break;
  6359. case HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID :
  6360. hhrtim->Output2ResetCallback = pCallback;
  6361. break;
  6362. case HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID :
  6363. hhrtim->BurstDMATransferCallback = pCallback;
  6364. break;
  6365. default :
  6366. /* Update the state */
  6367. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6368. /* Return error status */
  6369. status = HAL_ERROR;
  6370. break;
  6371. }
  6372. }
  6373. else
  6374. {
  6375. /* Update the state */
  6376. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6377. /* Return error status */
  6378. status = HAL_ERROR;
  6379. }
  6380. /* Release Lock */
  6381. __HAL_UNLOCK(hhrtim);
  6382. return status;
  6383. }
  6384. /**
  6385. * @brief HRTIM Timer x callback function un-registration
  6386. * @param hhrtim pointer to HAL HRTIM handle
  6387. * @param CallbackID ID of the HRTIM callback Timer x function to unregister
  6388. * This parameter can be one of the following values:
  6389. * @arg HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID
  6390. * @arg HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID
  6391. * @arg HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID
  6392. * @arg HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID
  6393. * @arg HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID
  6394. * @arg HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID
  6395. * @arg HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID
  6396. * @arg HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID
  6397. * @arg HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID
  6398. * @arg HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID
  6399. * @arg HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID
  6400. * @arg HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID
  6401. * @arg HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID
  6402. * @arg HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID
  6403. * @arg HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID
  6404. * @retval HAL status
  6405. */
  6406. HAL_StatusTypeDef HAL_HRTIM_TIMxUnRegisterCallback(HRTIM_HandleTypeDef * hhrtim,
  6407. HAL_HRTIM_CallbackIDTypeDef CallbackID)
  6408. {
  6409. HAL_StatusTypeDef status = HAL_OK;
  6410. /* Process locked */
  6411. __HAL_LOCK(hhrtim);
  6412. if (HAL_HRTIM_STATE_READY == hhrtim->State)
  6413. {
  6414. switch (CallbackID)
  6415. {
  6416. case HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID :
  6417. hhrtim->RegistersUpdateCallback = HAL_HRTIM_RegistersUpdateCallback;
  6418. break;
  6419. case HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID :
  6420. hhrtim->RepetitionEventCallback = HAL_HRTIM_RepetitionEventCallback;
  6421. break;
  6422. case HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID :
  6423. hhrtim->Compare1EventCallback = HAL_HRTIM_Compare1EventCallback;
  6424. break;
  6425. case HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID :
  6426. hhrtim->Compare2EventCallback = HAL_HRTIM_Compare2EventCallback;
  6427. break;
  6428. case HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID :
  6429. hhrtim->Compare3EventCallback = HAL_HRTIM_Compare3EventCallback;
  6430. break;
  6431. case HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID :
  6432. hhrtim->Compare4EventCallback = HAL_HRTIM_Compare4EventCallback;
  6433. break;
  6434. case HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID :
  6435. hhrtim->Capture1EventCallback = HAL_HRTIM_Capture1EventCallback;
  6436. break;
  6437. case HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID :
  6438. hhrtim->Capture2EventCallback = HAL_HRTIM_Capture2EventCallback;
  6439. break;
  6440. case HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID :
  6441. hhrtim->DelayedProtectionCallback = HAL_HRTIM_DelayedProtectionCallback;
  6442. break;
  6443. case HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID :
  6444. hhrtim->CounterResetCallback = HAL_HRTIM_CounterResetCallback;
  6445. break;
  6446. case HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID :
  6447. hhrtim->Output1SetCallback = HAL_HRTIM_Output1SetCallback;
  6448. break;
  6449. case HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID :
  6450. hhrtim->Output1ResetCallback = HAL_HRTIM_Output1ResetCallback;
  6451. break;
  6452. case HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID :
  6453. hhrtim->Output2SetCallback = HAL_HRTIM_Output2SetCallback;
  6454. break;
  6455. case HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID :
  6456. hhrtim->Output2ResetCallback = HAL_HRTIM_Output2ResetCallback;
  6457. break;
  6458. case HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID :
  6459. hhrtim->BurstDMATransferCallback = HAL_HRTIM_BurstDMATransferCallback;
  6460. break;
  6461. default :
  6462. /* Update the state */
  6463. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6464. /* Return error status */
  6465. status = HAL_ERROR;
  6466. break;
  6467. }
  6468. }
  6469. else
  6470. {
  6471. /* Update the state */
  6472. hhrtim->State = HAL_HRTIM_STATE_INVALID_CALLBACK;
  6473. /* Return error status */
  6474. status = HAL_ERROR;
  6475. }
  6476. /* Release Lock */
  6477. __HAL_UNLOCK(hhrtim);
  6478. return status;
  6479. }
  6480. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  6481. /**
  6482. * @}
  6483. */
  6484. /**
  6485. * @}
  6486. */
  6487. /** @addtogroup HRTIM_Private_Functions
  6488. * @{
  6489. */
  6490. /**
  6491. * @brief Configure the master timer time base
  6492. * @param hhrtim pointer to HAL HRTIM handle
  6493. * @param pTimeBaseCfg pointer to the time base configuration structure
  6494. * @retval None
  6495. */
  6496. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  6497. const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  6498. {
  6499. uint32_t hrtim_mcr;
  6500. /* Configure master timer */
  6501. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  6502. /* Set the prescaler ratio */
  6503. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
  6504. hrtim_mcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  6505. /* Set the operating mode */
  6506. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG);
  6507. hrtim_mcr |= (uint32_t)pTimeBaseCfg->Mode;
  6508. /* Update the HRTIM registers */
  6509. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  6510. hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period;
  6511. hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter;
  6512. }
  6513. /**
  6514. * @brief Configure timing unit (Timer A to Timer E) time base
  6515. * @param hhrtim pointer to HAL HRTIM handle
  6516. * @param TimerIdx Timer index
  6517. * @param pTimeBaseCfg pointer to the time base configuration structure
  6518. * @retval None
  6519. */
  6520. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  6521. uint32_t TimerIdx ,
  6522. const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  6523. {
  6524. uint32_t hrtim_timcr;
  6525. /* Configure master timing unit */
  6526. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  6527. /* Set the prescaler ratio */
  6528. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
  6529. hrtim_timcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  6530. /* Set the operating mode */
  6531. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG);
  6532. hrtim_timcr |= (uint32_t)pTimeBaseCfg->Mode;
  6533. /* Update the HRTIM registers */
  6534. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  6535. hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period;
  6536. hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter;
  6537. }
  6538. /**
  6539. * @brief Configure the master timer in waveform mode
  6540. * @param hhrtim pointer to HAL HRTIM handle
  6541. * @param pTimerCfg pointer to the timer configuration data structure
  6542. * @retval None
  6543. */
  6544. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  6545. const HRTIM_TimerCfgTypeDef * pTimerCfg)
  6546. {
  6547. uint32_t hrtim_mcr;
  6548. uint32_t hrtim_bmcr;
  6549. /* Configure master timer */
  6550. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  6551. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  6552. /* Enable/Disable the half mode */
  6553. hrtim_mcr &= ~(HRTIM_MCR_HALF);
  6554. hrtim_mcr |= pTimerCfg->HalfModeEnable;
  6555. /* Enable/Disable the timer start upon synchronization event reception */
  6556. hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
  6557. hrtim_mcr |= pTimerCfg->StartOnSync;
  6558. /* Enable/Disable the timer reset upon synchronization event reception */
  6559. hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM);
  6560. hrtim_mcr |= pTimerCfg->ResetOnSync;
  6561. /* Enable/Disable the DAC synchronization event generation */
  6562. hrtim_mcr &= ~(HRTIM_MCR_DACSYNC);
  6563. hrtim_mcr |= pTimerCfg->DACSynchro;
  6564. /* Enable/Disable preload mechanism for timer registers */
  6565. hrtim_mcr &= ~(HRTIM_MCR_PREEN);
  6566. hrtim_mcr |= pTimerCfg->PreloadEnable;
  6567. /* Master timer registers update handling */
  6568. hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA);
  6569. hrtim_mcr |= (pTimerCfg->UpdateGating << 2U);
  6570. /* Enable/Disable registers update on repetition */
  6571. hrtim_mcr &= ~(HRTIM_MCR_MREPU);
  6572. hrtim_mcr |= pTimerCfg->RepetitionUpdate;
  6573. /* Set the timer burst mode */
  6574. hrtim_bmcr &= ~(HRTIM_BMCR_MTBM);
  6575. hrtim_bmcr |= pTimerCfg->BurstMode;
  6576. /* Update the HRTIM registers */
  6577. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  6578. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  6579. }
  6580. /**
  6581. * @brief Configure timing unit (Timer A to Timer E) in waveform mode
  6582. * @param hhrtim pointer to HAL HRTIM handle
  6583. * @param TimerIdx Timer index
  6584. * @param pTimerCfg pointer to the timer configuration data structure
  6585. * @retval None
  6586. */
  6587. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  6588. uint32_t TimerIdx,
  6589. const HRTIM_TimerCfgTypeDef * pTimerCfg)
  6590. {
  6591. uint32_t hrtim_timcr;
  6592. uint32_t hrtim_timfltr;
  6593. uint32_t hrtim_timoutr;
  6594. uint32_t hrtim_timrstr;
  6595. uint32_t hrtim_bmcr;
  6596. /* UPDGAT bitfield must be reset before programming a new value */
  6597. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT);
  6598. /* Configure timing unit (Timer A to Timer E) */
  6599. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  6600. hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR;
  6601. hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  6602. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  6603. /* Enable/Disable the half mode */
  6604. hrtim_timcr &= ~(HRTIM_TIMCR_HALF);
  6605. hrtim_timcr |= pTimerCfg->HalfModeEnable;
  6606. /* Enable/Disable the timer start upon synchronization event reception */
  6607. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
  6608. hrtim_timcr |= pTimerCfg->StartOnSync;
  6609. /* Enable/Disable the timer reset upon synchronization event reception */
  6610. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST);
  6611. hrtim_timcr |= pTimerCfg->ResetOnSync;
  6612. /* Enable/Disable the DAC synchronization event generation */
  6613. hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC);
  6614. hrtim_timcr |= pTimerCfg->DACSynchro;
  6615. /* Enable/Disable preload mechanism for timer registers */
  6616. hrtim_timcr &= ~(HRTIM_TIMCR_PREEN);
  6617. hrtim_timcr |= pTimerCfg->PreloadEnable;
  6618. /* Timing unit registers update handling */
  6619. hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
  6620. hrtim_timcr |= pTimerCfg->UpdateGating;
  6621. /* Enable/Disable registers update on repetition */
  6622. hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
  6623. if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
  6624. {
  6625. hrtim_timcr |= HRTIM_TIMCR_TREPU;
  6626. }
  6627. /* Set the push-pull mode */
  6628. hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL);
  6629. hrtim_timcr |= pTimerCfg->PushPull;
  6630. /* Enable/Disable registers update on timer counter reset */
  6631. hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU);
  6632. hrtim_timcr |= pTimerCfg->ResetUpdate;
  6633. /* Set the timer update trigger */
  6634. hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
  6635. hrtim_timcr |= pTimerCfg->UpdateTrigger;
  6636. /* Enable/Disable the fault channel at timer level */
  6637. hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN);
  6638. hrtim_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
  6639. /* Lock/Unlock fault sources at timer level */
  6640. hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK);
  6641. hrtim_timfltr |= pTimerCfg->FaultLock;
  6642. /* The deadtime cannot be used simultaneously with the push-pull mode */
  6643. if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED)
  6644. {
  6645. /* Enable/Disable dead time insertion at timer level */
  6646. hrtim_timoutr &= ~(HRTIM_OUTR_DTEN);
  6647. hrtim_timoutr |= pTimerCfg->DeadTimeInsertion;
  6648. }
  6649. /* Enable/Disable delayed protection at timer level
  6650. Delayed Idle is available whatever the timer operating mode (regular, push-pull)
  6651. Balanced Idle is only available in push-pull mode
  6652. */
  6653. if ( ((pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6)
  6654. && (pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7))
  6655. || (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED))
  6656. {
  6657. hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN);
  6658. hrtim_timoutr |= pTimerCfg->DelayedProtectionMode;
  6659. }
  6660. /* Set the timer counter reset trigger */
  6661. hrtim_timrstr = pTimerCfg->ResetTrigger;
  6662. /* Set the timer burst mode */
  6663. switch (TimerIdx)
  6664. {
  6665. case HRTIM_TIMERINDEX_TIMER_A:
  6666. {
  6667. hrtim_bmcr &= ~(HRTIM_BMCR_TABM);
  6668. hrtim_bmcr |= ( pTimerCfg->BurstMode << 1U);
  6669. break;
  6670. }
  6671. case HRTIM_TIMERINDEX_TIMER_B:
  6672. {
  6673. hrtim_bmcr &= ~(HRTIM_BMCR_TBBM);
  6674. hrtim_bmcr |= ( pTimerCfg->BurstMode << 2U);
  6675. break;
  6676. }
  6677. case HRTIM_TIMERINDEX_TIMER_C:
  6678. {
  6679. hrtim_bmcr &= ~(HRTIM_BMCR_TCBM);
  6680. hrtim_bmcr |= ( pTimerCfg->BurstMode << 3U);
  6681. break;
  6682. }
  6683. case HRTIM_TIMERINDEX_TIMER_D:
  6684. {
  6685. hrtim_bmcr &= ~(HRTIM_BMCR_TDBM);
  6686. hrtim_bmcr |= ( pTimerCfg->BurstMode << 4U);
  6687. break;
  6688. }
  6689. case HRTIM_TIMERINDEX_TIMER_E:
  6690. {
  6691. hrtim_bmcr &= ~(HRTIM_BMCR_TEBM);
  6692. hrtim_bmcr |= ( pTimerCfg->BurstMode << 5U);
  6693. break;
  6694. }
  6695. default:
  6696. break;
  6697. }
  6698. /* Update the HRTIM registers */
  6699. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  6700. hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr;
  6701. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr;
  6702. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr;
  6703. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  6704. }
  6705. /**
  6706. * @brief Configure a capture unit
  6707. * @param hhrtim pointer to HAL HRTIM handle
  6708. * @param TimerIdx Timer index
  6709. * @param CaptureUnit Capture unit identifier
  6710. * @param Event Event reference
  6711. * @retval None
  6712. */
  6713. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  6714. uint32_t TimerIdx,
  6715. uint32_t CaptureUnit,
  6716. uint32_t Event)
  6717. {
  6718. uint32_t CaptureTrigger = 0xFFFFFFFFU;
  6719. switch (Event)
  6720. {
  6721. case HRTIM_EVENT_1:
  6722. {
  6723. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
  6724. break;
  6725. }
  6726. case HRTIM_EVENT_2:
  6727. {
  6728. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
  6729. break;
  6730. }
  6731. case HRTIM_EVENT_3:
  6732. {
  6733. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
  6734. break;
  6735. }
  6736. case HRTIM_EVENT_4:
  6737. {
  6738. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
  6739. break;
  6740. }
  6741. case HRTIM_EVENT_5:
  6742. {
  6743. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
  6744. break;
  6745. }
  6746. case HRTIM_EVENT_6:
  6747. {
  6748. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
  6749. break;
  6750. }
  6751. case HRTIM_EVENT_7:
  6752. {
  6753. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
  6754. break;
  6755. }
  6756. case HRTIM_EVENT_8:
  6757. {
  6758. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
  6759. break;
  6760. }
  6761. case HRTIM_EVENT_9:
  6762. {
  6763. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
  6764. break;
  6765. }
  6766. case HRTIM_EVENT_10:
  6767. {
  6768. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
  6769. break;
  6770. }
  6771. default:
  6772. break;
  6773. }
  6774. switch (CaptureUnit)
  6775. {
  6776. case HRTIM_CAPTUREUNIT_1:
  6777. {
  6778. hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger;
  6779. break;
  6780. }
  6781. case HRTIM_CAPTUREUNIT_2:
  6782. {
  6783. hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger;
  6784. break;
  6785. }
  6786. default:
  6787. break;
  6788. }
  6789. }
  6790. /**
  6791. * @brief Configure the output of a timing unit
  6792. * @param hhrtim pointer to HAL HRTIM handle
  6793. * @param TimerIdx Timer index
  6794. * @param Output timing unit output identifier
  6795. * @param pOutputCfg pointer to the output configuration data structure
  6796. * @retval None
  6797. */
  6798. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  6799. uint32_t TimerIdx,
  6800. uint32_t Output,
  6801. const HRTIM_OutputCfgTypeDef * pOutputCfg)
  6802. {
  6803. uint32_t hrtim_outr;
  6804. uint32_t hrtim_dtr;
  6805. uint32_t shift = 0U;
  6806. hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  6807. hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
  6808. switch (Output)
  6809. {
  6810. case HRTIM_OUTPUT_TA1:
  6811. case HRTIM_OUTPUT_TB1:
  6812. case HRTIM_OUTPUT_TC1:
  6813. case HRTIM_OUTPUT_TD1:
  6814. case HRTIM_OUTPUT_TE1:
  6815. {
  6816. /* Set the output set/reset crossbar */
  6817. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource;
  6818. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
  6819. break;
  6820. }
  6821. case HRTIM_OUTPUT_TA2:
  6822. case HRTIM_OUTPUT_TB2:
  6823. case HRTIM_OUTPUT_TC2:
  6824. case HRTIM_OUTPUT_TD2:
  6825. case HRTIM_OUTPUT_TE2:
  6826. {
  6827. /* Set the output set/reset crossbar */
  6828. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource;
  6829. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
  6830. shift = 16U;
  6831. break;
  6832. }
  6833. default:
  6834. break;
  6835. }
  6836. /* Clear output config */
  6837. hrtim_outr &= ~((HRTIM_OUTR_POL1 |
  6838. HRTIM_OUTR_IDLM1 |
  6839. HRTIM_OUTR_IDLES1|
  6840. HRTIM_OUTR_FAULT1|
  6841. HRTIM_OUTR_CHP1 |
  6842. HRTIM_OUTR_DIDL1) << shift);
  6843. /* Set the polarity */
  6844. hrtim_outr |= (pOutputCfg->Polarity << shift);
  6845. /* Set the IDLE mode */
  6846. hrtim_outr |= (pOutputCfg->IdleMode << shift);
  6847. /* Set the IDLE state */
  6848. hrtim_outr |= (pOutputCfg->IdleLevel << shift);
  6849. /* Set the FAULT state */
  6850. hrtim_outr |= (pOutputCfg->FaultLevel << shift);
  6851. /* Set the chopper mode */
  6852. hrtim_outr |= (pOutputCfg->ChopperModeEnable << shift);
  6853. /* Set the burst mode entry mode : deadtime insertion when entering the idle
  6854. state during a burst mode operation is allowed only under the following
  6855. conditions:
  6856. - the outputs is active during the burst mode (IDLES=1U)
  6857. - positive deadtimes (SDTR/SDTF set to 0U)
  6858. */
  6859. if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) &&
  6860. ((hrtim_dtr & HRTIM_DTR_SDTR) == (uint32_t)RESET) &&
  6861. ((hrtim_dtr & HRTIM_DTR_SDTF) == (uint32_t)RESET))
  6862. {
  6863. hrtim_outr |= (pOutputCfg->BurstModeEntryDelayed << shift);
  6864. }
  6865. /* Update HRTIM register */
  6866. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr;
  6867. }
  6868. /**
  6869. * @brief Configure an external event channel
  6870. * @param hhrtim pointer to HAL HRTIM handle
  6871. * @param Event Event channel identifier
  6872. * @param pEventCfg pointer to the event channel configuration data structure
  6873. * @retval None
  6874. */
  6875. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  6876. uint32_t Event,
  6877. const HRTIM_EventCfgTypeDef *pEventCfg)
  6878. {
  6879. uint32_t hrtim_eecr1;
  6880. uint32_t hrtim_eecr2;
  6881. uint32_t hrtim_eecr3;
  6882. /* Configure external event channel */
  6883. hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;
  6884. hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;
  6885. hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
  6886. switch (Event)
  6887. {
  6888. case HRTIM_EVENT_NONE:
  6889. {
  6890. /* Update the HRTIM registers */
  6891. hhrtim->Instance->sCommonRegs.EECR1 = 0U;
  6892. hhrtim->Instance->sCommonRegs.EECR2 = 0U;
  6893. hhrtim->Instance->sCommonRegs.EECR3 = 0U;
  6894. break;
  6895. }
  6896. case HRTIM_EVENT_1:
  6897. {
  6898. hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST);
  6899. hrtim_eecr1 |= (pEventCfg->Source & HRTIM_EECR1_EE1SRC);
  6900. hrtim_eecr1 |= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL);
  6901. hrtim_eecr1 |= (pEventCfg->Sensitivity & HRTIM_EECR1_EE1SNS);
  6902. /* Update the HRTIM registers (all bitfields but EE1FAST bit) */
  6903. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6904. /* Update the HRTIM registers (EE1FAST bit) */
  6905. hrtim_eecr1 |= (pEventCfg->FastMode & HRTIM_EECR1_EE1FAST);
  6906. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6907. break;
  6908. }
  6909. case HRTIM_EVENT_2:
  6910. {
  6911. hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST);
  6912. hrtim_eecr1 |= ((pEventCfg->Source << 6U) & HRTIM_EECR1_EE2SRC);
  6913. hrtim_eecr1 |= ((pEventCfg->Polarity << 6U) & HRTIM_EECR1_EE2POL);
  6914. hrtim_eecr1 |= ((pEventCfg->Sensitivity << 6U) & HRTIM_EECR1_EE2SNS);
  6915. /* Update the HRTIM registers (all bitfields but EE2FAST bit) */
  6916. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6917. /* Update the HRTIM registers (EE2FAST bit) */
  6918. hrtim_eecr1 |= ((pEventCfg->FastMode << 6U) & HRTIM_EECR1_EE2FAST);
  6919. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6920. break;
  6921. }
  6922. case HRTIM_EVENT_3:
  6923. {
  6924. hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST);
  6925. hrtim_eecr1 |= ((pEventCfg->Source << 12U) & HRTIM_EECR1_EE3SRC);
  6926. hrtim_eecr1 |= ((pEventCfg->Polarity << 12U) & HRTIM_EECR1_EE3POL);
  6927. hrtim_eecr1 |= ((pEventCfg->Sensitivity << 12U) & HRTIM_EECR1_EE3SNS);
  6928. /* Update the HRTIM registers (all bitfields but EE3FAST bit) */
  6929. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6930. /* Update the HRTIM registers (EE3FAST bit) */
  6931. hrtim_eecr1 |= ((pEventCfg->FastMode << 12U) & HRTIM_EECR1_EE3FAST);
  6932. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6933. break;
  6934. }
  6935. case HRTIM_EVENT_4:
  6936. {
  6937. hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST);
  6938. hrtim_eecr1 |= ((pEventCfg->Source << 18U) & HRTIM_EECR1_EE4SRC);
  6939. hrtim_eecr1 |= ((pEventCfg->Polarity << 18U) & HRTIM_EECR1_EE4POL);
  6940. hrtim_eecr1 |= ((pEventCfg->Sensitivity << 18U) & HRTIM_EECR1_EE4SNS);
  6941. /* Update the HRTIM registers (all bitfields but EE4FAST bit) */
  6942. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6943. /* Update the HRTIM registers (EE4FAST bit) */
  6944. hrtim_eecr1 |= ((pEventCfg->FastMode << 18U) & HRTIM_EECR1_EE4FAST);
  6945. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6946. break;
  6947. }
  6948. case HRTIM_EVENT_5:
  6949. {
  6950. hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST);
  6951. hrtim_eecr1 |= ((pEventCfg->Source << 24U) & HRTIM_EECR1_EE5SRC);
  6952. hrtim_eecr1 |= ((pEventCfg->Polarity << 24U) & HRTIM_EECR1_EE5POL);
  6953. hrtim_eecr1 |= ((pEventCfg->Sensitivity << 24U) & HRTIM_EECR1_EE5SNS);
  6954. /* Update the HRTIM registers (all bitfields but EE5FAST bit) */
  6955. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6956. /* Update the HRTIM registers (EE5FAST bit) */
  6957. hrtim_eecr1 |= ((pEventCfg->FastMode << 24U) & HRTIM_EECR1_EE5FAST);
  6958. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  6959. break;
  6960. }
  6961. case HRTIM_EVENT_6:
  6962. {
  6963. hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS);
  6964. hrtim_eecr2 |= (pEventCfg->Source & HRTIM_EECR2_EE6SRC);
  6965. hrtim_eecr2 |= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL);
  6966. hrtim_eecr2 |= (pEventCfg->Sensitivity & HRTIM_EECR2_EE6SNS);
  6967. hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
  6968. hrtim_eecr3 |= (pEventCfg->Filter & HRTIM_EECR3_EE6F);
  6969. /* Update the HRTIM registers */
  6970. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6971. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6972. break;
  6973. }
  6974. case HRTIM_EVENT_7:
  6975. {
  6976. hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS);
  6977. hrtim_eecr2 |= ((pEventCfg->Source << 6U) & HRTIM_EECR2_EE7SRC);
  6978. hrtim_eecr2 |= ((pEventCfg->Polarity << 6U) & HRTIM_EECR2_EE7POL);
  6979. hrtim_eecr2 |= ((pEventCfg->Sensitivity << 6U) & HRTIM_EECR2_EE7SNS);
  6980. hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
  6981. hrtim_eecr3 |= ((pEventCfg->Filter << 6U) & HRTIM_EECR3_EE7F);
  6982. /* Update the HRTIM registers */
  6983. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6984. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6985. break;
  6986. }
  6987. case HRTIM_EVENT_8:
  6988. {
  6989. hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS);
  6990. hrtim_eecr2 |= ((pEventCfg->Source << 12U) & HRTIM_EECR2_EE8SRC);
  6991. hrtim_eecr2 |= ((pEventCfg->Polarity << 12U) & HRTIM_EECR2_EE8POL);
  6992. hrtim_eecr2 |= ((pEventCfg->Sensitivity << 12U) & HRTIM_EECR2_EE8SNS);
  6993. hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
  6994. hrtim_eecr3 |= ((pEventCfg->Filter << 12U) & HRTIM_EECR3_EE8F );
  6995. /* Update the HRTIM registers */
  6996. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6997. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6998. break;
  6999. }
  7000. case HRTIM_EVENT_9:
  7001. {
  7002. hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS);
  7003. hrtim_eecr2 |= ((pEventCfg->Source << 18U) & HRTIM_EECR2_EE9SRC);
  7004. hrtim_eecr2 |= ((pEventCfg->Polarity << 18U) & HRTIM_EECR2_EE9POL);
  7005. hrtim_eecr2 |= ((pEventCfg->Sensitivity << 18U) & HRTIM_EECR2_EE9SNS);
  7006. hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
  7007. hrtim_eecr3 |= ((pEventCfg->Filter << 18U) & HRTIM_EECR3_EE9F);
  7008. /* Update the HRTIM registers */
  7009. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  7010. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  7011. break;
  7012. }
  7013. case HRTIM_EVENT_10:
  7014. {
  7015. hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS);
  7016. hrtim_eecr2 |= ((pEventCfg->Source << 24U) & HRTIM_EECR2_EE10SRC);
  7017. hrtim_eecr2 |= ((pEventCfg->Polarity << 24U) & HRTIM_EECR2_EE10POL);
  7018. hrtim_eecr2 |= ((pEventCfg->Sensitivity << 24U) & HRTIM_EECR2_EE10SNS);
  7019. hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
  7020. hrtim_eecr3 |= ((pEventCfg->Filter << 24U) & HRTIM_EECR3_EE10F);
  7021. /* Update the HRTIM registers */
  7022. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  7023. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  7024. break;
  7025. }
  7026. default:
  7027. break;
  7028. }
  7029. }
  7030. /**
  7031. * @brief Configure the timer counter reset
  7032. * @param hhrtim pointer to HAL HRTIM handle
  7033. * @param TimerIdx Timer index
  7034. * @param Event Event channel identifier
  7035. * @retval None
  7036. */
  7037. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  7038. uint32_t TimerIdx,
  7039. uint32_t Event)
  7040. {
  7041. switch (Event)
  7042. {
  7043. case HRTIM_EVENT_1:
  7044. {
  7045. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
  7046. break;
  7047. }
  7048. case HRTIM_EVENT_2:
  7049. {
  7050. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
  7051. break;
  7052. }
  7053. case HRTIM_EVENT_3:
  7054. {
  7055. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
  7056. break;
  7057. }
  7058. case HRTIM_EVENT_4:
  7059. {
  7060. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
  7061. break;
  7062. }
  7063. case HRTIM_EVENT_5:
  7064. {
  7065. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
  7066. break;
  7067. }
  7068. case HRTIM_EVENT_6:
  7069. {
  7070. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
  7071. break;
  7072. }
  7073. case HRTIM_EVENT_7:
  7074. {
  7075. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
  7076. break;
  7077. }
  7078. case HRTIM_EVENT_8:
  7079. {
  7080. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
  7081. break;
  7082. }
  7083. case HRTIM_EVENT_9:
  7084. {
  7085. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
  7086. break;
  7087. }
  7088. case HRTIM_EVENT_10:
  7089. {
  7090. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
  7091. break;
  7092. }
  7093. default:
  7094. break;
  7095. }
  7096. }
  7097. /**
  7098. * @brief Return the interrupt to enable or disable according to the
  7099. * OC mode.
  7100. * @param hhrtim pointer to HAL HRTIM handle
  7101. * @param TimerIdx Timer index
  7102. * @param OCChannel Timer output
  7103. * This parameter can be one of the following values:
  7104. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  7105. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  7106. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  7107. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  7108. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  7109. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  7110. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  7111. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  7112. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  7113. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  7114. * @retval Interrupt to enable or disable
  7115. */
  7116. static uint32_t HRTIM_GetITFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
  7117. uint32_t TimerIdx,
  7118. uint32_t OCChannel)
  7119. {
  7120. uint32_t hrtim_set;
  7121. uint32_t hrtim_reset;
  7122. uint32_t interrupt = 0U;
  7123. switch (OCChannel)
  7124. {
  7125. case HRTIM_OUTPUT_TA1:
  7126. case HRTIM_OUTPUT_TB1:
  7127. case HRTIM_OUTPUT_TC1:
  7128. case HRTIM_OUTPUT_TD1:
  7129. case HRTIM_OUTPUT_TE1:
  7130. {
  7131. /* Retreives actual OC mode and set interrupt accordingly */
  7132. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  7133. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  7134. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  7135. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
  7136. {
  7137. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  7138. interrupt = HRTIM_TIM_IT_CMP1;
  7139. }
  7140. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  7141. (hrtim_reset == 0U))
  7142. {
  7143. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  7144. interrupt = HRTIM_TIM_IT_SET1;
  7145. }
  7146. else if ((hrtim_set == 0U) &&
  7147. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
  7148. {
  7149. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  7150. interrupt = HRTIM_TIM_IT_RST1;
  7151. }
  7152. else
  7153. {
  7154. /* nothing to do */
  7155. }
  7156. break;
  7157. }
  7158. case HRTIM_OUTPUT_TA2:
  7159. case HRTIM_OUTPUT_TB2:
  7160. case HRTIM_OUTPUT_TC2:
  7161. case HRTIM_OUTPUT_TD2:
  7162. case HRTIM_OUTPUT_TE2:
  7163. {
  7164. /* Retreives actual OC mode and set interrupt accordingly */
  7165. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  7166. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  7167. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  7168. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
  7169. {
  7170. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  7171. interrupt = HRTIM_TIM_IT_CMP2;
  7172. }
  7173. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  7174. (hrtim_reset == 0U))
  7175. {
  7176. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  7177. interrupt = HRTIM_TIM_IT_SET2;
  7178. }
  7179. else if ((hrtim_set == 0U) &&
  7180. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
  7181. {
  7182. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  7183. interrupt = HRTIM_TIM_IT_RST2;
  7184. }
  7185. else
  7186. {
  7187. /* nothing to do */
  7188. }
  7189. break;
  7190. }
  7191. default:
  7192. break;
  7193. }
  7194. return interrupt;
  7195. }
  7196. /**
  7197. * @brief Return the DMA request to enable or disable according to the
  7198. * OC mode.
  7199. * @param hhrtim pointer to HAL HRTIM handle
  7200. * @param TimerIdx Timer index
  7201. * @param OCChannel Timer output
  7202. * This parameter can be one of the following values:
  7203. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  7204. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  7205. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  7206. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  7207. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  7208. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  7209. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  7210. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  7211. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  7212. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  7213. * @retval DMA request to enable or disable
  7214. */
  7215. static uint32_t HRTIM_GetDMAFromOCMode(const HRTIM_HandleTypeDef * hhrtim,
  7216. uint32_t TimerIdx,
  7217. uint32_t OCChannel)
  7218. {
  7219. uint32_t hrtim_set;
  7220. uint32_t hrtim_reset;
  7221. uint32_t dma_request = 0U;
  7222. switch (OCChannel)
  7223. {
  7224. case HRTIM_OUTPUT_TA1:
  7225. case HRTIM_OUTPUT_TB1:
  7226. case HRTIM_OUTPUT_TC1:
  7227. case HRTIM_OUTPUT_TD1:
  7228. case HRTIM_OUTPUT_TE1:
  7229. {
  7230. /* Retreives actual OC mode and set dma_request accordingly */
  7231. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  7232. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  7233. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  7234. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
  7235. {
  7236. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  7237. dma_request = HRTIM_TIM_DMA_CMP1;
  7238. }
  7239. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  7240. (hrtim_reset == 0U))
  7241. {
  7242. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  7243. dma_request = HRTIM_TIM_DMA_SET1;
  7244. }
  7245. else if ((hrtim_set == 0U) &&
  7246. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP1) == HRTIM_OUTPUTRESET_TIMCMP1))
  7247. {
  7248. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  7249. dma_request = HRTIM_TIM_DMA_RST1;
  7250. }
  7251. else
  7252. {
  7253. /* nothing to do */
  7254. }
  7255. break;
  7256. }
  7257. case HRTIM_OUTPUT_TA2:
  7258. case HRTIM_OUTPUT_TB2:
  7259. case HRTIM_OUTPUT_TC2:
  7260. case HRTIM_OUTPUT_TD2:
  7261. case HRTIM_OUTPUT_TE2:
  7262. {
  7263. /* Retreives actual OC mode and set dma_request accordingly */
  7264. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  7265. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  7266. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  7267. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
  7268. {
  7269. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  7270. dma_request = HRTIM_TIM_DMA_CMP2;
  7271. }
  7272. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  7273. (hrtim_reset == 0U))
  7274. {
  7275. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  7276. dma_request = HRTIM_TIM_DMA_SET2;
  7277. }
  7278. else if ((hrtim_set == 0U) &&
  7279. ((hrtim_reset & HRTIM_OUTPUTRESET_TIMCMP2) == HRTIM_OUTPUTRESET_TIMCMP2))
  7280. {
  7281. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  7282. dma_request = HRTIM_TIM_DMA_RST2;
  7283. }
  7284. else
  7285. {
  7286. /* nothing to do */
  7287. }
  7288. break;
  7289. }
  7290. default:
  7291. break;
  7292. }
  7293. return dma_request;
  7294. }
  7295. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(const HRTIM_HandleTypeDef * hhrtim,
  7296. uint32_t TimerIdx)
  7297. {
  7298. DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
  7299. switch (TimerIdx)
  7300. {
  7301. case HRTIM_TIMERINDEX_MASTER:
  7302. {
  7303. hdma = hhrtim->hdmaMaster;
  7304. break;
  7305. }
  7306. case HRTIM_TIMERINDEX_TIMER_A:
  7307. {
  7308. hdma = hhrtim->hdmaTimerA;
  7309. break;
  7310. }
  7311. case HRTIM_TIMERINDEX_TIMER_B:
  7312. {
  7313. hdma = hhrtim->hdmaTimerB;
  7314. break;
  7315. }
  7316. case HRTIM_TIMERINDEX_TIMER_C:
  7317. {
  7318. hdma = hhrtim->hdmaTimerC;
  7319. break;
  7320. }
  7321. case HRTIM_TIMERINDEX_TIMER_D:
  7322. {
  7323. hdma = hhrtim->hdmaTimerD;
  7324. break;
  7325. }
  7326. case HRTIM_TIMERINDEX_TIMER_E:
  7327. {
  7328. hdma = hhrtim->hdmaTimerE;
  7329. break;
  7330. }
  7331. default:
  7332. break;
  7333. }
  7334. return hdma;
  7335. }
  7336. static uint32_t GetTimerIdxFromDMAHandle(const HRTIM_HandleTypeDef * hhrtim,
  7337. const DMA_HandleTypeDef * hdma)
  7338. {
  7339. uint32_t timed_idx = 0xFFFFFFFFU;
  7340. if (hdma == hhrtim->hdmaMaster)
  7341. {
  7342. timed_idx = HRTIM_TIMERINDEX_MASTER;
  7343. }
  7344. else if (hdma == hhrtim->hdmaTimerA)
  7345. {
  7346. timed_idx = HRTIM_TIMERINDEX_TIMER_A;
  7347. }
  7348. else if (hdma == hhrtim->hdmaTimerB)
  7349. {
  7350. timed_idx = HRTIM_TIMERINDEX_TIMER_B;
  7351. }
  7352. else if (hdma == hhrtim->hdmaTimerC)
  7353. {
  7354. timed_idx = HRTIM_TIMERINDEX_TIMER_C;
  7355. }
  7356. else if (hdma == hhrtim->hdmaTimerD)
  7357. {
  7358. timed_idx = HRTIM_TIMERINDEX_TIMER_D;
  7359. }
  7360. else if (hdma == hhrtim->hdmaTimerE)
  7361. {
  7362. timed_idx = HRTIM_TIMERINDEX_TIMER_E;
  7363. }
  7364. else
  7365. {
  7366. /* nothing to do */
  7367. }
  7368. return timed_idx;
  7369. }
  7370. /**
  7371. * @brief Force an immediate transfer from the preload to the active
  7372. * registers.
  7373. * @param hhrtim pointer to HAL HRTIM handle
  7374. * @param TimerIdx Timer index
  7375. * @retval None
  7376. */
  7377. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  7378. uint32_t TimerIdx)
  7379. {
  7380. switch (TimerIdx)
  7381. {
  7382. case HRTIM_TIMERINDEX_MASTER:
  7383. {
  7384. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU;
  7385. break;
  7386. }
  7387. case HRTIM_TIMERINDEX_TIMER_A:
  7388. {
  7389. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU;
  7390. break;
  7391. }
  7392. case HRTIM_TIMERINDEX_TIMER_B:
  7393. {
  7394. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU;
  7395. break;
  7396. }
  7397. case HRTIM_TIMERINDEX_TIMER_C:
  7398. {
  7399. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU;
  7400. break;
  7401. }
  7402. case HRTIM_TIMERINDEX_TIMER_D:
  7403. {
  7404. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU;
  7405. break;
  7406. }
  7407. case HRTIM_TIMERINDEX_TIMER_E:
  7408. {
  7409. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU;
  7410. break;
  7411. }
  7412. default:
  7413. break;
  7414. }
  7415. }
  7416. /**
  7417. * @brief HRTIM interrupts service routine
  7418. * @param hhrtim pointer to HAL HRTIM handle
  7419. * @retval None
  7420. */
  7421. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim)
  7422. {
  7423. uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR);
  7424. uint32_t ierits = READ_REG(hhrtim->Instance->sCommonRegs.IER);
  7425. /* Fault 1 event */
  7426. if((uint32_t)(isrflags & HRTIM_FLAG_FLT1) != (uint32_t)RESET)
  7427. {
  7428. if((uint32_t)(ierits & HRTIM_IT_FLT1) != (uint32_t)RESET)
  7429. {
  7430. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1);
  7431. /* Invoke Fault 1 event callback */
  7432. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7433. hhrtim->Fault1Callback(hhrtim);
  7434. #else
  7435. HAL_HRTIM_Fault1Callback(hhrtim);
  7436. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7437. }
  7438. }
  7439. /* Fault 2 event */
  7440. if((uint32_t)(isrflags & HRTIM_FLAG_FLT2) != (uint32_t)RESET)
  7441. {
  7442. if((uint32_t)(ierits & HRTIM_IT_FLT2) != (uint32_t)RESET)
  7443. {
  7444. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2);
  7445. /* Invoke Fault 2 event callback */
  7446. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7447. hhrtim->Fault2Callback(hhrtim);
  7448. #else
  7449. HAL_HRTIM_Fault2Callback(hhrtim);
  7450. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7451. }
  7452. }
  7453. /* Fault 3 event */
  7454. if((uint32_t)(isrflags & HRTIM_FLAG_FLT3) != (uint32_t)RESET)
  7455. {
  7456. if((uint32_t)(ierits & HRTIM_IT_FLT3) != (uint32_t)RESET)
  7457. {
  7458. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3);
  7459. /* Invoke Fault 3 event callback */
  7460. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7461. hhrtim->Fault3Callback(hhrtim);
  7462. #else
  7463. HAL_HRTIM_Fault3Callback(hhrtim);
  7464. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7465. }
  7466. }
  7467. /* Fault 4 event */
  7468. if((uint32_t)(isrflags & HRTIM_FLAG_FLT4) != (uint32_t)RESET)
  7469. {
  7470. if((uint32_t)(ierits & HRTIM_IT_FLT4) != (uint32_t)RESET)
  7471. {
  7472. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4);
  7473. /* Invoke Fault 4 event callback */
  7474. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7475. hhrtim->Fault4Callback(hhrtim);
  7476. #else
  7477. HAL_HRTIM_Fault4Callback(hhrtim);
  7478. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7479. }
  7480. }
  7481. /* Fault 5 event */
  7482. if((uint32_t)(isrflags & HRTIM_FLAG_FLT5) != (uint32_t)RESET)
  7483. {
  7484. if((uint32_t)(ierits & HRTIM_IT_FLT5) != (uint32_t)RESET)
  7485. {
  7486. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5);
  7487. /* Invoke Fault 5 event callback */
  7488. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7489. hhrtim->Fault5Callback(hhrtim);
  7490. #else
  7491. HAL_HRTIM_Fault5Callback(hhrtim);
  7492. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7493. }
  7494. }
  7495. /* System fault event */
  7496. if((uint32_t)(isrflags & HRTIM_FLAG_SYSFLT) != (uint32_t)RESET)
  7497. {
  7498. if((uint32_t)(ierits & HRTIM_IT_SYSFLT) != (uint32_t)RESET)
  7499. {
  7500. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT);
  7501. /* Invoke System fault event callback */
  7502. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7503. hhrtim->SystemFaultCallback(hhrtim);
  7504. #else
  7505. HAL_HRTIM_SystemFaultCallback(hhrtim);
  7506. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7507. }
  7508. }
  7509. }
  7510. /**
  7511. * @brief Master timer interrupts service routine
  7512. * @param hhrtim pointer to HAL HRTIM handle
  7513. * @retval None
  7514. */
  7515. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim)
  7516. {
  7517. uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR);
  7518. uint32_t ierits = READ_REG(hhrtim->Instance->sCommonRegs.IER);
  7519. uint32_t misrflags = READ_REG(hhrtim->Instance->sMasterRegs.MISR);
  7520. uint32_t mdierits = READ_REG(hhrtim->Instance->sMasterRegs.MDIER);
  7521. /* DLL calibration ready event */
  7522. if((uint32_t)(isrflags & HRTIM_FLAG_DLLRDY) != (uint32_t)RESET)
  7523. {
  7524. if((uint32_t)(ierits & HRTIM_IT_DLLRDY) != (uint32_t)RESET)
  7525. {
  7526. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_DLLRDY);
  7527. /* Set HRTIM State */
  7528. hhrtim->State = HAL_HRTIM_STATE_READY;
  7529. /* Process unlocked */
  7530. __HAL_UNLOCK(hhrtim);
  7531. /* Invoke System fault event callback */
  7532. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7533. hhrtim->DLLCalibrationReadyCallback(hhrtim);
  7534. #else
  7535. HAL_HRTIM_DLLCalibrationReadyCallback(hhrtim);
  7536. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7537. }
  7538. }
  7539. /* Burst mode period event */
  7540. if((uint32_t)(isrflags & HRTIM_FLAG_BMPER) != (uint32_t)RESET)
  7541. {
  7542. if((uint32_t)(ierits & HRTIM_IT_BMPER) != (uint32_t)RESET)
  7543. {
  7544. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER);
  7545. /* Invoke Burst mode period event callback */
  7546. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7547. hhrtim->BurstModePeriodCallback(hhrtim);
  7548. #else
  7549. HAL_HRTIM_BurstModePeriodCallback(hhrtim);
  7550. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7551. }
  7552. }
  7553. /* Master timer compare 1 event */
  7554. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP1) != (uint32_t)RESET)
  7555. {
  7556. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP1) != (uint32_t)RESET)
  7557. {
  7558. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1);
  7559. /* Invoke compare 1 event callback */
  7560. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7561. hhrtim->Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7562. #else
  7563. HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7564. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7565. }
  7566. }
  7567. /* Master timer compare 2 event */
  7568. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP2) != (uint32_t)RESET)
  7569. {
  7570. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP2) != (uint32_t)RESET)
  7571. {
  7572. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2);
  7573. /* Invoke compare 2 event callback */
  7574. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7575. hhrtim->Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7576. #else
  7577. HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7578. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7579. }
  7580. }
  7581. /* Master timer compare 3 event */
  7582. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP3) != (uint32_t)RESET)
  7583. {
  7584. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP3) != (uint32_t)RESET)
  7585. {
  7586. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3);
  7587. /* Invoke compare 3 event callback */
  7588. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7589. hhrtim->Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7590. #else
  7591. HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7592. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7593. }
  7594. }
  7595. /* Master timer compare 4 event */
  7596. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MCMP4) != (uint32_t)RESET)
  7597. {
  7598. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MCMP4) != (uint32_t)RESET)
  7599. {
  7600. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4);
  7601. /* Invoke compare 4 event callback */
  7602. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7603. hhrtim->Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7604. #else
  7605. HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7606. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7607. }
  7608. }
  7609. /* Master timer repetition event */
  7610. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MREP) != (uint32_t)RESET)
  7611. {
  7612. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MREP) != (uint32_t)RESET)
  7613. {
  7614. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  7615. /* Invoke repetition event callback */
  7616. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7617. hhrtim->RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7618. #else
  7619. HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7620. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7621. }
  7622. }
  7623. /* Synchronization input event */
  7624. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_SYNC) != (uint32_t)RESET)
  7625. {
  7626. if((uint32_t)(mdierits & HRTIM_MASTER_IT_SYNC) != (uint32_t)RESET)
  7627. {
  7628. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC);
  7629. /* Invoke synchronization event callback */
  7630. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7631. hhrtim->SynchronizationEventCallback(hhrtim);
  7632. #else
  7633. HAL_HRTIM_SynchronizationEventCallback(hhrtim);
  7634. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7635. }
  7636. }
  7637. /* Master timer registers update event */
  7638. if((uint32_t)(misrflags & HRTIM_MASTER_FLAG_MUPD) != (uint32_t)RESET)
  7639. {
  7640. if((uint32_t)(mdierits & HRTIM_MASTER_IT_MUPD) != (uint32_t)RESET)
  7641. {
  7642. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD);
  7643. /* Invoke registers update event callback */
  7644. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7645. hhrtim->RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7646. #else
  7647. HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  7648. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7649. }
  7650. }
  7651. }
  7652. /**
  7653. * @brief Timer interrupts service routine
  7654. * @param hhrtim pointer to HAL HRTIM handle
  7655. * @param TimerIdx Timer index
  7656. * This parameter can be one of the following values:
  7657. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  7658. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  7659. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  7660. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  7661. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  7662. * @retval None
  7663. */
  7664. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  7665. uint32_t TimerIdx)
  7666. {
  7667. uint32_t tisrflags = READ_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR);
  7668. uint32_t tdierits = READ_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxDIER);
  7669. /* Timer compare 1 event */
  7670. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP1) != (uint32_t)RESET)
  7671. {
  7672. if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP1) != (uint32_t)RESET)
  7673. {
  7674. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  7675. /* Invoke compare 1 event callback */
  7676. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7677. hhrtim->Compare1EventCallback(hhrtim, TimerIdx);
  7678. #else
  7679. HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx);
  7680. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7681. }
  7682. }
  7683. /* Timer compare 2 event */
  7684. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP2) != (uint32_t)RESET)
  7685. {
  7686. if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP2) != (uint32_t)RESET)
  7687. {
  7688. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  7689. /* Invoke compare 2 event callback */
  7690. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7691. hhrtim->Compare2EventCallback(hhrtim, TimerIdx);
  7692. #else
  7693. HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx);
  7694. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7695. }
  7696. }
  7697. /* Timer compare 3 event */
  7698. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP3) != (uint32_t)RESET)
  7699. {
  7700. if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP3) != (uint32_t)RESET)
  7701. {
  7702. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3);
  7703. /* Invoke compare 3 event callback */
  7704. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7705. hhrtim->Compare3EventCallback(hhrtim, TimerIdx);
  7706. #else
  7707. HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx);
  7708. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7709. }
  7710. }
  7711. /* Timer compare 4 event */
  7712. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CMP4) != (uint32_t)RESET)
  7713. {
  7714. if((uint32_t)(tdierits & HRTIM_TIM_IT_CMP4) != (uint32_t)RESET)
  7715. {
  7716. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4);
  7717. /* Invoke compare 4 event callback */
  7718. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7719. hhrtim->Compare4EventCallback(hhrtim, TimerIdx);
  7720. #else
  7721. HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx);
  7722. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7723. }
  7724. }
  7725. /* Timer repetition event */
  7726. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_REP) != (uint32_t)RESET)
  7727. {
  7728. if((uint32_t)(tdierits & HRTIM_TIM_IT_REP) != (uint32_t)RESET)
  7729. {
  7730. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  7731. /* Invoke repetition event callback */
  7732. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7733. hhrtim->RepetitionEventCallback(hhrtim, TimerIdx);
  7734. #else
  7735. HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx);
  7736. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7737. }
  7738. }
  7739. /* Timer registers update event */
  7740. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_UPD) != (uint32_t)RESET)
  7741. {
  7742. if((uint32_t)(tdierits & HRTIM_TIM_IT_UPD) != (uint32_t)RESET)
  7743. {
  7744. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD);
  7745. /* Invoke registers update event callback */
  7746. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7747. hhrtim->RegistersUpdateCallback(hhrtim, TimerIdx);
  7748. #else
  7749. HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx);
  7750. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7751. }
  7752. }
  7753. /* Timer capture 1 event */
  7754. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CPT1) != (uint32_t)RESET)
  7755. {
  7756. if((uint32_t)(tdierits & HRTIM_TIM_IT_CPT1) != (uint32_t)RESET)
  7757. {
  7758. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  7759. /* Invoke capture 1 event callback */
  7760. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7761. hhrtim->Capture1EventCallback(hhrtim, TimerIdx);
  7762. #else
  7763. HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx);
  7764. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7765. }
  7766. }
  7767. /* Timer capture 2 event */
  7768. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_CPT2) != (uint32_t)RESET)
  7769. {
  7770. if((uint32_t)(tdierits & HRTIM_TIM_IT_CPT2) != (uint32_t)RESET)
  7771. {
  7772. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  7773. /* Invoke capture 2 event callback */
  7774. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7775. hhrtim->Capture2EventCallback(hhrtim, TimerIdx);
  7776. #else
  7777. HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx);
  7778. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7779. }
  7780. }
  7781. /* Timer output 1 set event */
  7782. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_SET1) != (uint32_t)RESET)
  7783. {
  7784. if((uint32_t)(tdierits & HRTIM_TIM_IT_SET1) != (uint32_t)RESET)
  7785. {
  7786. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1);
  7787. /* Invoke output 1 set event callback */
  7788. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7789. hhrtim->Output1SetCallback(hhrtim, TimerIdx);
  7790. #else
  7791. HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx);
  7792. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7793. }
  7794. }
  7795. /* Timer output 1 reset event */
  7796. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST1) != (uint32_t)RESET)
  7797. {
  7798. if((uint32_t)(tdierits & HRTIM_TIM_IT_RST1) != (uint32_t)RESET)
  7799. {
  7800. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1);
  7801. /* Invoke output 1 reset event callback */
  7802. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7803. hhrtim->Output1ResetCallback(hhrtim, TimerIdx);
  7804. #else
  7805. HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx);
  7806. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7807. }
  7808. }
  7809. /* Timer output 2 set event */
  7810. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_SET2) != (uint32_t)RESET)
  7811. {
  7812. if((uint32_t)(tdierits & HRTIM_TIM_IT_SET2) != (uint32_t)RESET)
  7813. {
  7814. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2);
  7815. /* Invoke output 2 set event callback */
  7816. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7817. hhrtim->Output2SetCallback(hhrtim, TimerIdx);
  7818. #else
  7819. HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx);
  7820. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7821. }
  7822. }
  7823. /* Timer output 2 reset event */
  7824. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST2) != (uint32_t)RESET)
  7825. {
  7826. if((uint32_t)(tdierits & HRTIM_TIM_IT_RST2) != (uint32_t)RESET)
  7827. {
  7828. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2);
  7829. /* Invoke output 2 reset event callback */
  7830. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7831. hhrtim->Output2ResetCallback(hhrtim, TimerIdx);
  7832. #else
  7833. HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx);
  7834. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7835. }
  7836. }
  7837. /* Timer reset event */
  7838. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_RST) != (uint32_t)RESET)
  7839. {
  7840. if((uint32_t)(tdierits & HRTIM_TIM_IT_RST) != (uint32_t)RESET)
  7841. {
  7842. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST);
  7843. /* Invoke timer reset callback */
  7844. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7845. hhrtim->CounterResetCallback(hhrtim, TimerIdx);
  7846. #else
  7847. HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx);
  7848. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7849. }
  7850. }
  7851. /* Delayed protection event */
  7852. if((uint32_t)(tisrflags & HRTIM_TIM_FLAG_DLYPRT) != (uint32_t)RESET)
  7853. {
  7854. if((uint32_t)(tdierits & HRTIM_TIM_IT_DLYPRT) != (uint32_t)RESET)
  7855. {
  7856. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT);
  7857. /* Invoke delayed protection callback */
  7858. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7859. hhrtim->DelayedProtectionCallback(hhrtim, TimerIdx);
  7860. #else
  7861. HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx);
  7862. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7863. }
  7864. }
  7865. }
  7866. /**
  7867. * @brief DMA callback invoked upon master timer related DMA request completion
  7868. * @param hdma pointer to DMA handle.
  7869. * @retval None
  7870. */
  7871. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma)
  7872. {
  7873. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7874. if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != (uint32_t)RESET)
  7875. {
  7876. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7877. hrtim->Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7878. #else
  7879. HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7880. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7881. }
  7882. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != (uint32_t)RESET)
  7883. {
  7884. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7885. hrtim->Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7886. #else
  7887. HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7888. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7889. }
  7890. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != (uint32_t)RESET)
  7891. {
  7892. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7893. hrtim->Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7894. #else
  7895. HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7896. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7897. }
  7898. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != (uint32_t)RESET)
  7899. {
  7900. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7901. hrtim->Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7902. #else
  7903. HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7904. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7905. }
  7906. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != (uint32_t)RESET)
  7907. {
  7908. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7909. hrtim->SynchronizationEventCallback(hrtim);
  7910. #else
  7911. HAL_HRTIM_SynchronizationEventCallback(hrtim);
  7912. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7913. }
  7914. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != (uint32_t)RESET)
  7915. {
  7916. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7917. hrtim->RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7918. #else
  7919. HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7920. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7921. }
  7922. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != (uint32_t)RESET)
  7923. {
  7924. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7925. hrtim->RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7926. #else
  7927. HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  7928. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7929. }
  7930. else
  7931. {
  7932. /* nothing to do */
  7933. }
  7934. }
  7935. /**
  7936. * @brief DMA callback invoked upon timer A..E related DMA request completion
  7937. * @param hdma pointer to DMA handle.
  7938. * @retval None
  7939. */
  7940. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma)
  7941. {
  7942. uint8_t timer_idx;
  7943. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  7944. timer_idx = (uint8_t)GetTimerIdxFromDMAHandle(hrtim, hdma);
  7945. if ( !IS_HRTIM_TIMING_UNIT(timer_idx) ) {return;}
  7946. if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != (uint32_t)RESET)
  7947. {
  7948. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7949. hrtim->Compare1EventCallback(hrtim, timer_idx);
  7950. #else
  7951. HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx);
  7952. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7953. }
  7954. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != (uint32_t)RESET)
  7955. {
  7956. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7957. hrtim->Compare2EventCallback(hrtim, timer_idx);
  7958. #else
  7959. HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx);
  7960. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7961. }
  7962. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != (uint32_t)RESET)
  7963. {
  7964. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7965. hrtim->Compare3EventCallback(hrtim, timer_idx);
  7966. #else
  7967. HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx);
  7968. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7969. }
  7970. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != (uint32_t)RESET)
  7971. {
  7972. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7973. hrtim->Compare4EventCallback(hrtim, timer_idx);
  7974. #else
  7975. HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx);
  7976. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7977. }
  7978. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != (uint32_t)RESET)
  7979. {
  7980. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7981. hrtim->RegistersUpdateCallback(hrtim, timer_idx);
  7982. #else
  7983. HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx);
  7984. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7985. }
  7986. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != (uint32_t)RESET)
  7987. {
  7988. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7989. hrtim->Capture1EventCallback(hrtim, timer_idx);
  7990. #else
  7991. HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx);
  7992. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  7993. }
  7994. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != (uint32_t)RESET)
  7995. {
  7996. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  7997. hrtim->Capture2EventCallback(hrtim, timer_idx);
  7998. #else
  7999. HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx);
  8000. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8001. }
  8002. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != (uint32_t)RESET)
  8003. {
  8004. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8005. hrtim->Output1SetCallback(hrtim, timer_idx);
  8006. #else
  8007. HAL_HRTIM_Output1SetCallback(hrtim, timer_idx);
  8008. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8009. }
  8010. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != (uint32_t)RESET)
  8011. {
  8012. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8013. hrtim->Output1ResetCallback(hrtim, timer_idx);
  8014. #else
  8015. HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx);
  8016. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8017. }
  8018. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != (uint32_t)RESET)
  8019. {
  8020. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8021. hrtim->Output2SetCallback(hrtim, timer_idx);
  8022. #else
  8023. HAL_HRTIM_Output2SetCallback(hrtim, timer_idx);
  8024. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8025. }
  8026. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != (uint32_t)RESET)
  8027. {
  8028. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8029. hrtim->Output2ResetCallback(hrtim, timer_idx);
  8030. #else
  8031. HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx);
  8032. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8033. }
  8034. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != (uint32_t)RESET)
  8035. {
  8036. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8037. hrtim->CounterResetCallback(hrtim, timer_idx);
  8038. #else
  8039. HAL_HRTIM_CounterResetCallback(hrtim, timer_idx);
  8040. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8041. }
  8042. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != (uint32_t)RESET)
  8043. {
  8044. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8045. hrtim->DelayedProtectionCallback(hrtim, timer_idx);
  8046. #else
  8047. HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx);
  8048. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8049. }
  8050. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != (uint32_t)RESET)
  8051. {
  8052. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8053. hrtim->RepetitionEventCallback(hrtim, timer_idx);
  8054. #else
  8055. HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx);
  8056. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8057. }
  8058. else
  8059. {
  8060. /* nothing to do */
  8061. }
  8062. }
  8063. /**
  8064. * @brief DMA error callback
  8065. * @param hdma pointer to DMA handle.
  8066. * @retval None
  8067. */
  8068. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma)
  8069. {
  8070. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  8071. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8072. hrtim->ErrorCallback(hrtim);
  8073. #else
  8074. HAL_HRTIM_ErrorCallback(hrtim);
  8075. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8076. }
  8077. /**
  8078. * @brief DMA callback invoked upon burst DMA transfer completion
  8079. * @param hdma pointer to DMA handle.
  8080. * @retval None
  8081. */
  8082. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
  8083. {
  8084. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  8085. #if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)
  8086. hrtim->BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hrtim, hdma));
  8087. #else
  8088. HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hrtim, hdma));
  8089. #endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */
  8090. }
  8091. /**
  8092. * @}
  8093. */
  8094. /**
  8095. * @}
  8096. */
  8097. #endif /* HRTIM1 */
  8098. #endif /* HAL_HRTIM_MODULE_ENABLED */
  8099. /**
  8100. * @}
  8101. */