stm32f3xx_hal_pcd.h 33 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32F3xx_HAL_PCD_H
  20. #define STM32F3xx_HAL_PCD_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f3xx_ll_usb.h"
  26. #if defined (USB)
  27. /** @addtogroup STM32F3xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PCD
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PCD_Exported_Types PCD Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PCD State structure definition
  39. */
  40. typedef enum
  41. {
  42. HAL_PCD_STATE_RESET = 0x00,
  43. HAL_PCD_STATE_READY = 0x01,
  44. HAL_PCD_STATE_ERROR = 0x02,
  45. HAL_PCD_STATE_BUSY = 0x03,
  46. HAL_PCD_STATE_TIMEOUT = 0x04
  47. } PCD_StateTypeDef;
  48. /* Device LPM suspend state */
  49. typedef enum
  50. {
  51. LPM_L0 = 0x00, /* on */
  52. LPM_L1 = 0x01, /* LPM L1 sleep */
  53. LPM_L2 = 0x02, /* suspend */
  54. LPM_L3 = 0x03, /* off */
  55. } PCD_LPM_StateTypeDef;
  56. typedef enum
  57. {
  58. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  59. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  60. } PCD_LPM_MsgTypeDef;
  61. typedef enum
  62. {
  63. PCD_BCD_ERROR = 0xFF,
  64. PCD_BCD_CONTACT_DETECTION = 0xFE,
  65. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  66. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  67. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  68. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  69. } PCD_BCD_MsgTypeDef;
  70. typedef USB_TypeDef PCD_TypeDef;
  71. typedef USB_CfgTypeDef PCD_InitTypeDef;
  72. typedef USB_EPTypeDef PCD_EPTypeDef;
  73. /**
  74. * @brief PCD Handle Structure definition
  75. */
  76. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  77. typedef struct __PCD_HandleTypeDef
  78. #else
  79. typedef struct
  80. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  81. {
  82. PCD_TypeDef *Instance; /*!< Register base address */
  83. PCD_InitTypeDef Init; /*!< PCD required parameters */
  84. __IO uint8_t USB_Address; /*!< USB Address */
  85. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  86. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  87. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  88. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  89. __IO uint32_t ErrorCode; /*!< PCD Error code */
  90. uint32_t Setup[12]; /*!< Setup packet buffer */
  91. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  92. uint32_t BESL;
  93. void *pData; /*!< Pointer to upper stack Handler */
  94. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  95. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  96. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  97. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  98. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  99. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  100. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  101. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  102. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  103. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  104. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  105. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  106. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  107. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  108. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  109. } PCD_HandleTypeDef;
  110. /**
  111. * @}
  112. */
  113. /* Include PCD HAL Extended module */
  114. #include "stm32f3xx_hal_pcd_ex.h"
  115. /* Exported constants --------------------------------------------------------*/
  116. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  117. * @{
  118. */
  119. /** @defgroup PCD_Speed PCD Speed
  120. * @{
  121. */
  122. #define PCD_SPEED_FULL USBD_FS_SPEED
  123. /**
  124. * @}
  125. */
  126. /** @defgroup PCD_PHY_Module PCD PHY Module
  127. * @{
  128. */
  129. #define PCD_PHY_ULPI 1U
  130. #define PCD_PHY_EMBEDDED 2U
  131. #define PCD_PHY_UTMI 3U
  132. /**
  133. * @}
  134. */
  135. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  136. * @brief PCD Error Code definition
  137. * @{
  138. */
  139. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  140. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  141. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  142. /**
  143. * @}
  144. */
  145. /**
  146. * @}
  147. */
  148. /* Exported macros -----------------------------------------------------------*/
  149. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  150. * @brief macros to handle interrupts and specific clock configurations
  151. * @{
  152. */
  153. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  154. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  155. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
  156. ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  157. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
  158. &= (uint16_t)(~(__INTERRUPT__)))
  159. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  160. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  161. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  162. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  163. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  164. do { \
  165. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  166. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  167. } while(0U)
  168. /**
  169. * @}
  170. */
  171. /* Exported functions --------------------------------------------------------*/
  172. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  173. * @{
  174. */
  175. /* Initialization/de-initialization functions ********************************/
  176. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  177. * @{
  178. */
  179. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  180. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  181. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  182. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  183. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  184. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  185. * @brief HAL USB OTG PCD Callback ID enumeration definition
  186. * @{
  187. */
  188. typedef enum
  189. {
  190. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  191. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  192. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  193. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  194. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  195. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  196. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  197. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  198. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  199. } HAL_PCD_CallbackIDTypeDef;
  200. /**
  201. * @}
  202. */
  203. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  204. * @brief HAL USB OTG PCD Callback pointer definition
  205. * @{
  206. */
  207. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  208. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  209. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  210. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  211. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  212. /**
  213. * @}
  214. */
  215. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
  216. pPCD_CallbackTypeDef pCallback);
  217. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  218. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
  219. pPCD_DataOutStageCallbackTypeDef pCallback);
  220. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  221. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
  222. pPCD_DataInStageCallbackTypeDef pCallback);
  223. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  224. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
  225. pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  226. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  227. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
  228. pPCD_IsoInIncpltCallbackTypeDef pCallback);
  229. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  230. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  231. /**
  232. * @}
  233. */
  234. /* I/O operation functions ***************************************************/
  235. /* Non-Blocking mode: Interrupt */
  236. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  237. * @{
  238. */
  239. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  240. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  241. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  242. void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
  243. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  244. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  245. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  250. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  251. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  252. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  253. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  254. /**
  255. * @}
  256. */
  257. /* Peripheral Control functions **********************************************/
  258. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  259. * @{
  260. */
  261. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  262. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  263. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  264. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  265. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  266. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  267. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  268. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  269. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  271. HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  272. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  273. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  274. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
  275. /**
  276. * @}
  277. */
  278. /* Peripheral State functions ************************************************/
  279. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  280. * @{
  281. */
  282. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
  283. /**
  284. * @}
  285. */
  286. /**
  287. * @}
  288. */
  289. /* Private constants ---------------------------------------------------------*/
  290. /** @defgroup PCD_Private_Constants PCD Private Constants
  291. * @{
  292. */
  293. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  294. * @{
  295. */
  296. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  297. /**
  298. * @}
  299. */
  300. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  301. * @{
  302. */
  303. #define PCD_EP0MPS_64 EP_MPS_64
  304. #define PCD_EP0MPS_32 EP_MPS_32
  305. #define PCD_EP0MPS_16 EP_MPS_16
  306. #define PCD_EP0MPS_08 EP_MPS_8
  307. /**
  308. * @}
  309. */
  310. /** @defgroup PCD_ENDP PCD ENDP
  311. * @{
  312. */
  313. #define PCD_ENDP0 0U
  314. #define PCD_ENDP1 1U
  315. #define PCD_ENDP2 2U
  316. #define PCD_ENDP3 3U
  317. #define PCD_ENDP4 4U
  318. #define PCD_ENDP5 5U
  319. #define PCD_ENDP6 6U
  320. #define PCD_ENDP7 7U
  321. /**
  322. * @}
  323. */
  324. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  325. * @{
  326. */
  327. #define PCD_SNG_BUF 0U
  328. #define PCD_DBL_BUF 1U
  329. /**
  330. * @}
  331. */
  332. /**
  333. * @}
  334. */
  335. /* Private macros ------------------------------------------------------------*/
  336. /** @defgroup PCD_Private_Macros PCD Private Macros
  337. * @{
  338. */
  339. /******************** Bit definition for USB_COUNTn_RX register *************/
  340. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  341. #define USB_CNTRX_BLSIZE (0x1U << 15)
  342. /* SetENDPOINT */
  343. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
  344. (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  345. /* GetENDPOINT */
  346. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  347. /**
  348. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  349. * @param USBx USB peripheral instance register address.
  350. * @param bEpNum Endpoint Number.
  351. * @param wType Endpoint Type.
  352. * @retval None
  353. */
  354. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
  355. (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  356. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  357. /**
  358. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  359. * @param USBx USB peripheral instance register address.
  360. * @param bEpNum Endpoint Number.
  361. * @retval Endpoint Type
  362. */
  363. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  364. /**
  365. * @brief free buffer used from the application realizing it to the line
  366. * toggles bit SW_BUF in the double buffered endpoint register
  367. * @param USBx USB device.
  368. * @param bEpNum, bDir
  369. * @retval None
  370. */
  371. #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
  372. do { \
  373. if ((bDir) == 0U) \
  374. { \
  375. /* OUT double buffered endpoint */ \
  376. PCD_TX_DTOG((USBx), (bEpNum)); \
  377. } \
  378. else if ((bDir) == 1U) \
  379. { \
  380. /* IN double buffered endpoint */ \
  381. PCD_RX_DTOG((USBx), (bEpNum)); \
  382. } \
  383. } while(0)
  384. /**
  385. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  386. * @param USBx USB peripheral instance register address.
  387. * @param bEpNum Endpoint Number.
  388. * @param wState new state
  389. * @retval None
  390. */
  391. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
  392. do { \
  393. uint16_t _wRegVal; \
  394. \
  395. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  396. /* toggle first bit ? */ \
  397. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  398. { \
  399. _wRegVal ^= USB_EPTX_DTOG1; \
  400. } \
  401. /* toggle second bit ? */ \
  402. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  403. { \
  404. _wRegVal ^= USB_EPTX_DTOG2; \
  405. } \
  406. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  407. } while(0) /* PCD_SET_EP_TX_STATUS */
  408. /**
  409. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  410. * @param USBx USB peripheral instance register address.
  411. * @param bEpNum Endpoint Number.
  412. * @param wState new state
  413. * @retval None
  414. */
  415. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
  416. do { \
  417. uint16_t _wRegVal; \
  418. \
  419. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  420. /* toggle first bit ? */ \
  421. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  422. { \
  423. _wRegVal ^= USB_EPRX_DTOG1; \
  424. } \
  425. /* toggle second bit ? */ \
  426. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  427. { \
  428. _wRegVal ^= USB_EPRX_DTOG2; \
  429. } \
  430. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  431. } while(0) /* PCD_SET_EP_RX_STATUS */
  432. /**
  433. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  434. * @param USBx USB peripheral instance register address.
  435. * @param bEpNum Endpoint Number.
  436. * @param wStaterx new state.
  437. * @param wStatetx new state.
  438. * @retval None
  439. */
  440. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
  441. do { \
  442. uint16_t _wRegVal; \
  443. \
  444. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  445. /* toggle first bit ? */ \
  446. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  447. { \
  448. _wRegVal ^= USB_EPRX_DTOG1; \
  449. } \
  450. /* toggle second bit ? */ \
  451. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  452. { \
  453. _wRegVal ^= USB_EPRX_DTOG2; \
  454. } \
  455. /* toggle first bit ? */ \
  456. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  457. { \
  458. _wRegVal ^= USB_EPTX_DTOG1; \
  459. } \
  460. /* toggle second bit ? */ \
  461. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  462. { \
  463. _wRegVal ^= USB_EPTX_DTOG2; \
  464. } \
  465. \
  466. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  467. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  468. /**
  469. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  470. * /STAT_RX[1:0])
  471. * @param USBx USB peripheral instance register address.
  472. * @param bEpNum Endpoint Number.
  473. * @retval status
  474. */
  475. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  476. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  477. /**
  478. * @brief sets directly the VALID tx/rx-status into the endpoint register
  479. * @param USBx USB peripheral instance register address.
  480. * @param bEpNum Endpoint Number.
  481. * @retval None
  482. */
  483. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  484. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  485. /**
  486. * @brief checks stall condition in an endpoint.
  487. * @param USBx USB peripheral instance register address.
  488. * @param bEpNum Endpoint Number.
  489. * @retval TRUE = endpoint in stall condition.
  490. */
  491. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
  492. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
  493. /**
  494. * @brief set & clear EP_KIND bit.
  495. * @param USBx USB peripheral instance register address.
  496. * @param bEpNum Endpoint Number.
  497. * @retval None
  498. */
  499. #define PCD_SET_EP_KIND(USBx, bEpNum) \
  500. do { \
  501. uint16_t _wRegVal; \
  502. \
  503. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  504. \
  505. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  506. } while(0) /* PCD_SET_EP_KIND */
  507. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
  508. do { \
  509. uint16_t _wRegVal; \
  510. \
  511. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  512. \
  513. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  514. } while(0) /* PCD_CLEAR_EP_KIND */
  515. /**
  516. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  517. * @param USBx USB peripheral instance register address.
  518. * @param bEpNum Endpoint Number.
  519. * @retval None
  520. */
  521. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  522. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  523. /**
  524. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  525. * @param USBx USB peripheral instance register address.
  526. * @param bEpNum Endpoint Number.
  527. * @retval None
  528. */
  529. #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  530. #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  531. /**
  532. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  533. * @param USBx USB peripheral instance register address.
  534. * @param bEpNum Endpoint Number.
  535. * @retval None
  536. */
  537. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
  538. do { \
  539. uint16_t _wRegVal; \
  540. \
  541. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  542. \
  543. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  544. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  545. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
  546. do { \
  547. uint16_t _wRegVal; \
  548. \
  549. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  550. \
  551. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  552. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  553. /**
  554. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  555. * @param USBx USB peripheral instance register address.
  556. * @param bEpNum Endpoint Number.
  557. * @retval None
  558. */
  559. #define PCD_RX_DTOG(USBx, bEpNum) \
  560. do { \
  561. uint16_t _wEPVal; \
  562. \
  563. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  564. \
  565. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  566. } while(0) /* PCD_RX_DTOG */
  567. #define PCD_TX_DTOG(USBx, bEpNum) \
  568. do { \
  569. uint16_t _wEPVal; \
  570. \
  571. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  572. \
  573. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  574. } while(0) /* PCD_TX_DTOG */
  575. /**
  576. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  577. * @param USBx USB peripheral instance register address.
  578. * @param bEpNum Endpoint Number.
  579. * @retval None
  580. */
  581. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
  582. do { \
  583. uint16_t _wRegVal; \
  584. \
  585. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  586. \
  587. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  588. { \
  589. PCD_RX_DTOG((USBx), (bEpNum)); \
  590. } \
  591. } while(0) /* PCD_CLEAR_RX_DTOG */
  592. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
  593. do { \
  594. uint16_t _wRegVal; \
  595. \
  596. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  597. \
  598. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  599. { \
  600. PCD_TX_DTOG((USBx), (bEpNum)); \
  601. } \
  602. } while(0) /* PCD_CLEAR_TX_DTOG */
  603. /**
  604. * @brief Sets address in an endpoint register.
  605. * @param USBx USB peripheral instance register address.
  606. * @param bEpNum Endpoint Number.
  607. * @param bAddr Address.
  608. * @retval None
  609. */
  610. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
  611. do { \
  612. uint16_t _wRegVal; \
  613. \
  614. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  615. \
  616. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  617. } while(0) /* PCD_SET_EP_ADDRESS */
  618. /**
  619. * @brief Gets address in an endpoint register.
  620. * @param USBx USB peripheral instance register address.
  621. * @param bEpNum Endpoint Number.
  622. * @retval None
  623. */
  624. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  625. #define PCD_EP_TX_CNT(USBx, bEpNum) \
  626. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  627. ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  628. #define PCD_EP_RX_CNT(USBx, bEpNum) \
  629. ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
  630. ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  631. /**
  632. * @brief sets address of the tx/rx buffer.
  633. * @param USBx USB peripheral instance register address.
  634. * @param bEpNum Endpoint Number.
  635. * @param wAddr address to be set (must be word aligned).
  636. * @retval None
  637. */
  638. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
  639. do { \
  640. __IO uint16_t *_wRegVal; \
  641. uint32_t _wRegBase = (uint32_t)USBx; \
  642. \
  643. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  644. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  645. *_wRegVal = ((wAddr) >> 1) << 1; \
  646. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  647. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
  648. do { \
  649. __IO uint16_t *_wRegVal; \
  650. uint32_t _wRegBase = (uint32_t)USBx; \
  651. \
  652. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  653. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  654. *_wRegVal = ((wAddr) >> 1) << 1; \
  655. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  656. /**
  657. * @brief Gets address of the tx/rx buffer.
  658. * @param USBx USB peripheral instance register address.
  659. * @param bEpNum Endpoint Number.
  660. * @retval address of the buffer.
  661. */
  662. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  663. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  664. /**
  665. * @brief Sets counter of rx buffer with no. of blocks.
  666. * @param pdwReg Register pointer
  667. * @param wCount Counter.
  668. * @param wNBlocks no. of Blocks.
  669. * @retval None
  670. */
  671. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
  672. do { \
  673. (wNBlocks) = (wCount) >> 5; \
  674. if (((wCount) & 0x1fU) == 0U) \
  675. { \
  676. (wNBlocks)--; \
  677. } \
  678. *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  679. } while(0) /* PCD_CALC_BLK32 */
  680. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
  681. do { \
  682. (wNBlocks) = (wCount) >> 1; \
  683. if (((wCount) & 0x1U) != 0U) \
  684. { \
  685. (wNBlocks)++; \
  686. } \
  687. *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
  688. } while(0) /* PCD_CALC_BLK2 */
  689. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
  690. do { \
  691. uint32_t wNBlocks; \
  692. \
  693. *(pdwReg) &= 0x3FFU; \
  694. \
  695. if ((wCount) == 0U) \
  696. { \
  697. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  698. } \
  699. else if ((wCount) <= 62U) \
  700. { \
  701. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  702. } \
  703. else \
  704. { \
  705. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  706. } \
  707. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  708. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
  709. do { \
  710. uint32_t _wRegBase = (uint32_t)(USBx); \
  711. __IO uint16_t *pdwReg; \
  712. \
  713. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  714. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  715. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  716. } while(0)
  717. /**
  718. * @brief sets counter for the tx/rx buffer.
  719. * @param USBx USB peripheral instance register address.
  720. * @param bEpNum Endpoint Number.
  721. * @param wCount Counter value.
  722. * @retval None
  723. */
  724. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
  725. do { \
  726. uint32_t _wRegBase = (uint32_t)(USBx); \
  727. __IO uint16_t *_wRegVal; \
  728. \
  729. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  730. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  731. *_wRegVal = (uint16_t)(wCount); \
  732. } while(0)
  733. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
  734. do { \
  735. uint32_t _wRegBase = (uint32_t)(USBx); \
  736. __IO uint16_t *_wRegVal; \
  737. \
  738. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  739. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  740. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  741. } while(0)
  742. /**
  743. * @brief gets counter of the tx buffer.
  744. * @param USBx USB peripheral instance register address.
  745. * @param bEpNum Endpoint Number.
  746. * @retval Counter value
  747. */
  748. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  749. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  750. /**
  751. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  752. * @param USBx USB peripheral instance register address.
  753. * @param bEpNum Endpoint Number.
  754. * @param wBuf0Addr buffer 0 address.
  755. * @retval Counter value
  756. */
  757. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
  758. do { \
  759. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  760. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  761. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
  762. do { \
  763. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  764. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  765. /**
  766. * @brief Sets addresses in a double buffer endpoint.
  767. * @param USBx USB peripheral instance register address.
  768. * @param bEpNum Endpoint Number.
  769. * @param wBuf0Addr: buffer 0 address.
  770. * @param wBuf1Addr = buffer 1 address.
  771. * @retval None
  772. */
  773. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
  774. do { \
  775. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  776. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  777. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  778. /**
  779. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  780. * @param USBx USB peripheral instance register address.
  781. * @param bEpNum Endpoint Number.
  782. * @retval None
  783. */
  784. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  785. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  786. /**
  787. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  788. * @param USBx USB peripheral instance register address.
  789. * @param bEpNum Endpoint Number.
  790. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  791. * EP_DBUF_IN = IN
  792. * @param wCount: Counter value
  793. * @retval None
  794. */
  795. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
  796. do { \
  797. if ((bDir) == 0U) \
  798. /* OUT endpoint */ \
  799. { \
  800. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  801. } \
  802. else \
  803. { \
  804. if ((bDir) == 1U) \
  805. { \
  806. /* IN endpoint */ \
  807. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  808. } \
  809. } \
  810. } while(0) /* SetEPDblBuf0Count*/
  811. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
  812. do { \
  813. uint32_t _wBase = (uint32_t)(USBx); \
  814. __IO uint16_t *_wEPRegVal; \
  815. \
  816. if ((bDir) == 0U) \
  817. { \
  818. /* OUT endpoint */ \
  819. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  820. } \
  821. else \
  822. { \
  823. if ((bDir) == 1U) \
  824. { \
  825. /* IN endpoint */ \
  826. _wBase += (uint32_t)(USBx)->BTABLE; \
  827. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  828. *_wEPRegVal = (uint16_t)(wCount); \
  829. } \
  830. } \
  831. } while(0) /* SetEPDblBuf1Count */
  832. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
  833. do { \
  834. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  835. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  836. } while(0) /* PCD_SET_EP_DBUF_CNT */
  837. /**
  838. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  839. * @param USBx USB peripheral instance register address.
  840. * @param bEpNum Endpoint Number.
  841. * @retval None
  842. */
  843. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  844. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  845. /**
  846. * @}
  847. */
  848. /**
  849. * @}
  850. */
  851. /**
  852. * @}
  853. */
  854. #endif /* defined (USB) */
  855. #ifdef __cplusplus
  856. }
  857. #endif
  858. #endif /* STM32F3xx_HAL_PCD_H */