ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 2 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_rcc.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_RCC_DeInit,"ax",%progbits 20 .align 1 21 .p2align 2,,3 22 .global HAL_RCC_DeInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_RCC_DeInit: 28 .LFB130: 29 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c" 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @file stm32f3xx_hal_rcc.c 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG. 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses; 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** are assigned to be used for debug purpose. 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to: 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (if the application needs higher frequency/performance) 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 2 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, I2S, TIM, USB FS) 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC Limitations ##### 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from/to registers. 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Workarounds: 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @attention 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * Copyright (c) 2016 STMicroelectronics. 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * All rights reserved. 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the root directory of this software component. 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #include "stm32f3xx_hal.h" 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @addtogroup STM32F3xx_HAL_Driver 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC RCC 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Bits position in in the CFGR register */ 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_HPRE_BITNUMBER POSITION_VAL(RCC_CFGR_HPRE) 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE1_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE1) 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE2_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE2) 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 3 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/ 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initialization and Configuration functions 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and APB2). 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the PLL as System clock source. 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals. 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source. 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring different output clocks: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 4 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 72 MHz) 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz) 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the ADC peripherals (up to 72 M 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The fourth output may be used to generate the clock for the TIM peripherals (144 MHz) 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin). 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HSE and PLL. 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the peripherals mapped on these buses. You can use 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock. 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock. 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock. 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output. 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK) 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency. 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock. 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For the STM32F3xx devices, the maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly. 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prefetch is disabled. 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings: 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) | 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |2WS(3CPU cycle)| 48 < SYSCLK <= 72 | 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 5 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSI ON and used as system clock source 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSE and PLL OFF 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - CSS and MCO1 OFF 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - All interrupts disabled 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function does not modify the configuration of the 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - Peripheral clocks 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 30 .loc 1 215 1 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0; 34 .loc 1 216 3 view .LVU1 35 .LVL0: 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSION bit */ 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION); 36 .loc 1 219 3 view .LVU2 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0; 37 .loc 1 215 1 is_stmt 0 view .LVU3 38 0000 70B5 push {r4, r5, r6, lr} 39 .LCFI0: 40 .cfi_def_cfa_offset 16 41 .cfi_offset 4, -16 42 .cfi_offset 5, -12 43 .cfi_offset 6, -8 44 .cfi_offset 14, -4 45 .loc 1 219 3 view .LVU4 46 0002 334C ldr r4, .L15 47 0004 2368 ldr r3, [r4] 48 0006 43F00103 orr r3, r3, #1 49 000a 2360 str r3, [r4] 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSIRDY bit is set before writing default HSITRIM value */ 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 50 .loc 1 223 3 is_stmt 1 view .LVU5 51 .loc 1 223 15 is_stmt 0 view .LVU6 52 000c FFF7FEFF bl HAL_GetTick 53 .LVL1: 54 0010 0546 mov r5, r0 55 .LVL2: 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 56 .loc 1 226 3 is_stmt 1 view .LVU7 57 .loc 1 226 8 is_stmt 0 view .LVU8 58 0012 04E0 b .L2 59 .LVL3: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 6 60 .L4: 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 61 .loc 1 228 9 view .LVU9 62 0014 FFF7FEFF bl HAL_GetTick 63 .LVL4: 64 .loc 1 228 23 view .LVU10 65 0018 401B subs r0, r0, r5 66 .loc 1 228 7 view .LVU11 67 001a 0228 cmp r0, #2 68 001c 28D8 bhi .L6 69 .L2: 70 .loc 1 228 5 is_stmt 1 view .LVU12 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 71 .loc 1 226 8 view .LVU13 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 72 .loc 1 226 9 is_stmt 0 view .LVU14 73 001e 2368 ldr r3, [r4] 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 74 .loc 1 226 8 view .LVU15 75 0020 9B07 lsls r3, r3, #30 76 0022 F7D5 bpl .L4 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSITRIM default value */ 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, RCC_CR_HSITRIM_4); 77 .loc 1 235 3 is_stmt 1 view .LVU16 78 0024 2368 ldr r3, [r4] 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */ 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO 79 .loc 1 238 3 is_stmt 0 view .LVU17 80 0026 2B4A ldr r2, .L15+4 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSI selected as system clock source */ 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till system clock source is ready */ 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) 81 .loc 1 245 9 view .LVU18 82 0028 294D ldr r5, .L15 83 .LVL5: 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 84 .loc 1 235 3 view .LVU19 85 002a 23F0F803 bic r3, r3, #248 86 002e 43F08003 orr r3, r3, #128 87 0032 2360 str r3, [r4] 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 88 .loc 1 238 3 is_stmt 1 view .LVU20 89 0034 6368 ldr r3, [r4, #4] 90 0036 1A40 ands r2, r2, r3 91 0038 6260 str r2, [r4, #4] 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 7 92 .loc 1 242 3 view .LVU21 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 93 .loc 1 242 15 is_stmt 0 view .LVU22 94 003a FFF7FEFF bl HAL_GetTick 95 .LVL6: 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 96 .loc 1 247 7 view .LVU23 97 003e 41F28836 movw r6, #5000 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 98 .loc 1 242 15 view .LVU24 99 0042 0446 mov r4, r0 100 .LVL7: 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 101 .loc 1 245 3 is_stmt 1 view .LVU25 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 102 .loc 1 245 8 is_stmt 0 view .LVU26 103 0044 04E0 b .L5 104 .LVL8: 105 .L7: 106 .loc 1 247 9 view .LVU27 107 0046 FFF7FEFF bl HAL_GetTick 108 .LVL9: 109 .loc 1 247 23 view .LVU28 110 004a 001B subs r0, r0, r4 111 .loc 1 247 7 view .LVU29 112 004c B042 cmp r0, r6 113 004e 0FD8 bhi .L6 114 .L5: 115 .loc 1 247 5 is_stmt 1 view .LVU30 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 116 .loc 1 245 8 view .LVU31 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 117 .loc 1 245 9 is_stmt 0 view .LVU32 118 0050 6B68 ldr r3, [r5, #4] 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 119 .loc 1 245 8 view .LVU33 120 0052 13F00C0F tst r3, #12 121 0056 F6D1 bne .L7 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; 122 .loc 1 254 3 is_stmt 1 view .LVU34 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clock settings */ 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_InitTick(uwTickPrio) != HAL_OK) 123 .loc 1 257 6 is_stmt 0 view .LVU35 124 0058 1F49 ldr r1, .L15+8 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 125 .loc 1 254 19 view .LVU36 126 005a 204B ldr r3, .L15+12 127 005c 204A ldr r2, .L15+16 128 .loc 1 257 6 view .LVU37 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 8 129 005e 0868 ldr r0, [r1] 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 130 .loc 1 254 19 view .LVU38 131 0060 1A60 str r2, [r3] 132 .loc 1 257 3 is_stmt 1 view .LVU39 133 .loc 1 257 6 is_stmt 0 view .LVU40 134 0062 FFF7FEFF bl HAL_InitTick 135 .LVL10: 136 .loc 1 257 5 view .LVU41 137 0066 0446 mov r4, r0 138 .LVL11: 139 .loc 1 257 5 view .LVU42 140 0068 28B1 cbz r0, .L14 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 141 .loc 1 259 12 view .LVU43 142 006a 0124 movs r4, #1 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEBYP bit */ 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure PLLRDY is reset */ 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR register */ 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR2 register */ 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR3 register */ 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear all interrupt flags */ 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable all interrupts */ 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset all CSR flags */ 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 143 .loc 1 298 1 view .LVU44 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 9 144 006c 2046 mov r0, r4 145 006e 70BD pop {r4, r5, r6, pc} 146 .L6: 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 147 .loc 1 230 14 view .LVU45 148 0070 0324 movs r4, #3 149 .L3: 150 .loc 1 298 1 view .LVU46 151 0072 2046 mov r0, r4 152 0074 70BD pop {r4, r5, r6, pc} 153 .L14: 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 154 .loc 1 263 3 is_stmt 1 view .LVU47 155 0076 2B68 ldr r3, [r5] 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 156 .loc 1 271 9 is_stmt 0 view .LVU48 157 0078 154E ldr r6, .L15 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 158 .loc 1 263 3 view .LVU49 159 007a 23F08473 bic r3, r3, #17301504 160 007e 23F48033 bic r3, r3, #65536 161 0082 2B60 str r3, [r5] 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 162 .loc 1 266 3 is_stmt 1 view .LVU50 163 0084 2B68 ldr r3, [r5] 164 0086 23F48023 bic r3, r3, #262144 165 008a 2B60 str r3, [r5] 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 166 .loc 1 270 3 view .LVU51 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 167 .loc 1 270 15 is_stmt 0 view .LVU52 168 008c FFF7FEFF bl HAL_GetTick 169 .LVL12: 170 0090 0546 mov r5, r0 171 .LVL13: 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 172 .loc 1 271 3 is_stmt 1 view .LVU53 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 173 .loc 1 271 8 is_stmt 0 view .LVU54 174 0092 04E0 b .L8 175 .LVL14: 176 .L9: 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 177 .loc 1 273 9 view .LVU55 178 0094 FFF7FEFF bl HAL_GetTick 179 .LVL15: 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 180 .loc 1 273 23 view .LVU56 181 0098 431B subs r3, r0, r5 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 182 .loc 1 273 7 view .LVU57 183 009a 022B cmp r3, #2 184 009c E8D8 bhi .L6 185 .L8: 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 186 .loc 1 273 5 is_stmt 1 view .LVU58 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 10 187 .loc 1 271 8 view .LVU59 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 188 .loc 1 271 9 is_stmt 0 view .LVU60 189 009e 3368 ldr r3, [r6] 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 190 .loc 1 271 8 view .LVU61 191 00a0 13F00073 ands r3, r3, #33554432 192 00a4 F6D1 bne .L9 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 193 .loc 1 280 3 is_stmt 1 view .LVU62 194 00a6 7360 str r3, [r6, #4] 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 195 .loc 1 283 3 view .LVU63 196 00a8 F362 str r3, [r6, #44] 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 197 .loc 1 286 3 view .LVU64 198 00aa 3363 str r3, [r6, #48] 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 199 .loc 1 289 3 view .LVU65 200 00ac B168 ldr r1, [r6, #8] 201 00ae 41F41F01 orr r1, r1, #10420224 202 00b2 B160 str r1, [r6, #8] 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 203 .loc 1 292 3 view .LVU66 204 .LBB170: 205 .LBB171: 206 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 11 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 12 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 13 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 14 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 15 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 16 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 17 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 18 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 19 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 20 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 21 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 22 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 23 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 24 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 25 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 26 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 27 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 207 .loc 2 988 4 is_stmt 0 view .LVU67 208 00b4 4FF08072 mov r2, #16777216 209 .LBE171: 210 .LBE170: 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 211 .loc 1 292 3 view .LVU68 212 00b8 B360 str r3, [r6, #8] 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 213 .loc 1 295 3 is_stmt 1 view .LVU69 214 .LVL16: 215 .LBB173: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 28 216 .LBI170: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 217 .loc 2 981 31 view .LVU70 218 .LBB172: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 219 .loc 2 983 3 view .LVU71 220 .loc 2 988 4 view .LVU72 221 .syntax unified 222 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 223 00ba 92FAA2F2 rbit r2, r2 224 @ 0 "" 2 225 .LVL17: 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 226 .loc 2 1001 3 view .LVU73 227 .loc 2 1001 3 is_stmt 0 view .LVU74 228 .thumb 229 .syntax unified 230 .LBE172: 231 .LBE173: 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 232 .loc 1 295 3 view .LVU75 233 00be 094B ldr r3, .L15+20 234 00c0 B2FA82F2 clz r2, r2 235 00c4 1344 add r3, r3, r2 236 00c6 9B00 lsls r3, r3, #2 237 00c8 0122 movs r2, #1 238 00ca 1A60 str r2, [r3] 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 239 .loc 1 297 3 is_stmt 1 view .LVU76 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 240 .loc 1 297 10 is_stmt 0 view .LVU77 241 00cc D1E7 b .L3 242 .L16: 243 00ce 00BF .align 2 244 .L15: 245 00d0 00100240 .word 1073876992 246 00d4 0CC0FFF8 .word -117456884 247 00d8 00000000 .word uwTickPrio 248 00dc 00000000 .word SystemCoreClock 249 00e0 00127A00 .word 8000000 250 00e4 20819010 .word 277905696 251 .cfi_endproc 252 .LFE130: 254 .section .rodata.HAL_RCC_OscConfig.str1.4,"aMS",%progbits,1 255 .align 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 29 256 .LC0: 257 0000 44726976 .ascii "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc." 257 6572732F 257 53544D33 257 32463378 257 785F4841 258 0033 6300 .ascii "c\000" 259 .section .text.HAL_RCC_OscConfig,"ax",%progbits 260 .align 1 261 .p2align 2,,3 262 .global HAL_RCC_OscConfig 263 .syntax unified 264 .thumb 265 .thumb_func 267 HAL_RCC_OscConfig: 268 .LVL18: 269 .LFB131: 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC_OscInitTypeDef. 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 270 .loc 1 315 1 is_stmt 1 view -0 271 .cfi_startproc 272 @ args = 0, pretend = 0, frame = 8 273 @ frame_needed = 0, uses_anonymous_args = 0 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; 274 .loc 1 316 3 view .LVU79 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config; 275 .loc 1 317 3 view .LVU80 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config2; 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) 276 .loc 1 323 3 view .LVU81 277 .loc 1 323 5 is_stmt 0 view .LVU82 278 0000 0028 cmp r0, #0 279 0002 00F06383 beq .L158 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 30 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 280 .loc 1 329 3 is_stmt 1 view .LVU83 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; 281 .loc 1 315 1 is_stmt 0 view .LVU84 282 0006 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} 283 .LCFI1: 284 .cfi_def_cfa_offset 28 285 .cfi_offset 4, -28 286 .cfi_offset 5, -24 287 .cfi_offset 6, -20 288 .cfi_offset 7, -16 289 .cfi_offset 8, -12 290 .cfi_offset 9, -8 291 .cfi_offset 14, -4 292 .loc 1 329 3 view .LVU85 293 000a 0368 ldr r3, [r0] 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; 294 .loc 1 315 1 view .LVU86 295 000c 83B0 sub sp, sp, #12 296 .LCFI2: 297 .cfi_def_cfa_offset 40 298 000e 0446 mov r4, r0 299 .loc 1 329 3 view .LVU87 300 0010 002B cmp r3, #0 301 0012 00F0B180 beq .L51 302 .loc 1 329 3 discriminator 1 view .LVU88 303 0016 1907 lsls r1, r3, #28 304 0018 00F04A82 beq .L159 305 .LVL19: 306 .L21: 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 307 .loc 1 332 3 is_stmt 1 view .LVU89 308 .loc 1 332 5 is_stmt 0 view .LVU90 309 001c DA07 lsls r2, r3, #31 310 001e 48D5 bpl .L22 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 311 .loc 1 335 5 is_stmt 1 view .LVU91 312 0020 6368 ldr r3, [r4, #4] 313 0022 33F48032 bics r2, r3, #65536 314 0026 03D0 beq .L23 315 .loc 1 335 5 is_stmt 0 discriminator 2 view .LVU92 316 0028 B3F5A02F cmp r3, #327680 317 002c 40F02282 bne .L160 318 .L23: 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 319 .loc 1 338 5 is_stmt 1 view .LVU93 320 .loc 1 338 9 is_stmt 0 view .LVU94 321 0030 B44A ldr r2, .L176 322 0032 5368 ldr r3, [r2, #4] 323 0034 03F00C03 and r3, r3, #12 324 .loc 1 338 7 view .LVU95 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 31 325 0038 042B cmp r3, #4 326 003a 24D0 beq .L24 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ 327 .loc 1 339 13 view .LVU96 328 003c 5368 ldr r3, [r2, #4] 329 003e 03F00C03 and r3, r3, #12 330 .loc 1 339 8 view .LVU97 331 0042 082B cmp r3, #8 332 0044 1CD0 beq .L161 333 .L25: 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 334 .loc 1 349 7 is_stmt 1 view .LVU98 335 .loc 1 349 7 view .LVU99 336 0046 6368 ldr r3, [r4, #4] 337 0048 B3F5803F cmp r3, #65536 338 004c 00F0EC81 beq .L162 339 .loc 1 349 7 discriminator 2 view .LVU100 340 0050 002B cmp r3, #0 341 0052 00F03482 beq .L163 342 .loc 1 349 7 discriminator 5 view .LVU101 343 0056 B3F5A02F cmp r3, #327680 344 005a 00F0FA82 beq .L164 345 .loc 1 349 7 discriminator 8 view .LVU102 346 005e A94B ldr r3, .L176 347 0060 1A68 ldr r2, [r3] 348 0062 22F48032 bic r2, r2, #65536 349 0066 1A60 str r2, [r3] 350 .loc 1 349 7 discriminator 8 view .LVU103 351 0068 1A68 ldr r2, [r3] 352 006a 22F48022 bic r2, r2, #262144 353 006e 1A60 str r2, [r3] 354 .L34: 355 .loc 1 349 7 view .LVU104 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the HSE predivision factor --------------------------------*/ 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 356 .loc 1 353 7 view .LVU105 357 0070 A44A ldr r2, .L176 358 0072 A168 ldr r1, [r4, #8] 359 0074 D36A ldr r3, [r2, #44] 360 0076 23F00F03 bic r3, r3, #15 361 007a 0B43 orrs r3, r3, r1 362 007c D362 str r3, [r2, #44] 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE State */ 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 32 363 .loc 1 357 7 view .LVU106 364 007e DEE1 b .L30 365 .L161: 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 366 .loc 1 339 82 is_stmt 0 discriminator 1 view .LVU107 367 0080 5368 ldr r3, [r2, #4] 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 368 .loc 1 339 78 discriminator 1 view .LVU108 369 0082 DB03 lsls r3, r3, #15 370 0084 DFD5 bpl .L25 371 .L24: 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 372 .loc 1 341 7 is_stmt 1 view .LVU109 373 .LVL20: 374 .LBB174: 375 .LBI174: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 376 .loc 2 981 31 view .LVU110 377 .LBB175: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 378 .loc 2 983 3 view .LVU111 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 379 .loc 2 988 4 view .LVU112 380 0086 4FF40033 mov r3, #131072 381 .syntax unified 382 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 383 008a 93FAA3F2 rbit r2, r3 384 @ 0 "" 2 385 .LVL21: 386 .loc 2 1001 3 view .LVU113 387 .loc 2 1001 3 is_stmt 0 view .LVU114 388 .thumb 389 .syntax unified 390 .LBE175: 391 .LBE174: 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 392 .loc 1 341 11 view .LVU115 393 008e 9D4A ldr r2, .L176 394 0090 1168 ldr r1, [r2] 395 .LVL22: 396 .LBB176: 397 .LBI176: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 398 .loc 2 981 31 is_stmt 1 view .LVU116 399 .LBB177: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 400 .loc 2 983 3 view .LVU117 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 401 .loc 2 988 4 view .LVU118 402 .syntax unified 403 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 404 0092 93FAA3F3 rbit r3, r3 405 @ 0 "" 2 406 .LVL23: 407 .loc 2 1001 3 view .LVU119 408 .loc 2 1001 3 is_stmt 0 view .LVU120 409 .thumb ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 33 410 .syntax unified 411 .LBE177: 412 .LBE176: 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 413 .loc 1 341 11 view .LVU121 414 0096 B3FA83F3 clz r3, r3 415 009a 03F01F03 and r3, r3, #31 416 009e 0122 movs r2, #1 417 00a0 02FA03F3 lsl r3, r2, r3 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 418 .loc 1 341 9 view .LVU122 419 00a4 0B42 tst r3, r1 420 00a6 03D0 beq .L156 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 421 .loc 1 341 57 discriminator 13 view .LVU123 422 00a8 6368 ldr r3, [r4, #4] 423 00aa 002B cmp r3, #0 424 00ac 00F0E881 beq .L98 425 .L156: 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is ready */ 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is disabled */ 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 426 .loc 1 388 25 view .LVU124 427 00b0 2368 ldr r3, [r4] 428 .L22: 429 .loc 1 388 3 is_stmt 1 view .LVU125 430 .loc 1 388 5 is_stmt 0 view .LVU126 431 00b2 9F07 lsls r7, r3, #30 432 00b4 2FD5 bpl .L39 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 34 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 433 .loc 1 391 5 is_stmt 1 view .LVU127 434 00b6 2369 ldr r3, [r4, #16] 435 00b8 012B cmp r3, #1 436 00ba 00F26881 bhi .L165 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 437 .loc 1 392 5 view .LVU128 438 00be 6369 ldr r3, [r4, #20] 439 00c0 1F2B cmp r3, #31 440 00c2 00F26D81 bhi .L166 441 .L41: 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 442 .loc 1 395 5 view .LVU129 443 .loc 1 395 9 is_stmt 0 view .LVU130 444 00c6 8F4B ldr r3, .L176 445 00c8 5A68 ldr r2, [r3, #4] 446 .loc 1 395 7 view .LVU131 447 00ca 12F00C0F tst r2, #12 448 00ce 40F02181 bne .L167 449 .L42: 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ 450 .loc 1 399 7 is_stmt 1 view .LVU132 451 .LVL24: 452 .LBB178: 453 .LBI178: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 454 .loc 2 981 31 view .LVU133 455 .LBB179: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 456 .loc 2 983 3 view .LVU134 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 457 .loc 2 988 4 view .LVU135 458 00d2 0223 movs r3, #2 459 .syntax unified 460 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 461 00d4 93FAA3F2 rbit r2, r3 462 @ 0 "" 2 463 .LVL25: 464 .loc 2 1001 3 view .LVU136 465 .loc 2 1001 3 is_stmt 0 view .LVU137 466 .thumb 467 .syntax unified 468 .LBE179: 469 .LBE178: 470 .loc 1 399 11 view .LVU138 471 00d8 8A4A ldr r2, .L176 472 00da 1168 ldr r1, [r2] 473 .LVL26: 474 .LBB180: 475 .LBI180: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 35 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 476 .loc 2 981 31 is_stmt 1 view .LVU139 477 .LBB181: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 478 .loc 2 983 3 view .LVU140 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 479 .loc 2 988 4 view .LVU141 480 .syntax unified 481 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 482 00dc 93FAA3F3 rbit r3, r3 483 @ 0 "" 2 484 .LVL27: 485 .loc 2 1001 3 view .LVU142 486 .loc 2 1001 3 is_stmt 0 view .LVU143 487 .thumb 488 .syntax unified 489 .LBE181: 490 .LBE180: 491 .loc 1 399 11 view .LVU144 492 00e0 B3FA83F3 clz r3, r3 493 00e4 03F01F03 and r3, r3, #31 494 00e8 0122 movs r2, #1 495 00ea 02FA03F3 lsl r3, r2, r3 496 .loc 1 399 9 view .LVU145 497 00ee 0B42 tst r3, r1 498 00f0 03D0 beq .L44 499 .loc 1 399 57 discriminator 13 view .LVU146 500 00f2 2369 ldr r3, [r4, #16] 501 00f4 9342 cmp r3, r2 502 00f6 40F0C381 bne .L98 503 .L44: 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 504 .loc 1 407 9 is_stmt 1 view .LVU147 505 00fa 8248 ldr r0, .L176 506 .LBB182: 507 .LBB183: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 508 .loc 2 988 4 is_stmt 0 view .LVU148 509 00fc F822 movs r2, #248 510 .LBE183: 511 .LBE182: 512 .loc 1 407 9 view .LVU149 513 00fe 0168 ldr r1, [r0] 514 .LVL28: 515 .LBB185: 516 .LBI182: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 517 .loc 2 981 31 is_stmt 1 view .LVU150 518 .LBB184: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 36 519 .loc 2 983 3 view .LVU151 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 520 .loc 2 988 4 view .LVU152 521 .syntax unified 522 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 523 0100 92FAA2F2 rbit r2, r2 524 @ 0 "" 2 525 .LVL29: 526 .loc 2 1001 3 view .LVU153 527 .loc 2 1001 3 is_stmt 0 view .LVU154 528 .thumb 529 .syntax unified 530 .LBE184: 531 .LBE185: 532 .loc 1 407 9 view .LVU155 533 0104 6369 ldr r3, [r4, #20] 534 0106 B2FA82F2 clz r2, r2 535 010a 9340 lsls r3, r3, r2 536 010c 21F0F802 bic r2, r1, #248 537 0110 1343 orrs r3, r3, r2 538 0112 0360 str r3, [r0] 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI State */ 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is disabled */ 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 37 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 539 .loc 1 453 25 view .LVU156 540 0114 2368 ldr r3, [r4] 541 .L39: 542 .loc 1 453 3 is_stmt 1 view .LVU157 543 .loc 1 453 5 is_stmt 0 view .LVU158 544 0116 1D07 lsls r5, r3, #28 545 0118 2ED5 bpl .L51 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 546 .loc 1 456 5 is_stmt 1 view .LVU159 547 011a A369 ldr r3, [r4, #24] 548 011c 012B cmp r3, #1 549 011e 00F26C81 bhi .L168 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSI State */ 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 550 .loc 1 459 5 view .LVU160 551 .loc 1 459 7 is_stmt 0 view .LVU161 552 0122 002B cmp r3, #0 553 0124 40F04281 bne .L169 554 .L53: 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is ready */ 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 555 .loc 1 479 7 is_stmt 1 view .LVU162 556 .LVL30: 557 .LBB186: 558 .LBI186: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 38 559 .loc 2 981 31 view .LVU163 560 .LBB187: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 561 .loc 2 983 3 view .LVU164 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 562 .loc 2 988 4 view .LVU165 563 0128 0126 movs r6, #1 564 .syntax unified 565 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 566 012a 96FAA6F1 rbit r1, r6 567 @ 0 "" 2 568 .LVL31: 569 .loc 2 1001 3 view .LVU166 570 .loc 2 1001 3 is_stmt 0 view .LVU167 571 .thumb 572 .syntax unified 573 .LBE187: 574 .LBE186: 575 .loc 1 479 7 view .LVU168 576 012e 764A ldr r2, .L176+4 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is disabled */ 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 577 .loc 1 485 13 view .LVU169 578 0130 744F ldr r7, .L176 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 579 .loc 1 479 7 view .LVU170 580 0132 B1FA81F1 clz r1, r1 581 0136 0A44 add r2, r2, r1 582 0138 9200 lsls r2, r2, #2 583 .LBB188: 584 .LBB189: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 585 .loc 2 988 4 view .LVU171 586 013a 4FF00208 mov r8, #2 587 .LBE189: 588 .LBE188: 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 589 .loc 1 479 7 view .LVU172 590 013e 1360 str r3, [r2] 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 591 .loc 1 482 7 is_stmt 1 view .LVU173 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 592 .loc 1 482 19 is_stmt 0 view .LVU174 593 0140 FFF7FEFF bl HAL_GetTick 594 .LVL32: 595 0144 0546 mov r5, r0 596 .LVL33: 597 .loc 1 485 7 is_stmt 1 view .LVU175 598 .loc 1 485 12 is_stmt 0 view .LVU176 599 0146 05E0 b .L56 600 .LVL34: 601 .L57: 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 39 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 602 .loc 1 487 13 view .LVU177 603 0148 FFF7FEFF bl HAL_GetTick 604 .LVL35: 605 .loc 1 487 27 view .LVU178 606 014c 401B subs r0, r0, r5 607 .loc 1 487 11 view .LVU179 608 014e 0228 cmp r0, #2 609 0150 00F2AA81 bhi .L37 610 .L56: 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 611 .loc 1 485 12 is_stmt 1 view .LVU180 612 .LVL36: 613 .LBB191: 614 .LBI188: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 615 .loc 2 981 31 view .LVU181 616 .LBB190: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 617 .loc 2 983 3 view .LVU182 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 618 .loc 2 988 4 view .LVU183 619 .syntax unified 620 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 621 0154 98FAA8F3 rbit r3, r8 622 @ 0 "" 2 623 .LVL37: 624 .loc 2 1001 3 view .LVU184 625 .loc 2 1001 3 is_stmt 0 view .LVU185 626 .thumb 627 .syntax unified 628 .LBE190: 629 .LBE191: 630 .LBB192: 631 .LBI192: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 632 .loc 2 981 31 is_stmt 1 view .LVU186 633 .LBB193: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 634 .loc 2 983 3 view .LVU187 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 635 .loc 2 988 4 view .LVU188 636 .syntax unified 637 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 638 0158 98FAA8F3 rbit r3, r8 639 @ 0 "" 2 640 .LVL38: 641 .loc 2 1001 3 view .LVU189 642 .loc 2 1001 3 is_stmt 0 view .LVU190 643 .thumb 644 .syntax unified 645 .LBE193: 646 .LBE192: 647 .LBB194: 648 .LBI194: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 649 .loc 2 981 31 is_stmt 1 view .LVU191 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 40 650 .LBB195: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 651 .loc 2 983 3 view .LVU192 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 652 .loc 2 988 4 view .LVU193 653 .syntax unified 654 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 655 015c 98FAA8F3 rbit r3, r8 656 @ 0 "" 2 657 .LVL39: 658 .loc 2 1001 3 view .LVU194 659 .loc 2 1001 3 is_stmt 0 view .LVU195 660 .thumb 661 .syntax unified 662 .LBE195: 663 .LBE194: 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 664 .loc 1 485 13 view .LVU196 665 0160 7A6A ldr r2, [r7, #36] 666 .LVL40: 667 .LBB196: 668 .LBI196: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 669 .loc 2 981 31 is_stmt 1 view .LVU197 670 .LBB197: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 671 .loc 2 983 3 view .LVU198 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 672 .loc 2 988 4 view .LVU199 673 .syntax unified 674 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 675 0162 98FAA8F3 rbit r3, r8 676 @ 0 "" 2 677 .thumb 678 .syntax unified 679 .LBE197: 680 .LBE196: 681 .loc 1 487 9 view .LVU200 682 .LVL41: 683 .LBB199: 684 .LBB198: 685 .loc 2 1001 3 view .LVU201 686 .loc 2 1001 3 is_stmt 0 view .LVU202 687 .LBE198: 688 .LBE199: 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 689 .loc 1 485 13 view .LVU203 690 0166 B3FA83F3 clz r3, r3 691 016a 03F01F03 and r3, r3, #31 692 016e 06FA03F3 lsl r3, r6, r3 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 693 .loc 1 485 12 view .LVU204 694 0172 1342 tst r3, r2 695 0174 E8D1 bne .L57 696 .LVL42: 697 .L157: 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 41 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 698 .loc 1 495 25 view .LVU205 699 0176 2368 ldr r3, [r4] 700 .L51: 701 .loc 1 495 3 is_stmt 1 view .LVU206 702 .loc 1 495 5 is_stmt 0 view .LVU207 703 0178 5807 lsls r0, r3, #29 704 017a 36D5 bpl .L59 705 .LBB200: 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 706 .loc 1 497 5 is_stmt 1 view .LVU208 707 .LVL43: 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 708 .loc 1 500 5 view .LVU209 709 017c E368 ldr r3, [r4, #12] 710 017e 012B cmp r3, #1 711 0180 06D9 bls .L60 712 .loc 1 500 5 is_stmt 0 discriminator 1 view .LVU210 713 0182 052B cmp r3, #5 714 0184 04D0 beq .L60 715 .loc 1 500 5 discriminator 2 view .LVU211 716 0186 6148 ldr r0, .L176+8 717 0188 4FF4FA71 mov r1, #500 718 018c FFF7FEFF bl assert_failed 719 .LVL44: 720 .L60: 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 721 .loc 1 504 5 is_stmt 1 view .LVU212 722 .loc 1 504 8 is_stmt 0 view .LVU213 723 0190 5C4B ldr r3, .L176 724 0192 DA69 ldr r2, [r3, #28] 725 .loc 1 504 7 view .LVU214 726 0194 D100 lsls r1, r2, #3 727 0196 00F13A81 bmi .L96 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 728 .loc 1 506 7 is_stmt 1 view .LVU215 729 .LBB201: 730 .loc 1 506 7 view .LVU216 731 .loc 1 506 7 view .LVU217 732 019a DA69 ldr r2, [r3, #28] 733 019c 42F08052 orr r2, r2, #268435456 734 01a0 DA61 str r2, [r3, #28] 735 .loc 1 506 7 view .LVU218 736 01a2 DB69 ldr r3, [r3, #28] ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 42 737 01a4 03F08053 and r3, r3, #268435456 738 01a8 0193 str r3, [sp, #4] 739 .loc 1 506 7 view .LVU219 740 01aa 019B ldr r3, [sp, #4] 741 .LBE201: 742 .loc 1 506 7 view .LVU220 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pwrclkchanged = SET; 743 .loc 1 507 7 view .LVU221 744 .LVL45: 745 .loc 1 507 21 is_stmt 0 view .LVU222 746 01ac 4FF00108 mov r8, #1 747 .LVL46: 748 .L61: 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 749 .loc 1 510 5 is_stmt 1 view .LVU223 750 .loc 1 510 8 is_stmt 0 view .LVU224 751 01b0 574D ldr r5, .L176+12 752 01b2 2B68 ldr r3, [r5] 753 .loc 1 510 7 view .LVU225 754 01b4 DA05 lsls r2, r3, #23 755 01b6 40F16781 bpl .L62 756 .L67: 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable write access to Backup domain */ 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 757 .loc 1 528 5 is_stmt 1 view .LVU226 758 .loc 1 528 5 view .LVU227 759 01ba E368 ldr r3, [r4, #12] 760 01bc 012B cmp r3, #1 761 01be 00F0FA81 beq .L170 762 .loc 1 528 5 discriminator 2 view .LVU228 763 01c2 002B cmp r3, #0 764 01c4 00F0A481 beq .L171 765 .loc 1 528 5 discriminator 5 view .LVU229 766 01c8 052B cmp r3, #5 767 01ca 4E4B ldr r3, .L176 768 01cc 1A6A ldr r2, [r3, #32] 769 01ce 00F04D82 beq .L172 770 .loc 1 528 5 discriminator 8 view .LVU230 771 01d2 22F00102 bic r2, r2, #1 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 43 772 01d6 1A62 str r2, [r3, #32] 773 .loc 1 528 5 discriminator 8 view .LVU231 774 01d8 1A6A ldr r2, [r3, #32] 775 01da 22F00402 bic r2, r2, #4 776 01de 1A62 str r2, [r3, #32] 777 01e0 EEE1 b .L68 778 .L82: 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is ready */ 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is disabled */ 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Require to disable power clock if necessary */ 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(pwrclkchanged == SET) 779 .loc 1 560 5 view .LVU232 780 .loc 1 560 7 is_stmt 0 view .LVU233 781 01e2 B8F1000F cmp r8, #0 782 01e6 40F02E82 bne .L173 783 .LVL47: 784 .L59: 785 .loc 1 560 7 view .LVU234 786 .LBE200: 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 787 .loc 1 568 3 is_stmt 1 view .LVU235 788 01ea E069 ldr r0, [r4, #28] ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 44 789 01ec 0228 cmp r0, #2 790 01ee 00F21181 bhi .L174 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 791 .loc 1 569 3 view .LVU236 792 .loc 1 569 6 is_stmt 0 view .LVU237 793 01f2 0028 cmp r0, #0 794 01f4 00F08180 beq .L93 795 .L84: 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 796 .loc 1 572 5 is_stmt 1 view .LVU238 797 .loc 1 572 8 is_stmt 0 view .LVU239 798 01f8 424D ldr r5, .L176 799 01fa 6B68 ldr r3, [r5, #4] 800 01fc 03F00C03 and r3, r3, #12 801 .loc 1 572 7 view .LVU240 802 0200 082B cmp r3, #8 803 0202 00F00F82 beq .L85 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 804 .loc 1 574 7 is_stmt 1 view .LVU241 805 .loc 1 574 9 is_stmt 0 view .LVU242 806 0206 0228 cmp r0, #2 807 0208 40F03882 bne .L86 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); 808 .loc 1 577 9 is_stmt 1 view .LVU243 809 020c 236A ldr r3, [r4, #32] 810 020e 33F48033 bics r3, r3, #65536 811 0212 04D0 beq .L87 812 .loc 1 577 9 is_stmt 0 discriminator 2 view .LVU244 813 0214 3D48 ldr r0, .L176+8 814 0216 40F24121 movw r1, #577 815 021a FFF7FEFF bl assert_failed 816 .LVL48: 817 .L87: 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); 818 .loc 1 578 9 is_stmt 1 view .LVU245 819 021e 636A ldr r3, [r4, #36] 820 0220 33F44022 bics r2, r3, #786432 821 0224 23F48021 bic r1, r3, #262144 822 0228 10D0 beq .L88 823 .loc 1 578 9 is_stmt 0 discriminator 4 view .LVU246 824 022a B2F5801F cmp r2, #1048576 825 022e 0DD0 beq .L88 826 .loc 1 578 9 discriminator 8 view .LVU247 827 0230 B2F5001F cmp r2, #2097152 828 0234 0AD0 beq .L88 829 .loc 1 578 9 discriminator 12 view .LVU248 830 0236 B1F5401F cmp r1, #3145728 831 023a 07D0 beq .L88 832 .loc 1 578 9 discriminator 14 view .LVU249 833 023c B3F5601F cmp r3, #3670016 834 0240 04D0 beq .L88 835 .loc 1 578 9 discriminator 15 view .LVU250 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 45 836 0242 3248 ldr r0, .L176+8 837 0244 40F24221 movw r1, #578 838 0248 FFF7FEFF bl assert_failed 839 .LVL49: 840 .L88: 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 841 .loc 1 584 9 is_stmt 1 view .LVU251 842 .LBB230: 843 .LBI230: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 844 .loc 2 981 31 view .LVU252 845 .LBB231: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 846 .loc 2 983 3 view .LVU253 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 847 .loc 2 988 4 view .LVU254 848 024c 4FF08073 mov r3, #16777216 849 .syntax unified 850 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 851 0250 93FAA3F3 rbit r3, r3 852 @ 0 "" 2 853 .LVL50: 854 .loc 2 1001 3 view .LVU255 855 .loc 2 1001 3 is_stmt 0 view .LVU256 856 .thumb 857 .syntax unified 858 .LBE231: 859 .LBE230: 860 .loc 1 584 9 view .LVU257 861 0254 B3FA83F3 clz r3, r3 862 0258 03F18453 add r3, r3, #276824064 863 025c 03F58413 add r3, r3, #1081344 864 0260 9B00 lsls r3, r3, #2 865 0262 0022 movs r2, #0 866 0264 1A60 str r2, [r3] 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 867 .loc 1 587 9 is_stmt 1 view .LVU258 868 .loc 1 587 21 is_stmt 0 view .LVU259 869 0266 FFF7FEFF bl HAL_GetTick 870 .LVL51: 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 871 .loc 1 590 15 view .LVU260 872 026a 264E ldr r6, .L176 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 873 .loc 1 587 21 view .LVU261 874 026c 0546 mov r5, r0 875 .LVL52: 876 .loc 1 590 9 is_stmt 1 view .LVU262 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 46 877 .LBB232: 878 .LBB233: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 879 .loc 2 988 4 is_stmt 0 view .LVU263 880 026e 4FF00078 mov r8, #33554432 881 .LBE233: 882 .LBE232: 883 .loc 1 590 15 view .LVU264 884 0272 0127 movs r7, #1 885 .loc 1 590 14 view .LVU265 886 0274 05E0 b .L89 887 .LVL53: 888 .L90: 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 889 .loc 1 592 15 view .LVU266 890 0276 FFF7FEFF bl HAL_GetTick 891 .LVL54: 892 .loc 1 592 29 view .LVU267 893 027a 401B subs r0, r0, r5 894 .loc 1 592 13 view .LVU268 895 027c 0228 cmp r0, #2 896 027e 00F21381 bhi .L37 897 .L89: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 898 .loc 1 590 14 is_stmt 1 view .LVU269 899 .LVL55: 900 .LBB235: 901 .LBI232: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902 .loc 2 981 31 view .LVU270 903 .LBB234: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 904 .loc 2 983 3 view .LVU271 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905 .loc 2 988 4 view .LVU272 906 .syntax unified 907 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 908 0282 98FAA8F3 rbit r3, r8 909 @ 0 "" 2 910 .LVL56: 911 .loc 2 1001 3 view .LVU273 912 .loc 2 1001 3 is_stmt 0 view .LVU274 913 .thumb 914 .syntax unified 915 .LBE234: 916 .LBE235: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 917 .loc 1 590 15 view .LVU275 918 0286 3268 ldr r2, [r6] 919 .LVL57: 920 .LBB236: 921 .LBI236: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 922 .loc 2 981 31 is_stmt 1 view .LVU276 923 .LBB237: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 47 924 .loc 2 983 3 view .LVU277 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 925 .loc 2 988 4 view .LVU278 926 .syntax unified 927 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 928 0288 98FAA8F3 rbit r3, r8 929 @ 0 "" 2 930 .thumb 931 .syntax unified 932 .LBE237: 933 .LBE236: 934 .loc 1 592 11 view .LVU279 935 .LVL58: 936 .LBB239: 937 .LBB238: 938 .loc 2 1001 3 view .LVU280 939 .loc 2 1001 3 is_stmt 0 view .LVU281 940 .LBE238: 941 .LBE239: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 942 .loc 1 590 15 view .LVU282 943 028c B3FA83F3 clz r3, r3 944 0290 03F01F03 and r3, r3, #31 945 0294 07FA03F3 lsl r3, r7, r3 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 946 .loc 1 590 14 view .LVU283 947 0298 1342 tst r3, r2 948 029a ECD1 bne .L90 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source and multiplication factor. */ 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 949 .loc 1 605 7 is_stmt 1 view .LVU284 950 029c D4E90813 ldrd r1, r3, [r4, #32] 951 02a0 7268 ldr r2, [r6, #4] 952 02a2 0B43 orrs r3, r3, r1 953 02a4 22F47412 bic r2, r2, #3997696 954 02a8 1343 orrs r3, r3, r2 955 02aa 7360 str r3, [r6, #4] 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the main PLL. */ 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 956 .loc 1 609 9 view .LVU285 957 .LVL59: 958 .LBB240: 959 .LBI240: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 48 960 .loc 2 981 31 view .LVU286 961 .LBB241: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 962 .loc 2 983 3 view .LVU287 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 963 .loc 2 988 4 view .LVU288 964 02ac 4FF08073 mov r3, #16777216 965 .syntax unified 966 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 967 02b0 93FAA3F3 rbit r3, r3 968 @ 0 "" 2 969 .LVL60: 970 .loc 2 1001 3 view .LVU289 971 .loc 2 1001 3 is_stmt 0 view .LVU290 972 .thumb 973 .syntax unified 974 .LBE241: 975 .LBE240: 976 .loc 1 609 9 view .LVU291 977 02b4 B3FA83F3 clz r3, r3 978 02b8 03F18453 add r3, r3, #276824064 979 02bc 03F58413 add r3, r3, #1081344 980 02c0 9B00 lsls r3, r3, #2 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is ready */ 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 981 .loc 1 615 15 view .LVU292 982 02c2 104D ldr r5, .L176 983 .LVL61: 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 984 .loc 1 609 9 view .LVU293 985 02c4 1F60 str r7, [r3] 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 986 .loc 1 612 9 is_stmt 1 view .LVU294 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 987 .loc 1 612 21 is_stmt 0 view .LVU295 988 02c6 FFF7FEFF bl HAL_GetTick 989 .LVL62: 990 .LBB242: 991 .LBB243: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 992 .loc 2 988 4 view .LVU296 993 02ca 4FF00077 mov r7, #33554432 994 .LBE243: 995 .LBE242: 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 996 .loc 1 612 21 view .LVU297 997 02ce 0446 mov r4, r0 998 .LVL63: 999 .loc 1 615 9 is_stmt 1 view .LVU298 1000 .loc 1 615 15 is_stmt 0 view .LVU299 1001 02d0 0126 movs r6, #1 1002 .loc 1 615 14 view .LVU300 1003 02d2 05E0 b .L91 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 49 1004 .LVL64: 1005 .L92: 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 1006 .loc 1 617 15 view .LVU301 1007 02d4 FFF7FEFF bl HAL_GetTick 1008 .LVL65: 1009 .loc 1 617 29 view .LVU302 1010 02d8 001B subs r0, r0, r4 1011 .loc 1 617 13 view .LVU303 1012 02da 0228 cmp r0, #2 1013 02dc 00F2E480 bhi .L37 1014 .L91: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1015 .loc 1 615 14 is_stmt 1 view .LVU304 1016 .LVL66: 1017 .LBB245: 1018 .LBI242: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1019 .loc 2 981 31 view .LVU305 1020 .LBB244: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1021 .loc 2 983 3 view .LVU306 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1022 .loc 2 988 4 view .LVU307 1023 .syntax unified 1024 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1025 02e0 97FAA7F3 rbit r3, r7 1026 @ 0 "" 2 1027 .LVL67: 1028 .loc 2 1001 3 view .LVU308 1029 .loc 2 1001 3 is_stmt 0 view .LVU309 1030 .thumb 1031 .syntax unified 1032 .LBE244: 1033 .LBE245: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1034 .loc 1 615 15 view .LVU310 1035 02e4 2A68 ldr r2, [r5] 1036 .LVL68: 1037 .LBB246: 1038 .LBI246: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1039 .loc 2 981 31 is_stmt 1 view .LVU311 1040 .LBB247: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041 .loc 2 983 3 view .LVU312 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1042 .loc 2 988 4 view .LVU313 1043 .syntax unified 1044 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1045 02e6 97FAA7F3 rbit r3, r7 1046 @ 0 "" 2 1047 .thumb 1048 .syntax unified 1049 .LBE247: 1050 .LBE246: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 50 1051 .loc 1 617 11 view .LVU314 1052 .LVL69: 1053 .LBB249: 1054 .LBB248: 1055 .loc 2 1001 3 view .LVU315 1056 .loc 2 1001 3 is_stmt 0 view .LVU316 1057 .LBE248: 1058 .LBE249: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1059 .loc 1 615 15 view .LVU317 1060 02ea B3FA83F3 clz r3, r3 1061 02ee 03F01F03 and r3, r3, #31 1062 02f2 06FA03F3 lsl r3, r6, r3 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1063 .loc 1 615 14 view .LVU318 1064 02f6 1342 tst r3, r2 1065 02f8 ECD0 beq .L92 1066 .LVL70: 1067 .L93: 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config = RCC->CFGR; 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 51 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 1068 .loc 1 668 10 view .LVU319 1069 02fa 0020 movs r0, #0 1070 .L151: 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1071 .loc 1 669 1 view .LVU320 1072 02fc 03B0 add sp, sp, #12 1073 .LCFI3: 1074 .cfi_remember_state 1075 .cfi_def_cfa_offset 28 1076 @ sp needed 1077 02fe BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 1078 .L177: 1079 0302 00BF .align 2 1080 .L176: 1081 0304 00100240 .word 1073876992 1082 0308 20819010 .word 277905696 1083 030c 00000000 .word .LC0 1084 0310 00700040 .word 1073770496 1085 .LVL71: 1086 .L167: 1087 .LCFI4: 1088 .cfi_restore_state 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1089 .loc 1 396 13 view .LVU321 1090 0314 5A68 ldr r2, [r3, #4] 1091 0316 02F00C02 and r2, r2, #12 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1092 .loc 1 396 8 view .LVU322 1093 031a 082A cmp r2, #8 1094 031c 00F07681 beq .L175 1095 .L43: 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1096 .loc 1 413 7 is_stmt 1 view .LVU323 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1097 .loc 1 413 9 is_stmt 0 view .LVU324 1098 0320 2269 ldr r2, [r4, #16] 1099 0322 002A cmp r2, #0 1100 0324 00F02181 beq .L45 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1101 .loc 1 416 9 is_stmt 1 view .LVU325 1102 .LVL72: 1103 .LBB250: 1104 .LBI250: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 52 1105 .loc 2 981 31 view .LVU326 1106 .LBB251: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1107 .loc 2 983 3 view .LVU327 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1108 .loc 2 988 4 view .LVU328 1109 0328 0125 movs r5, #1 1110 .syntax unified 1111 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1112 032a 95FAA5F3 rbit r3, r5 1113 @ 0 "" 2 1114 .LVL73: 1115 .loc 2 1001 3 view .LVU329 1116 .loc 2 1001 3 is_stmt 0 view .LVU330 1117 .thumb 1118 .syntax unified 1119 .LBE251: 1120 .LBE250: 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1121 .loc 1 416 9 view .LVU331 1122 032e B3FA83F3 clz r3, r3 1123 0332 03F18453 add r3, r3, #276824064 1124 0336 03F58413 add r3, r3, #1081344 1125 033a 9B00 lsls r3, r3, #2 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1126 .loc 1 422 15 view .LVU332 1127 033c B64F ldr r7, .L178 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1128 .loc 1 416 9 view .LVU333 1129 033e 1D60 str r5, [r3] 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1130 .loc 1 419 9 is_stmt 1 view .LVU334 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1131 .loc 1 419 21 is_stmt 0 view .LVU335 1132 0340 FFF7FEFF bl HAL_GetTick 1133 .LVL74: 1134 .LBB252: 1135 .LBB253: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1136 .loc 2 988 4 view .LVU336 1137 0344 4FF00208 mov r8, #2 1138 .LBE253: 1139 .LBE252: 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1140 .loc 1 419 21 view .LVU337 1141 0348 0646 mov r6, r0 1142 .LVL75: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1143 .loc 1 422 9 is_stmt 1 view .LVU338 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1144 .loc 1 422 14 is_stmt 0 view .LVU339 1145 034a 05E0 b .L46 1146 .LVL76: 1147 .L47: 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1148 .loc 1 424 15 view .LVU340 1149 034c FFF7FEFF bl HAL_GetTick ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 53 1150 .LVL77: 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1151 .loc 1 424 29 view .LVU341 1152 0350 801B subs r0, r0, r6 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1153 .loc 1 424 13 view .LVU342 1154 0352 0228 cmp r0, #2 1155 0354 00F2A880 bhi .L37 1156 .L46: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1157 .loc 1 422 14 is_stmt 1 view .LVU343 1158 .LVL78: 1159 .LBB255: 1160 .LBI252: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1161 .loc 2 981 31 view .LVU344 1162 .LBB254: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1163 .loc 2 983 3 view .LVU345 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1164 .loc 2 988 4 view .LVU346 1165 .syntax unified 1166 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1167 0358 98FAA8F3 rbit r3, r8 1168 @ 0 "" 2 1169 .LVL79: 1170 .loc 2 1001 3 view .LVU347 1171 .loc 2 1001 3 is_stmt 0 view .LVU348 1172 .thumb 1173 .syntax unified 1174 .LBE254: 1175 .LBE255: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1176 .loc 1 422 15 view .LVU349 1177 035c 3A68 ldr r2, [r7] 1178 .LVL80: 1179 .LBB256: 1180 .LBI256: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1181 .loc 2 981 31 is_stmt 1 view .LVU350 1182 .LBB257: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1183 .loc 2 983 3 view .LVU351 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1184 .loc 2 988 4 view .LVU352 1185 .syntax unified 1186 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1187 035e 98FAA8F3 rbit r3, r8 1188 @ 0 "" 2 1189 .thumb 1190 .syntax unified 1191 .LBE257: 1192 .LBE256: 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1193 .loc 1 424 11 view .LVU353 1194 .LVL81: 1195 .LBB259: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 54 1196 .LBB258: 1197 .loc 2 1001 3 view .LVU354 1198 .loc 2 1001 3 is_stmt 0 view .LVU355 1199 .LBE258: 1200 .LBE259: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1201 .loc 1 422 15 view .LVU356 1202 0362 B3FA83F3 clz r3, r3 1203 0366 03F01F03 and r3, r3, #31 1204 036a 05FA03F3 lsl r3, r5, r3 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1205 .loc 1 422 14 view .LVU357 1206 036e 1342 tst r3, r2 1207 0370 ECD0 beq .L47 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1208 .loc 1 431 9 is_stmt 1 view .LVU358 1209 0372 3968 ldr r1, [r7] 1210 .LVL82: 1211 .LBB260: 1212 .LBI260: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1213 .loc 2 981 31 view .LVU359 1214 .LBB261: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1215 .loc 2 983 3 view .LVU360 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1216 .loc 2 988 4 view .LVU361 1217 0374 F822 movs r2, #248 1218 .syntax unified 1219 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1220 0376 92FAA2F2 rbit r2, r2 1221 @ 0 "" 2 1222 .LVL83: 1223 .loc 2 1001 3 view .LVU362 1224 .loc 2 1001 3 is_stmt 0 view .LVU363 1225 .thumb 1226 .syntax unified 1227 .LBE261: 1228 .LBE260: 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1229 .loc 1 431 9 view .LVU364 1230 037a 6369 ldr r3, [r4, #20] 1231 037c B2FA82F2 clz r2, r2 1232 0380 9340 lsls r3, r3, r2 1233 0382 21F0F802 bic r2, r1, #248 1234 0386 1343 orrs r3, r3, r2 1235 0388 3B60 str r3, [r7] 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1236 .loc 1 453 25 view .LVU365 1237 038a 2368 ldr r3, [r4] 1238 038c C3E6 b .L39 1239 .LVL84: 1240 .L165: 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 1241 .loc 1 391 5 discriminator 1 view .LVU366 1242 038e A348 ldr r0, .L178+4 1243 0390 40F28711 movw r1, #391 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 55 1244 0394 FFF7FEFF bl assert_failed 1245 .LVL85: 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1246 .loc 1 392 5 is_stmt 1 discriminator 1 view .LVU367 1247 0398 6369 ldr r3, [r4, #20] 1248 039a 1F2B cmp r3, #31 1249 039c 7FF693AE bls .L41 1250 .L166: 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1251 .loc 1 392 5 is_stmt 0 discriminator 1 view .LVU368 1252 03a0 9E48 ldr r0, .L178+4 1253 03a2 4FF4C471 mov r1, #392 1254 03a6 FFF7FEFF bl assert_failed 1255 .LVL86: 1256 03aa 8CE6 b .L41 1257 .L169: 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1258 .loc 1 462 7 is_stmt 1 view .LVU369 1259 .LVL87: 1260 .LBB262: 1261 .LBI262: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1262 .loc 2 981 31 view .LVU370 1263 .LBB263: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1264 .loc 2 983 3 view .LVU371 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1265 .loc 2 988 4 view .LVU372 1266 03ac 0125 movs r5, #1 1267 .syntax unified 1268 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1269 03ae 95FAA5F2 rbit r2, r5 1270 @ 0 "" 2 1271 .LVL88: 1272 .loc 2 1001 3 view .LVU373 1273 .loc 2 1001 3 is_stmt 0 view .LVU374 1274 .thumb 1275 .syntax unified 1276 .LBE263: 1277 .LBE262: 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1278 .loc 1 462 7 view .LVU375 1279 03b2 9B4B ldr r3, .L178+8 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1280 .loc 1 468 13 view .LVU376 1281 03b4 984F ldr r7, .L178 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1282 .loc 1 462 7 view .LVU377 1283 03b6 B2FA82F2 clz r2, r2 1284 03ba 1344 add r3, r3, r2 1285 03bc 9B00 lsls r3, r3, #2 1286 .LBB264: 1287 .LBB265: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1288 .loc 2 988 4 view .LVU378 1289 03be 4FF00208 mov r8, #2 1290 .LBE265: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 56 1291 .LBE264: 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1292 .loc 1 462 7 view .LVU379 1293 03c2 1D60 str r5, [r3] 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1294 .loc 1 465 7 is_stmt 1 view .LVU380 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1295 .loc 1 465 19 is_stmt 0 view .LVU381 1296 03c4 FFF7FEFF bl HAL_GetTick 1297 .LVL89: 1298 03c8 0646 mov r6, r0 1299 .LVL90: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1300 .loc 1 468 7 is_stmt 1 view .LVU382 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1301 .loc 1 468 12 is_stmt 0 view .LVU383 1302 03ca 04E0 b .L54 1303 .LVL91: 1304 .L55: 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1305 .loc 1 470 13 view .LVU384 1306 03cc FFF7FEFF bl HAL_GetTick 1307 .LVL92: 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1308 .loc 1 470 27 view .LVU385 1309 03d0 801B subs r0, r0, r6 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1310 .loc 1 470 11 view .LVU386 1311 03d2 0228 cmp r0, #2 1312 03d4 68D8 bhi .L37 1313 .L54: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1314 .loc 1 468 12 is_stmt 1 view .LVU387 1315 .LVL93: 1316 .LBB267: 1317 .LBI264: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1318 .loc 2 981 31 view .LVU388 1319 .LBB266: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1320 .loc 2 983 3 view .LVU389 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1321 .loc 2 988 4 view .LVU390 1322 .syntax unified 1323 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1324 03d6 98FAA8F3 rbit r3, r8 1325 @ 0 "" 2 1326 .LVL94: 1327 .loc 2 1001 3 view .LVU391 1328 .loc 2 1001 3 is_stmt 0 view .LVU392 1329 .thumb 1330 .syntax unified 1331 .LBE266: 1332 .LBE267: 1333 .LBB268: 1334 .LBI268: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 57 1335 .loc 2 981 31 is_stmt 1 view .LVU393 1336 .LBB269: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1337 .loc 2 983 3 view .LVU394 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1338 .loc 2 988 4 view .LVU395 1339 .syntax unified 1340 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1341 03da 98FAA8F3 rbit r3, r8 1342 @ 0 "" 2 1343 .LVL95: 1344 .loc 2 1001 3 view .LVU396 1345 .loc 2 1001 3 is_stmt 0 view .LVU397 1346 .thumb 1347 .syntax unified 1348 .LBE269: 1349 .LBE268: 1350 .LBB270: 1351 .LBI270: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1352 .loc 2 981 31 is_stmt 1 view .LVU398 1353 .LBB271: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1354 .loc 2 983 3 view .LVU399 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1355 .loc 2 988 4 view .LVU400 1356 .syntax unified 1357 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1358 03de 98FAA8F3 rbit r3, r8 1359 @ 0 "" 2 1360 .LVL96: 1361 .loc 2 1001 3 view .LVU401 1362 .loc 2 1001 3 is_stmt 0 view .LVU402 1363 .thumb 1364 .syntax unified 1365 .LBE271: 1366 .LBE270: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1367 .loc 1 468 13 view .LVU403 1368 03e2 7A6A ldr r2, [r7, #36] 1369 .LVL97: 1370 .LBB272: 1371 .LBI272: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1372 .loc 2 981 31 is_stmt 1 view .LVU404 1373 .LBB273: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1374 .loc 2 983 3 view .LVU405 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1375 .loc 2 988 4 view .LVU406 1376 .syntax unified 1377 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1378 03e4 98FAA8F3 rbit r3, r8 1379 @ 0 "" 2 1380 .thumb 1381 .syntax unified 1382 .LBE273: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 58 1383 .LBE272: 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1384 .loc 1 470 9 view .LVU407 1385 .LVL98: 1386 .LBB275: 1387 .LBB274: 1388 .loc 2 1001 3 view .LVU408 1389 .loc 2 1001 3 is_stmt 0 view .LVU409 1390 .LBE274: 1391 .LBE275: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1392 .loc 1 468 13 view .LVU410 1393 03e8 B3FA83F3 clz r3, r3 1394 03ec 03F01F03 and r3, r3, #31 1395 03f0 05FA03F3 lsl r3, r5, r3 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1396 .loc 1 468 12 view .LVU411 1397 03f4 1342 tst r3, r2 1398 03f6 E9D0 beq .L55 1399 03f8 BDE6 b .L157 1400 .LVL99: 1401 .L168: 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1402 .loc 1 456 5 discriminator 1 view .LVU412 1403 03fa 8848 ldr r0, .L178+4 1404 03fc 4FF4E471 mov r1, #456 1405 0400 FFF7FEFF bl assert_failed 1406 .LVL100: 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1407 .loc 1 459 25 discriminator 1 view .LVU413 1408 0404 A369 ldr r3, [r4, #24] 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1409 .loc 1 459 5 is_stmt 1 discriminator 1 view .LVU414 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1410 .loc 1 459 7 is_stmt 0 discriminator 1 view .LVU415 1411 0406 002B cmp r3, #0 1412 0408 3FF48EAE beq .L53 1413 040c CEE7 b .L169 1414 .LVL101: 1415 .L96: 1416 .LBB276: 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1417 .loc 1 497 22 view .LVU416 1418 040e 4FF00008 mov r8, #0 1419 0412 CDE6 b .L61 1420 .LVL102: 1421 .L174: 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1422 .loc 1 497 22 view .LVU417 1423 .LBE276: 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 1424 .loc 1 568 3 discriminator 1 view .LVU418 1425 0414 8148 ldr r0, .L178+4 1426 0416 4FF40E71 mov r1, #568 1427 041a FFF7FEFF bl assert_failed 1428 .LVL103: 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 59 1429 .loc 1 569 30 discriminator 1 view .LVU419 1430 041e E069 ldr r0, [r4, #28] 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1431 .loc 1 569 3 is_stmt 1 discriminator 1 view .LVU420 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1432 .loc 1 569 6 is_stmt 0 discriminator 1 view .LVU421 1433 0420 0028 cmp r0, #0 1434 0422 7FF4E9AE bne .L84 1435 0426 68E7 b .L93 1436 .L162: 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1437 .loc 1 349 7 is_stmt 1 discriminator 1 view .LVU422 1438 0428 7B4A ldr r2, .L178 1439 042a 1368 ldr r3, [r2] 1440 042c 43F48033 orr r3, r3, #65536 1441 0430 1360 str r3, [r2] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1442 .loc 1 349 7 discriminator 1 view .LVU423 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 1443 .loc 1 353 7 discriminator 1 view .LVU424 1444 0432 D36A ldr r3, [r2, #44] 1445 0434 A168 ldr r1, [r4, #8] 1446 0436 23F00F03 bic r3, r3, #15 1447 043a 0B43 orrs r3, r3, r1 1448 043c D362 str r3, [r2, #44] 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1449 .loc 1 357 7 discriminator 1 view .LVU425 1450 .L30: 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1451 .loc 1 360 9 view .LVU426 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1452 .loc 1 360 21 is_stmt 0 view .LVU427 1453 043e FFF7FEFF bl HAL_GetTick 1454 .LVL104: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1455 .loc 1 363 15 view .LVU428 1456 0442 754F ldr r7, .L178 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1457 .loc 1 360 21 view .LVU429 1458 0444 0546 mov r5, r0 1459 .LVL105: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1460 .loc 1 363 9 is_stmt 1 view .LVU430 1461 .LBB277: 1462 .LBB278: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1463 .loc 2 988 4 is_stmt 0 view .LVU431 1464 0446 4FF40038 mov r8, #131072 1465 .LBE278: 1466 .LBE277: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1467 .loc 1 363 15 view .LVU432 1468 044a 0126 movs r6, #1 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1469 .loc 1 363 14 view .LVU433 1470 044c 04E0 b .L35 1471 .LVL106: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 60 1472 .L36: 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1473 .loc 1 365 15 view .LVU434 1474 044e FFF7FEFF bl HAL_GetTick 1475 .LVL107: 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1476 .loc 1 365 29 view .LVU435 1477 0452 401B subs r0, r0, r5 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1478 .loc 1 365 13 view .LVU436 1479 0454 6428 cmp r0, #100 1480 0456 27D8 bhi .L37 1481 .L35: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1482 .loc 1 363 14 is_stmt 1 view .LVU437 1483 .LVL108: 1484 .LBB280: 1485 .LBI277: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1486 .loc 2 981 31 view .LVU438 1487 .LBB279: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1488 .loc 2 983 3 view .LVU439 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1489 .loc 2 988 4 view .LVU440 1490 .syntax unified 1491 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1492 0458 98FAA8F3 rbit r3, r8 1493 @ 0 "" 2 1494 .LVL109: 1495 .loc 2 1001 3 view .LVU441 1496 .loc 2 1001 3 is_stmt 0 view .LVU442 1497 .thumb 1498 .syntax unified 1499 .LBE279: 1500 .LBE280: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1501 .loc 1 363 15 view .LVU443 1502 045c 3A68 ldr r2, [r7] 1503 .LVL110: 1504 .LBB281: 1505 .LBI281: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1506 .loc 2 981 31 is_stmt 1 view .LVU444 1507 .LBB282: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1508 .loc 2 983 3 view .LVU445 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1509 .loc 2 988 4 view .LVU446 1510 .syntax unified 1511 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1512 045e 98FAA8F3 rbit r3, r8 1513 @ 0 "" 2 1514 .thumb 1515 .syntax unified 1516 .LBE282: 1517 .LBE281: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 61 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1518 .loc 1 365 11 view .LVU447 1519 .LVL111: 1520 .LBB284: 1521 .LBB283: 1522 .loc 2 1001 3 view .LVU448 1523 .loc 2 1001 3 is_stmt 0 view .LVU449 1524 .LBE283: 1525 .LBE284: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1526 .loc 1 363 15 view .LVU450 1527 0462 B3FA83F3 clz r3, r3 1528 0466 03F01F03 and r3, r3, #31 1529 046a 06FA03F3 lsl r3, r6, r3 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1530 .loc 1 363 14 view .LVU451 1531 046e 1342 tst r3, r2 1532 0470 EDD0 beq .L36 1533 0472 1DE6 b .L156 1534 .LVL112: 1535 .L160: 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1536 .loc 1 335 5 discriminator 3 view .LVU452 1537 0474 6948 ldr r0, .L178+4 1538 0476 40F24F11 movw r1, #335 1539 047a FFF7FEFF bl assert_failed 1540 .LVL113: 1541 047e D7E5 b .L23 1542 .L98: 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1543 .loc 1 646 16 view .LVU453 1544 0480 0120 movs r0, #1 1545 .loc 1 669 1 view .LVU454 1546 0482 03B0 add sp, sp, #12 1547 .LCFI5: 1548 .cfi_remember_state 1549 .cfi_def_cfa_offset 28 1550 @ sp needed 1551 0484 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 1552 .LVL114: 1553 .L62: 1554 .LCFI6: 1555 .cfi_restore_state 1556 .LBB285: 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1557 .loc 1 513 7 is_stmt 1 view .LVU455 1558 0488 2B68 ldr r3, [r5] 1559 048a 43F48073 orr r3, r3, #256 1560 048e 2B60 str r3, [r5] 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1561 .loc 1 516 7 view .LVU456 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1562 .loc 1 516 19 is_stmt 0 view .LVU457 1563 0490 FFF7FEFF bl HAL_GetTick 1564 .LVL115: 1565 0494 0646 mov r6, r0 1566 .LVL116: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 62 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1567 .loc 1 518 7 is_stmt 1 view .LVU458 1568 .L65: 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1569 .loc 1 520 9 view .LVU459 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1570 .loc 1 518 12 view .LVU460 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1571 .loc 1 518 13 is_stmt 0 view .LVU461 1572 0496 2B68 ldr r3, [r5] 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1573 .loc 1 518 12 view .LVU462 1574 0498 DB05 lsls r3, r3, #23 1575 049a 3FF58EAE bmi .L67 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1576 .loc 1 520 13 view .LVU463 1577 049e FFF7FEFF bl HAL_GetTick 1578 .LVL117: 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1579 .loc 1 520 27 view .LVU464 1580 04a2 801B subs r0, r0, r6 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1581 .loc 1 520 11 view .LVU465 1582 04a4 6428 cmp r0, #100 1583 04a6 F6D9 bls .L65 1584 .LVL118: 1585 .L37: 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1586 .loc 1 520 11 view .LVU466 1587 .LBE285: 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1588 .loc 1 367 20 view .LVU467 1589 04a8 0320 movs r0, #3 1590 .loc 1 669 1 view .LVU468 1591 04aa 03B0 add sp, sp, #12 1592 .LCFI7: 1593 .cfi_remember_state 1594 .cfi_def_cfa_offset 28 1595 @ sp needed 1596 04ac BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} 1597 .LVL119: 1598 .L159: 1599 .LCFI8: 1600 .cfi_restore_state 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1601 .loc 1 329 3 discriminator 2 view .LVU469 1602 04b0 5A48 ldr r0, .L178+4 1603 .LVL120: 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1604 .loc 1 329 3 discriminator 2 view .LVU470 1605 04b2 40F24911 movw r1, #329 1606 04b6 FFF7FEFF bl assert_failed 1607 .LVL121: 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1608 .loc 1 332 25 discriminator 2 view .LVU471 1609 04ba 2368 ldr r3, [r4] 1610 04bc AEE5 b .L21 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 63 1611 .L163: 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1612 .loc 1 349 7 is_stmt 1 discriminator 4 view .LVU472 1613 04be 564D ldr r5, .L178 1614 04c0 2B68 ldr r3, [r5] 1615 04c2 23F48033 bic r3, r3, #65536 1616 04c6 2B60 str r3, [r5] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1617 .loc 1 349 7 discriminator 4 view .LVU473 1618 04c8 2B68 ldr r3, [r5] 1619 04ca 23F48023 bic r3, r3, #262144 1620 04ce 2B60 str r3, [r5] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1621 .loc 1 349 7 discriminator 4 view .LVU474 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 1622 .loc 1 353 7 discriminator 4 view .LVU475 1623 04d0 EB6A ldr r3, [r5, #44] 1624 04d2 A268 ldr r2, [r4, #8] 1625 04d4 23F00F03 bic r3, r3, #15 1626 04d8 1343 orrs r3, r3, r2 1627 04da EB62 str r3, [r5, #44] 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1628 .loc 1 357 7 discriminator 4 view .LVU476 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1629 .loc 1 374 9 discriminator 4 view .LVU477 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1630 .loc 1 374 21 is_stmt 0 discriminator 4 view .LVU478 1631 04dc FFF7FEFF bl HAL_GetTick 1632 .LVL122: 1633 .LBB286: 1634 .LBB287: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1635 .loc 2 988 4 discriminator 4 view .LVU479 1636 04e0 4FF40038 mov r8, #131072 1637 .LBE287: 1638 .LBE286: 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1639 .loc 1 374 21 discriminator 4 view .LVU480 1640 04e4 0646 mov r6, r0 1641 .LVL123: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1642 .loc 1 377 9 is_stmt 1 discriminator 4 view .LVU481 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1643 .loc 1 377 15 is_stmt 0 discriminator 4 view .LVU482 1644 04e6 0127 movs r7, #1 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1645 .loc 1 377 14 discriminator 4 view .LVU483 1646 04e8 04E0 b .L32 1647 .LVL124: 1648 .L38: 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1649 .loc 1 379 16 view .LVU484 1650 04ea FFF7FEFF bl HAL_GetTick 1651 .LVL125: 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1652 .loc 1 379 30 view .LVU485 1653 04ee 801B subs r0, r0, r6 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 64 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1654 .loc 1 379 14 view .LVU486 1655 04f0 6428 cmp r0, #100 1656 04f2 D9D8 bhi .L37 1657 .L32: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1658 .loc 1 377 14 is_stmt 1 view .LVU487 1659 .LVL126: 1660 .LBB289: 1661 .LBI286: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1662 .loc 2 981 31 view .LVU488 1663 .LBB288: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1664 .loc 2 983 3 view .LVU489 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1665 .loc 2 988 4 view .LVU490 1666 .syntax unified 1667 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1668 04f4 98FAA8F3 rbit r3, r8 1669 @ 0 "" 2 1670 .LVL127: 1671 .loc 2 1001 3 view .LVU491 1672 .loc 2 1001 3 is_stmt 0 view .LVU492 1673 .thumb 1674 .syntax unified 1675 .LBE288: 1676 .LBE289: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1677 .loc 1 377 15 view .LVU493 1678 04f8 2A68 ldr r2, [r5] 1679 .LVL128: 1680 .LBB290: 1681 .LBI290: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1682 .loc 2 981 31 is_stmt 1 view .LVU494 1683 .LBB291: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1684 .loc 2 983 3 view .LVU495 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1685 .loc 2 988 4 view .LVU496 1686 .syntax unified 1687 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1688 04fa 98FAA8F3 rbit r3, r8 1689 @ 0 "" 2 1690 .thumb 1691 .syntax unified 1692 .LBE291: 1693 .LBE290: 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1694 .loc 1 379 12 view .LVU497 1695 .LVL129: 1696 .LBB293: 1697 .LBB292: 1698 .loc 2 1001 3 view .LVU498 1699 .loc 2 1001 3 is_stmt 0 view .LVU499 1700 .LBE292: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 65 1701 .LBE293: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1702 .loc 1 377 15 view .LVU500 1703 04fe B3FA83F3 clz r3, r3 1704 0502 03F01F03 and r3, r3, #31 1705 0506 07FA03F3 lsl r3, r7, r3 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1706 .loc 1 377 14 view .LVU501 1707 050a 1342 tst r3, r2 1708 050c EDD1 bne .L38 1709 050e CFE5 b .L156 1710 .LVL130: 1711 .L171: 1712 .LBB294: 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 1713 .loc 1 528 5 is_stmt 1 discriminator 4 view .LVU502 1714 0510 414D ldr r5, .L178 1715 0512 2B6A ldr r3, [r5, #32] 1716 0514 23F00103 bic r3, r3, #1 1717 0518 2B62 str r3, [r5, #32] 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 1718 .loc 1 528 5 discriminator 4 view .LVU503 1719 051a 2B6A ldr r3, [r5, #32] 1720 051c 23F00403 bic r3, r3, #4 1721 0520 2B62 str r3, [r5, #32] 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 1722 .loc 1 528 5 discriminator 4 view .LVU504 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1723 .loc 1 530 5 discriminator 4 view .LVU505 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1724 .loc 1 547 7 discriminator 4 view .LVU506 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1725 .loc 1 547 19 is_stmt 0 discriminator 4 view .LVU507 1726 0522 FFF7FEFF bl HAL_GetTick 1727 .LVL131: 1728 .LBB202: 1729 .LBB203: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1730 .loc 2 988 4 discriminator 4 view .LVU508 1731 0526 4FF00209 mov r9, #2 1732 .LBE203: 1733 .LBE202: 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1734 .loc 1 547 19 discriminator 4 view .LVU509 1735 052a 0646 mov r6, r0 1736 .LVL132: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1737 .loc 1 550 7 is_stmt 1 discriminator 4 view .LVU510 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1738 .loc 1 550 13 is_stmt 0 discriminator 4 view .LVU511 1739 052c 0127 movs r7, #1 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1740 .loc 1 550 12 discriminator 4 view .LVU512 1741 052e 14E0 b .L70 1742 .LVL133: 1743 .L79: 1744 .LBB205: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 66 1745 .LBB206: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1746 .loc 2 988 4 view .LVU513 1747 .syntax unified 1748 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1749 0530 99FAA9F3 rbit r3, r9 1750 @ 0 "" 2 1751 .LVL134: 1752 .loc 2 1001 3 is_stmt 1 view .LVU514 1753 .loc 2 1001 3 is_stmt 0 view .LVU515 1754 .thumb 1755 .syntax unified 1756 .LBE206: 1757 .LBE205: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1758 .loc 1 550 13 view .LVU516 1759 0534 6A6A ldr r2, [r5, #36] 1760 .L80: 1761 .LVL135: 1762 .LBB208: 1763 .LBI208: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1764 .loc 2 981 31 is_stmt 1 discriminator 11 view .LVU517 1765 .LBB209: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1766 .loc 2 983 3 discriminator 11 view .LVU518 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1767 .loc 2 988 4 discriminator 11 view .LVU519 1768 .syntax unified 1769 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1770 0536 99FAA9F3 rbit r3, r9 1771 @ 0 "" 2 1772 .thumb 1773 .syntax unified 1774 .LBE209: 1775 .LBE208: 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1776 .loc 1 552 9 discriminator 11 view .LVU520 1777 .LVL136: 1778 .LBB211: 1779 .LBB210: 1780 .loc 2 1001 3 discriminator 11 view .LVU521 1781 .loc 2 1001 3 is_stmt 0 discriminator 11 view .LVU522 1782 .LBE210: 1783 .LBE211: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1784 .loc 1 550 13 discriminator 11 view .LVU523 1785 053a B3FA83F3 clz r3, r3 1786 053e 03F01F03 and r3, r3, #31 1787 0542 07FA03F3 lsl r3, r7, r3 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1788 .loc 1 550 12 discriminator 11 view .LVU524 1789 0546 1342 tst r3, r2 1790 0548 3FF44BAE beq .L82 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1791 .loc 1 552 13 view .LVU525 1792 054c FFF7FEFF bl HAL_GetTick ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 67 1793 .LVL137: 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1794 .loc 1 552 11 view .LVU526 1795 0550 41F28833 movw r3, #5000 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1796 .loc 1 552 27 view .LVU527 1797 0554 801B subs r0, r0, r6 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1798 .loc 1 552 11 view .LVU528 1799 0556 9842 cmp r0, r3 1800 0558 A6D8 bhi .L37 1801 .L70: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1802 .loc 1 550 12 is_stmt 1 view .LVU529 1803 .LVL138: 1804 .LBB212: 1805 .LBI202: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1806 .loc 2 981 31 view .LVU530 1807 .LBB204: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1808 .loc 2 983 3 view .LVU531 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1809 .loc 2 988 4 view .LVU532 1810 .syntax unified 1811 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1812 055a 99FAA9F3 rbit r3, r9 1813 @ 0 "" 2 1814 .LVL139: 1815 .loc 2 1001 3 view .LVU533 1816 .loc 2 1001 3 is_stmt 0 view .LVU534 1817 .thumb 1818 .syntax unified 1819 .LBE204: 1820 .LBE212: 1821 .LBB213: 1822 .LBI213: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1823 .loc 2 981 31 is_stmt 1 view .LVU535 1824 .LBB214: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1825 .loc 2 983 3 view .LVU536 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1826 .loc 2 988 4 view .LVU537 1827 .syntax unified 1828 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1829 055e 99FAA9F3 rbit r3, r9 1830 @ 0 "" 2 1831 .LVL140: 1832 .loc 2 1001 3 view .LVU538 1833 .loc 2 1001 3 is_stmt 0 view .LVU539 1834 .thumb 1835 .syntax unified 1836 .LBE214: 1837 .LBE213: 1838 .LBB215: 1839 .LBI205: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 68 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1840 .loc 2 981 31 is_stmt 1 view .LVU540 1841 .LBB207: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1842 .loc 2 983 3 view .LVU541 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1843 .loc 2 988 4 view .LVU542 1844 .LBE207: 1845 .LBE215: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1846 .loc 1 550 13 is_stmt 0 view .LVU543 1847 0562 002B cmp r3, #0 1848 0564 E4D0 beq .L79 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1849 .loc 1 550 13 discriminator 4 view .LVU544 1850 0566 2A6A ldr r2, [r5, #32] 1851 0568 E5E7 b .L80 1852 .LVL141: 1853 .L45: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1854 .loc 1 550 13 discriminator 4 view .LVU545 1855 .LBE294: 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1856 .loc 1 436 9 is_stmt 1 view .LVU546 1857 .LBB295: 1858 .LBI295: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1859 .loc 2 981 31 view .LVU547 1860 .LBB296: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1861 .loc 2 983 3 view .LVU548 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1862 .loc 2 988 4 view .LVU549 1863 056a 0126 movs r6, #1 1864 .syntax unified 1865 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1866 056c 96FAA6F3 rbit r3, r6 1867 @ 0 "" 2 1868 .LVL142: 1869 .loc 2 1001 3 view .LVU550 1870 .loc 2 1001 3 is_stmt 0 view .LVU551 1871 .thumb 1872 .syntax unified 1873 .LBE296: 1874 .LBE295: 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1875 .loc 1 436 9 view .LVU552 1876 0570 B3FA83F3 clz r3, r3 1877 0574 03F18453 add r3, r3, #276824064 1878 0578 03F58413 add r3, r3, #1081344 1879 057c 9B00 lsls r3, r3, #2 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1880 .loc 1 442 15 view .LVU553 1881 057e 264F ldr r7, .L178 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1882 .loc 1 436 9 view .LVU554 1883 0580 1A60 str r2, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 69 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1884 .loc 1 439 9 is_stmt 1 view .LVU555 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1885 .loc 1 439 21 is_stmt 0 view .LVU556 1886 0582 FFF7FEFF bl HAL_GetTick 1887 .LVL143: 1888 .LBB297: 1889 .LBB298: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1890 .loc 2 988 4 view .LVU557 1891 0586 4FF00208 mov r8, #2 1892 .LBE298: 1893 .LBE297: 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1894 .loc 1 439 21 view .LVU558 1895 058a 0546 mov r5, r0 1896 .LVL144: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1897 .loc 1 442 9 is_stmt 1 view .LVU559 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1898 .loc 1 442 14 is_stmt 0 view .LVU560 1899 058c 04E0 b .L48 1900 .LVL145: 1901 .L49: 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1902 .loc 1 444 15 view .LVU561 1903 058e FFF7FEFF bl HAL_GetTick 1904 .LVL146: 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1905 .loc 1 444 29 view .LVU562 1906 0592 401B subs r0, r0, r5 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1907 .loc 1 444 13 view .LVU563 1908 0594 0228 cmp r0, #2 1909 0596 87D8 bhi .L37 1910 .L48: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1911 .loc 1 442 14 is_stmt 1 view .LVU564 1912 .LVL147: 1913 .LBB300: 1914 .LBI297: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1915 .loc 2 981 31 view .LVU565 1916 .LBB299: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1917 .loc 2 983 3 view .LVU566 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1918 .loc 2 988 4 view .LVU567 1919 .syntax unified 1920 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1921 0598 98FAA8F3 rbit r3, r8 1922 @ 0 "" 2 1923 .LVL148: 1924 .loc 2 1001 3 view .LVU568 1925 .loc 2 1001 3 is_stmt 0 view .LVU569 1926 .thumb 1927 .syntax unified ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 70 1928 .LBE299: 1929 .LBE300: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1930 .loc 1 442 15 view .LVU570 1931 059c 3A68 ldr r2, [r7] 1932 .LVL149: 1933 .LBB301: 1934 .LBI301: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1935 .loc 2 981 31 is_stmt 1 view .LVU571 1936 .LBB302: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 1937 .loc 2 983 3 view .LVU572 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1938 .loc 2 988 4 view .LVU573 1939 .syntax unified 1940 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1941 059e 98FAA8F3 rbit r3, r8 1942 @ 0 "" 2 1943 .thumb 1944 .syntax unified 1945 .LBE302: 1946 .LBE301: 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1947 .loc 1 444 11 view .LVU574 1948 .LVL150: 1949 .LBB304: 1950 .LBB303: 1951 .loc 2 1001 3 view .LVU575 1952 .loc 2 1001 3 is_stmt 0 view .LVU576 1953 .LBE303: 1954 .LBE304: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1955 .loc 1 442 15 view .LVU577 1956 05a2 B3FA83F3 clz r3, r3 1957 05a6 03F01F03 and r3, r3, #31 1958 05aa 06FA03F3 lsl r3, r6, r3 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1959 .loc 1 442 14 view .LVU578 1960 05ae 1342 tst r3, r2 1961 05b0 EDD1 bne .L49 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1962 .loc 1 453 25 view .LVU579 1963 05b2 2368 ldr r3, [r4] 1964 05b4 AFE5 b .L39 1965 .LVL151: 1966 .L170: 1967 .LBB305: 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 1968 .loc 1 528 5 is_stmt 1 discriminator 1 view .LVU580 1969 05b6 184A ldr r2, .L178 1970 05b8 136A ldr r3, [r2, #32] 1971 05ba 43F00103 orr r3, r3, #1 1972 05be 1362 str r3, [r2, #32] 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 1973 .loc 1 528 5 discriminator 1 view .LVU581 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 71 1974 .loc 1 530 5 discriminator 1 view .LVU582 1975 .L68: 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1976 .loc 1 533 7 view .LVU583 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1977 .loc 1 533 19 is_stmt 0 view .LVU584 1978 05c0 FFF7FEFF bl HAL_GetTick 1979 .LVL152: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1980 .loc 1 536 13 view .LVU585 1981 05c4 144F ldr r7, .L178 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1982 .loc 1 533 19 view .LVU586 1983 05c6 0546 mov r5, r0 1984 .LVL153: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1985 .loc 1 536 7 is_stmt 1 view .LVU587 1986 .LBB216: 1987 .LBB217: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1988 .loc 2 988 4 is_stmt 0 view .LVU588 1989 05c8 4FF00209 mov r9, #2 1990 .LBE217: 1991 .LBE216: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1992 .loc 1 536 13 view .LVU589 1993 05cc 0126 movs r6, #1 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1994 .loc 1 536 12 view .LVU590 1995 05ce 15E0 b .L73 1996 .LVL154: 1997 .L74: 1998 .LBB219: 1999 .LBB220: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2000 .loc 2 988 4 view .LVU591 2001 .syntax unified 2002 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2003 05d0 99FAA9F3 rbit r3, r9 2004 @ 0 "" 2 2005 .LVL155: 2006 .loc 2 1001 3 is_stmt 1 view .LVU592 2007 .loc 2 1001 3 is_stmt 0 view .LVU593 2008 .thumb 2009 .syntax unified 2010 .LBE220: 2011 .LBE219: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2012 .loc 1 536 13 view .LVU594 2013 05d4 7A6A ldr r2, [r7, #36] 2014 .L75: 2015 .LVL156: 2016 .LBB222: 2017 .LBI222: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2018 .loc 2 981 31 is_stmt 1 discriminator 11 view .LVU595 2019 .LBB223: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 72 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2020 .loc 2 983 3 discriminator 11 view .LVU596 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2021 .loc 2 988 4 discriminator 11 view .LVU597 2022 .syntax unified 2023 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2024 05d6 99FAA9F3 rbit r3, r9 2025 @ 0 "" 2 2026 .thumb 2027 .syntax unified 2028 .LBE223: 2029 .LBE222: 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2030 .loc 1 538 9 discriminator 11 view .LVU598 2031 .LVL157: 2032 .LBB225: 2033 .LBB224: 2034 .loc 2 1001 3 discriminator 11 view .LVU599 2035 .loc 2 1001 3 is_stmt 0 discriminator 11 view .LVU600 2036 .LBE224: 2037 .LBE225: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2038 .loc 1 536 13 discriminator 11 view .LVU601 2039 05da B3FA83F3 clz r3, r3 2040 05de 03F01F03 and r3, r3, #31 2041 05e2 06FA03F3 lsl r3, r6, r3 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2042 .loc 1 536 12 discriminator 11 view .LVU602 2043 05e6 1342 tst r3, r2 2044 05e8 7FF4FBAD bne .L82 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2045 .loc 1 538 13 view .LVU603 2046 05ec FFF7FEFF bl HAL_GetTick 2047 .LVL158: 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2048 .loc 1 538 11 view .LVU604 2049 05f0 41F28833 movw r3, #5000 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2050 .loc 1 538 27 view .LVU605 2051 05f4 401B subs r0, r0, r5 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2052 .loc 1 538 11 view .LVU606 2053 05f6 9842 cmp r0, r3 2054 05f8 3FF656AF bhi .L37 2055 .L73: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2056 .loc 1 536 12 is_stmt 1 view .LVU607 2057 .LVL159: 2058 .LBB226: 2059 .LBI216: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2060 .loc 2 981 31 view .LVU608 2061 .LBB218: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2062 .loc 2 983 3 view .LVU609 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2063 .loc 2 988 4 view .LVU610 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 73 2064 .syntax unified 2065 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2066 05fc 99FAA9F3 rbit r3, r9 2067 @ 0 "" 2 2068 .LVL160: 2069 .loc 2 1001 3 view .LVU611 2070 .loc 2 1001 3 is_stmt 0 view .LVU612 2071 .thumb 2072 .syntax unified 2073 .LBE218: 2074 .LBE226: 2075 .LBB227: 2076 .LBI227: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2077 .loc 2 981 31 is_stmt 1 view .LVU613 2078 .LBB228: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2079 .loc 2 983 3 view .LVU614 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2080 .loc 2 988 4 view .LVU615 2081 .syntax unified 2082 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2083 0600 99FAA9F3 rbit r3, r9 2084 @ 0 "" 2 2085 .LVL161: 2086 .loc 2 1001 3 view .LVU616 2087 .loc 2 1001 3 is_stmt 0 view .LVU617 2088 .thumb 2089 .syntax unified 2090 .LBE228: 2091 .LBE227: 2092 .LBB229: 2093 .LBI219: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2094 .loc 2 981 31 is_stmt 1 view .LVU618 2095 .LBB221: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2096 .loc 2 983 3 view .LVU619 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2097 .loc 2 988 4 view .LVU620 2098 .LBE221: 2099 .LBE229: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2100 .loc 1 536 13 is_stmt 0 view .LVU621 2101 0604 002B cmp r3, #0 2102 0606 E3D0 beq .L74 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2103 .loc 1 536 13 discriminator 4 view .LVU622 2104 0608 3A6A ldr r2, [r7, #32] 2105 060a E4E7 b .L75 2106 .LVL162: 2107 .L175: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2108 .loc 1 536 13 discriminator 4 view .LVU623 2109 .LBE305: 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2110 .loc 1 396 82 discriminator 1 view .LVU624 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 74 2111 060c 5B68 ldr r3, [r3, #4] 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2112 .loc 1 396 78 discriminator 1 view .LVU625 2113 060e DE03 lsls r6, r3, #15 2114 0610 3FF586AE bmi .L43 2115 0614 5DE5 b .L42 2116 .L179: 2117 0616 00BF .align 2 2118 .L178: 2119 0618 00100240 .word 1073876992 2120 061c 00000000 .word .LC0 2121 0620 20819010 .word 277905696 2122 .L85: 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2123 .loc 1 644 7 is_stmt 1 view .LVU626 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2124 .loc 1 644 9 is_stmt 0 view .LVU627 2125 0624 0128 cmp r0, #1 2126 0626 3FF469AE beq .L151 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 2127 .loc 1 651 9 is_stmt 1 view .LVU628 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 2128 .loc 1 651 20 is_stmt 0 view .LVU629 2129 062a 6B68 ldr r3, [r5, #4] 2130 .LVL163: 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2131 .loc 1 658 9 is_stmt 1 view .LVU630 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2132 .loc 1 658 11 is_stmt 0 view .LVU631 2133 062c 226A ldr r2, [r4, #32] 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2134 .loc 1 658 13 view .LVU632 2135 062e 03F48031 and r1, r3, #65536 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2136 .loc 1 658 11 view .LVU633 2137 0632 9142 cmp r1, r2 2138 0634 7FF424AF bne .L98 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2139 .loc 1 658 90 discriminator 1 view .LVU634 2140 0638 606A ldr r0, [r4, #36] 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 2141 .loc 1 659 13 discriminator 1 view .LVU635 2142 063a 03F47013 and r3, r3, #3932160 2143 .LVL164: 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2144 .loc 1 668 10 discriminator 1 view .LVU636 2145 063e 181A subs r0, r3, r0 2146 0640 18BF it ne 2147 0642 0120 movne r0, #1 2148 0644 5AE6 b .L151 2149 .LVL165: 2150 .L173: 2151 .LBB306: 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2152 .loc 1 562 7 is_stmt 1 view .LVU637 2153 0646 224A ldr r2, .L180 2154 0648 D369 ldr r3, [r2, #28] ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 75 2155 064a 23F08053 bic r3, r3, #268435456 2156 064e D361 str r3, [r2, #28] 2157 0650 CBE5 b .L59 2158 .LVL166: 2159 .L164: 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2160 .loc 1 562 7 is_stmt 0 view .LVU638 2161 .LBE306: 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2162 .loc 1 349 7 is_stmt 1 discriminator 7 view .LVU639 2163 0652 03F18043 add r3, r3, #1073741824 2164 0656 A3F53C33 sub r3, r3, #192512 2165 065a 1A68 ldr r2, [r3] 2166 065c 42F48022 orr r2, r2, #262144 2167 0660 1A60 str r2, [r3] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2168 .loc 1 349 7 discriminator 7 view .LVU640 2169 0662 1A68 ldr r2, [r3] 2170 0664 42F48032 orr r2, r2, #65536 2171 0668 1A60 str r2, [r3] 2172 066a 01E5 b .L34 2173 .LVL167: 2174 .L172: 2175 .LBB307: 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 2176 .loc 1 528 5 discriminator 7 view .LVU641 2177 066c 42F00402 orr r2, r2, #4 2178 0670 1A62 str r2, [r3, #32] 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 2179 .loc 1 528 5 discriminator 7 view .LVU642 2180 0672 1A6A ldr r2, [r3, #32] 2181 0674 42F00102 orr r2, r2, #1 2182 0678 1A62 str r2, [r3, #32] 2183 067a A1E7 b .L68 2184 .LVL168: 2185 .L86: 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 2186 .loc 1 528 5 is_stmt 0 discriminator 7 view .LVU643 2187 .LBE307: 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2188 .loc 1 626 9 is_stmt 1 view .LVU644 2189 .LBB308: 2190 .LBI308: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2191 .loc 2 981 31 view .LVU645 2192 .LBB309: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2193 .loc 2 983 3 view .LVU646 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2194 .loc 2 988 4 view .LVU647 2195 067c 4FF08073 mov r3, #16777216 2196 .syntax unified 2197 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2198 0680 93FAA3F3 rbit r3, r3 2199 @ 0 "" 2 2200 .LVL169: 2201 .loc 2 1001 3 view .LVU648 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 76 2202 .loc 2 1001 3 is_stmt 0 view .LVU649 2203 .thumb 2204 .syntax unified 2205 .LBE309: 2206 .LBE308: 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2207 .loc 1 626 9 view .LVU650 2208 0684 B3FA83F3 clz r3, r3 2209 0688 03F18453 add r3, r3, #276824064 2210 068c 03F58413 add r3, r3, #1081344 2211 0690 9B00 lsls r3, r3, #2 2212 0692 0022 movs r2, #0 2213 0694 1A60 str r2, [r3] 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2214 .loc 1 629 9 is_stmt 1 view .LVU651 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2215 .loc 1 629 21 is_stmt 0 view .LVU652 2216 0696 FFF7FEFF bl HAL_GetTick 2217 .LVL170: 2218 .LBB310: 2219 .LBB311: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2220 .loc 2 988 4 view .LVU653 2221 069a 4FF00077 mov r7, #33554432 2222 .LBE311: 2223 .LBE310: 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2224 .loc 1 629 21 view .LVU654 2225 069e 0446 mov r4, r0 2226 .LVL171: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2227 .loc 1 632 9 is_stmt 1 view .LVU655 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2228 .loc 1 632 15 is_stmt 0 view .LVU656 2229 06a0 0126 movs r6, #1 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2230 .loc 1 632 14 view .LVU657 2231 06a2 05E0 b .L94 2232 .LVL172: 2233 .L95: 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2234 .loc 1 634 15 view .LVU658 2235 06a4 FFF7FEFF bl HAL_GetTick 2236 .LVL173: 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2237 .loc 1 634 29 view .LVU659 2238 06a8 001B subs r0, r0, r4 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2239 .loc 1 634 13 view .LVU660 2240 06aa 0228 cmp r0, #2 2241 06ac 3FF6FCAE bhi .L37 2242 .L94: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2243 .loc 1 632 14 is_stmt 1 view .LVU661 2244 .LVL174: 2245 .LBB313: 2246 .LBI310: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 77 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2247 .loc 2 981 31 view .LVU662 2248 .LBB312: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2249 .loc 2 983 3 view .LVU663 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2250 .loc 2 988 4 view .LVU664 2251 .syntax unified 2252 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2253 06b0 97FAA7F3 rbit r3, r7 2254 @ 0 "" 2 2255 .LVL175: 2256 .loc 2 1001 3 view .LVU665 2257 .loc 2 1001 3 is_stmt 0 view .LVU666 2258 .thumb 2259 .syntax unified 2260 .LBE312: 2261 .LBE313: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2262 .loc 1 632 15 view .LVU667 2263 06b4 2A68 ldr r2, [r5] 2264 .LVL176: 2265 .LBB314: 2266 .LBI314: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2267 .loc 2 981 31 is_stmt 1 view .LVU668 2268 .LBB315: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2269 .loc 2 983 3 view .LVU669 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2270 .loc 2 988 4 view .LVU670 2271 .syntax unified 2272 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2273 06b6 97FAA7F3 rbit r3, r7 2274 @ 0 "" 2 2275 .thumb 2276 .syntax unified 2277 .LBE315: 2278 .LBE314: 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2279 .loc 1 634 11 view .LVU671 2280 .LVL177: 2281 .LBB317: 2282 .LBB316: 2283 .loc 2 1001 3 view .LVU672 2284 .loc 2 1001 3 is_stmt 0 view .LVU673 2285 .LBE316: 2286 .LBE317: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2287 .loc 1 632 15 view .LVU674 2288 06ba B3FA83F3 clz r3, r3 2289 06be 03F01F03 and r3, r3, #31 2290 06c2 06FA03F3 lsl r3, r6, r3 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2291 .loc 1 632 14 view .LVU675 2292 06c6 1342 tst r3, r2 2293 06c8 ECD1 bne .L95 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 78 2294 06ca 16E6 b .L93 2295 .LVL178: 2296 .L158: 2297 .LCFI9: 2298 .cfi_def_cfa_offset 0 2299 .cfi_restore 4 2300 .cfi_restore 5 2301 .cfi_restore 6 2302 .cfi_restore 7 2303 .cfi_restore 8 2304 .cfi_restore 9 2305 .cfi_restore 14 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2306 .loc 1 325 12 view .LVU676 2307 06cc 0120 movs r0, #1 2308 .LVL179: 2309 .loc 1 669 1 view .LVU677 2310 06ce 7047 bx lr 2311 .L181: 2312 .align 2 2313 .L180: 2314 06d0 00100240 .word 1073876992 2315 .cfi_endproc 2316 .LFE131: 2318 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 2319 .align 1 2320 .p2align 2,,3 2321 .global HAL_RCC_MCOConfig 2322 .syntax unified 2323 .thumb 2324 .thumb_func 2326 HAL_RCC_MCOConfig: 2327 .LVL180: 2328 .LFB133: 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param FLatency FLASH Latency 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * occur when the clock source will be ready. 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * currently used as system clock source. 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 79 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HCLK) of the device. */ 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE ready flag */ 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 80 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the PLL ready flag */ 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI ready flag */ 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 81 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_InitTick (uwTickPrio); 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC clocks control functions 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Peripheral Control functions ##### 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequencies. 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 82 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2329 .loc 1 887 1 is_stmt 1 view -0 2330 .cfi_startproc 2331 @ args = 0, pretend = 0, frame = 24 2332 @ frame_needed = 0, uses_anonymous_args = 0 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; 2333 .loc 1 888 3 view .LVU679 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 2334 .loc 1 891 3 view .LVU680 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; 2335 .loc 1 887 1 is_stmt 0 view .LVU681 2336 0000 30B5 push {r4, r5, lr} 2337 .LCFI10: 2338 .cfi_def_cfa_offset 12 2339 .cfi_offset 4, -12 2340 .cfi_offset 5, -8 2341 .cfi_offset 14, -4 2342 0002 0D46 mov r5, r1 2343 0004 87B0 sub sp, sp, #28 2344 .LCFI11: 2345 .cfi_def_cfa_offset 40 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; 2346 .loc 1 887 1 view .LVU682 2347 0006 1446 mov r4, r2 2348 .loc 1 891 3 view .LVU683 2349 0008 0028 cmp r0, #0 2350 000a 36D1 bne .L205 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 2351 .loc 1 892 3 is_stmt 1 view .LVU684 2352 000c 002C cmp r4, #0 2353 000e 3BD1 bne .L206 2354 .LVL181: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 83 2355 .L184: 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 2356 .loc 1 893 3 view .LVU685 2357 0010 35F00073 bics r3, r5, #33554432 2358 0014 11D0 beq .L185 2359 .loc 1 893 3 is_stmt 0 discriminator 2 view .LVU686 2360 0016 25F08063 bic r3, r5, #67108864 2361 001a B3F1407F cmp r3, #50331648 2362 001e 0CD0 beq .L185 2363 .loc 1 893 3 discriminator 3 view .LVU687 2364 0020 25F08073 bic r3, r5, #16777216 2365 0024 B3F1806F cmp r3, #67108864 2366 0028 07D0 beq .L185 2367 .loc 1 893 3 discriminator 5 view .LVU688 2368 002a B5F1C06F cmp r5, #100663296 2369 002e 04D0 beq .L185 2370 .loc 1 893 3 discriminator 7 view .LVU689 2371 0030 1848 ldr r0, .L207 2372 0032 40F27D31 movw r1, #893 2373 0036 FFF7FEFF bl assert_failed 2374 .LVL182: 2375 .L185: 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Prevent unused argument(s) compilation warning */ 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** UNUSED(RCC_MCOx); 2376 .loc 1 896 3 is_stmt 1 view .LVU690 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; 2377 .loc 1 899 3 view .LVU691 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; 2378 .loc 1 900 18 is_stmt 0 view .LVU692 2379 003a 0322 movs r2, #3 2380 .LBB318: 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* MCO1 Clock Enable */ 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MCO1_CLK_ENABLE(); 2381 .loc 1 906 3 view .LVU693 2382 003c 164C ldr r4, .L207+4 2383 .LVL183: 2384 .loc 1 906 3 view .LVU694 2385 .LBE318: 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; 2386 .loc 1 900 18 view .LVU695 2387 003e 0492 str r2, [sp, #16] 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; 2388 .loc 1 901 18 view .LVU696 2389 0040 0023 movs r3, #0 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; 2390 .loc 1 902 18 view .LVU697 2391 0042 4FF48072 mov r2, #256 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; 2392 .loc 1 899 18 view .LVU698 2393 0046 0221 movs r1, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 84 2394 0048 0291 str r1, [sp, #8] 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; 2395 .loc 1 900 3 is_stmt 1 view .LVU699 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; 2396 .loc 1 901 3 view .LVU700 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; 2397 .loc 1 901 18 is_stmt 0 view .LVU701 2398 004a 0393 str r3, [sp, #12] 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; 2399 .loc 1 902 3 is_stmt 1 view .LVU702 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; 2400 .loc 1 902 18 is_stmt 0 view .LVU703 2401 004c 0192 str r2, [sp, #4] 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2402 .loc 1 903 3 is_stmt 1 view .LVU704 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2403 .loc 1 903 18 is_stmt 0 view .LVU705 2404 004e 0593 str r3, [sp, #20] 2405 .loc 1 906 3 is_stmt 1 view .LVU706 2406 .LBB319: 2407 .loc 1 906 3 view .LVU707 2408 .loc 1 906 3 view .LVU708 2409 0050 6369 ldr r3, [r4, #20] 2410 0052 43F40033 orr r3, r3, #131072 2411 0056 6361 str r3, [r4, #20] 2412 .loc 1 906 3 view .LVU709 2413 0058 6369 ldr r3, [r4, #20] 2414 005a 03F40033 and r3, r3, #131072 2415 005e 0093 str r3, [sp] 2416 .loc 1 906 3 view .LVU710 2417 .LBE319: 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); 2418 .loc 1 908 3 is_stmt 0 view .LVU711 2419 0060 01A9 add r1, sp, #4 2420 0062 4FF09040 mov r0, #1207959552 2421 .LBB320: 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2422 .loc 1 906 3 view .LVU712 2423 0066 009B ldr r3, [sp] 2424 .LBE320: 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2425 .loc 1 906 3 is_stmt 1 view .LVU713 2426 .loc 1 908 3 view .LVU714 2427 0068 FFF7FEFF bl HAL_GPIO_Init 2428 .LVL184: 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO clock source */ 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); 2429 .loc 1 911 3 view .LVU715 2430 006c 6368 ldr r3, [r4, #4] 2431 006e 23F0E063 bic r3, r3, #117440512 2432 0072 2B43 orrs r3, r3, r5 2433 0074 6360 str r3, [r4, #4] 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2434 .loc 1 912 1 is_stmt 0 view .LVU716 2435 0076 07B0 add sp, sp, #28 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 85 2436 .LCFI12: 2437 .cfi_remember_state 2438 .cfi_def_cfa_offset 12 2439 @ sp needed 2440 0078 30BD pop {r4, r5, pc} 2441 .LVL185: 2442 .L205: 2443 .LCFI13: 2444 .cfi_restore_state 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 2445 .loc 1 891 3 discriminator 1 view .LVU717 2446 007a 0648 ldr r0, .L207 2447 .LVL186: 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 2448 .loc 1 891 3 discriminator 1 view .LVU718 2449 007c 40F27B31 movw r1, #891 2450 .LVL187: 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 2451 .loc 1 891 3 discriminator 1 view .LVU719 2452 0080 FFF7FEFF bl assert_failed 2453 .LVL188: 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 2454 .loc 1 892 3 is_stmt 1 discriminator 1 view .LVU720 2455 0084 002C cmp r4, #0 2456 0086 C3D0 beq .L184 2457 .L206: 2458 0088 0248 ldr r0, .L207 2459 008a 4FF45F71 mov r1, #892 2460 008e FFF7FEFF bl assert_failed 2461 .LVL189: 2462 0092 BDE7 b .L184 2463 .L208: 2464 .align 2 2465 .L207: 2466 0094 00000000 .word .LC0 2467 0098 00100240 .word 1073876992 2468 .cfi_endproc 2469 .LFE133: 2471 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 2472 .align 1 2473 .p2align 2,,3 2474 .global HAL_RCC_EnableCSS 2475 .syntax unified 2476 .thumb 2477 .thumb_func 2479 HAL_RCC_EnableCSS: 2480 .LFB134: 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Enables the Clock Security System. 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 86 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2481 .loc 1 924 1 view -0 2482 .cfi_startproc 2483 @ args = 0, pretend = 0, frame = 0 2484 @ frame_needed = 0, uses_anonymous_args = 0 2485 @ link register save eliminated. 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; 2486 .loc 1 925 3 view .LVU722 2487 .LVL190: 2488 .LBB321: 2489 .LBI321: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2490 .loc 2 981 31 view .LVU723 2491 .LBB322: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2492 .loc 2 983 3 view .LVU724 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2493 .loc 2 988 4 view .LVU725 2494 0000 4FF40023 mov r3, #524288 2495 .syntax unified 2496 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2497 0004 93FAA3F3 rbit r3, r3 2498 @ 0 "" 2 2499 .LVL191: 2500 .loc 2 1001 3 view .LVU726 2501 .loc 2 1001 3 is_stmt 0 view .LVU727 2502 .thumb 2503 .syntax unified 2504 .LBE322: 2505 .LBE321: 2506 .loc 1 925 22 view .LVU728 2507 0008 B3FA83F3 clz r3, r3 2508 000c 03F18453 add r3, r3, #276824064 2509 0010 03F58413 add r3, r3, #1081344 2510 0014 9B00 lsls r3, r3, #2 2511 .loc 1 925 38 view .LVU729 2512 0016 0122 movs r2, #1 2513 0018 1A60 str r2, [r3] 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2514 .loc 1 926 1 view .LVU730 2515 001a 7047 bx lr 2516 .cfi_endproc 2517 .LFE134: 2519 .section .text.HAL_RCC_DisableCSS,"ax",%progbits 2520 .align 1 2521 .p2align 2,,3 2522 .global HAL_RCC_DisableCSS 2523 .syntax unified 2524 .thumb 2525 .thumb_func 2527 HAL_RCC_DisableCSS: 2528 .LFB135: 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Disables the Clock Security System. 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 87 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2529 .loc 1 933 1 is_stmt 1 view -0 2530 .cfi_startproc 2531 @ args = 0, pretend = 0, frame = 0 2532 @ frame_needed = 0, uses_anonymous_args = 0 2533 @ link register save eliminated. 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; 2534 .loc 1 934 3 view .LVU732 2535 .LVL192: 2536 .LBB323: 2537 .LBI323: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2538 .loc 2 981 31 view .LVU733 2539 .LBB324: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2540 .loc 2 983 3 view .LVU734 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2541 .loc 2 988 4 view .LVU735 2542 0000 4FF40023 mov r3, #524288 2543 .syntax unified 2544 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2545 0004 93FAA3F3 rbit r3, r3 2546 @ 0 "" 2 2547 .LVL193: 2548 .loc 2 1001 3 view .LVU736 2549 .loc 2 1001 3 is_stmt 0 view .LVU737 2550 .thumb 2551 .syntax unified 2552 .LBE324: 2553 .LBE323: 2554 .loc 1 934 22 view .LVU738 2555 0008 B3FA83F3 clz r3, r3 2556 000c 03F18453 add r3, r3, #276824064 2557 0010 03F58413 add r3, r3, #1081344 2558 0014 9B00 lsls r3, r3, #2 2559 .loc 1 934 38 view .LVU739 2560 0016 0022 movs r2, #0 2561 0018 1A60 str r2, [r3] 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2562 .loc 1 935 1 view .LVU740 2563 001a 7047 bx lr 2564 .cfi_endproc 2565 .LFE135: 2567 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 2568 .align 1 2569 .p2align 2,,3 2570 .global HAL_RCC_GetSysClockFreq 2571 .syntax unified 2572 .thumb 2573 .thumb_func 2575 HAL_RCC_GetSysClockFreq: 2576 .LFB136: 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 88 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * constant and the selected clock source: 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor. 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * in voltage and temperature. 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * have wrong result. 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * value for HSE crystal. 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval SYSCLK frequency 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2577 .loc 1 967 1 is_stmt 1 view -0 2578 .cfi_startproc 2579 @ args = 0, pretend = 0, frame = 0 2580 @ frame_needed = 0, uses_anonymous_args = 0 2581 @ link register save eliminated. 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 2582 .loc 1 968 3 view .LVU742 2583 .LVL194: 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; 2584 .loc 1 969 3 view .LVU743 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tmpreg = RCC->CFGR; 2585 .loc 1 971 3 view .LVU744 2586 .loc 1 971 10 is_stmt 0 view .LVU745 2587 0000 0E4A ldr r2, .L220 2588 0002 5368 ldr r3, [r2, #4] 2589 .LVL195: 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) 2590 .loc 1 974 3 is_stmt 1 view .LVU746 2591 .loc 1 974 18 is_stmt 0 view .LVU747 2592 0004 03F00C01 and r1, r3, #12 2593 .loc 1 974 3 view .LVU748 2594 0008 0829 cmp r1, #8 2595 000a 01D0 beq .L219 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 89 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; 2596 .loc 1 978 20 view .LVU749 2597 000c 0C48 ldr r0, .L220+4 2598 .LVL196: 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC_HSE_PREDIV) == RCC_CFGR_PLLSRC_HSE_PREDIV) 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ 1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = pllclk; 1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ 1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** default: /* HSI used as system clock */ 1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return sysclockfreq; 2599 .loc 1 1018 3 is_stmt 1 view .LVU750 1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2600 .loc 1 1019 1 is_stmt 0 view .LVU751 2601 000e 7047 bx lr 2602 .LVL197: 2603 .L219: 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 2604 .loc 1 983 7 is_stmt 1 view .LVU752 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 2605 .loc 1 983 72 is_stmt 0 view .LVU753 2606 0010 C3F38340 ubfx r0, r3, #18, #4 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 90 2607 .loc 1 967 1 view .LVU754 2608 0014 10B4 push {r4} 2609 .LCFI14: 2610 .cfi_def_cfa_offset 4 2611 .cfi_offset 4, -4 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 2612 .loc 1 984 49 view .LVU755 2613 0016 D26A ldr r2, [r2, #44] 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 2614 .loc 1 983 34 view .LVU756 2615 0018 0A4C ldr r4, .L220+8 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 2616 .loc 1 984 34 view .LVU757 2617 001a 0B49 ldr r1, .L220+12 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 2618 .loc 1 983 14 view .LVU758 2619 001c 205C ldrb r0, [r4, r0] @ zero_extendqisi2 2620 .LVL198: 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 2621 .loc 1 984 7 is_stmt 1 view .LVU759 2622 .loc 1 1019 1 is_stmt 0 view .LVU760 2623 001e 5DF8044B ldr r4, [sp], #4 2624 .LCFI15: 2625 .cfi_restore 4 2626 .cfi_def_cfa_offset 0 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2627 .loc 1 986 10 view .LVU761 2628 0022 DB03 lsls r3, r3, #15 2629 .LVL199: 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2630 .loc 1 989 18 view .LVU762 2631 0024 4CBF ite mi 2632 0026 064B ldrmi r3, .L220+4 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2633 .loc 1 994 16 view .LVU763 2634 0028 084B ldrpl r3, .L220+16 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 2635 .loc 1 984 77 view .LVU764 2636 002a 02F00F02 and r2, r2, #15 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 2637 .loc 1 984 34 view .LVU765 2638 002e 8A5C ldrb r2, [r1, r2] @ zero_extendqisi2 2639 .LVL200: 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2640 .loc 1 986 7 is_stmt 1 view .LVU766 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2641 .loc 1 989 9 view .LVU767 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2642 .loc 1 989 18 is_stmt 0 view .LVU768 2643 0030 48BF it mi 2644 0032 B3FBF2F3 udivmi r3, r3, r2 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2645 .loc 1 994 9 is_stmt 1 view .LVU769 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2646 .loc 1 994 16 is_stmt 0 view .LVU770 2647 0036 03FB00F0 mul r0, r3, r0 2648 .LVL201: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 91 2649 .loc 1 1019 1 view .LVU771 2650 003a 7047 bx lr 2651 .L221: 2652 .align 2 2653 .L220: 2654 003c 00100240 .word 1073876992 2655 0040 00127A00 .word 8000000 2656 0044 00000000 .word .LANCHOR0 2657 0048 00000000 .word .LANCHOR1 2658 004c 00093D00 .word 4000000 2659 .cfi_endproc 2660 .LFE136: 2662 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 2663 .align 1 2664 .p2align 2,,3 2665 .global HAL_RCC_ClockConfig 2666 .syntax unified 2667 .thumb 2668 .thumb_func 2670 HAL_RCC_ClockConfig: 2671 .LVL202: 2672 .LFB132: 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; 2673 .loc 1 695 1 is_stmt 1 view -0 2674 .cfi_startproc 2675 @ args = 0, pretend = 0, frame = 0 2676 @ frame_needed = 0, uses_anonymous_args = 0 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2677 .loc 1 696 3 view .LVU773 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2678 .loc 1 699 3 view .LVU774 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2679 .loc 1 699 5 is_stmt 0 view .LVU775 2680 0000 0028 cmp r0, #0 2681 0002 00F0E280 beq .L299 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 2682 .loc 1 705 3 is_stmt 1 view .LVU776 2683 0006 0368 ldr r3, [r0] 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; 2684 .loc 1 695 1 is_stmt 0 view .LVU777 2685 0008 2DE9F041 push {r4, r5, r6, r7, r8, lr} 2686 .LCFI16: 2687 .cfi_def_cfa_offset 24 2688 .cfi_offset 4, -24 2689 .cfi_offset 5, -20 2690 .cfi_offset 6, -16 2691 .cfi_offset 7, -12 2692 .cfi_offset 8, -8 2693 .cfi_offset 14, -4 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 2694 .loc 1 705 3 view .LVU778 2695 000c 1E07 lsls r6, r3, #28 2696 000e 0D46 mov r5, r1 2697 0010 0446 mov r4, r0 2698 0012 00F0D480 beq .L300 2699 .LVL203: 2700 .L225: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 92 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2701 .loc 1 706 3 is_stmt 1 view .LVU779 2702 0016 022D cmp r5, #2 2703 0018 00F2CB80 bhi .L301 2704 .L226: 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2705 .loc 1 713 3 view .LVU780 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2706 .loc 1 713 17 is_stmt 0 view .LVU781 2707 001c 794A ldr r2, .L304 2708 001e 1368 ldr r3, [r2] 2709 0020 03F00703 and r3, r3, #7 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2710 .loc 1 713 5 view .LVU782 2711 0024 AB42 cmp r3, r5 2712 0026 0CD2 bcs .L231 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2713 .loc 1 716 5 is_stmt 1 view .LVU783 2714 0028 1368 ldr r3, [r2] 2715 002a 23F00703 bic r3, r3, #7 2716 002e 2B43 orrs r3, r3, r5 2717 0030 1360 str r3, [r2] 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2718 .loc 1 720 5 view .LVU784 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2719 .loc 1 720 8 is_stmt 0 view .LVU785 2720 0032 1368 ldr r3, [r2] 2721 0034 03F00703 and r3, r3, #7 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2722 .loc 1 720 7 view .LVU786 2723 0038 AB42 cmp r3, r5 2724 003a 02D0 beq .L231 2725 .LVL204: 2726 .L230: 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2727 .loc 1 701 12 view .LVU787 2728 003c 0120 movs r0, #1 2729 .L224: 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2730 .loc 1 814 1 view .LVU788 2731 003e BDE8F081 pop {r4, r5, r6, r7, r8, pc} 2732 .LVL205: 2733 .L231: 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2734 .loc 1 727 3 is_stmt 1 view .LVU789 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2735 .loc 1 727 25 is_stmt 0 view .LVU790 2736 0042 2368 ldr r3, [r4] 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2737 .loc 1 727 5 view .LVU791 2738 0044 9807 lsls r0, r3, #30 2739 0046 1ED5 bpl .L229 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2740 .loc 1 729 5 is_stmt 1 view .LVU792 2741 0048 A168 ldr r1, [r4, #8] 2742 004a 31F08002 bics r2, r1, #128 2743 004e 14D0 beq .L232 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 93 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2744 .loc 1 729 5 is_stmt 0 discriminator 2 view .LVU793 2745 0050 21F02002 bic r2, r1, #32 2746 0054 902A cmp r2, #144 2747 0056 10D0 beq .L232 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2748 .loc 1 729 5 discriminator 3 view .LVU794 2749 0058 21F04002 bic r2, r1, #64 2750 005c A02A cmp r2, #160 2751 005e 0CD0 beq .L232 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2752 .loc 1 729 5 discriminator 5 view .LVU795 2753 0060 21F01002 bic r2, r1, #16 2754 0064 C02A cmp r2, #192 2755 0066 08D0 beq .L232 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2756 .loc 1 729 5 discriminator 8 view .LVU796 2757 0068 F029 cmp r1, #240 2758 006a 06D0 beq .L232 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 2759 .loc 1 729 5 discriminator 9 view .LVU797 2760 006c 40F2D921 movw r1, #729 2761 0070 6548 ldr r0, .L304+4 2762 0072 FFF7FEFF bl assert_failed 2763 .LVL206: 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2764 .loc 1 730 5 discriminator 9 view .LVU798 2765 0076 A168 ldr r1, [r4, #8] 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2766 .loc 1 734 25 discriminator 9 view .LVU799 2767 0078 2368 ldr r3, [r4] 2768 .L232: 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2769 .loc 1 730 5 is_stmt 1 view .LVU800 2770 007a 6448 ldr r0, .L304+8 2771 007c 4268 ldr r2, [r0, #4] 2772 007e 22F0F002 bic r2, r2, #240 2773 0082 0A43 orrs r2, r2, r1 2774 0084 4260 str r2, [r0, #4] 2775 .L229: 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2776 .loc 1 734 3 view .LVU801 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2777 .loc 1 734 5 is_stmt 0 view .LVU802 2778 0086 D907 lsls r1, r3, #31 2779 0088 33D5 bpl .L242 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2780 .loc 1 736 5 is_stmt 1 view .LVU803 2781 008a 6368 ldr r3, [r4, #4] 2782 008c 022B cmp r3, #2 2783 008e 00F2B080 bhi .L302 2784 .L236: 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2785 .loc 1 739 5 view .LVU804 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2786 .loc 1 739 7 is_stmt 0 view .LVU805 2787 0092 012B cmp r3, #1 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 94 2788 0094 00F09B80 beq .L303 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2789 .loc 1 748 10 is_stmt 1 view .LVU806 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2790 .loc 1 751 7 view .LVU807 2791 .LVL207: 2792 .LBB325: 2793 .LBI325: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2794 .loc 2 981 31 view .LVU808 2795 .LBB326: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2796 .loc 2 983 3 view .LVU809 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2797 .loc 2 988 4 view .LVU810 2798 .LBE326: 2799 .LBE325: 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2800 .loc 1 760 7 view .LVU811 2801 .LBB328: 2802 .LBI328: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2803 .loc 2 981 31 view .LVU812 2804 .LBB329: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2805 .loc 2 983 3 view .LVU813 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2806 .loc 2 988 4 view .LVU814 2807 .LBE329: 2808 .LBE328: 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2809 .loc 1 748 12 is_stmt 0 view .LVU815 2810 0098 022B cmp r3, #2 2811 .LBB331: 2812 .LBB327: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2813 .loc 2 988 4 view .LVU816 2814 009a 0CBF ite eq 2815 009c 4FF00072 moveq r2, #33554432 2816 .LBE327: 2817 .LBE331: 2818 .LBB332: 2819 .LBB330: 2820 00a0 0222 movne r2, #2 2821 .syntax unified 2822 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2823 00a2 92FAA2F1 rbit r1, r2 2824 @ 0 "" 2 2825 .LVL208: 2826 .loc 2 1001 3 is_stmt 1 view .LVU817 2827 .loc 2 1001 3 is_stmt 0 view .LVU818 2828 .thumb 2829 .syntax unified 2830 .LBE330: 2831 .LBE332: 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2832 .loc 1 760 10 view .LVU819 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 95 2833 00a6 5949 ldr r1, .L304+8 2834 00a8 0868 ldr r0, [r1] 2835 .LVL209: 2836 .LBB333: 2837 .LBI333: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2838 .loc 2 981 31 is_stmt 1 view .LVU820 2839 .LBB334: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 2840 .loc 2 983 3 view .LVU821 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2841 .loc 2 988 4 view .LVU822 2842 .syntax unified 2843 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2844 00aa 92FAA2F2 rbit r2, r2 2845 @ 0 "" 2 2846 .LVL210: 2847 .loc 2 1001 3 view .LVU823 2848 .loc 2 1001 3 is_stmt 0 view .LVU824 2849 .thumb 2850 .syntax unified 2851 .LBE334: 2852 .LBE333: 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2853 .loc 1 760 10 view .LVU825 2854 00ae B2FA82F2 clz r2, r2 2855 00b2 02F01F02 and r2, r2, #31 2856 00b6 0121 movs r1, #1 2857 00b8 01FA02F2 lsl r2, r1, r2 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2858 .loc 1 760 9 view .LVU826 2859 00bc 0242 tst r2, r0 2860 00be BDD0 beq .L230 2861 .LVL211: 2862 .L238: 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2863 .loc 1 766 5 is_stmt 1 view .LVU827 2864 00c0 524E ldr r6, .L304+8 2865 00c2 7268 ldr r2, [r6, #4] 2866 00c4 22F00302 bic r2, r2, #3 2867 00c8 1343 orrs r3, r3, r2 2868 00ca 7360 str r3, [r6, #4] 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2869 .loc 1 769 5 view .LVU828 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2870 .loc 1 769 17 is_stmt 0 view .LVU829 2871 00cc FFF7FEFF bl HAL_GetTick 2872 .LVL212: 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2873 .loc 1 773 10 view .LVU830 2874 00d0 41F28838 movw r8, #5000 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2875 .loc 1 769 17 view .LVU831 2876 00d4 0746 mov r7, r0 2877 .LVL213: 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2878 .loc 1 771 5 is_stmt 1 view .LVU832 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 96 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2879 .loc 1 771 11 is_stmt 0 view .LVU833 2880 00d6 05E0 b .L240 2881 .LVL214: 2882 .L241: 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2883 .loc 1 773 12 view .LVU834 2884 00d8 FFF7FEFF bl HAL_GetTick 2885 .LVL215: 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2886 .loc 1 773 26 view .LVU835 2887 00dc C01B subs r0, r0, r7 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2888 .loc 1 773 10 view .LVU836 2889 00de 4045 cmp r0, r8 2890 00e0 00F28E80 bhi .L248 2891 .L240: 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2892 .loc 1 773 7 is_stmt 1 view .LVU837 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2893 .loc 1 771 11 view .LVU838 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2894 .loc 1 771 12 is_stmt 0 view .LVU839 2895 00e4 7368 ldr r3, [r6, #4] 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2896 .loc 1 771 78 view .LVU840 2897 00e6 6268 ldr r2, [r4, #4] 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2898 .loc 1 771 12 view .LVU841 2899 00e8 03F00C03 and r3, r3, #12 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2900 .loc 1 771 11 view .LVU842 2901 00ec B3EB820F cmp r3, r2, lsl #2 2902 00f0 F2D1 bne .L241 2903 .LVL216: 2904 .L242: 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2905 .loc 1 780 3 is_stmt 1 view .LVU843 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2906 .loc 1 780 17 is_stmt 0 view .LVU844 2907 00f2 444A ldr r2, .L304 2908 00f4 1368 ldr r3, [r2] 2909 00f6 03F00703 and r3, r3, #7 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2910 .loc 1 780 5 view .LVU845 2911 00fa AB42 cmp r3, r5 2912 00fc 09D9 bls .L235 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2913 .loc 1 783 5 is_stmt 1 view .LVU846 2914 00fe 1368 ldr r3, [r2] 2915 0100 23F00703 bic r3, r3, #7 2916 0104 2B43 orrs r3, r3, r5 2917 0106 1360 str r3, [r2] 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2918 .loc 1 787 5 view .LVU847 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2919 .loc 1 787 8 is_stmt 0 view .LVU848 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 97 2920 0108 1368 ldr r3, [r2] 2921 010a 03F00703 and r3, r3, #7 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2922 .loc 1 787 7 view .LVU849 2923 010e AB42 cmp r3, r5 2924 0110 94D1 bne .L230 2925 .L235: 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2926 .loc 1 794 3 is_stmt 1 view .LVU850 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2927 .loc 1 794 25 is_stmt 0 view .LVU851 2928 0112 2368 ldr r3, [r4] 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2929 .loc 1 794 5 view .LVU852 2930 0114 5A07 lsls r2, r3, #29 2931 0116 18D5 bpl .L244 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 2932 .loc 1 796 5 is_stmt 1 view .LVU853 2933 0118 E168 ldr r1, [r4, #12] 2934 011a 31F48062 bics r2, r1, #1024 2935 011e 0ED0 beq .L245 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 2936 .loc 1 796 5 is_stmt 0 discriminator 2 view .LVU854 2937 0120 21F40072 bic r2, r1, #512 2938 0124 B2F5A06F cmp r2, #1280 2939 0128 09D0 beq .L245 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 2940 .loc 1 796 5 discriminator 3 view .LVU855 2941 012a B1F5C06F cmp r1, #1536 2942 012e 06D0 beq .L245 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 2943 .loc 1 796 5 discriminator 5 view .LVU856 2944 0130 4FF44771 mov r1, #796 2945 0134 3448 ldr r0, .L304+4 2946 0136 FFF7FEFF bl assert_failed 2947 .LVL217: 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2948 .loc 1 797 5 discriminator 5 view .LVU857 2949 013a E168 ldr r1, [r4, #12] 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2950 .loc 1 801 25 discriminator 5 view .LVU858 2951 013c 2368 ldr r3, [r4] 2952 .L245: 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2953 .loc 1 797 5 is_stmt 1 view .LVU859 2954 013e 3348 ldr r0, .L304+8 2955 0140 4268 ldr r2, [r0, #4] 2956 0142 22F4E062 bic r2, r2, #1792 2957 0146 0A43 orrs r2, r2, r1 2958 0148 4260 str r2, [r0, #4] 2959 .L244: 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2960 .loc 1 801 3 view .LVU860 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2961 .loc 1 801 5 is_stmt 0 view .LVU861 2962 014a 1B07 lsls r3, r3, #28 2963 014c 18D5 bpl .L246 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 98 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 2964 .loc 1 803 5 is_stmt 1 view .LVU862 2965 014e 2269 ldr r2, [r4, #16] 2966 0150 32F48063 bics r3, r2, #1024 2967 0154 0DD0 beq .L247 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 2968 .loc 1 803 5 is_stmt 0 discriminator 2 view .LVU863 2969 0156 22F40073 bic r3, r2, #512 2970 015a B3F5A06F cmp r3, #1280 2971 015e 08D0 beq .L247 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 2972 .loc 1 803 5 discriminator 3 view .LVU864 2973 0160 B2F5C06F cmp r2, #1536 2974 0164 05D0 beq .L247 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 2975 .loc 1 803 5 discriminator 5 view .LVU865 2976 0166 2848 ldr r0, .L304+4 2977 0168 40F22331 movw r1, #803 2978 016c FFF7FEFF bl assert_failed 2979 .LVL218: 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2980 .loc 1 804 5 discriminator 5 view .LVU866 2981 0170 2269 ldr r2, [r4, #16] 2982 .L247: 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2983 .loc 1 804 5 is_stmt 1 view .LVU867 2984 0172 2649 ldr r1, .L304+8 2985 0174 4B68 ldr r3, [r1, #4] 2986 0176 23F46053 bic r3, r3, #14336 2987 017a 43EAC203 orr r3, r3, r2, lsl #3 2988 017e 4B60 str r3, [r1, #4] 2989 .L246: 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2990 .loc 1 808 3 view .LVU868 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2991 .loc 1 808 21 is_stmt 0 view .LVU869 2992 0180 FFF7FEFF bl HAL_RCC_GetSysClockFreq 2993 .LVL219: 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 2994 .loc 1 808 68 view .LVU870 2995 0184 214B ldr r3, .L304+8 2996 .LBB335: 2997 .LBB336: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2998 .loc 2 988 4 view .LVU871 2999 0186 F022 movs r2, #240 3000 .LBE336: 3001 .LBE335: 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3002 .loc 1 808 68 view .LVU872 3003 0188 5B68 ldr r3, [r3, #4] 3004 .LVL220: 3005 .LBB338: 3006 .LBI335: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3007 .loc 2 981 31 is_stmt 1 view .LVU873 3008 .LBB337: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 99 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 3009 .loc 2 983 3 view .LVU874 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3010 .loc 2 988 4 view .LVU875 3011 .syntax unified 3012 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3013 018a 92FAA2F2 rbit r2, r2 3014 @ 0 "" 2 3015 .LVL221: 3016 .loc 2 1001 3 view .LVU876 3017 .loc 2 1001 3 is_stmt 0 view .LVU877 3018 .thumb 3019 .syntax unified 3020 .LBE337: 3021 .LBE338: 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3022 .loc 1 808 94 view .LVU878 3023 018e B2FA82F2 clz r2, r2 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3024 .loc 1 808 75 view .LVU879 3025 0192 03F0F003 and r3, r3, #240 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3026 .loc 1 808 91 view .LVU880 3027 0196 D340 lsrs r3, r3, r2 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3028 .loc 1 808 63 view .LVU881 3029 0198 1D4A ldr r2, .L304+12 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3030 .loc 1 811 3 view .LVU882 3031 019a 1E49 ldr r1, .L304+16 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3032 .loc 1 808 63 view .LVU883 3033 019c D35C ldrb r3, [r2, r3] @ zero_extendqisi2 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3034 .loc 1 808 19 view .LVU884 3035 019e 1E4A ldr r2, .L304+20 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3036 .loc 1 808 47 view .LVU885 3037 01a0 20FA03F3 lsr r3, r0, r3 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3038 .loc 1 811 3 view .LVU886 3039 01a4 0868 ldr r0, [r1] 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3040 .loc 1 808 19 view .LVU887 3041 01a6 1360 str r3, [r2] 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3042 .loc 1 811 3 is_stmt 1 view .LVU888 3043 01a8 FFF7FEFF bl HAL_InitTick 3044 .LVL222: 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3045 .loc 1 813 3 view .LVU889 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3046 .loc 1 813 10 is_stmt 0 view .LVU890 3047 01ac 0020 movs r0, #0 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3048 .loc 1 814 1 view .LVU891 3049 01ae BDE8F081 pop {r4, r5, r6, r7, r8, pc} ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 100 3050 .LVL223: 3051 .L301: 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3052 .loc 1 706 3 discriminator 1 view .LVU892 3053 01b2 1548 ldr r0, .L304+4 3054 01b4 40F2C221 movw r1, #706 3055 01b8 FFF7FEFF bl assert_failed 3056 .LVL224: 3057 01bc 2EE7 b .L226 3058 .LVL225: 3059 .L300: 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 3060 .loc 1 705 3 discriminator 1 view .LVU893 3061 01be 1248 ldr r0, .L304+4 3062 .LVL226: 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 3063 .loc 1 705 3 discriminator 1 view .LVU894 3064 01c0 40F2C121 movw r1, #705 3065 .LVL227: 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 3066 .loc 1 705 3 discriminator 1 view .LVU895 3067 01c4 FFF7FEFF bl assert_failed 3068 .LVL228: 3069 01c8 25E7 b .L225 3070 .LVL229: 3071 .L299: 3072 .LCFI17: 3073 .cfi_def_cfa_offset 0 3074 .cfi_restore 4 3075 .cfi_restore 5 3076 .cfi_restore 6 3077 .cfi_restore 7 3078 .cfi_restore 8 3079 .cfi_restore 14 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3080 .loc 1 701 12 view .LVU896 3081 01ca 0120 movs r0, #1 3082 .LVL230: 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3083 .loc 1 814 1 view .LVU897 3084 01cc 7047 bx lr 3085 .LVL231: 3086 .L303: 3087 .LCFI18: 3088 .cfi_def_cfa_offset 24 3089 .cfi_offset 4, -24 3090 .cfi_offset 5, -20 3091 .cfi_offset 6, -16 3092 .cfi_offset 7, -12 3093 .cfi_offset 8, -8 3094 .cfi_offset 14, -4 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3095 .loc 1 742 7 is_stmt 1 view .LVU898 3096 .LBB339: 3097 .LBI339: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3098 .loc 2 981 31 view .LVU899 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 101 3099 .LBB340: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 3100 .loc 2 983 3 view .LVU900 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3101 .loc 2 988 4 view .LVU901 3102 01ce 4FF40032 mov r2, #131072 3103 .syntax unified 3104 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3105 01d2 92FAA2F1 rbit r1, r2 3106 @ 0 "" 2 3107 .LVL232: 3108 .loc 2 1001 3 view .LVU902 3109 .loc 2 1001 3 is_stmt 0 view .LVU903 3110 .thumb 3111 .syntax unified 3112 .LBE340: 3113 .LBE339: 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3114 .loc 1 742 10 view .LVU904 3115 01d6 0D49 ldr r1, .L304+8 3116 01d8 0968 ldr r1, [r1] 3117 .LVL233: 3118 .LBB341: 3119 .LBI341: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3120 .loc 2 981 31 is_stmt 1 view .LVU905 3121 .LBB342: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 3122 .loc 2 983 3 view .LVU906 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3123 .loc 2 988 4 view .LVU907 3124 .syntax unified 3125 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3126 01da 92FAA2F2 rbit r2, r2 3127 @ 0 "" 2 3128 .LVL234: 3129 .loc 2 1001 3 view .LVU908 3130 .loc 2 1001 3 is_stmt 0 view .LVU909 3131 .thumb 3132 .syntax unified 3133 .LBE342: 3134 .LBE341: 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3135 .loc 1 742 10 view .LVU910 3136 01de B2FA82F2 clz r2, r2 3137 01e2 02F01F02 and r2, r2, #31 3138 01e6 03FA02F2 lsl r2, r3, r2 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3139 .loc 1 742 9 view .LVU911 3140 01ea 0A42 tst r2, r1 3141 01ec 7FF468AF bne .L238 3142 01f0 24E7 b .L230 3143 .L302: 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3144 .loc 1 736 5 discriminator 1 view .LVU912 3145 01f2 0548 ldr r0, .L304+4 3146 01f4 4FF43871 mov r1, #736 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 102 3147 01f8 FFF7FEFF bl assert_failed 3148 .LVL235: 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3149 .loc 1 739 25 discriminator 1 view .LVU913 3150 01fc 6368 ldr r3, [r4, #4] 3151 01fe 48E7 b .L236 3152 .LVL236: 3153 .L248: 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3154 .loc 1 775 16 view .LVU914 3155 0200 0320 movs r0, #3 3156 0202 1CE7 b .L224 3157 .L305: 3158 .align 2 3159 .L304: 3160 0204 00200240 .word 1073881088 3161 0208 00000000 .word .LC0 3162 020c 00100240 .word 1073876992 3163 0210 00000000 .word AHBPrescTable 3164 0214 00000000 .word uwTickPrio 3165 0218 00000000 .word SystemCoreClock 3166 .cfi_endproc 3167 .LFE132: 3169 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 3170 .align 1 3171 .p2align 2,,3 3172 .global HAL_RCC_GetHCLKFreq 3173 .syntax unified 3174 .thumb 3175 .thumb_func 3177 HAL_RCC_GetHCLKFreq: 3178 .LFB137: 1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the HCLK frequency 1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated within this function 1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HCLK frequency 1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3179 .loc 1 1031 1 is_stmt 1 view -0 3180 .cfi_startproc 3181 @ args = 0, pretend = 0, frame = 0 3182 @ frame_needed = 0, uses_anonymous_args = 0 3183 @ link register save eliminated. 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return SystemCoreClock; 3184 .loc 1 1032 3 view .LVU916 3185 .loc 1 1032 10 is_stmt 0 view .LVU917 3186 0000 014B ldr r3, .L307 1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3187 .loc 1 1033 1 view .LVU918 3188 0002 1868 ldr r0, [r3] 3189 0004 7047 bx lr ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 103 3190 .L308: 3191 0006 00BF .align 2 3192 .L307: 3193 0008 00000000 .word SystemCoreClock 3194 .cfi_endproc 3195 .LFE137: 3197 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 3198 .align 1 3199 .p2align 2,,3 3200 .global HAL_RCC_GetPCLK1Freq 3201 .syntax unified 3202 .thumb 3203 .thumb_func 3205 HAL_RCC_GetPCLK1Freq: 3206 .LFB138: 1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency 1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK1 frequency 1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) 1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3207 .loc 1 1042 1 is_stmt 1 view -0 3208 .cfi_startproc 3209 @ args = 0, pretend = 0, frame = 0 3210 @ frame_needed = 0, uses_anonymous_args = 0 3211 @ link register save eliminated. 1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BIT 3212 .loc 1 1044 3 view .LVU920 3213 .LBB343: 3214 .LBI343: 1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3215 .loc 1 1030 10 view .LVU921 3216 .LBB344: 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3217 .loc 1 1032 3 view .LVU922 3218 .LBE344: 3219 .LBE343: 3220 .loc 1 1044 54 is_stmt 0 view .LVU923 3221 0000 084B ldr r3, .L310 3222 .LBB346: 3223 .LBB347: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3224 .loc 2 988 4 view .LVU924 3225 0002 4FF4E062 mov r2, #1792 3226 .LBE347: 3227 .LBE346: 3228 .loc 1 1044 54 view .LVU925 3229 0006 5B68 ldr r3, [r3, #4] 3230 .LVL237: 3231 .LBB349: 3232 .LBI346: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3233 .loc 2 981 31 is_stmt 1 view .LVU926 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 104 3234 .LBB348: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 3235 .loc 2 983 3 view .LVU927 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3236 .loc 2 988 4 view .LVU928 3237 .syntax unified 3238 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3239 0008 92FAA2F2 rbit r2, r2 3240 @ 0 "" 2 3241 .LVL238: 3242 .loc 2 1001 3 view .LVU929 3243 .loc 2 1001 3 is_stmt 0 view .LVU930 3244 .thumb 3245 .syntax unified 3246 .LBE348: 3247 .LBE349: 3248 .loc 1 1044 82 view .LVU931 3249 000c B2FA82F2 clz r2, r2 3250 .loc 1 1044 61 view .LVU932 3251 0010 03F4E063 and r3, r3, #1792 3252 .loc 1 1044 49 view .LVU933 3253 0014 0449 ldr r1, .L310+4 3254 .LBB350: 3255 .LBB345: 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3256 .loc 1 1032 10 view .LVU934 3257 0016 0548 ldr r0, .L310+8 3258 .LBE345: 3259 .LBE350: 3260 .loc 1 1044 79 view .LVU935 3261 0018 D340 lsrs r3, r3, r2 3262 .loc 1 1044 33 view .LVU936 3263 001a 0068 ldr r0, [r0] 3264 .loc 1 1044 49 view .LVU937 3265 001c CB5C ldrb r3, [r1, r3] @ zero_extendqisi2 1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3266 .loc 1 1045 1 view .LVU938 3267 001e D840 lsrs r0, r0, r3 3268 0020 7047 bx lr 3269 .L311: 3270 0022 00BF .align 2 3271 .L310: 3272 0024 00100240 .word 1073876992 3273 0028 00000000 .word APBPrescTable 3274 002c 00000000 .word SystemCoreClock 3275 .cfi_endproc 3276 .LFE138: 3278 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 3279 .align 1 3280 .p2align 2,,3 3281 .global HAL_RCC_GetPCLK2Freq 3282 .syntax unified 3283 .thumb 3284 .thumb_func 3286 HAL_RCC_GetPCLK2Freq: 3287 .LFB139: 1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 105 1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK2 frequency 1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3288 .loc 1 1054 1 is_stmt 1 view -0 3289 .cfi_startproc 3290 @ args = 0, pretend = 0, frame = 0 3291 @ frame_needed = 0, uses_anonymous_args = 0 3292 @ link register save eliminated. 1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITN 3293 .loc 1 1056 3 view .LVU940 3294 .LBB351: 3295 .LBI351: 1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3296 .loc 1 1030 10 view .LVU941 3297 .LBB352: 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3298 .loc 1 1032 3 view .LVU942 3299 .LBE352: 3300 .LBE351: 3301 .loc 1 1056 53 is_stmt 0 view .LVU943 3302 0000 084B ldr r3, .L313 3303 .LBB354: 3304 .LBB355: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3305 .loc 2 988 4 view .LVU944 3306 0002 4FF46052 mov r2, #14336 3307 .LBE355: 3308 .LBE354: 3309 .loc 1 1056 53 view .LVU945 3310 0006 5B68 ldr r3, [r3, #4] 3311 .LVL239: 3312 .LBB357: 3313 .LBI354: 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3314 .loc 2 981 31 is_stmt 1 view .LVU946 3315 .LBB356: 983:Drivers/CMSIS/Include/cmsis_gcc.h **** 3316 .loc 2 983 3 view .LVU947 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3317 .loc 2 988 4 view .LVU948 3318 .syntax unified 3319 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3320 0008 92FAA2F2 rbit r2, r2 3321 @ 0 "" 2 3322 .LVL240: 3323 .loc 2 1001 3 view .LVU949 3324 .loc 2 1001 3 is_stmt 0 view .LVU950 3325 .thumb 3326 .syntax unified 3327 .LBE356: 3328 .LBE357: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 106 3329 .loc 1 1056 81 view .LVU951 3330 000c B2FA82F2 clz r2, r2 3331 .loc 1 1056 60 view .LVU952 3332 0010 03F46053 and r3, r3, #14336 3333 .loc 1 1056 48 view .LVU953 3334 0014 0449 ldr r1, .L313+4 3335 .LBB358: 3336 .LBB353: 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3337 .loc 1 1032 10 view .LVU954 3338 0016 0548 ldr r0, .L313+8 3339 .LBE353: 3340 .LBE358: 3341 .loc 1 1056 78 view .LVU955 3342 0018 D340 lsrs r3, r3, r2 3343 .loc 1 1056 32 view .LVU956 3344 001a 0068 ldr r0, [r0] 3345 .loc 1 1056 48 view .LVU957 3346 001c CB5C ldrb r3, [r1, r3] @ zero_extendqisi2 1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3347 .loc 1 1057 1 view .LVU958 3348 001e D840 lsrs r0, r0, r3 3349 0020 7047 bx lr 3350 .L314: 3351 0022 00BF .align 2 3352 .L313: 3353 0024 00100240 .word 1073876992 3354 0028 00000000 .word APBPrescTable 3355 002c 00000000 .word SystemCoreClock 3356 .cfi_endproc 3357 .LFE139: 3359 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 3360 .align 1 3361 .p2align 2,,3 3362 .global HAL_RCC_GetOscConfig 3363 .syntax unified 3364 .thumb 3365 .thumb_func 3367 HAL_RCC_GetOscConfig: 3368 .LVL241: 3369 .LFB140: 1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal 1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. 1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * will be configured. 1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3370 .loc 1 1067 1 is_stmt 1 view -0 3371 .cfi_startproc 3372 @ args = 0, pretend = 0, frame = 0 3373 @ frame_needed = 0, uses_anonymous_args = 0 1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 107 3374 .loc 1 1069 3 view .LVU960 1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 3375 .loc 1 1067 1 is_stmt 0 view .LVU961 3376 0000 10B5 push {r4, lr} 3377 .LCFI19: 3378 .cfi_def_cfa_offset 8 3379 .cfi_offset 4, -8 3380 .cfi_offset 14, -4 3381 .loc 1 1069 3 view .LVU962 3382 0002 0446 mov r4, r0 3383 0004 0028 cmp r0, #0 3384 0006 3ED0 beq .L326 3385 .LVL242: 3386 .L316: 1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ 3387 .loc 1 1072 3 is_stmt 1 view .LVU963 3388 .loc 1 1072 37 is_stmt 0 view .LVU964 3389 0008 0F22 movs r2, #15 1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; 1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 3390 .loc 1 1077 10 view .LVU965 3391 000a 224B ldr r3, .L327 1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; 3392 .loc 1 1072 37 view .LVU966 3393 000c 2260 str r2, [r4] 3394 .loc 1 1077 3 is_stmt 1 view .LVU967 3395 .loc 1 1077 10 is_stmt 0 view .LVU968 3396 000e 1A68 ldr r2, [r3] 3397 .loc 1 1077 5 view .LVU969 3398 0010 5103 lsls r1, r2, #13 3399 0012 29D5 bpl .L317 1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 3400 .loc 1 1079 5 is_stmt 1 view .LVU970 3401 .loc 1 1079 33 is_stmt 0 view .LVU971 3402 0014 4FF4A023 mov r3, #327680 3403 0018 6360 str r3, [r4, #4] 3404 .L318: 1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) 1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; 1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV(); 3405 .loc 1 1090 3 is_stmt 1 view .LVU972 3406 .loc 1 1090 39 is_stmt 0 view .LVU973 3407 001a 1E4B ldr r3, .L327 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 108 3408 001c DA6A ldr r2, [r3, #44] 3409 001e 02F00F02 and r2, r2, #15 3410 .loc 1 1090 37 view .LVU974 3411 0022 A260 str r2, [r4, #8] 1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) 3412 .loc 1 1094 3 is_stmt 1 view .LVU975 3413 .loc 1 1094 10 is_stmt 0 view .LVU976 3414 0024 1A68 ldr r2, [r3] 3415 .loc 1 1094 15 view .LVU977 3416 0026 02F00102 and r2, r2, #1 3417 002a 2261 str r2, [r4, #16] 1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_ 3418 .loc 1 1103 3 is_stmt 1 view .LVU978 3419 .loc 1 1103 59 is_stmt 0 view .LVU979 3420 002c 1A68 ldr r2, [r3] 3421 .loc 1 1103 44 view .LVU980 3422 002e C2F3C402 ubfx r2, r2, #3, #5 3423 .loc 1 1103 42 view .LVU981 3424 0032 6261 str r2, [r4, #20] 1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) 3425 .loc 1 1106 3 is_stmt 1 view .LVU982 3426 .loc 1 1106 10 is_stmt 0 view .LVU983 3427 0034 1A6A ldr r2, [r3, #32] 3428 .loc 1 1106 5 view .LVU984 3429 0036 5207 lsls r2, r2, #29 3430 0038 1ED5 bpl .L320 1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 3431 .loc 1 1108 5 is_stmt 1 view .LVU985 3432 .loc 1 1108 33 is_stmt 0 view .LVU986 3433 003a 0523 movs r3, #5 3434 003c E360 str r3, [r4, #12] 3435 .L321: 1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 109 1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) 3436 .loc 1 1120 3 is_stmt 1 view .LVU987 3437 .loc 1 1120 10 is_stmt 0 view .LVU988 3438 003e 154B ldr r3, .L327 3439 0040 5A6A ldr r2, [r3, #36] 3440 .loc 1 1120 16 view .LVU989 3441 0042 02F00102 and r2, r2, #1 3442 0046 A261 str r2, [r4, #24] 1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; 1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) 3443 .loc 1 1131 3 is_stmt 1 view .LVU990 3444 .loc 1 1131 10 is_stmt 0 view .LVU991 3445 0048 1A68 ldr r2, [r3] 1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 3446 .loc 1 1137 37 view .LVU992 3447 004a 12F0807F tst r2, #16777216 3448 004e 14BF ite ne 3449 0050 0222 movne r2, #2 3450 0052 0122 moveq r2, #1 3451 0054 E261 str r2, [r4, #28] 1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); 3452 .loc 1 1139 3 is_stmt 1 view .LVU993 3453 .loc 1 1139 52 is_stmt 0 view .LVU994 3454 0056 5A68 ldr r2, [r3, #4] 3455 .loc 1 1139 38 view .LVU995 3456 0058 02F48032 and r2, r2, #65536 3457 .loc 1 1139 36 view .LVU996 3458 005c 2262 str r2, [r4, #32] 1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); 3459 .loc 1 1140 3 is_stmt 1 view .LVU997 3460 .loc 1 1140 49 is_stmt 0 view .LVU998 3461 005e 5B68 ldr r3, [r3, #4] 3462 .loc 1 1140 35 view .LVU999 3463 0060 03F47013 and r3, r3, #3932160 3464 .loc 1 1140 33 view .LVU1000 3465 0064 6362 str r3, [r4, #36] 1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); 1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3466 .loc 1 1144 1 view .LVU1001 3467 0066 10BD pop {r4, pc} ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 110 3468 .LVL243: 3469 .L317: 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3470 .loc 1 1081 8 is_stmt 1 view .LVU1002 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3471 .loc 1 1081 15 is_stmt 0 view .LVU1003 3472 0068 1B68 ldr r3, [r3] 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3473 .loc 1 1081 10 view .LVU1004 3474 006a 13F48033 ands r3, r3, #65536 1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3475 .loc 1 1083 5 is_stmt 1 view .LVU1005 1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3476 .loc 1 1083 33 is_stmt 0 view .LVU1006 3477 006e 18BF it ne 3478 0070 4FF48033 movne r3, #65536 1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3479 .loc 1 1087 5 is_stmt 1 view .LVU1007 1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3480 .loc 1 1087 33 is_stmt 0 view .LVU1008 3481 0074 6360 str r3, [r4, #4] 3482 0076 D0E7 b .L318 3483 .L320: 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3484 .loc 1 1110 8 is_stmt 1 view .LVU1009 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3485 .loc 1 1110 15 is_stmt 0 view .LVU1010 3486 0078 1B6A ldr r3, [r3, #32] 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3487 .loc 1 1110 10 view .LVU1011 3488 007a 13F00103 ands r3, r3, #1 1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3489 .loc 1 1112 5 is_stmt 1 view .LVU1012 1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3490 .loc 1 1112 33 is_stmt 0 view .LVU1013 3491 007e 18BF it ne 3492 0080 0123 movne r3, #1 1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3493 .loc 1 1116 5 is_stmt 1 view .LVU1014 1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3494 .loc 1 1116 33 is_stmt 0 view .LVU1015 3495 0082 E360 str r3, [r4, #12] 3496 0084 DBE7 b .L321 3497 .LVL244: 3498 .L326: 1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3499 .loc 1 1069 3 discriminator 1 view .LVU1016 3500 0086 0448 ldr r0, .L327+4 3501 .LVL245: 1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3502 .loc 1 1069 3 discriminator 1 view .LVU1017 3503 0088 40F22D41 movw r1, #1069 3504 008c FFF7FEFF bl assert_failed 3505 .LVL246: 3506 0090 BAE7 b .L316 3507 .L328: 3508 0092 00BF .align 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 111 3509 .L327: 3510 0094 00100240 .word 1073876992 3511 0098 00000000 .word .LC0 3512 .cfi_endproc 3513 .LFE140: 3515 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 3516 .align 1 3517 .p2align 2,,3 3518 .global HAL_RCC_GetClockConfig 3519 .syntax unified 3520 .thumb 3521 .thumb_func 3523 HAL_RCC_GetClockConfig: 3524 .LVL247: 3525 .LFB141: 1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal 1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. 1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the current clock configuration. 1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3526 .loc 1 1155 1 is_stmt 1 view -0 3527 .cfi_startproc 3528 @ args = 0, pretend = 0, frame = 0 3529 @ frame_needed = 0, uses_anonymous_args = 0 1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); 3530 .loc 1 1157 3 view .LVU1019 1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 3531 .loc 1 1155 1 is_stmt 0 view .LVU1020 3532 0000 38B5 push {r3, r4, r5, lr} 3533 .LCFI20: 3534 .cfi_def_cfa_offset 16 3535 .cfi_offset 3, -16 3536 .cfi_offset 4, -12 3537 .cfi_offset 5, -8 3538 .cfi_offset 14, -4 1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 3539 .loc 1 1155 1 view .LVU1021 3540 0002 0D46 mov r5, r1 3541 .loc 1 1157 3 view .LVU1022 3542 0004 0446 mov r4, r0 3543 0006 D0B1 cbz r0, .L333 1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); 3544 .loc 1 1158 3 is_stmt 1 view .LVU1023 3545 0008 05B3 cbz r5, .L334 3546 .LVL248: 3547 .L331: 1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ 1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 3548 .loc 1 1161 3 view .LVU1024 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 112 1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 3549 .loc 1 1164 51 is_stmt 0 view .LVU1025 3550 000a 134B ldr r3, .L335 1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); 1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 3551 .loc 1 1176 32 view .LVU1026 3552 000c 1349 ldr r1, .L335+4 1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3553 .loc 1 1161 32 view .LVU1027 3554 000e 0F22 movs r2, #15 3555 0010 2260 str r2, [r4] 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3556 .loc 1 1164 3 is_stmt 1 view .LVU1028 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3557 .loc 1 1164 51 is_stmt 0 view .LVU1029 3558 0012 5A68 ldr r2, [r3, #4] 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3559 .loc 1 1164 37 view .LVU1030 3560 0014 02F00302 and r2, r2, #3 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3561 .loc 1 1164 35 view .LVU1031 3562 0018 6260 str r2, [r4, #4] 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3563 .loc 1 1167 3 is_stmt 1 view .LVU1032 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3564 .loc 1 1167 52 is_stmt 0 view .LVU1033 3565 001a 5A68 ldr r2, [r3, #4] 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3566 .loc 1 1167 38 view .LVU1034 3567 001c 02F0F002 and r2, r2, #240 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3568 .loc 1 1167 36 view .LVU1035 3569 0020 A260 str r2, [r4, #8] 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3570 .loc 1 1170 3 is_stmt 1 view .LVU1036 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3571 .loc 1 1170 53 is_stmt 0 view .LVU1037 3572 0022 5A68 ldr r2, [r3, #4] 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3573 .loc 1 1170 39 view .LVU1038 3574 0024 02F4E062 and r2, r2, #1792 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3575 .loc 1 1170 37 view .LVU1039 3576 0028 E260 str r2, [r4, #12] 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 113 3577 .loc 1 1173 3 is_stmt 1 view .LVU1040 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3578 .loc 1 1173 54 is_stmt 0 view .LVU1041 3579 002a 5B68 ldr r3, [r3, #4] 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3580 .loc 1 1173 39 view .LVU1042 3581 002c DB08 lsrs r3, r3, #3 3582 002e 03F4E063 and r3, r3, #1792 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3583 .loc 1 1173 37 view .LVU1043 3584 0032 2361 str r3, [r4, #16] 3585 .loc 1 1176 3 is_stmt 1 view .LVU1044 3586 .loc 1 1176 32 is_stmt 0 view .LVU1045 3587 0034 0B68 ldr r3, [r1] 3588 .loc 1 1176 16 view .LVU1046 3589 0036 03F00703 and r3, r3, #7 3590 .loc 1 1176 14 view .LVU1047 3591 003a 2B60 str r3, [r5] 1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3592 .loc 1 1177 1 view .LVU1048 3593 003c 38BD pop {r3, r4, r5, pc} 3594 .LVL249: 3595 .L333: 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); 3596 .loc 1 1157 3 discriminator 1 view .LVU1049 3597 003e 0848 ldr r0, .L335+8 3598 .LVL250: 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); 3599 .loc 1 1157 3 discriminator 1 view .LVU1050 3600 0040 40F28541 movw r1, #1157 3601 .LVL251: 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); 3602 .loc 1 1157 3 discriminator 1 view .LVU1051 3603 0044 FFF7FEFF bl assert_failed 3604 .LVL252: 1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3605 .loc 1 1158 3 is_stmt 1 discriminator 1 view .LVU1052 3606 0048 002D cmp r5, #0 3607 004a DED1 bne .L331 3608 .L334: 3609 004c 0448 ldr r0, .L335+8 3610 004e 40F28641 movw r1, #1158 3611 0052 FFF7FEFF bl assert_failed 3612 .LVL253: 3613 0056 D8E7 b .L331 3614 .L336: 3615 .align 2 3616 .L335: 3617 0058 00100240 .word 1073876992 3618 005c 00200240 .word 1073881088 3619 0060 00000000 .word .LC0 3620 .cfi_endproc 3621 .LFE141: 3623 .section .text.HAL_RCC_CSSCallback,"ax",%progbits 3624 .align 1 3625 .p2align 2,,3 3626 .weak HAL_RCC_CSSCallback ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 114 3627 .syntax unified 3628 .thumb 3629 .thumb_func 3631 HAL_RCC_CSSCallback: 3632 .LFB143: 1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. 1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) 1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback 1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval none 1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3633 .loc 1 1202 1 view -0 3634 .cfi_startproc 3635 @ args = 0, pretend = 0, frame = 0 3636 @ frame_needed = 0, uses_anonymous_args = 0 3637 @ link register save eliminated. 1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, 1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file 1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3638 .loc 1 1206 1 view .LVU1054 3639 0000 7047 bx lr 3640 .cfi_endproc 3641 .LFE143: 3643 0002 00BF .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 3644 .align 1 3645 .p2align 2,,3 3646 .global HAL_RCC_NMI_IRQHandler 3647 .syntax unified 3648 .thumb 3649 .thumb_func 3651 HAL_RCC_NMI_IRQHandler: 3652 .LFB142: 1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ 3653 .loc 1 1185 1 view -0 3654 .cfi_startproc 3655 @ args = 0, pretend = 0, frame = 0 3656 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 115 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3657 .loc 1 1187 3 view .LVU1056 1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ 3658 .loc 1 1185 1 is_stmt 0 view .LVU1057 3659 0000 10B5 push {r4, lr} 3660 .LCFI21: 3661 .cfi_def_cfa_offset 8 3662 .cfi_offset 4, -8 3663 .cfi_offset 14, -4 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3664 .loc 1 1187 6 view .LVU1058 3665 0002 054C ldr r4, .L345 3666 0004 A368 ldr r3, [r4, #8] 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3667 .loc 1 1187 5 view .LVU1059 3668 0006 1B06 lsls r3, r3, #24 3669 0008 00D4 bmi .L344 1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3670 .loc 1 1195 1 view .LVU1060 3671 000a 10BD pop {r4, pc} 3672 .L344: 1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3673 .loc 1 1190 5 is_stmt 1 view .LVU1061 3674 000c FFF7FEFF bl HAL_RCC_CSSCallback 3675 .LVL254: 1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3676 .loc 1 1193 5 view .LVU1062 3677 0010 8023 movs r3, #128 3678 0012 A372 strb r3, [r4, #10] 1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 3679 .loc 1 1195 1 is_stmt 0 view .LVU1063 3680 0014 10BD pop {r4, pc} 3681 .L346: 3682 0016 00BF .align 2 3683 .L345: 3684 0018 00100240 .word 1073876992 3685 .cfi_endproc 3686 .LFE142: 3688 .section .rodata.aPLLMULFactorTable,"a" 3689 .align 2 3690 .set .LANCHOR0,. + 0 3693 aPLLMULFactorTable: 3694 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" 3694 06070809 3694 0A0B0C0D 3694 0E 3695 000d 0F1010 .ascii "\017\020\020" 3696 .section .rodata.aPredivFactorTable,"a" 3697 .align 2 3698 .set .LANCHOR1,. + 0 3701 aPredivFactorTable: 3702 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" 3702 05060708 3702 090A0B0C 3702 0D 3703 000d 0E0F10 .ascii "\016\017\020" 3704 .text ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 116 3705 .Letext0: 3706 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 3707 .file 4 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 3708 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" 3709 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 3710 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 3711 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 3712 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 3713 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 3714 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" 3715 .file 12 "Core/Inc/stm32f3xx_hal_conf.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 117 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_rcc.c C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:20 .text.HAL_RCC_DeInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:245 .text.HAL_RCC_DeInit:000000d0 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:255 .rodata.HAL_RCC_OscConfig.str1.4:00000000 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:260 .text.HAL_RCC_OscConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:267 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:1081 .text.HAL_RCC_OscConfig:00000304 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:1090 .text.HAL_RCC_OscConfig:00000314 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2119 .text.HAL_RCC_OscConfig:00000618 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2125 .text.HAL_RCC_OscConfig:00000624 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2314 .text.HAL_RCC_OscConfig:000006d0 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2319 .text.HAL_RCC_MCOConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2326 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2466 .text.HAL_RCC_MCOConfig:00000094 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2472 .text.HAL_RCC_EnableCSS:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2479 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2520 .text.HAL_RCC_DisableCSS:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2527 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2568 .text.HAL_RCC_GetSysClockFreq:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2575 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2654 .text.HAL_RCC_GetSysClockFreq:0000003c $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2663 .text.HAL_RCC_ClockConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:2670 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3160 .text.HAL_RCC_ClockConfig:00000204 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3170 .text.HAL_RCC_GetHCLKFreq:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3177 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3193 .text.HAL_RCC_GetHCLKFreq:00000008 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3198 .text.HAL_RCC_GetPCLK1Freq:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3205 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3272 .text.HAL_RCC_GetPCLK1Freq:00000024 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3279 .text.HAL_RCC_GetPCLK2Freq:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3286 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3353 .text.HAL_RCC_GetPCLK2Freq:00000024 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3360 .text.HAL_RCC_GetOscConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3367 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3510 .text.HAL_RCC_GetOscConfig:00000094 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3516 .text.HAL_RCC_GetClockConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3523 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3617 .text.HAL_RCC_GetClockConfig:00000058 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3624 .text.HAL_RCC_CSSCallback:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3631 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3644 .text.HAL_RCC_NMI_IRQHandler:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3651 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3684 .text.HAL_RCC_NMI_IRQHandler:00000018 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3689 .rodata.aPLLMULFactorTable:00000000 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3693 .rodata.aPLLMULFactorTable:00000000 aPLLMULFactorTable C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3697 .rodata.aPredivFactorTable:00000000 $d C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s:3701 .rodata.aPredivFactorTable:00000000 aPredivFactorTable UNDEFINED SYMBOLS HAL_GetTick HAL_InitTick uwTickPrio SystemCoreClock assert_failed ARM GAS C:\Users\zl835\AppData\Local\Temp\cc9EITeh.s page 118 HAL_GPIO_Init AHBPrescTable APBPrescTable