ARM GAS C:\Users\zl835\AppData\Local\Temp\cc009oJf.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 2 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "dma.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.MX_DMA_Init,"ax",%progbits 20 .align 1 21 .p2align 2,,3 22 .global MX_DMA_Init 23 .syntax unified 24 .thumb 25 .thumb_func 27 MX_DMA_Init: 28 .LFB130: 29 .file 1 "Core/Src/dma.c" 1:Core/Src/dma.c **** /* USER CODE BEGIN Header */ 2:Core/Src/dma.c **** /** 3:Core/Src/dma.c **** ****************************************************************************** 4:Core/Src/dma.c **** * @file dma.c 5:Core/Src/dma.c **** * @brief This file provides code for the configuration 6:Core/Src/dma.c **** * of all the requested memory to memory DMA transfers. 7:Core/Src/dma.c **** ****************************************************************************** 8:Core/Src/dma.c **** * @attention 9:Core/Src/dma.c **** * 10:Core/Src/dma.c **** * Copyright (c) 2025 STMicroelectronics. 11:Core/Src/dma.c **** * All rights reserved. 12:Core/Src/dma.c **** * 13:Core/Src/dma.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/dma.c **** * in the root directory of this software component. 15:Core/Src/dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/dma.c **** * 17:Core/Src/dma.c **** ****************************************************************************** 18:Core/Src/dma.c **** */ 19:Core/Src/dma.c **** /* USER CODE END Header */ 20:Core/Src/dma.c **** 21:Core/Src/dma.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/dma.c **** #include "dma.h" 23:Core/Src/dma.c **** 24:Core/Src/dma.c **** /* USER CODE BEGIN 0 */ 25:Core/Src/dma.c **** 26:Core/Src/dma.c **** /* USER CODE END 0 */ 27:Core/Src/dma.c **** 28:Core/Src/dma.c **** /*----------------------------------------------------------------------------*/ 29:Core/Src/dma.c **** /* Configure DMA */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cc009oJf.s page 2 30:Core/Src/dma.c **** /*----------------------------------------------------------------------------*/ 31:Core/Src/dma.c **** 32:Core/Src/dma.c **** /* USER CODE BEGIN 1 */ 33:Core/Src/dma.c **** 34:Core/Src/dma.c **** /* USER CODE END 1 */ 35:Core/Src/dma.c **** 36:Core/Src/dma.c **** /** 37:Core/Src/dma.c **** * Enable DMA controller clock 38:Core/Src/dma.c **** */ 39:Core/Src/dma.c **** void MX_DMA_Init(void) 40:Core/Src/dma.c **** { 30 .loc 1 40 1 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 8 33 @ frame_needed = 0, uses_anonymous_args = 0 41:Core/Src/dma.c **** 42:Core/Src/dma.c **** /* DMA controller clock enable */ 43:Core/Src/dma.c **** __HAL_RCC_DMA1_CLK_ENABLE(); 34 .loc 1 43 3 view .LVU1 35 .LBB2: 36 .loc 1 43 3 view .LVU2 37 .loc 1 43 3 view .LVU3 38 0000 174B ldr r3, .L4 39 .LBE2: 40:Core/Src/dma.c **** 40 .loc 1 40 1 is_stmt 0 view .LVU4 41 0002 00B5 push {lr} 42 .LCFI0: 43 .cfi_def_cfa_offset 4 44 .cfi_offset 14, -4 45 .LBB3: 46 .loc 1 43 3 view .LVU5 47 0004 5869 ldr r0, [r3, #20] 48 0006 40F00100 orr r0, r0, #1 49 000a 5861 str r0, [r3, #20] 50 .loc 1 43 3 is_stmt 1 view .LVU6 51 000c 5B69 ldr r3, [r3, #20] 52 .LBE3: 40:Core/Src/dma.c **** 53 .loc 1 40 1 is_stmt 0 view .LVU7 54 000e 83B0 sub sp, sp, #12 55 .LCFI1: 56 .cfi_def_cfa_offset 16 44:Core/Src/dma.c **** 45:Core/Src/dma.c **** /* DMA interrupt init */ 46:Core/Src/dma.c **** /* DMA1_Channel2_IRQn interrupt configuration */ 47:Core/Src/dma.c **** HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0); 57 .loc 1 47 3 view .LVU8 58 0010 0022 movs r2, #0 59 .LBB4: 43:Core/Src/dma.c **** 60 .loc 1 43 3 view .LVU9 61 0012 03F00103 and r3, r3, #1 62 .LBE4: 63 .loc 1 47 3 view .LVU10 64 0016 1146 mov r1, r2 65 .LBB5: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc009oJf.s page 3 43:Core/Src/dma.c **** 66 .loc 1 43 3 view .LVU11 67 0018 0193 str r3, [sp, #4] 43:Core/Src/dma.c **** 68 .loc 1 43 3 is_stmt 1 view .LVU12 69 .LBE5: 70 .loc 1 47 3 is_stmt 0 view .LVU13 71 001a 0C20 movs r0, #12 72 .LBB6: 43:Core/Src/dma.c **** 73 .loc 1 43 3 view .LVU14 74 001c 019B ldr r3, [sp, #4] 75 .LBE6: 43:Core/Src/dma.c **** 76 .loc 1 43 3 is_stmt 1 view .LVU15 77 .loc 1 47 3 view .LVU16 78 001e FFF7FEFF bl HAL_NVIC_SetPriority 79 .LVL0: 48:Core/Src/dma.c **** HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn); 80 .loc 1 48 3 view .LVU17 81 0022 0C20 movs r0, #12 82 0024 FFF7FEFF bl HAL_NVIC_EnableIRQ 83 .LVL1: 49:Core/Src/dma.c **** /* DMA1_Channel3_IRQn interrupt configuration */ 50:Core/Src/dma.c **** HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0); 84 .loc 1 50 3 view .LVU18 85 0028 0022 movs r2, #0 86 002a 1146 mov r1, r2 87 002c 0D20 movs r0, #13 88 002e FFF7FEFF bl HAL_NVIC_SetPriority 89 .LVL2: 51:Core/Src/dma.c **** HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn); 90 .loc 1 51 3 view .LVU19 91 0032 0D20 movs r0, #13 92 0034 FFF7FEFF bl HAL_NVIC_EnableIRQ 93 .LVL3: 52:Core/Src/dma.c **** /* DMA1_Channel6_IRQn interrupt configuration */ 53:Core/Src/dma.c **** HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); 94 .loc 1 53 3 view .LVU20 95 0038 0022 movs r2, #0 96 003a 1146 mov r1, r2 97 003c 1020 movs r0, #16 98 003e FFF7FEFF bl HAL_NVIC_SetPriority 99 .LVL4: 54:Core/Src/dma.c **** HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); 100 .loc 1 54 3 view .LVU21 101 0042 1020 movs r0, #16 102 0044 FFF7FEFF bl HAL_NVIC_EnableIRQ 103 .LVL5: 55:Core/Src/dma.c **** /* DMA1_Channel7_IRQn interrupt configuration */ 56:Core/Src/dma.c **** HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); 104 .loc 1 56 3 view .LVU22 105 0048 0022 movs r2, #0 106 004a 1120 movs r0, #17 107 004c 1146 mov r1, r2 108 004e FFF7FEFF bl HAL_NVIC_SetPriority 109 .LVL6: ARM GAS C:\Users\zl835\AppData\Local\Temp\cc009oJf.s page 4 57:Core/Src/dma.c **** HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); 110 .loc 1 57 3 view .LVU23 111 0052 1120 movs r0, #17 58:Core/Src/dma.c **** 59:Core/Src/dma.c **** } 112 .loc 1 59 1 is_stmt 0 view .LVU24 113 0054 03B0 add sp, sp, #12 114 .LCFI2: 115 .cfi_def_cfa_offset 4 116 @ sp needed 117 0056 5DF804EB ldr lr, [sp], #4 118 .LCFI3: 119 .cfi_restore 14 120 .cfi_def_cfa_offset 0 57:Core/Src/dma.c **** HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); 121 .loc 1 57 3 view .LVU25 122 005a FFF7FEBF b HAL_NVIC_EnableIRQ 123 .LVL7: 124 .L5: 125 005e 00BF .align 2 126 .L4: 127 0060 00100240 .word 1073876992 128 .cfi_endproc 129 .LFE130: 131 .text 132 .Letext0: 133 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 134 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 135 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 136 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\cc009oJf.s page 5 DEFINED SYMBOLS *ABS*:00000000 dma.c C:\Users\zl835\AppData\Local\Temp\cc009oJf.s:20 .text.MX_DMA_Init:00000000 $t C:\Users\zl835\AppData\Local\Temp\cc009oJf.s:27 .text.MX_DMA_Init:00000000 MX_DMA_Init C:\Users\zl835\AppData\Local\Temp\cc009oJf.s:127 .text.MX_DMA_Init:00000060 $d UNDEFINED SYMBOLS HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ