stm32f3xx_hal_dma_ex.h 12 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_dma_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA HAL extension module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file in
  13. * the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef __STM32F3xx_HAL_DMA_EX_H
  20. #define __STM32F3xx_HAL_DMA_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32f3xx_hal_def.h"
  26. /** @addtogroup STM32F3xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup DMAEx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /* Exported constants --------------------------------------------------------*/
  34. /* Exported macro ------------------------------------------------------------*/
  35. /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
  36. * @{
  37. */
  38. /* Interrupt & Flag management */
  39. #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
  40. defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
  41. defined(STM32F373xC) || defined(STM32F378xx)
  42. /**
  43. * @brief Returns the current DMA Channel transfer complete flag.
  44. * @param __HANDLE__ DMA handle
  45. * @retval The specified transfer complete flag index.
  46. */
  47. #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
  48. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
  49. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
  50. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
  51. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
  52. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
  53. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
  54. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
  55. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
  56. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
  57. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
  58. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
  59. DMA_FLAG_TC5)
  60. /**
  61. * @brief Returns the current DMA Channel half transfer complete flag.
  62. * @param __HANDLE__ DMA handle
  63. * @retval The specified half transfer complete flag index.
  64. */
  65. #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
  66. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
  67. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
  68. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
  69. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
  70. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
  71. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
  72. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
  73. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
  74. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
  75. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
  76. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
  77. DMA_FLAG_HT5)
  78. /**
  79. * @brief Returns the current DMA Channel transfer error flag.
  80. * @param __HANDLE__ DMA handle
  81. * @retval The specified transfer error flag index.
  82. */
  83. #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
  84. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
  85. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
  86. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
  87. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
  88. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
  89. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
  90. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
  91. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
  92. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
  93. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
  94. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
  95. DMA_FLAG_TE5)
  96. /**
  97. * @brief Return the current DMA Channel Global interrupt flag.
  98. * @param __HANDLE__ DMA handle
  99. * @retval The specified transfer error flag index.
  100. */
  101. #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
  102. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
  103. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
  104. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
  105. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
  106. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
  107. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
  108. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
  109. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
  110. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
  111. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
  112. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
  113. DMA_FLAG_GL5)
  114. /**
  115. * @brief Get the DMA Channel pending flags.
  116. * @param __HANDLE__ DMA handle
  117. * @param __FLAG__ Get the specified flag.
  118. * This parameter can be any combination of the following values:
  119. * @arg DMA_FLAG_TCx: Transfer complete flag
  120. * @arg DMA_FLAG_HTx: Half transfer complete flag
  121. * @arg DMA_FLAG_TEx: Transfer error flag
  122. * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
  123. * @retval The state of FLAG (SET or RESET).
  124. */
  125. #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
  126. (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
  127. (DMA1->ISR & (__FLAG__)))
  128. /**
  129. * @brief Clears the DMA Channel pending flags.
  130. * @param __HANDLE__ DMA handle
  131. * @param __FLAG__ specifies the flag to clear.
  132. * This parameter can be any combination of the following values:
  133. * @arg DMA_FLAG_TCx: Transfer complete flag
  134. * @arg DMA_FLAG_HTx: Half transfer complete flag
  135. * @arg DMA_FLAG_TEx: Transfer error flag
  136. * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
  137. * @retval None
  138. */
  139. #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
  140. (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
  141. (DMA1->IFCR = (__FLAG__)))
  142. /**
  143. * @}
  144. */
  145. #else /* STM32F301x8_STM32F302x8_STM32F318xx_STM32F303x8_STM32F334x8_STM32F328xx Product devices */
  146. /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
  147. * @{
  148. */
  149. /**
  150. * @brief Returns the current DMA Channel transfer complete flag.
  151. * @param __HANDLE__ DMA handle
  152. * @retval The specified transfer complete flag index.
  153. */
  154. #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
  155. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
  156. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
  157. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
  158. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
  159. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
  160. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
  161. DMA_FLAG_TC7)
  162. /**
  163. * @brief Returns the current DMA Channel half transfer complete flag.
  164. * @param __HANDLE__ DMA handle
  165. * @retval The specified half transfer complete flag index.
  166. */
  167. #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
  168. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
  169. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
  170. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
  171. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
  172. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
  173. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
  174. DMA_FLAG_HT7)
  175. /**
  176. * @brief Returns the current DMA Channel transfer error flag.
  177. * @param __HANDLE__ DMA handle
  178. * @retval The specified transfer error flag index.
  179. */
  180. #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
  181. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
  182. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
  183. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
  184. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
  185. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
  186. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
  187. DMA_FLAG_TE7)
  188. /**
  189. * @brief Return the current DMA Channel Global interrupt flag.
  190. * @param __HANDLE__ DMA handle
  191. * @retval The specified transfer error flag index.
  192. */
  193. #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
  194. (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
  195. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
  196. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
  197. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
  198. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
  199. ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
  200. DMA_FLAG_GL7)
  201. /**
  202. * @brief Get the DMA Channel pending flags.
  203. * @param __HANDLE__ DMA handle
  204. * @param __FLAG__ Get the specified flag.
  205. * This parameter can be any combination of the following values:
  206. * @arg DMA_FLAG_TCx: Transfer complete flag
  207. * @arg DMA_FLAG_HTx: Half transfer complete flag
  208. * @arg DMA_FLAG_TEx: Transfer error flag
  209. * Where x can be 1_7 to select the DMA Channel flag.
  210. * @retval The state of FLAG (SET or RESET).
  211. */
  212. #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
  213. /**
  214. * @brief Clears the DMA Channel pending flags.
  215. * @param __HANDLE__ DMA handle
  216. * @param __FLAG__ specifies the flag to clear.
  217. * This parameter can be any combination of the following values:
  218. * @arg DMA_FLAG_TCx: Transfer complete flag
  219. * @arg DMA_FLAG_HTx: Half transfer complete flag
  220. * @arg DMA_FLAG_TEx: Transfer error flag
  221. * Where x can be 1_7 to select the DMA Channel flag.
  222. * @retval None
  223. */
  224. #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
  225. /**
  226. * @}
  227. */
  228. #endif
  229. /**
  230. * @}
  231. */
  232. /**
  233. * @}
  234. */
  235. /**
  236. * @}
  237. */
  238. #ifdef __cplusplus
  239. }
  240. #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
  241. /* STM32F302xC || STM32F303xC || STM32F358xx || */
  242. /* STM32F373xC || STM32F378xx */
  243. #endif /* __STM32F3xx_HAL_DMA_H */