stm32f3xx_hal_pwr.c 16 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f3xx_hal_pwr.c
  4. * @author MCD Application Team
  5. * @brief PWR HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Power Controller (PWR) peripheral:
  8. * + Initialization/de-initialization functions
  9. * + Peripheral Control functions
  10. *
  11. ******************************************************************************
  12. * @attention
  13. *
  14. * Copyright (c) 2016 STMicroelectronics.
  15. * All rights reserved.
  16. *
  17. * This software is licensed under terms that can be found in the LICENSE file
  18. * in the root directory of this software component.
  19. * If no LICENSE file comes with this software, it is provided AS-IS.
  20. *
  21. ******************************************************************************
  22. */
  23. /* Includes ------------------------------------------------------------------*/
  24. #include "stm32f3xx_hal.h"
  25. /** @addtogroup STM32F3xx_HAL_Driver
  26. * @{
  27. */
  28. /** @defgroup PWR PWR
  29. * @brief PWR HAL module driver
  30. * @{
  31. */
  32. #ifdef HAL_PWR_MODULE_ENABLED
  33. /* Private typedef -----------------------------------------------------------*/
  34. /* Private define ------------------------------------------------------------*/
  35. /* Private macro -------------------------------------------------------------*/
  36. /* Private variables ---------------------------------------------------------*/
  37. /* Private function prototypes -----------------------------------------------*/
  38. /* Private functions ---------------------------------------------------------*/
  39. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  40. * @{
  41. */
  42. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  43. * @brief Initialization and de-initialization functions
  44. *
  45. @verbatim
  46. ===============================================================================
  47. ##### Initialization and de-initialization functions #####
  48. ===============================================================================
  49. [..]
  50. After reset, the backup domain (RTC registers, RTC backup data
  51. registers and backup SRAM) is protected against possible unwanted
  52. write accesses.
  53. To enable access to the RTC Domain and RTC registers, proceed as follows:
  54. (+) Enable the Power Controller (PWR) APB1 interface clock using the
  55. __HAL_RCC_PWR_CLK_ENABLE() macro.
  56. (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
  57. @endverbatim
  58. * @{
  59. */
  60. /**
  61. * @brief Deinitializes the PWR peripheral registers to their default reset values.
  62. * @retval None
  63. */
  64. void HAL_PWR_DeInit(void)
  65. {
  66. __HAL_RCC_PWR_FORCE_RESET();
  67. __HAL_RCC_PWR_RELEASE_RESET();
  68. }
  69. /**
  70. * @brief Enables access to the backup domain (RTC registers, RTC
  71. * backup data registers and backup SRAM).
  72. * @note If the HSE divided by 32 is used as the RTC clock, the
  73. * Backup Domain Access should be kept enabled.
  74. * @retval None
  75. */
  76. void HAL_PWR_EnableBkUpAccess(void)
  77. {
  78. SET_BIT(PWR->CR, PWR_CR_DBP);
  79. }
  80. /**
  81. * @brief Disables access to the backup domain (RTC registers, RTC
  82. * backup data registers and backup SRAM).
  83. * @note If the HSE divided by 32 is used as the RTC clock, the
  84. * Backup Domain Access should be kept enabled.
  85. * @retval None
  86. */
  87. void HAL_PWR_DisableBkUpAccess(void)
  88. {
  89. CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  90. }
  91. /**
  92. * @}
  93. */
  94. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  95. * @brief Low Power modes configuration functions
  96. *
  97. @verbatim
  98. ===============================================================================
  99. ##### Peripheral Control functions #####
  100. ===============================================================================
  101. *** WakeUp pin configuration ***
  102. ================================
  103. [..]
  104. (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
  105. forced in input pull down configuration and is active on rising edges.
  106. (+) There are up to three WakeUp pins:
  107. (++)WakeUp Pin 1 on PA.00.
  108. (++)WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only).
  109. (++)WakeUp Pin 3 on PE.06.
  110. *** Main and Backup Regulators configuration ***
  111. ================================================
  112. [..]
  113. (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
  114. the backup SRAM is powered from VDD which replaces the VBAT power supply to
  115. save battery life.
  116. (+) The backup SRAM is not mass erased by a tamper event. It is read
  117. protected to prevent confidential data, such as cryptographic private
  118. key, from being accessed. The backup SRAM can be erased only through
  119. the Flash interface when a protection level change from level 1 to
  120. level 0 is requested.
  121. -@- Refer to the description of Read protection (RDP) in the Flash
  122. programming manual.
  123. Refer to the datasheets for more details.
  124. *** Low Power modes configuration ***
  125. =====================================
  126. [..]
  127. The devices feature 3 low-power modes:
  128. (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
  129. (+) Stop mode: all clocks are stopped, regulator running, regulator
  130. in low power mode
  131. (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices).
  132. *** Sleep mode ***
  133. ==================
  134. [..]
  135. (+) Entry:
  136. The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
  137. functions with
  138. (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  139. (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  140. (+) Exit:
  141. (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
  142. controller (NVIC) can wake up the device from Sleep mode.
  143. *** Stop mode ***
  144. =================
  145. [..]
  146. In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
  147. and the HSE RC oscillators are disabled. Internal SRAM and register contents
  148. are preserved.
  149. The voltage regulator can be configured either in normal or low-power mode to minimize the consumption.
  150. (+) Entry:
  151. The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI )
  152. function with:
  153. (++) Main regulator ON or
  154. (++) Low Power regulator ON.
  155. (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction or
  156. (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
  157. (+) Exit:
  158. (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
  159. (++) Some specific communication peripherals (CEC, USART, I2C) interrupts,
  160. when programmed in wakeup mode (the peripheral must be
  161. programmed in wakeup mode and the corresponding interrupt vector
  162. must be enabled in the NVIC).
  163. *** Standby mode ***
  164. ====================
  165. [..]
  166. The Standby mode allows to achieve the lowest power consumption. It is based
  167. on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
  168. The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
  169. the HSE oscillator are also switched off. SRAM and register contents are lost
  170. except for the RTC registers, RTC backup registers, backup SRAM and Standby
  171. circuitry.
  172. The voltage regulator is OFF.
  173. (+) Entry:
  174. (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
  175. (+) Exit:
  176. (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
  177. tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
  178. *** Auto-wakeup (AWU) from low-power mode ***
  179. =============================================
  180. [..]
  181. The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
  182. Wakeup event, a tamper event, a time-stamp event, or a comparator event,
  183. without depending on an external interrupt (Auto-wakeup mode).
  184. (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
  185. (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
  186. configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
  187. (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
  188. is necessary to configure the RTC to detect the tamper or time stamp event using the
  189. HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
  190. (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
  191. configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() function.
  192. (+) Comparator auto-wakeup (AWU) from the Stop mode
  193. (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
  194. (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for comparator 2U)
  195. to be sensitive to to the selected edges (falling, rising or falling
  196. and rising) (Interrupt or Event modes) using the EXTI_Init() function.
  197. (+++) Configure the comparator to generate the event.
  198. @endverbatim
  199. * @{
  200. */
  201. /**
  202. * @brief Enables the WakeUp PINx functionality.
  203. * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
  204. * This parameter can be value of :
  205. * @ref PWR_WakeUp_Pins
  206. * @retval None
  207. */
  208. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
  209. {
  210. /* Check the parameters */
  211. assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  212. /* Enable the EWUPx pin */
  213. SET_BIT(PWR->CSR, WakeUpPinx);
  214. }
  215. /**
  216. * @brief Disables the WakeUp PINx functionality.
  217. * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
  218. * This parameter can be values of :
  219. * @ref PWR_WakeUp_Pins
  220. * @retval None
  221. */
  222. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
  223. {
  224. /* Check the parameters */
  225. assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
  226. /* Disable the EWUPx pin */
  227. CLEAR_BIT(PWR->CSR, WakeUpPinx);
  228. }
  229. /**
  230. * @brief Enters Sleep mode.
  231. * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
  232. * @param Regulator Specifies the regulator state in SLEEP mode.
  233. * This parameter can be one of the following values:
  234. * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
  235. * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
  236. * @note This parameter has no effect in F3 family and is just maintained to
  237. * offer full portability of other STM32 families software.
  238. * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction.
  239. * When WFI entry is used, tick interrupt have to be disabled if not desired as
  240. * the interrupt wake up source.
  241. * This parameter can be one of the following values:
  242. * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
  243. * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
  244. * @retval None
  245. */
  246. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
  247. {
  248. /* Check the parameters */
  249. assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
  250. /* Prevent unused argument(s) compilation warning */
  251. UNUSED(Regulator);
  252. /* Clear SLEEPDEEP bit of Cortex System Control Register */
  253. SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  254. /* Select SLEEP mode entry -------------------------------------------------*/
  255. if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
  256. {
  257. /* Request Wait For Interrupt */
  258. __WFI();
  259. }
  260. else
  261. {
  262. /* Request Wait For Event */
  263. __SEV();
  264. __WFE();
  265. __WFE();
  266. }
  267. }
  268. /**
  269. * @brief Enters STOP mode.
  270. * @note In Stop mode, all I/O pins keep the same state as in Run mode.
  271. * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
  272. * the HSI RC oscillator is selected as system clock.
  273. * @note When the voltage regulator operates in low power mode, an additional
  274. * startup delay is incurred when waking up from Stop mode.
  275. * By keeping the internal regulator ON during Stop mode, the consumption
  276. * is higher although the startup time is reduced.
  277. * @param Regulator Specifies the regulator state in STOP mode.
  278. * This parameter can be one of the following values:
  279. * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
  280. * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
  281. * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
  282. * This parameter can be one of the following values:
  283. * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
  284. * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
  285. * @retval None
  286. */
  287. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
  288. {
  289. uint32_t tmpreg = 0U;
  290. /* Check the parameters */
  291. assert_param(IS_PWR_REGULATOR(Regulator));
  292. assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
  293. /* Select the regulator state in STOP mode ---------------------------------*/
  294. tmpreg = PWR->CR;
  295. /* Clear PDDS and LPDS bits */
  296. tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
  297. /* Set LPDS bit according to Regulator value */
  298. tmpreg |= Regulator;
  299. /* Store the new value */
  300. PWR->CR = tmpreg;
  301. /* Set SLEEPDEEP bit of Cortex System Control Register */
  302. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  303. /* Select STOP mode entry --------------------------------------------------*/
  304. if(STOPEntry == PWR_STOPENTRY_WFI)
  305. {
  306. /* Request Wait For Interrupt */
  307. __WFI();
  308. }
  309. else
  310. {
  311. /* Request Wait For Event */
  312. __SEV();
  313. __WFE();
  314. __WFE();
  315. }
  316. /* Reset SLEEPDEEP bit of Cortex System Control Register */
  317. SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  318. }
  319. /**
  320. * @brief Enters STANDBY mode.
  321. * @note In Standby mode, all I/O pins are high impedance except for:
  322. * - Reset pad (still available),
  323. * - RTC alternate function pins if configured for tamper, time-stamp, RTC
  324. * Alarm out, or RTC clock calibration out,
  325. * - WKUP pins if enabled.
  326. * @retval None
  327. */
  328. void HAL_PWR_EnterSTANDBYMode(void)
  329. {
  330. /* Select STANDBY mode */
  331. PWR->CR |= PWR_CR_PDDS;
  332. /* Set SLEEPDEEP bit of Cortex System Control Register */
  333. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  334. /* This option is used to ensure that store operations are completed */
  335. #if defined ( __CC_ARM)
  336. __force_stores();
  337. #endif
  338. /* Request Wait For Interrupt */
  339. __WFI();
  340. }
  341. /**
  342. * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
  343. * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  344. * re-enters SLEEP mode when an interruption handling is over.
  345. * Setting this bit is useful when the processor is expected to run only on
  346. * interruptions handling.
  347. * @retval None
  348. */
  349. void HAL_PWR_EnableSleepOnExit(void)
  350. {
  351. /* Set SLEEPONEXIT bit of Cortex System Control Register */
  352. SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  353. }
  354. /**
  355. * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
  356. * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
  357. * re-enters SLEEP mode when an interruption handling is over.
  358. * @retval None
  359. */
  360. void HAL_PWR_DisableSleepOnExit(void)
  361. {
  362. /* Clear SLEEPONEXIT bit of Cortex System Control Register */
  363. CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
  364. }
  365. /**
  366. * @brief Enables CORTEX M4 SEVONPEND bit.
  367. * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
  368. * WFE to wake up when an interrupt moves from inactive to pended.
  369. * @retval None
  370. */
  371. void HAL_PWR_EnableSEVOnPend(void)
  372. {
  373. /* Set SEVONPEND bit of Cortex System Control Register */
  374. SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  375. }
  376. /**
  377. * @brief Disables CORTEX M4 SEVONPEND bit.
  378. * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
  379. * WFE to wake up when an interrupt moves from inactive to pended.
  380. * @retval None
  381. */
  382. void HAL_PWR_DisableSEVOnPend(void)
  383. {
  384. /* Clear SEVONPEND bit of Cortex System Control Register */
  385. CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
  386. }
  387. /**
  388. * @}
  389. */
  390. /**
  391. * @}
  392. */
  393. #endif /* HAL_PWR_MODULE_ENABLED */
  394. /**
  395. * @}
  396. */
  397. /**
  398. * @}
  399. */