ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "tim.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .global htim2 20 .section .bss.htim2,"aw",%nobits 21 .align 2 24 htim2: 25 0000 00000000 .space 76 25 00000000 25 00000000 25 00000000 25 00000000 26 .global htim3 27 .section .bss.htim3,"aw",%nobits 28 .align 2 31 htim3: 32 0000 00000000 .space 76 32 00000000 32 00000000 32 00000000 32 00000000 33 .global htim4 34 .section .bss.htim4,"aw",%nobits 35 .align 2 38 htim4: 39 0000 00000000 .space 76 39 00000000 39 00000000 39 00000000 39 00000000 40 .section .text.MX_TIM2_Init,"ax",%progbits 41 .align 1 42 .global MX_TIM2_Init 43 .syntax unified 44 .thumb 45 .thumb_func 47 MX_TIM2_Init: 48 .LFB130: 49 .file 1 "Core/Src/tim.c" 1:Core/Src/tim.c **** /* USER CODE BEGIN Header */ 2:Core/Src/tim.c **** /** 3:Core/Src/tim.c **** ****************************************************************************** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 2 4:Core/Src/tim.c **** * @file tim.c 5:Core/Src/tim.c **** * @brief This file provides code for the configuration 6:Core/Src/tim.c **** * of the TIM instances. 7:Core/Src/tim.c **** ****************************************************************************** 8:Core/Src/tim.c **** * @attention 9:Core/Src/tim.c **** * 10:Core/Src/tim.c **** * Copyright (c) 2025 STMicroelectronics. 11:Core/Src/tim.c **** * All rights reserved. 12:Core/Src/tim.c **** * 13:Core/Src/tim.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/tim.c **** * in the root directory of this software component. 15:Core/Src/tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/tim.c **** * 17:Core/Src/tim.c **** ****************************************************************************** 18:Core/Src/tim.c **** */ 19:Core/Src/tim.c **** /* USER CODE END Header */ 20:Core/Src/tim.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/tim.c **** #include "tim.h" 22:Core/Src/tim.c **** 23:Core/Src/tim.c **** /* USER CODE BEGIN 0 */ 24:Core/Src/tim.c **** 25:Core/Src/tim.c **** /* USER CODE END 0 */ 26:Core/Src/tim.c **** 27:Core/Src/tim.c **** TIM_HandleTypeDef htim2; 28:Core/Src/tim.c **** TIM_HandleTypeDef htim3; 29:Core/Src/tim.c **** TIM_HandleTypeDef htim4; 30:Core/Src/tim.c **** 31:Core/Src/tim.c **** /* TIM2 init function */ 32:Core/Src/tim.c **** void MX_TIM2_Init(void) 33:Core/Src/tim.c **** { 50 .loc 1 33 1 51 .cfi_startproc 52 @ args = 0, pretend = 0, frame = 40 53 @ frame_needed = 1, uses_anonymous_args = 0 54 0000 80B5 push {r7, lr} 55 .LCFI0: 56 .cfi_def_cfa_offset 8 57 .cfi_offset 7, -8 58 .cfi_offset 14, -4 59 0002 8AB0 sub sp, sp, #40 60 .LCFI1: 61 .cfi_def_cfa_offset 48 62 0004 00AF add r7, sp, #0 63 .LCFI2: 64 .cfi_def_cfa_register 7 34:Core/Src/tim.c **** 35:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 0 */ 36:Core/Src/tim.c **** 37:Core/Src/tim.c **** /* USER CODE END TIM2_Init 0 */ 38:Core/Src/tim.c **** 39:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 65 .loc 1 39 27 66 0006 07F11C03 add r3, r7, #28 67 000a 0022 movs r2, #0 68 000c 1A60 str r2, [r3] 69 000e 5A60 str r2, [r3, #4] 70 0010 9A60 str r2, [r3, #8] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 3 40:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 71 .loc 1 40 22 72 0012 3B46 mov r3, r7 73 0014 0022 movs r2, #0 74 0016 1A60 str r2, [r3] 75 0018 5A60 str r2, [r3, #4] 76 001a 9A60 str r2, [r3, #8] 77 001c DA60 str r2, [r3, #12] 78 001e 1A61 str r2, [r3, #16] 79 0020 5A61 str r2, [r3, #20] 80 0022 9A61 str r2, [r3, #24] 41:Core/Src/tim.c **** 42:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 1 */ 43:Core/Src/tim.c **** 44:Core/Src/tim.c **** /* USER CODE END TIM2_Init 1 */ 45:Core/Src/tim.c **** htim2.Instance = TIM2; 81 .loc 1 45 18 82 0024 274B ldr r3, .L6 83 0026 4FF08042 mov r2, #1073741824 84 002a 1A60 str r2, [r3] 46:Core/Src/tim.c **** htim2.Init.Prescaler = 72; 85 .loc 1 46 24 86 002c 254B ldr r3, .L6 87 002e 4822 movs r2, #72 88 0030 5A60 str r2, [r3, #4] 47:Core/Src/tim.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 89 .loc 1 47 26 90 0032 244B ldr r3, .L6 91 0034 0022 movs r2, #0 92 0036 9A60 str r2, [r3, #8] 48:Core/Src/tim.c **** htim2.Init.Period = 20000 - 1; 93 .loc 1 48 21 94 0038 224B ldr r3, .L6 95 003a 44F61F62 movw r2, #19999 96 003e DA60 str r2, [r3, #12] 49:Core/Src/tim.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 97 .loc 1 49 28 98 0040 204B ldr r3, .L6 99 0042 0022 movs r2, #0 100 0044 1A61 str r2, [r3, #16] 50:Core/Src/tim.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 101 .loc 1 50 32 102 0046 1F4B ldr r3, .L6 103 0048 0022 movs r2, #0 104 004a 9A61 str r2, [r3, #24] 51:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 105 .loc 1 51 7 106 004c 1D48 ldr r0, .L6 107 004e FFF7FEFF bl HAL_TIM_PWM_Init 108 0052 0346 mov r3, r0 109 .loc 1 51 6 110 0054 002B cmp r3, #0 111 0056 01D0 beq .L2 52:Core/Src/tim.c **** { 53:Core/Src/tim.c **** Error_Handler(); 112 .loc 1 53 5 113 0058 FFF7FEFF bl Error_Handler ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 4 114 .L2: 54:Core/Src/tim.c **** } 55:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 115 .loc 1 55 37 116 005c 0023 movs r3, #0 117 005e FB61 str r3, [r7, #28] 56:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 118 .loc 1 56 33 119 0060 0023 movs r3, #0 120 0062 7B62 str r3, [r7, #36] 57:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 121 .loc 1 57 7 122 0064 07F11C03 add r3, r7, #28 123 0068 1946 mov r1, r3 124 006a 1648 ldr r0, .L6 125 006c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 126 0070 0346 mov r3, r0 127 .loc 1 57 6 128 0072 002B cmp r3, #0 129 0074 01D0 beq .L3 58:Core/Src/tim.c **** { 59:Core/Src/tim.c **** Error_Handler(); 130 .loc 1 59 5 131 0076 FFF7FEFF bl Error_Handler 132 .L3: 60:Core/Src/tim.c **** } 61:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 133 .loc 1 61 20 134 007a 6023 movs r3, #96 135 007c 3B60 str r3, [r7] 62:Core/Src/tim.c **** sConfigOC.Pulse = 0; 136 .loc 1 62 19 137 007e 0023 movs r3, #0 138 0080 7B60 str r3, [r7, #4] 63:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 139 .loc 1 63 24 140 0082 0023 movs r3, #0 141 0084 BB60 str r3, [r7, #8] 64:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 142 .loc 1 64 24 143 0086 0023 movs r3, #0 144 0088 3B61 str r3, [r7, #16] 65:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 145 .loc 1 65 7 146 008a 3B46 mov r3, r7 147 008c 0022 movs r2, #0 148 008e 1946 mov r1, r3 149 0090 0C48 ldr r0, .L6 150 0092 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 151 0096 0346 mov r3, r0 152 .loc 1 65 6 153 0098 002B cmp r3, #0 154 009a 01D0 beq .L4 66:Core/Src/tim.c **** { 67:Core/Src/tim.c **** Error_Handler(); 155 .loc 1 67 5 156 009c FFF7FEFF bl Error_Handler ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 5 157 .L4: 68:Core/Src/tim.c **** } 69:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 158 .loc 1 69 7 159 00a0 3B46 mov r3, r7 160 00a2 0422 movs r2, #4 161 00a4 1946 mov r1, r3 162 00a6 0748 ldr r0, .L6 163 00a8 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 164 00ac 0346 mov r3, r0 165 .loc 1 69 6 166 00ae 002B cmp r3, #0 167 00b0 01D0 beq .L5 70:Core/Src/tim.c **** { 71:Core/Src/tim.c **** Error_Handler(); 168 .loc 1 71 5 169 00b2 FFF7FEFF bl Error_Handler 170 .L5: 72:Core/Src/tim.c **** } 73:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 2 */ 74:Core/Src/tim.c **** 75:Core/Src/tim.c **** /* USER CODE END TIM2_Init 2 */ 76:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim2); 171 .loc 1 76 3 172 00b6 0348 ldr r0, .L6 173 00b8 FFF7FEFF bl HAL_TIM_MspPostInit 77:Core/Src/tim.c **** 78:Core/Src/tim.c **** } 174 .loc 1 78 1 175 00bc 00BF nop 176 00be 2837 adds r7, r7, #40 177 .LCFI3: 178 .cfi_def_cfa_offset 8 179 00c0 BD46 mov sp, r7 180 .LCFI4: 181 .cfi_def_cfa_register 13 182 @ sp needed 183 00c2 80BD pop {r7, pc} 184 .L7: 185 .align 2 186 .L6: 187 00c4 00000000 .word htim2 188 .cfi_endproc 189 .LFE130: 191 .section .text.MX_TIM3_Init,"ax",%progbits 192 .align 1 193 .global MX_TIM3_Init 194 .syntax unified 195 .thumb 196 .thumb_func 198 MX_TIM3_Init: 199 .LFB131: 79:Core/Src/tim.c **** /* TIM3 init function */ 80:Core/Src/tim.c **** void MX_TIM3_Init(void) 81:Core/Src/tim.c **** { 200 .loc 1 81 1 201 .cfi_startproc ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 6 202 @ args = 0, pretend = 0, frame = 40 203 @ frame_needed = 1, uses_anonymous_args = 0 204 0000 80B5 push {r7, lr} 205 .LCFI5: 206 .cfi_def_cfa_offset 8 207 .cfi_offset 7, -8 208 .cfi_offset 14, -4 209 0002 8AB0 sub sp, sp, #40 210 .LCFI6: 211 .cfi_def_cfa_offset 48 212 0004 00AF add r7, sp, #0 213 .LCFI7: 214 .cfi_def_cfa_register 7 82:Core/Src/tim.c **** 83:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 0 */ 84:Core/Src/tim.c **** 85:Core/Src/tim.c **** /* USER CODE END TIM3_Init 0 */ 86:Core/Src/tim.c **** 87:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 215 .loc 1 87 27 216 0006 07F11C03 add r3, r7, #28 217 000a 0022 movs r2, #0 218 000c 1A60 str r2, [r3] 219 000e 5A60 str r2, [r3, #4] 220 0010 9A60 str r2, [r3, #8] 88:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 221 .loc 1 88 22 222 0012 3B46 mov r3, r7 223 0014 0022 movs r2, #0 224 0016 1A60 str r2, [r3] 225 0018 5A60 str r2, [r3, #4] 226 001a 9A60 str r2, [r3, #8] 227 001c DA60 str r2, [r3, #12] 228 001e 1A61 str r2, [r3, #16] 229 0020 5A61 str r2, [r3, #20] 230 0022 9A61 str r2, [r3, #24] 89:Core/Src/tim.c **** 90:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 1 */ 91:Core/Src/tim.c **** 92:Core/Src/tim.c **** /* USER CODE END TIM3_Init 1 */ 93:Core/Src/tim.c **** htim3.Instance = TIM3; 231 .loc 1 93 18 232 0024 274B ldr r3, .L13 233 0026 284A ldr r2, .L13+4 234 0028 1A60 str r2, [r3] 94:Core/Src/tim.c **** htim3.Init.Prescaler = 72; 235 .loc 1 94 24 236 002a 264B ldr r3, .L13 237 002c 4822 movs r2, #72 238 002e 5A60 str r2, [r3, #4] 95:Core/Src/tim.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 239 .loc 1 95 26 240 0030 244B ldr r3, .L13 241 0032 0022 movs r2, #0 242 0034 9A60 str r2, [r3, #8] 96:Core/Src/tim.c **** htim3.Init.Period = 20000 - 1; 243 .loc 1 96 21 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 7 244 0036 234B ldr r3, .L13 245 0038 44F61F62 movw r2, #19999 246 003c DA60 str r2, [r3, #12] 97:Core/Src/tim.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 247 .loc 1 97 28 248 003e 214B ldr r3, .L13 249 0040 0022 movs r2, #0 250 0042 1A61 str r2, [r3, #16] 98:Core/Src/tim.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 251 .loc 1 98 32 252 0044 1F4B ldr r3, .L13 253 0046 0022 movs r2, #0 254 0048 9A61 str r2, [r3, #24] 99:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 255 .loc 1 99 7 256 004a 1E48 ldr r0, .L13 257 004c FFF7FEFF bl HAL_TIM_PWM_Init 258 0050 0346 mov r3, r0 259 .loc 1 99 6 260 0052 002B cmp r3, #0 261 0054 01D0 beq .L9 100:Core/Src/tim.c **** { 101:Core/Src/tim.c **** Error_Handler(); 262 .loc 1 101 5 263 0056 FFF7FEFF bl Error_Handler 264 .L9: 102:Core/Src/tim.c **** } 103:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 265 .loc 1 103 37 266 005a 0023 movs r3, #0 267 005c FB61 str r3, [r7, #28] 104:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 268 .loc 1 104 33 269 005e 0023 movs r3, #0 270 0060 7B62 str r3, [r7, #36] 105:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 271 .loc 1 105 7 272 0062 07F11C03 add r3, r7, #28 273 0066 1946 mov r1, r3 274 0068 1648 ldr r0, .L13 275 006a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 276 006e 0346 mov r3, r0 277 .loc 1 105 6 278 0070 002B cmp r3, #0 279 0072 01D0 beq .L10 106:Core/Src/tim.c **** { 107:Core/Src/tim.c **** Error_Handler(); 280 .loc 1 107 5 281 0074 FFF7FEFF bl Error_Handler 282 .L10: 108:Core/Src/tim.c **** } 109:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 283 .loc 1 109 20 284 0078 6023 movs r3, #96 285 007a 3B60 str r3, [r7] 110:Core/Src/tim.c **** sConfigOC.Pulse = 0; 286 .loc 1 110 19 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 8 287 007c 0023 movs r3, #0 288 007e 7B60 str r3, [r7, #4] 111:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 289 .loc 1 111 24 290 0080 0023 movs r3, #0 291 0082 BB60 str r3, [r7, #8] 112:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 292 .loc 1 112 24 293 0084 0023 movs r3, #0 294 0086 3B61 str r3, [r7, #16] 113:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 295 .loc 1 113 7 296 0088 3B46 mov r3, r7 297 008a 0022 movs r2, #0 298 008c 1946 mov r1, r3 299 008e 0D48 ldr r0, .L13 300 0090 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 301 0094 0346 mov r3, r0 302 .loc 1 113 6 303 0096 002B cmp r3, #0 304 0098 01D0 beq .L11 114:Core/Src/tim.c **** { 115:Core/Src/tim.c **** Error_Handler(); 305 .loc 1 115 5 306 009a FFF7FEFF bl Error_Handler 307 .L11: 116:Core/Src/tim.c **** } 117:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 308 .loc 1 117 7 309 009e 3B46 mov r3, r7 310 00a0 0422 movs r2, #4 311 00a2 1946 mov r1, r3 312 00a4 0748 ldr r0, .L13 313 00a6 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 314 00aa 0346 mov r3, r0 315 .loc 1 117 6 316 00ac 002B cmp r3, #0 317 00ae 01D0 beq .L12 118:Core/Src/tim.c **** { 119:Core/Src/tim.c **** Error_Handler(); 318 .loc 1 119 5 319 00b0 FFF7FEFF bl Error_Handler 320 .L12: 120:Core/Src/tim.c **** } 121:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 2 */ 122:Core/Src/tim.c **** 123:Core/Src/tim.c **** /* USER CODE END TIM3_Init 2 */ 124:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim3); 321 .loc 1 124 3 322 00b4 0348 ldr r0, .L13 323 00b6 FFF7FEFF bl HAL_TIM_MspPostInit 125:Core/Src/tim.c **** 126:Core/Src/tim.c **** } 324 .loc 1 126 1 325 00ba 00BF nop 326 00bc 2837 adds r7, r7, #40 327 .LCFI8: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 9 328 .cfi_def_cfa_offset 8 329 00be BD46 mov sp, r7 330 .LCFI9: 331 .cfi_def_cfa_register 13 332 @ sp needed 333 00c0 80BD pop {r7, pc} 334 .L14: 335 00c2 00BF .align 2 336 .L13: 337 00c4 00000000 .word htim3 338 00c8 00040040 .word 1073742848 339 .cfi_endproc 340 .LFE131: 342 .section .text.MX_TIM4_Init,"ax",%progbits 343 .align 1 344 .global MX_TIM4_Init 345 .syntax unified 346 .thumb 347 .thumb_func 349 MX_TIM4_Init: 350 .LFB132: 127:Core/Src/tim.c **** 128:Core/Src/tim.c **** void MX_TIM4_Init(void) 129:Core/Src/tim.c **** { 351 .loc 1 129 1 352 .cfi_startproc 353 @ args = 0, pretend = 0, frame = 32 354 @ frame_needed = 1, uses_anonymous_args = 0 355 0000 80B5 push {r7, lr} 356 .LCFI10: 357 .cfi_def_cfa_offset 8 358 .cfi_offset 7, -8 359 .cfi_offset 14, -4 360 0002 88B0 sub sp, sp, #32 361 .LCFI11: 362 .cfi_def_cfa_offset 40 363 0004 00AF add r7, sp, #0 364 .LCFI12: 365 .cfi_def_cfa_register 7 130:Core/Src/tim.c **** 131:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 0 */ 132:Core/Src/tim.c **** 133:Core/Src/tim.c **** /* USER CODE END TIM4_Init 0 */ 134:Core/Src/tim.c **** 135:Core/Src/tim.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 366 .loc 1 135 26 367 0006 07F11003 add r3, r7, #16 368 000a 0022 movs r2, #0 369 000c 1A60 str r2, [r3] 370 000e 5A60 str r2, [r3, #4] 371 0010 9A60 str r2, [r3, #8] 372 0012 DA60 str r2, [r3, #12] 136:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 373 .loc 1 136 27 374 0014 3B1D adds r3, r7, #4 375 0016 0022 movs r2, #0 376 0018 1A60 str r2, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 10 377 001a 5A60 str r2, [r3, #4] 378 001c 9A60 str r2, [r3, #8] 137:Core/Src/tim.c **** 138:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 1 */ 139:Core/Src/tim.c **** 140:Core/Src/tim.c **** /* USER CODE END TIM4_Init 1 */ 141:Core/Src/tim.c **** htim4.Instance = TIM4; 379 .loc 1 141 18 380 001e 1D4B ldr r3, .L20 381 0020 1D4A ldr r2, .L20+4 382 0022 1A60 str r2, [r3] 142:Core/Src/tim.c **** htim4.Init.Prescaler = 71; 383 .loc 1 142 24 384 0024 1B4B ldr r3, .L20 385 0026 4722 movs r2, #71 386 0028 5A60 str r2, [r3, #4] 143:Core/Src/tim.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 387 .loc 1 143 26 388 002a 1A4B ldr r3, .L20 389 002c 0022 movs r2, #0 390 002e 9A60 str r2, [r3, #8] 144:Core/Src/tim.c **** htim4.Init.Period = 20000 - 1; 391 .loc 1 144 21 392 0030 184B ldr r3, .L20 393 0032 44F61F62 movw r2, #19999 394 0036 DA60 str r2, [r3, #12] 145:Core/Src/tim.c **** // htim4.Init.Period = 10000 -1; 146:Core/Src/tim.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 395 .loc 1 146 28 396 0038 164B ldr r3, .L20 397 003a 0022 movs r2, #0 398 003c 1A61 str r2, [r3, #16] 147:Core/Src/tim.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 399 .loc 1 147 32 400 003e 154B ldr r3, .L20 401 0040 0022 movs r2, #0 402 0042 9A61 str r2, [r3, #24] 148:Core/Src/tim.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 403 .loc 1 148 7 404 0044 1348 ldr r0, .L20 405 0046 FFF7FEFF bl HAL_TIM_Base_Init 406 004a 0346 mov r3, r0 407 .loc 1 148 6 408 004c 002B cmp r3, #0 409 004e 01D0 beq .L16 149:Core/Src/tim.c **** { 150:Core/Src/tim.c **** Error_Handler(); 410 .loc 1 150 5 411 0050 FFF7FEFF bl Error_Handler 412 .L16: 151:Core/Src/tim.c **** } 152:Core/Src/tim.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 413 .loc 1 152 34 414 0054 4FF48053 mov r3, #4096 415 0058 3B61 str r3, [r7, #16] 153:Core/Src/tim.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 416 .loc 1 153 7 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 11 417 005a 07F11003 add r3, r7, #16 418 005e 1946 mov r1, r3 419 0060 0C48 ldr r0, .L20 420 0062 FFF7FEFF bl HAL_TIM_ConfigClockSource 421 0066 0346 mov r3, r0 422 .loc 1 153 6 423 0068 002B cmp r3, #0 424 006a 01D0 beq .L17 154:Core/Src/tim.c **** { 155:Core/Src/tim.c **** Error_Handler(); 425 .loc 1 155 5 426 006c FFF7FEFF bl Error_Handler 427 .L17: 156:Core/Src/tim.c **** } 157:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 428 .loc 1 157 37 429 0070 0023 movs r3, #0 430 0072 7B60 str r3, [r7, #4] 158:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 431 .loc 1 158 33 432 0074 0023 movs r3, #0 433 0076 FB60 str r3, [r7, #12] 159:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 434 .loc 1 159 7 435 0078 3B1D adds r3, r7, #4 436 007a 1946 mov r1, r3 437 007c 0548 ldr r0, .L20 438 007e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 439 0082 0346 mov r3, r0 440 .loc 1 159 6 441 0084 002B cmp r3, #0 442 0086 01D0 beq .L19 160:Core/Src/tim.c **** { 161:Core/Src/tim.c **** Error_Handler(); 443 .loc 1 161 5 444 0088 FFF7FEFF bl Error_Handler 445 .L19: 162:Core/Src/tim.c **** } 163:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 2 */ 164:Core/Src/tim.c **** 165:Core/Src/tim.c **** /* USER CODE END TIM4_Init 2 */ 166:Core/Src/tim.c **** } 446 .loc 1 166 1 447 008c 00BF nop 448 008e 2037 adds r7, r7, #32 449 .LCFI13: 450 .cfi_def_cfa_offset 8 451 0090 BD46 mov sp, r7 452 .LCFI14: 453 .cfi_def_cfa_register 13 454 @ sp needed 455 0092 80BD pop {r7, pc} 456 .L21: 457 .align 2 458 .L20: 459 0094 00000000 .word htim4 460 0098 00080040 .word 1073743872 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 12 461 .cfi_endproc 462 .LFE132: 464 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits 465 .align 1 466 .global HAL_TIM_Base_MspInit 467 .syntax unified 468 .thumb 469 .thumb_func 471 HAL_TIM_Base_MspInit: 472 .LFB133: 167:Core/Src/tim.c **** 168:Core/Src/tim.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *tim_baseHandle) 169:Core/Src/tim.c **** { 473 .loc 1 169 1 474 .cfi_startproc 475 @ args = 0, pretend = 0, frame = 16 476 @ frame_needed = 1, uses_anonymous_args = 0 477 0000 80B5 push {r7, lr} 478 .LCFI15: 479 .cfi_def_cfa_offset 8 480 .cfi_offset 7, -8 481 .cfi_offset 14, -4 482 0002 84B0 sub sp, sp, #16 483 .LCFI16: 484 .cfi_def_cfa_offset 24 485 0004 00AF add r7, sp, #0 486 .LCFI17: 487 .cfi_def_cfa_register 7 488 0006 7860 str r0, [r7, #4] 170:Core/Src/tim.c **** 171:Core/Src/tim.c **** if (tim_baseHandle->Instance == TIM3) 489 .loc 1 171 21 490 0008 7B68 ldr r3, [r7, #4] 491 000a 1B68 ldr r3, [r3] 492 .loc 1 171 6 493 000c 164A ldr r2, .L26 494 000e 9342 cmp r3, r2 495 0010 0CD1 bne .L23 496 .LBB2: 172:Core/Src/tim.c **** { 173:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 0 */ 174:Core/Src/tim.c **** 175:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 0 */ 176:Core/Src/tim.c **** /* TIM3 clock enable */ 177:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_ENABLE(); 497 .loc 1 177 5 498 0012 164B ldr r3, .L26+4 499 0014 DB69 ldr r3, [r3, #28] 500 0016 154A ldr r2, .L26+4 501 0018 43F00203 orr r3, r3, #2 502 001c D361 str r3, [r2, #28] 503 001e 134B ldr r3, .L26+4 504 0020 DB69 ldr r3, [r3, #28] 505 0022 03F00203 and r3, r3, #2 506 0026 FB60 str r3, [r7, #12] 507 0028 FB68 ldr r3, [r7, #12] 508 .LBE2: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 13 178:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 179:Core/Src/tim.c **** 180:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 1 */ 181:Core/Src/tim.c **** } 182:Core/Src/tim.c **** else if (tim_baseHandle->Instance == TIM4) 183:Core/Src/tim.c **** { 184:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 0 */ 185:Core/Src/tim.c **** 186:Core/Src/tim.c **** /* USER CODE END TIM4_MspInit 0 */ 187:Core/Src/tim.c **** /* TIM4 clock enable */ 188:Core/Src/tim.c **** __HAL_RCC_TIM4_CLK_ENABLE(); 189:Core/Src/tim.c **** 190:Core/Src/tim.c **** /* TIM4 interrupt Init */ 191:Core/Src/tim.c **** HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0); 192:Core/Src/tim.c **** HAL_NVIC_EnableIRQ(TIM4_IRQn); 193:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 1 */ 194:Core/Src/tim.c **** 195:Core/Src/tim.c **** /* USER CODE END TIM4_MspInit 1 */ 196:Core/Src/tim.c **** } 197:Core/Src/tim.c **** } 509 .loc 1 197 1 510 002a 18E0 b .L25 511 .L23: 182:Core/Src/tim.c **** { 512 .loc 1 182 26 513 002c 7B68 ldr r3, [r7, #4] 514 002e 1B68 ldr r3, [r3] 182:Core/Src/tim.c **** { 515 .loc 1 182 11 516 0030 0F4A ldr r2, .L26+8 517 0032 9342 cmp r3, r2 518 0034 13D1 bne .L25 519 .LBB3: 188:Core/Src/tim.c **** 520 .loc 1 188 5 521 0036 0D4B ldr r3, .L26+4 522 0038 DB69 ldr r3, [r3, #28] 523 003a 0C4A ldr r2, .L26+4 524 003c 43F00403 orr r3, r3, #4 525 0040 D361 str r3, [r2, #28] 526 0042 0A4B ldr r3, .L26+4 527 0044 DB69 ldr r3, [r3, #28] 528 0046 03F00403 and r3, r3, #4 529 004a BB60 str r3, [r7, #8] 530 004c BB68 ldr r3, [r7, #8] 531 .LBE3: 191:Core/Src/tim.c **** HAL_NVIC_EnableIRQ(TIM4_IRQn); 532 .loc 1 191 5 533 004e 0022 movs r2, #0 534 0050 0021 movs r1, #0 535 0052 1E20 movs r0, #30 536 0054 FFF7FEFF bl HAL_NVIC_SetPriority 192:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 1 */ 537 .loc 1 192 5 538 0058 1E20 movs r0, #30 539 005a FFF7FEFF bl HAL_NVIC_EnableIRQ 540 .L25: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 14 541 .loc 1 197 1 542 005e 00BF nop 543 0060 1037 adds r7, r7, #16 544 .LCFI18: 545 .cfi_def_cfa_offset 8 546 0062 BD46 mov sp, r7 547 .LCFI19: 548 .cfi_def_cfa_register 13 549 @ sp needed 550 0064 80BD pop {r7, pc} 551 .L27: 552 0066 00BF .align 2 553 .L26: 554 0068 00040040 .word 1073742848 555 006c 00100240 .word 1073876992 556 0070 00080040 .word 1073743872 557 .cfi_endproc 558 .LFE133: 560 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits 561 .align 1 562 .global HAL_TIM_PWM_MspInit 563 .syntax unified 564 .thumb 565 .thumb_func 567 HAL_TIM_PWM_MspInit: 568 .LFB134: 198:Core/Src/tim.c **** 199:Core/Src/tim.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle) 200:Core/Src/tim.c **** { 569 .loc 1 200 1 570 .cfi_startproc 571 @ args = 0, pretend = 0, frame = 16 572 @ frame_needed = 1, uses_anonymous_args = 0 573 @ link register save eliminated. 574 0000 80B4 push {r7} 575 .LCFI20: 576 .cfi_def_cfa_offset 4 577 .cfi_offset 7, -4 578 0002 85B0 sub sp, sp, #20 579 .LCFI21: 580 .cfi_def_cfa_offset 24 581 0004 00AF add r7, sp, #0 582 .LCFI22: 583 .cfi_def_cfa_register 7 584 0006 7860 str r0, [r7, #4] 201:Core/Src/tim.c **** 202:Core/Src/tim.c **** if(tim_pwmHandle->Instance==TIM2) 585 .loc 1 202 19 586 0008 7B68 ldr r3, [r7, #4] 587 000a 1B68 ldr r3, [r3] 588 .loc 1 202 5 589 000c B3F1804F cmp r3, #1073741824 590 0010 0CD1 bne .L29 591 .LBB4: 203:Core/Src/tim.c **** { 204:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ 205:Core/Src/tim.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 15 206:Core/Src/tim.c **** /* USER CODE END TIM2_MspInit 0 */ 207:Core/Src/tim.c **** /* TIM2 clock enable */ 208:Core/Src/tim.c **** __HAL_RCC_TIM2_CLK_ENABLE(); 592 .loc 1 208 5 593 0012 124B ldr r3, .L32 594 0014 DB69 ldr r3, [r3, #28] 595 0016 114A ldr r2, .L32 596 0018 43F00103 orr r3, r3, #1 597 001c D361 str r3, [r2, #28] 598 001e 0F4B ldr r3, .L32 599 0020 DB69 ldr r3, [r3, #28] 600 0022 03F00103 and r3, r3, #1 601 0026 FB60 str r3, [r7, #12] 602 0028 FB68 ldr r3, [r7, #12] 603 .LBE4: 209:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 210:Core/Src/tim.c **** 211:Core/Src/tim.c **** /* USER CODE END TIM2_MspInit 1 */ 212:Core/Src/tim.c **** } 213:Core/Src/tim.c **** else if(tim_pwmHandle->Instance==TIM3) 214:Core/Src/tim.c **** { 215:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 0 */ 216:Core/Src/tim.c **** 217:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 0 */ 218:Core/Src/tim.c **** /* TIM3 clock enable */ 219:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_ENABLE(); 220:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 221:Core/Src/tim.c **** 222:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 1 */ 223:Core/Src/tim.c **** } 224:Core/Src/tim.c **** } 604 .loc 1 224 1 605 002a 10E0 b .L31 606 .L29: 213:Core/Src/tim.c **** { 607 .loc 1 213 24 608 002c 7B68 ldr r3, [r7, #4] 609 002e 1B68 ldr r3, [r3] 213:Core/Src/tim.c **** { 610 .loc 1 213 10 611 0030 0B4A ldr r2, .L32+4 612 0032 9342 cmp r3, r2 613 0034 0BD1 bne .L31 614 .LBB5: 219:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 615 .loc 1 219 5 616 0036 094B ldr r3, .L32 617 0038 DB69 ldr r3, [r3, #28] 618 003a 084A ldr r2, .L32 619 003c 43F00203 orr r3, r3, #2 620 0040 D361 str r3, [r2, #28] 621 0042 064B ldr r3, .L32 622 0044 DB69 ldr r3, [r3, #28] 623 0046 03F00203 and r3, r3, #2 624 004a BB60 str r3, [r7, #8] 625 004c BB68 ldr r3, [r7, #8] 626 .L31: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 16 627 .LBE5: 628 .loc 1 224 1 629 004e 00BF nop 630 0050 1437 adds r7, r7, #20 631 .LCFI23: 632 .cfi_def_cfa_offset 4 633 0052 BD46 mov sp, r7 634 .LCFI24: 635 .cfi_def_cfa_register 13 636 @ sp needed 637 0054 5DF8047B ldr r7, [sp], #4 638 .LCFI25: 639 .cfi_restore 7 640 .cfi_def_cfa_offset 0 641 0058 7047 bx lr 642 .L33: 643 005a 00BF .align 2 644 .L32: 645 005c 00100240 .word 1073876992 646 0060 00040040 .word 1073742848 647 .cfi_endproc 648 .LFE134: 650 .section .text.HAL_TIM_MspPostInit,"ax",%progbits 651 .align 1 652 .global HAL_TIM_MspPostInit 653 .syntax unified 654 .thumb 655 .thumb_func 657 HAL_TIM_MspPostInit: 658 .LFB135: 225:Core/Src/tim.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) 226:Core/Src/tim.c **** { 659 .loc 1 226 1 660 .cfi_startproc 661 @ args = 0, pretend = 0, frame = 48 662 @ frame_needed = 1, uses_anonymous_args = 0 663 0000 80B5 push {r7, lr} 664 .LCFI26: 665 .cfi_def_cfa_offset 8 666 .cfi_offset 7, -8 667 .cfi_offset 14, -4 668 0002 8CB0 sub sp, sp, #48 669 .LCFI27: 670 .cfi_def_cfa_offset 56 671 0004 00AF add r7, sp, #0 672 .LCFI28: 673 .cfi_def_cfa_register 7 674 0006 7860 str r0, [r7, #4] 227:Core/Src/tim.c **** 228:Core/Src/tim.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 675 .loc 1 228 20 676 0008 07F11C03 add r3, r7, #28 677 000c 0022 movs r2, #0 678 000e 1A60 str r2, [r3] 679 0010 5A60 str r2, [r3, #4] 680 0012 9A60 str r2, [r3, #8] 681 0014 DA60 str r2, [r3, #12] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 17 682 0016 1A61 str r2, [r3, #16] 229:Core/Src/tim.c **** if(timHandle->Instance==TIM2) 683 .loc 1 229 15 684 0018 7B68 ldr r3, [r7, #4] 685 001a 1B68 ldr r3, [r3] 686 .loc 1 229 5 687 001c B3F1804F cmp r3, #1073741824 688 0020 3AD1 bne .L35 689 .LBB6: 230:Core/Src/tim.c **** { 231:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ 232:Core/Src/tim.c **** 233:Core/Src/tim.c **** /* USER CODE END TIM2_MspPostInit 0 */ 234:Core/Src/tim.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 690 .loc 1 234 5 691 0022 3F4B ldr r3, .L39 692 0024 5B69 ldr r3, [r3, #20] 693 0026 3E4A ldr r2, .L39 694 0028 43F40033 orr r3, r3, #131072 695 002c 5361 str r3, [r2, #20] 696 002e 3C4B ldr r3, .L39 697 0030 5B69 ldr r3, [r3, #20] 698 0032 03F40033 and r3, r3, #131072 699 0036 BB61 str r3, [r7, #24] 700 0038 BB69 ldr r3, [r7, #24] 701 .LBE6: 702 .LBB7: 235:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 703 .loc 1 235 5 704 003a 394B ldr r3, .L39 705 003c 5B69 ldr r3, [r3, #20] 706 003e 384A ldr r2, .L39 707 0040 43F48023 orr r3, r3, #262144 708 0044 5361 str r3, [r2, #20] 709 0046 364B ldr r3, .L39 710 0048 5B69 ldr r3, [r3, #20] 711 004a 03F48023 and r3, r3, #262144 712 004e 7B61 str r3, [r7, #20] 713 0050 7B69 ldr r3, [r7, #20] 714 .LBE7: 236:Core/Src/tim.c **** /**TIM2 GPIO Configuration 237:Core/Src/tim.c **** PA15 ------> TIM2_CH1 238:Core/Src/tim.c **** PB3 ------> TIM2_CH2 239:Core/Src/tim.c **** */ 240:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; 715 .loc 1 240 25 716 0052 4FF40043 mov r3, #32768 717 0056 FB61 str r3, [r7, #28] 241:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 718 .loc 1 241 26 719 0058 0223 movs r3, #2 720 005a 3B62 str r3, [r7, #32] 242:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 721 .loc 1 242 26 722 005c 0023 movs r3, #0 723 005e 7B62 str r3, [r7, #36] 243:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 18 724 .loc 1 243 27 725 0060 0023 movs r3, #0 726 0062 BB62 str r3, [r7, #40] 244:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 727 .loc 1 244 31 728 0064 0123 movs r3, #1 729 0066 FB62 str r3, [r7, #44] 245:Core/Src/tim.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 730 .loc 1 245 5 731 0068 07F11C03 add r3, r7, #28 732 006c 1946 mov r1, r3 733 006e 4FF09040 mov r0, #1207959552 734 0072 FFF7FEFF bl HAL_GPIO_Init 246:Core/Src/tim.c **** 247:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; 735 .loc 1 247 25 736 0076 0823 movs r3, #8 737 0078 FB61 str r3, [r7, #28] 248:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 738 .loc 1 248 26 739 007a 0223 movs r3, #2 740 007c 3B62 str r3, [r7, #32] 249:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 741 .loc 1 249 26 742 007e 0023 movs r3, #0 743 0080 7B62 str r3, [r7, #36] 250:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 744 .loc 1 250 27 745 0082 0023 movs r3, #0 746 0084 BB62 str r3, [r7, #40] 251:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 747 .loc 1 251 31 748 0086 0123 movs r3, #1 749 0088 FB62 str r3, [r7, #44] 252:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 750 .loc 1 252 5 751 008a 07F11C03 add r3, r7, #28 752 008e 1946 mov r1, r3 753 0090 2448 ldr r0, .L39+4 754 0092 FFF7FEFF bl HAL_GPIO_Init 253:Core/Src/tim.c **** 254:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ 255:Core/Src/tim.c **** 256:Core/Src/tim.c **** /* USER CODE END TIM2_MspPostInit 1 */ 257:Core/Src/tim.c **** } 258:Core/Src/tim.c **** else if(timHandle->Instance==TIM3) 259:Core/Src/tim.c **** { 260:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspPostInit 0 */ 261:Core/Src/tim.c **** 262:Core/Src/tim.c **** /* USER CODE END TIM3_MspPostInit 0 */ 263:Core/Src/tim.c **** 264:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 265:Core/Src/tim.c **** /**TIM3 GPIO Configuration 266:Core/Src/tim.c **** PB4 ------> TIM3_CH1 267:Core/Src/tim.c **** PB5 ------> TIM3_CH2 268:Core/Src/tim.c **** */ 269:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 19 270:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 271:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 272:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 273:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 274:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 275:Core/Src/tim.c **** 276:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspPostInit 1 */ 277:Core/Src/tim.c **** 278:Core/Src/tim.c **** /* USER CODE END TIM3_MspPostInit 1 */ 279:Core/Src/tim.c **** } 280:Core/Src/tim.c **** else if (timHandle->Instance == TIM4) 281:Core/Src/tim.c **** { 282:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspPostInit 0 */ 283:Core/Src/tim.c **** 284:Core/Src/tim.c **** /* USER CODE END TIM4_MspPostInit 0 */ 285:Core/Src/tim.c **** 286:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 287:Core/Src/tim.c **** /**TIM4 GPIO Configuration 288:Core/Src/tim.c **** PB6 ------> TIM4_CH1 289:Core/Src/tim.c **** */ 290:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9; 291:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 292:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 293:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 294:Core/Src/tim.c **** 295:Core/Src/tim.c **** //__HAL_AFIO_REMAP_TIM4_ENABLE(); 296:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspPostInit 1 */ 297:Core/Src/tim.c **** /* USER CODE END TIM4_MspPostInit 1 */ 298:Core/Src/tim.c **** } 299:Core/Src/tim.c **** 300:Core/Src/tim.c **** } 755 .loc 1 300 1 756 0096 3FE0 b .L38 757 .L35: 258:Core/Src/tim.c **** { 758 .loc 1 258 20 759 0098 7B68 ldr r3, [r7, #4] 760 009a 1B68 ldr r3, [r3] 258:Core/Src/tim.c **** { 761 .loc 1 258 10 762 009c 224A ldr r2, .L39+8 763 009e 9342 cmp r3, r2 764 00a0 1CD1 bne .L37 765 .LBB8: 264:Core/Src/tim.c **** /**TIM3 GPIO Configuration 766 .loc 1 264 5 767 00a2 1F4B ldr r3, .L39 768 00a4 5B69 ldr r3, [r3, #20] 769 00a6 1E4A ldr r2, .L39 770 00a8 43F48023 orr r3, r3, #262144 771 00ac 5361 str r3, [r2, #20] 772 00ae 1C4B ldr r3, .L39 773 00b0 5B69 ldr r3, [r3, #20] 774 00b2 03F48023 and r3, r3, #262144 775 00b6 3B61 str r3, [r7, #16] 776 00b8 3B69 ldr r3, [r7, #16] 777 .LBE8: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 20 269:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 778 .loc 1 269 25 779 00ba 3023 movs r3, #48 780 00bc FB61 str r3, [r7, #28] 270:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 781 .loc 1 270 26 782 00be 0223 movs r3, #2 783 00c0 3B62 str r3, [r7, #32] 271:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 784 .loc 1 271 26 785 00c2 0023 movs r3, #0 786 00c4 7B62 str r3, [r7, #36] 272:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 787 .loc 1 272 27 788 00c6 0023 movs r3, #0 789 00c8 BB62 str r3, [r7, #40] 273:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 790 .loc 1 273 31 791 00ca 0223 movs r3, #2 792 00cc FB62 str r3, [r7, #44] 274:Core/Src/tim.c **** 793 .loc 1 274 5 794 00ce 07F11C03 add r3, r7, #28 795 00d2 1946 mov r1, r3 796 00d4 1348 ldr r0, .L39+4 797 00d6 FFF7FEFF bl HAL_GPIO_Init 798 .loc 1 300 1 799 00da 1DE0 b .L38 800 .L37: 280:Core/Src/tim.c **** { 801 .loc 1 280 21 802 00dc 7B68 ldr r3, [r7, #4] 803 00de 1B68 ldr r3, [r3] 280:Core/Src/tim.c **** { 804 .loc 1 280 11 805 00e0 124A ldr r2, .L39+12 806 00e2 9342 cmp r3, r2 807 00e4 18D1 bne .L38 808 .LBB9: 286:Core/Src/tim.c **** /**TIM4 GPIO Configuration 809 .loc 1 286 5 810 00e6 0E4B ldr r3, .L39 811 00e8 5B69 ldr r3, [r3, #20] 812 00ea 0D4A ldr r2, .L39 813 00ec 43F48023 orr r3, r3, #262144 814 00f0 5361 str r3, [r2, #20] 815 00f2 0B4B ldr r3, .L39 816 00f4 5B69 ldr r3, [r3, #20] 817 00f6 03F48023 and r3, r3, #262144 818 00fa FB60 str r3, [r7, #12] 819 00fc FB68 ldr r3, [r7, #12] 820 .LBE9: 290:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 821 .loc 1 290 25 822 00fe 4FF45073 mov r3, #832 823 0102 FB61 str r3, [r7, #28] 291:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 21 824 .loc 1 291 26 825 0104 0223 movs r3, #2 826 0106 3B62 str r3, [r7, #32] 292:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 827 .loc 1 292 27 828 0108 0023 movs r3, #0 829 010a BB62 str r3, [r7, #40] 293:Core/Src/tim.c **** 830 .loc 1 293 5 831 010c 07F11C03 add r3, r7, #28 832 0110 1946 mov r1, r3 833 0112 0448 ldr r0, .L39+4 834 0114 FFF7FEFF bl HAL_GPIO_Init 835 .L38: 836 .loc 1 300 1 837 0118 00BF nop 838 011a 3037 adds r7, r7, #48 839 .LCFI29: 840 .cfi_def_cfa_offset 8 841 011c BD46 mov sp, r7 842 .LCFI30: 843 .cfi_def_cfa_register 13 844 @ sp needed 845 011e 80BD pop {r7, pc} 846 .L40: 847 .align 2 848 .L39: 849 0120 00100240 .word 1073876992 850 0124 00040048 .word 1207960576 851 0128 00040040 .word 1073742848 852 012c 00080040 .word 1073743872 853 .cfi_endproc 854 .LFE135: 856 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits 857 .align 1 858 .global HAL_TIM_PWM_MspDeInit 859 .syntax unified 860 .thumb 861 .thumb_func 863 HAL_TIM_PWM_MspDeInit: 864 .LFB136: 301:Core/Src/tim.c **** 302:Core/Src/tim.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle) 303:Core/Src/tim.c **** { 865 .loc 1 303 1 866 .cfi_startproc 867 @ args = 0, pretend = 0, frame = 8 868 @ frame_needed = 1, uses_anonymous_args = 0 869 @ link register save eliminated. 870 0000 80B4 push {r7} 871 .LCFI31: 872 .cfi_def_cfa_offset 4 873 .cfi_offset 7, -4 874 0002 83B0 sub sp, sp, #12 875 .LCFI32: 876 .cfi_def_cfa_offset 16 877 0004 00AF add r7, sp, #0 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 22 878 .LCFI33: 879 .cfi_def_cfa_register 7 880 0006 7860 str r0, [r7, #4] 304:Core/Src/tim.c **** 305:Core/Src/tim.c **** if(tim_pwmHandle->Instance==TIM2) 881 .loc 1 305 19 882 0008 7B68 ldr r3, [r7, #4] 883 000a 1B68 ldr r3, [r3] 884 .loc 1 305 5 885 000c B3F1804F cmp r3, #1073741824 886 0010 06D1 bne .L42 306:Core/Src/tim.c **** { 307:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ 308:Core/Src/tim.c **** 309:Core/Src/tim.c **** /* USER CODE END TIM2_MspDeInit 0 */ 310:Core/Src/tim.c **** /* Peripheral clock disable */ 311:Core/Src/tim.c **** __HAL_RCC_TIM2_CLK_DISABLE(); 887 .loc 1 311 5 888 0012 0C4B ldr r3, .L45 889 0014 DB69 ldr r3, [r3, #28] 890 0016 0B4A ldr r2, .L45 891 0018 23F00103 bic r3, r3, #1 892 001c D361 str r3, [r2, #28] 312:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 313:Core/Src/tim.c **** 314:Core/Src/tim.c **** /* USER CODE END TIM2_MspDeInit 1 */ 315:Core/Src/tim.c **** } 316:Core/Src/tim.c **** else if(tim_pwmHandle->Instance==TIM3) 317:Core/Src/tim.c **** { 318:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */ 319:Core/Src/tim.c **** 320:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 0 */ 321:Core/Src/tim.c **** /* Peripheral clock disable */ 322:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_DISABLE(); 323:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 324:Core/Src/tim.c **** 325:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 1 */ 326:Core/Src/tim.c **** } 327:Core/Src/tim.c **** } 893 .loc 1 327 1 894 001e 0AE0 b .L44 895 .L42: 316:Core/Src/tim.c **** { 896 .loc 1 316 24 897 0020 7B68 ldr r3, [r7, #4] 898 0022 1B68 ldr r3, [r3] 316:Core/Src/tim.c **** { 899 .loc 1 316 10 900 0024 084A ldr r2, .L45+4 901 0026 9342 cmp r3, r2 902 0028 05D1 bne .L44 322:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 903 .loc 1 322 5 904 002a 064B ldr r3, .L45 905 002c DB69 ldr r3, [r3, #28] 906 002e 054A ldr r2, .L45 907 0030 23F00203 bic r3, r3, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 23 908 0034 D361 str r3, [r2, #28] 909 .L44: 910 .loc 1 327 1 911 0036 00BF nop 912 0038 0C37 adds r7, r7, #12 913 .LCFI34: 914 .cfi_def_cfa_offset 4 915 003a BD46 mov sp, r7 916 .LCFI35: 917 .cfi_def_cfa_register 13 918 @ sp needed 919 003c 5DF8047B ldr r7, [sp], #4 920 .LCFI36: 921 .cfi_restore 7 922 .cfi_def_cfa_offset 0 923 0040 7047 bx lr 924 .L46: 925 0042 00BF .align 2 926 .L45: 927 0044 00100240 .word 1073876992 928 0048 00040040 .word 1073742848 929 .cfi_endproc 930 .LFE136: 932 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits 933 .align 1 934 .global HAL_TIM_Base_MspDeInit 935 .syntax unified 936 .thumb 937 .thumb_func 939 HAL_TIM_Base_MspDeInit: 940 .LFB137: 328:Core/Src/tim.c **** 329:Core/Src/tim.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *tim_baseHandle) 330:Core/Src/tim.c **** { 941 .loc 1 330 1 942 .cfi_startproc 943 @ args = 0, pretend = 0, frame = 8 944 @ frame_needed = 1, uses_anonymous_args = 0 945 0000 80B5 push {r7, lr} 946 .LCFI37: 947 .cfi_def_cfa_offset 8 948 .cfi_offset 7, -8 949 .cfi_offset 14, -4 950 0002 82B0 sub sp, sp, #8 951 .LCFI38: 952 .cfi_def_cfa_offset 16 953 0004 00AF add r7, sp, #0 954 .LCFI39: 955 .cfi_def_cfa_register 7 956 0006 7860 str r0, [r7, #4] 331:Core/Src/tim.c **** 332:Core/Src/tim.c **** if (tim_baseHandle->Instance == TIM3) 957 .loc 1 332 21 958 0008 7B68 ldr r3, [r7, #4] 959 000a 1B68 ldr r3, [r3] 960 .loc 1 332 6 961 000c 0D4A ldr r2, .L51 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 24 962 000e 9342 cmp r3, r2 963 0010 06D1 bne .L48 333:Core/Src/tim.c **** { 334:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */ 335:Core/Src/tim.c **** 336:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 0 */ 337:Core/Src/tim.c **** /* Peripheral clock disable */ 338:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_DISABLE(); 964 .loc 1 338 5 965 0012 0D4B ldr r3, .L51+4 966 0014 DB69 ldr r3, [r3, #28] 967 0016 0C4A ldr r2, .L51+4 968 0018 23F00203 bic r3, r3, #2 969 001c D361 str r3, [r2, #28] 339:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 340:Core/Src/tim.c **** 341:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 1 */ 342:Core/Src/tim.c **** } 343:Core/Src/tim.c **** else if (tim_baseHandle->Instance == TIM4) 344:Core/Src/tim.c **** { 345:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 0 */ 346:Core/Src/tim.c **** 347:Core/Src/tim.c **** /* USER CODE END TIM4_MspDeInit 0 */ 348:Core/Src/tim.c **** /* Peripheral clock disable */ 349:Core/Src/tim.c **** __HAL_RCC_TIM4_CLK_DISABLE(); 350:Core/Src/tim.c **** 351:Core/Src/tim.c **** /* TIM4 interrupt Deinit */ 352:Core/Src/tim.c **** HAL_NVIC_DisableIRQ(TIM4_IRQn); 353:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */ 354:Core/Src/tim.c **** 355:Core/Src/tim.c **** /* USER CODE END TIM4_MspDeInit 1 */ 356:Core/Src/tim.c **** } 357:Core/Src/tim.c **** } 970 .loc 1 357 1 971 001e 0DE0 b .L50 972 .L48: 343:Core/Src/tim.c **** { 973 .loc 1 343 26 974 0020 7B68 ldr r3, [r7, #4] 975 0022 1B68 ldr r3, [r3] 343:Core/Src/tim.c **** { 976 .loc 1 343 11 977 0024 094A ldr r2, .L51+8 978 0026 9342 cmp r3, r2 979 0028 08D1 bne .L50 349:Core/Src/tim.c **** 980 .loc 1 349 5 981 002a 074B ldr r3, .L51+4 982 002c DB69 ldr r3, [r3, #28] 983 002e 064A ldr r2, .L51+4 984 0030 23F00403 bic r3, r3, #4 985 0034 D361 str r3, [r2, #28] 352:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */ 986 .loc 1 352 5 987 0036 1E20 movs r0, #30 988 0038 FFF7FEFF bl HAL_NVIC_DisableIRQ 989 .L50: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 25 990 .loc 1 357 1 991 003c 00BF nop 992 003e 0837 adds r7, r7, #8 993 .LCFI40: 994 .cfi_def_cfa_offset 8 995 0040 BD46 mov sp, r7 996 .LCFI41: 997 .cfi_def_cfa_register 13 998 @ sp needed 999 0042 80BD pop {r7, pc} 1000 .L52: 1001 .align 2 1002 .L51: 1003 0044 00040040 .word 1073742848 1004 0048 00100240 .word 1073876992 1005 004c 00080040 .word 1073743872 1006 .cfi_endproc 1007 .LFE137: 1009 .section .text.pwm_init,"ax",%progbits 1010 .align 1 1011 .global pwm_init 1012 .syntax unified 1013 .thumb 1014 .thumb_func 1016 pwm_init: 1017 .LFB138: 358:Core/Src/tim.c **** 359:Core/Src/tim.c **** /* USER CODE BEGIN 1 */ 360:Core/Src/tim.c **** 361:Core/Src/tim.c **** /** 362:Core/Src/tim.c **** * @file pwm_init 363:Core/Src/tim.c **** * @brief PWM初始化 364:Core/Src/tim.c **** * @param none 365:Core/Src/tim.c **** * @details 366:Core/Src/tim.c **** * @author Zhang Sir 367:Core/Src/tim.c **** **/ 368:Core/Src/tim.c **** void pwm_init() 369:Core/Src/tim.c **** { 1018 .loc 1 369 1 1019 .cfi_startproc 1020 @ args = 0, pretend = 0, frame = 0 1021 @ frame_needed = 1, uses_anonymous_args = 0 1022 0000 80B5 push {r7, lr} 1023 .LCFI42: 1024 .cfi_def_cfa_offset 8 1025 .cfi_offset 7, -8 1026 .cfi_offset 14, -4 1027 0002 00AF add r7, sp, #0 1028 .LCFI43: 1029 .cfi_def_cfa_register 7 370:Core/Src/tim.c **** // 开启PWM 371:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); 1030 .loc 1 371 3 1031 0004 0021 movs r1, #0 1032 0006 1248 ldr r0, .L54 1033 0008 FFF7FEFF bl HAL_TIM_PWM_Start 372:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 26 1034 .loc 1 372 3 1035 000c 0421 movs r1, #4 1036 000e 1048 ldr r0, .L54 1037 0010 FFF7FEFF bl HAL_TIM_PWM_Start 373:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1); 1038 .loc 1 373 3 1039 0014 0021 movs r1, #0 1040 0016 0F48 ldr r0, .L54+4 1041 0018 FFF7FEFF bl HAL_TIM_PWM_Start 374:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2); 1042 .loc 1 374 3 1043 001c 0421 movs r1, #4 1044 001e 0D48 ldr r0, .L54+4 1045 0020 FFF7FEFF bl HAL_TIM_PWM_Start 375:Core/Src/tim.c **** // 设置占空比 376:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_1, 1000); // 1 1046 .loc 1 376 3 1047 0024 0A4B ldr r3, .L54 1048 0026 1B68 ldr r3, [r3] 1049 0028 4FF47A72 mov r2, #1000 1050 002c 5A63 str r2, [r3, #52] 377:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_2, 1000); // 2 1051 .loc 1 377 3 1052 002e 084B ldr r3, .L54 1053 0030 1B68 ldr r3, [r3] 1054 0032 4FF47A72 mov r2, #1000 1055 0036 9A63 str r2, [r3, #56] 378:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_2, 1000); // 3 1056 .loc 1 378 3 1057 0038 064B ldr r3, .L54+4 1058 003a 1B68 ldr r3, [r3] 1059 003c 4FF47A72 mov r2, #1000 1060 0040 9A63 str r2, [r3, #56] 379:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 1000); // 4 1061 .loc 1 379 3 1062 0042 044B ldr r3, .L54+4 1063 0044 1B68 ldr r3, [r3] 1064 0046 4FF47A72 mov r2, #1000 1065 004a 5A63 str r2, [r3, #52] 380:Core/Src/tim.c **** 381:Core/Src/tim.c **** 382:Core/Src/tim.c **** } 1066 .loc 1 382 1 1067 004c 00BF nop 1068 004e 80BD pop {r7, pc} 1069 .L55: 1070 .align 2 1071 .L54: 1072 0050 00000000 .word htim2 1073 0054 00000000 .word htim3 1074 .cfi_endproc 1075 .LFE138: 1077 .section .text.init_pwmout,"ax",%progbits 1078 .align 1 1079 .global init_pwmout 1080 .syntax unified 1081 .thumb ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 27 1082 .thumb_func 1084 init_pwmout: 1085 .LFB139: 383:Core/Src/tim.c **** 384:Core/Src/tim.c **** /** 385:Core/Src/tim.c **** * @file Tim4_init_pwmout 386:Core/Src/tim.c **** * @brief PB6复用成pwm输出 387:Core/Src/tim.c **** * @param none 388:Core/Src/tim.c **** * @details 默认流量计输入口 389:Core/Src/tim.c **** * @author Zhang Sir 390:Core/Src/tim.c **** **/ 391:Core/Src/tim.c **** void init_pwmout(uint8_t uav_type) 392:Core/Src/tim.c **** { 1086 .loc 1 392 1 1087 .cfi_startproc 1088 @ args = 0, pretend = 0, frame = 64 1089 @ frame_needed = 1, uses_anonymous_args = 0 1090 0000 80B5 push {r7, lr} 1091 .LCFI44: 1092 .cfi_def_cfa_offset 8 1093 .cfi_offset 7, -8 1094 .cfi_offset 14, -4 1095 0002 90B0 sub sp, sp, #64 1096 .LCFI45: 1097 .cfi_def_cfa_offset 72 1098 0004 00AF add r7, sp, #0 1099 .LCFI46: 1100 .cfi_def_cfa_register 7 1101 0006 0346 mov r3, r0 1102 0008 FB71 strb r3, [r7, #7] 393:Core/Src/tim.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 1103 .loc 1 393 26 1104 000a 07F13003 add r3, r7, #48 1105 000e 0022 movs r2, #0 1106 0010 1A60 str r2, [r3] 1107 0012 5A60 str r2, [r3, #4] 1108 0014 9A60 str r2, [r3, #8] 1109 0016 DA60 str r2, [r3, #12] 394:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 1110 .loc 1 394 27 1111 0018 07F12403 add r3, r7, #36 1112 001c 0022 movs r2, #0 1113 001e 1A60 str r2, [r3] 1114 0020 5A60 str r2, [r3, #4] 1115 0022 9A60 str r2, [r3, #8] 395:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 1116 .loc 1 395 22 1117 0024 07F10803 add r3, r7, #8 1118 0028 0022 movs r2, #0 1119 002a 1A60 str r2, [r3] 1120 002c 5A60 str r2, [r3, #4] 1121 002e 9A60 str r2, [r3, #8] 1122 0030 DA60 str r2, [r3, #12] 1123 0032 1A61 str r2, [r3, #16] 1124 0034 5A61 str r2, [r3, #20] 1125 0036 9A61 str r2, [r3, #24] 396:Core/Src/tim.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 28 397:Core/Src/tim.c **** if (uav_type == 18) //一体化 1126 .loc 1 397 6 1127 0038 FB79 ldrb r3, [r7, #7] @ zero_extendqisi2 1128 003a 122B cmp r3, #18 1129 003c 40F08D80 bne .L65 398:Core/Src/tim.c **** { 399:Core/Src/tim.c **** htim4.Instance = TIM4; 1130 .loc 1 399 20 1131 0040 484B ldr r3, .L66 1132 0042 494A ldr r2, .L66+4 1133 0044 1A60 str r2, [r3] 400:Core/Src/tim.c **** htim4.Init.Prescaler = 72 - 1; 1134 .loc 1 400 26 1135 0046 474B ldr r3, .L66 1136 0048 4722 movs r2, #71 1137 004a 5A60 str r2, [r3, #4] 401:Core/Src/tim.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 1138 .loc 1 401 28 1139 004c 454B ldr r3, .L66 1140 004e 0022 movs r2, #0 1141 0050 9A60 str r2, [r3, #8] 402:Core/Src/tim.c **** htim4.Init.Period = 20000 - 1; //50hz 1142 .loc 1 402 23 1143 0052 444B ldr r3, .L66 1144 0054 44F61F62 movw r2, #19999 1145 0058 DA60 str r2, [r3, #12] 403:Core/Src/tim.c **** //htim4.Init.Period = 10000 - 1; //100hz 404:Core/Src/tim.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 1146 .loc 1 404 30 1147 005a 424B ldr r3, .L66 1148 005c 0022 movs r2, #0 1149 005e 1A61 str r2, [r3, #16] 405:Core/Src/tim.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1150 .loc 1 405 34 1151 0060 404B ldr r3, .L66 1152 0062 0022 movs r2, #0 1153 0064 9A61 str r2, [r3, #24] 406:Core/Src/tim.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 1154 .loc 1 406 9 1155 0066 3F48 ldr r0, .L66 1156 0068 FFF7FEFF bl HAL_TIM_Base_Init 1157 006c 0346 mov r3, r0 1158 .loc 1 406 8 1159 006e 002B cmp r3, #0 1160 0070 01D0 beq .L58 407:Core/Src/tim.c **** { 408:Core/Src/tim.c **** Error_Handler(); 1161 .loc 1 408 7 1162 0072 FFF7FEFF bl Error_Handler 1163 .L58: 409:Core/Src/tim.c **** } 410:Core/Src/tim.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 1164 .loc 1 410 36 1165 0076 4FF48053 mov r3, #4096 1166 007a 3B63 str r3, [r7, #48] 411:Core/Src/tim.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 1167 .loc 1 411 9 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 29 1168 007c 07F13003 add r3, r7, #48 1169 0080 1946 mov r1, r3 1170 0082 3848 ldr r0, .L66 1171 0084 FFF7FEFF bl HAL_TIM_ConfigClockSource 1172 0088 0346 mov r3, r0 1173 .loc 1 411 8 1174 008a 002B cmp r3, #0 1175 008c 01D0 beq .L59 412:Core/Src/tim.c **** { 413:Core/Src/tim.c **** Error_Handler(); 1176 .loc 1 413 7 1177 008e FFF7FEFF bl Error_Handler 1178 .L59: 414:Core/Src/tim.c **** } 415:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 1179 .loc 1 415 9 1180 0092 3448 ldr r0, .L66 1181 0094 FFF7FEFF bl HAL_TIM_PWM_Init 1182 0098 0346 mov r3, r0 1183 .loc 1 415 8 1184 009a 002B cmp r3, #0 1185 009c 01D0 beq .L60 416:Core/Src/tim.c **** { 417:Core/Src/tim.c **** Error_Handler(); 1186 .loc 1 417 7 1187 009e FFF7FEFF bl Error_Handler 1188 .L60: 418:Core/Src/tim.c **** } 419:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 1189 .loc 1 419 39 1190 00a2 0023 movs r3, #0 1191 00a4 7B62 str r3, [r7, #36] 420:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1192 .loc 1 420 35 1193 00a6 0023 movs r3, #0 1194 00a8 FB62 str r3, [r7, #44] 421:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 1195 .loc 1 421 9 1196 00aa 07F12403 add r3, r7, #36 1197 00ae 1946 mov r1, r3 1198 00b0 2C48 ldr r0, .L66 1199 00b2 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 1200 00b6 0346 mov r3, r0 1201 .loc 1 421 8 1202 00b8 002B cmp r3, #0 1203 00ba 01D0 beq .L61 422:Core/Src/tim.c **** { 423:Core/Src/tim.c **** Error_Handler(); 1204 .loc 1 423 7 1205 00bc FFF7FEFF bl Error_Handler 1206 .L61: 424:Core/Src/tim.c **** } 425:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 1207 .loc 1 425 22 1208 00c0 6023 movs r3, #96 1209 00c2 BB60 str r3, [r7, #8] 426:Core/Src/tim.c **** sConfigOC.Pulse = 0; ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 30 1210 .loc 1 426 21 1211 00c4 0023 movs r3, #0 1212 00c6 FB60 str r3, [r7, #12] 427:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 1213 .loc 1 427 26 1214 00c8 0023 movs r3, #0 1215 00ca 3B61 str r3, [r7, #16] 428:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 1216 .loc 1 428 26 1217 00cc 0023 movs r3, #0 1218 00ce BB61 str r3, [r7, #24] 429:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 1219 .loc 1 429 9 1220 00d0 07F10803 add r3, r7, #8 1221 00d4 0022 movs r2, #0 1222 00d6 1946 mov r1, r3 1223 00d8 2248 ldr r0, .L66 1224 00da FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 1225 00de 0346 mov r3, r0 1226 .loc 1 429 8 1227 00e0 002B cmp r3, #0 1228 00e2 01D0 beq .L62 430:Core/Src/tim.c **** { 431:Core/Src/tim.c **** Error_Handler(); 1229 .loc 1 431 7 1230 00e4 FFF7FEFF bl Error_Handler 1231 .L62: 432:Core/Src/tim.c **** } 433:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 1232 .loc 1 433 9 1233 00e8 07F10803 add r3, r7, #8 1234 00ec 0822 movs r2, #8 1235 00ee 1946 mov r1, r3 1236 00f0 1C48 ldr r0, .L66 1237 00f2 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 1238 00f6 0346 mov r3, r0 1239 .loc 1 433 8 1240 00f8 002B cmp r3, #0 1241 00fa 01D0 beq .L63 434:Core/Src/tim.c **** { 435:Core/Src/tim.c **** Error_Handler(); 1242 .loc 1 435 7 1243 00fc FFF7FEFF bl Error_Handler 1244 .L63: 436:Core/Src/tim.c **** } 437:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 1245 .loc 1 437 9 1246 0100 07F10803 add r3, r7, #8 1247 0104 0C22 movs r2, #12 1248 0106 1946 mov r1, r3 1249 0108 1648 ldr r0, .L66 1250 010a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 1251 010e 0346 mov r3, r0 1252 .loc 1 437 8 1253 0110 002B cmp r3, #0 1254 0112 01D0 beq .L64 438:Core/Src/tim.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 31 439:Core/Src/tim.c **** Error_Handler(); 1255 .loc 1 439 7 1256 0114 FFF7FEFF bl Error_Handler 1257 .L64: 440:Core/Src/tim.c **** } 441:Core/Src/tim.c **** 442:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim4); 1258 .loc 1 442 5 1259 0118 1248 ldr r0, .L66 1260 011a FFF7FEFF bl HAL_TIM_MspPostInit 443:Core/Src/tim.c **** 444:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1); 1261 .loc 1 444 5 1262 011e 0021 movs r1, #0 1263 0120 1048 ldr r0, .L66 1264 0122 FFF7FEFF bl HAL_TIM_PWM_Start 445:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); 1265 .loc 1 445 5 1266 0126 0821 movs r1, #8 1267 0128 0E48 ldr r0, .L66 1268 012a FFF7FEFF bl HAL_TIM_PWM_Start 446:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4); 1269 .loc 1 446 5 1270 012e 0C21 movs r1, #12 1271 0130 0C48 ldr r0, .L66 1272 0132 FFF7FEFF bl HAL_TIM_PWM_Start 447:Core/Src/tim.c **** 448:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_1, 1500); // PB6 video 1273 .loc 1 448 5 1274 0136 0B4B ldr r3, .L66 1275 0138 1B68 ldr r3, [r3] 1276 013a 40F2DC52 movw r2, #1500 1277 013e 5A63 str r2, [r3, #52] 449:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_3, 1000); // PB8 nozzle 1278 .loc 1 449 5 1279 0140 084B ldr r3, .L66 1280 0142 1B68 ldr r3, [r3] 1281 0144 4FF47A72 mov r2, #1000 1282 0148 DA63 str r2, [r3, #60] 450:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_4, 1000); // PB9 nozzle 1283 .loc 1 450 5 1284 014a 064B ldr r3, .L66 1285 014c 1B68 ldr r3, [r3] 1286 014e 4FF47A72 mov r2, #1000 1287 0152 1A64 str r2, [r3, #64] 451:Core/Src/tim.c **** 452:Core/Src/tim.c **** HAL_NVIC_DisableIRQ(EXTI9_5_IRQn); // 关外出触发中断 1288 .loc 1 452 5 1289 0154 1720 movs r0, #23 1290 0156 FFF7FEFF bl HAL_NVIC_DisableIRQ 1291 .L65: 453:Core/Src/tim.c **** } 454:Core/Src/tim.c **** } 1292 .loc 1 454 1 1293 015a 00BF nop 1294 015c 4037 adds r7, r7, #64 1295 .LCFI47: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 32 1296 .cfi_def_cfa_offset 8 1297 015e BD46 mov sp, r7 1298 .LCFI48: 1299 .cfi_def_cfa_register 13 1300 @ sp needed 1301 0160 80BD pop {r7, pc} 1302 .L67: 1303 0162 00BF .align 2 1304 .L66: 1305 0164 00000000 .word htim4 1306 0168 00080040 .word 1073743872 1307 .cfi_endproc 1308 .LFE139: 1310 .text 1311 .Letext0: 1312 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 1313 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 1314 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1315 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1316 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 1317 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1318 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 1319 .file 9 "Core/Inc/tim.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 33 DEFINED SYMBOLS *ABS*:00000000 tim.c C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:24 .bss.htim2:00000000 htim2 C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:21 .bss.htim2:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:31 .bss.htim3:00000000 htim3 C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:28 .bss.htim3:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:38 .bss.htim4:00000000 htim4 C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:35 .bss.htim4:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:41 .text.MX_TIM2_Init:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:47 .text.MX_TIM2_Init:00000000 MX_TIM2_Init C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:657 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:187 .text.MX_TIM2_Init:000000c4 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:192 .text.MX_TIM3_Init:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:198 .text.MX_TIM3_Init:00000000 MX_TIM3_Init C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:337 .text.MX_TIM3_Init:000000c4 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:343 .text.MX_TIM4_Init:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:349 .text.MX_TIM4_Init:00000000 MX_TIM4_Init C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:459 .text.MX_TIM4_Init:00000094 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:465 .text.HAL_TIM_Base_MspInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:471 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:554 .text.HAL_TIM_Base_MspInit:00000068 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:561 .text.HAL_TIM_PWM_MspInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:567 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:645 .text.HAL_TIM_PWM_MspInit:0000005c $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:651 .text.HAL_TIM_MspPostInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:849 .text.HAL_TIM_MspPostInit:00000120 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:857 .text.HAL_TIM_PWM_MspDeInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:863 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:927 .text.HAL_TIM_PWM_MspDeInit:00000044 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:933 .text.HAL_TIM_Base_MspDeInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:939 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1003 .text.HAL_TIM_Base_MspDeInit:00000044 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1010 .text.pwm_init:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1016 .text.pwm_init:00000000 pwm_init C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1072 .text.pwm_init:00000050 $d C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1078 .text.init_pwmout:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1084 .text.init_pwmout:00000000 init_pwmout C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1305 .text.init_pwmout:00000164 $d UNDEFINED SYMBOLS HAL_TIM_PWM_Init Error_Handler HAL_TIMEx_MasterConfigSynchronization HAL_TIM_PWM_ConfigChannel HAL_TIM_Base_Init HAL_TIM_ConfigClockSource HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_GPIO_Init HAL_NVIC_DisableIRQ HAL_TIM_PWM_Start