ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_rcc.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .rodata.aPLLMULFactorTable,"a" 20 .align 2 23 aPLLMULFactorTable: 24 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" 24 06070809 24 0A0B0C0D 24 0E 25 000d 0F1010 .ascii "\017\020\020" 26 .section .rodata.aPredivFactorTable,"a" 27 .align 2 30 aPredivFactorTable: 31 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" 31 05060708 31 090A0B0C 31 0D 32 000d 0E0F10 .ascii "\016\017\020" 33 .section .text.HAL_RCC_DeInit,"ax",%progbits 34 .align 1 35 .global HAL_RCC_DeInit 36 .syntax unified 37 .thumb 38 .thumb_func 40 HAL_RCC_DeInit: 41 .LFB130: 42 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c" 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @file stm32f3xx_hal_rcc.c 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 2 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG. 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses; 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** are assigned to be used for debug purpose. 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to: 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (if the application needs higher frequency/performance) 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, I2S, TIM, USB FS) 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC Limitations ##### 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ============================================================================== 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from/to registers. 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Workarounds: 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @attention 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * Copyright (c) 2016 STMicroelectronics. 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * All rights reserved. 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the root directory of this software component. 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ****************************************************************************** 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #include "stm32f3xx_hal.h" 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @addtogroup STM32F3xx_HAL_Driver 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC RCC 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 3 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Bits position in in the CFGR register */ 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_HPRE_BITNUMBER POSITION_VAL(RCC_CFGR_HPRE) 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE1_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE1) 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE2_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE2) 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/ 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initialization and Configuration functions 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and APB2). ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 4 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the PLL as System clock source. 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals. 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source. 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring different output clocks: 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 72 MHz) 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz) 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the ADC peripherals (up to 72 M 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The fourth output may be used to generate the clock for the TIM peripherals (144 MHz) 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin). 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HSE and PLL. 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the peripherals mapped on these buses. You can use 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock. 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock. 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock. 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output. 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK) 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency. 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock. 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For the STM32F3xx devices, the maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly. 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prefetch is disabled. 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 5 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings: 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) | 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------| 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |2WS(3CPU cycle)| 48 < SYSCLK <= 72 | 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+ 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSI ON and used as system clock source 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSE and PLL OFF 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - CSS and MCO1 OFF 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - All interrupts disabled 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function does not modify the configuration of the 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - Peripheral clocks 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 43 .loc 1 215 1 44 .cfi_startproc 45 @ args = 0, pretend = 0, frame = 16 46 @ frame_needed = 1, uses_anonymous_args = 0 47 0000 80B5 push {r7, lr} 48 .LCFI0: 49 .cfi_def_cfa_offset 8 50 .cfi_offset 7, -8 51 .cfi_offset 14, -4 52 0002 84B0 sub sp, sp, #16 53 .LCFI1: 54 .cfi_def_cfa_offset 24 55 0004 00AF add r7, sp, #0 56 .LCFI2: 57 .cfi_def_cfa_register 7 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0; 58 .loc 1 216 12 59 0006 0023 movs r3, #0 60 0008 FB60 str r3, [r7, #12] 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSION bit */ 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION); 61 .loc 1 219 3 62 000a 494B ldr r3, .L11 63 000c 1B68 ldr r3, [r3] 64 000e 484A ldr r2, .L11 65 0010 43F00103 orr r3, r3, #1 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 6 66 0014 1360 str r3, [r2] 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSIRDY bit is set before writing default HSITRIM value */ 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 67 .loc 1 223 15 68 0016 FFF7FEFF bl HAL_GetTick 69 001a F860 str r0, [r7, #12] 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) 70 .loc 1 226 8 71 001c 08E0 b .L2 72 .L4: 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 73 .loc 1 228 9 74 001e FFF7FEFF bl HAL_GetTick 75 0022 0246 mov r2, r0 76 .loc 1 228 23 77 0024 FB68 ldr r3, [r7, #12] 78 0026 D31A subs r3, r2, r3 79 .loc 1 228 7 80 0028 022B cmp r3, #2 81 002a 01D9 bls .L2 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 82 .loc 1 230 14 83 002c 0323 movs r3, #3 84 002e 7BE0 b .L3 85 .L2: 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 86 .loc 1 226 9 87 0030 3F4B ldr r3, .L11 88 0032 1B68 ldr r3, [r3] 89 0034 03F00203 and r3, r3, #2 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 90 .loc 1 226 8 91 0038 002B cmp r3, #0 92 003a F0D0 beq .L4 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSITRIM default value */ 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, RCC_CR_HSITRIM_4); 93 .loc 1 235 3 94 003c 3C4B ldr r3, .L11 95 003e 1B68 ldr r3, [r3] 96 0040 23F0F803 bic r3, r3, #248 97 0044 3A4A ldr r2, .L11 98 0046 43F08003 orr r3, r3, #128 99 004a 1360 str r3, [r2] 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */ 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO 100 .loc 1 238 3 101 004c 384B ldr r3, .L11 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 7 102 004e 5A68 ldr r2, [r3, #4] 103 0050 3749 ldr r1, .L11 104 0052 384B ldr r3, .L11+4 105 0054 1340 ands r3, r3, r2 106 0056 4B60 str r3, [r1, #4] 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSI selected as system clock source */ 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 107 .loc 1 242 15 108 0058 FFF7FEFF bl HAL_GetTick 109 005c F860 str r0, [r7, #12] 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till system clock source is ready */ 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) 110 .loc 1 245 8 111 005e 0AE0 b .L5 112 .L6: 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 113 .loc 1 247 9 114 0060 FFF7FEFF bl HAL_GetTick 115 0064 0246 mov r2, r0 116 .loc 1 247 23 117 0066 FB68 ldr r3, [r7, #12] 118 0068 D31A subs r3, r2, r3 119 .loc 1 247 7 120 006a 41F28832 movw r2, #5000 121 006e 9342 cmp r3, r2 122 0070 01D9 bls .L5 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 123 .loc 1 249 14 124 0072 0323 movs r3, #3 125 0074 58E0 b .L3 126 .L5: 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 127 .loc 1 245 9 128 0076 2E4B ldr r3, .L11 129 0078 5B68 ldr r3, [r3, #4] 130 007a 03F00C03 and r3, r3, #12 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 131 .loc 1 245 8 132 007e 002B cmp r3, #0 133 0080 EED1 bne .L6 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; 134 .loc 1 254 19 135 0082 2D4B ldr r3, .L11+8 136 0084 2D4A ldr r2, .L11+12 137 0086 1A60 str r2, [r3] 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clock settings */ 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_InitTick(uwTickPrio) != HAL_OK) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 8 138 .loc 1 257 6 139 0088 2D4B ldr r3, .L11+16 140 008a 1B68 ldr r3, [r3] 141 008c 1846 mov r0, r3 142 008e FFF7FEFF bl HAL_InitTick 143 0092 0346 mov r3, r0 144 .loc 1 257 5 145 0094 002B cmp r3, #0 146 0096 01D0 beq .L7 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 147 .loc 1 259 12 148 0098 0123 movs r3, #1 149 009a 45E0 b .L3 150 .L7: 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); 151 .loc 1 263 3 152 009c 244B ldr r3, .L11 153 009e 1B68 ldr r3, [r3] 154 00a0 234A ldr r2, .L11 155 00a2 23F08473 bic r3, r3, #17301504 156 00a6 23F48033 bic r3, r3, #65536 157 00aa 1360 str r3, [r2] 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEBYP bit */ 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); 158 .loc 1 266 3 159 00ac 204B ldr r3, .L11 160 00ae 1B68 ldr r3, [r3] 161 00b0 1F4A ldr r2, .L11 162 00b2 23F48023 bic r3, r3, #262144 163 00b6 1360 str r3, [r2] 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure PLLRDY is reset */ 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 164 .loc 1 270 15 165 00b8 FFF7FEFF bl HAL_GetTick 166 00bc F860 str r0, [r7, #12] 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 167 .loc 1 271 8 168 00be 08E0 b .L8 169 .L9: 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 170 .loc 1 273 9 171 00c0 FFF7FEFF bl HAL_GetTick 172 00c4 0246 mov r2, r0 173 .loc 1 273 23 174 00c6 FB68 ldr r3, [r7, #12] 175 00c8 D31A subs r3, r2, r3 176 .loc 1 273 7 177 00ca 022B cmp r3, #2 178 00cc 01D9 bls .L8 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 9 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 179 .loc 1 275 14 180 00ce 0323 movs r3, #3 181 00d0 2AE0 b .L3 182 .L8: 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 183 .loc 1 271 9 184 00d2 174B ldr r3, .L11 185 00d4 1B68 ldr r3, [r3] 186 00d6 03F00073 and r3, r3, #33554432 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 187 .loc 1 271 8 188 00da 002B cmp r3, #0 189 00dc F0D1 bne .L9 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR register */ 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); 190 .loc 1 280 3 191 00de 144B ldr r3, .L11 192 00e0 0022 movs r2, #0 193 00e2 5A60 str r2, [r3, #4] 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR2 register */ 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); 194 .loc 1 283 3 195 00e4 124B ldr r3, .L11 196 00e6 0022 movs r2, #0 197 00e8 DA62 str r2, [r3, #44] 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR3 register */ 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); 198 .loc 1 286 3 199 00ea 114B ldr r3, .L11 200 00ec 0022 movs r2, #0 201 00ee 1A63 str r2, [r3, #48] 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear all interrupt flags */ 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR 202 .loc 1 289 3 203 00f0 0F4B ldr r3, .L11 204 00f2 9B68 ldr r3, [r3, #8] 205 00f4 0E4A ldr r2, .L11 206 00f6 43F41F03 orr r3, r3, #10420224 207 00fa 9360 str r3, [r2, #8] 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable all interrupts */ 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); 208 .loc 1 292 3 209 00fc 0C4B ldr r3, .L11 210 00fe 0022 movs r2, #0 211 0100 9A60 str r2, [r3, #8] 212 0102 4FF08073 mov r3, #16777216 213 0106 BB60 str r3, [r7, #8] 214 .LBB162: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 10 215 .LBB163: 216 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 11 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 12 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 13 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 14 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 15 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 16 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 17 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 18 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 19 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 20 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 21 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 22 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 23 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 24 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 25 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 26 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 27 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 217 .loc 2 988 4 218 0108 BB68 ldr r3, [r7, #8] 219 .syntax unified 220 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 221 010a 93FAA3F3 rbit r3, r3 222 @ 0 "" 2 223 .thumb 224 .syntax unified 225 010e 7B60 str r3, [r7, #4] 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 226 .loc 2 1001 10 227 0110 7B68 ldr r3, [r7, #4] 228 .LBE163: 229 .LBE162: 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset all CSR flags */ 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); 230 .loc 1 295 3 231 0112 B3FA83F3 clz r3, r3 232 0116 DBB2 uxtb r3, r3 233 0118 1A46 mov r2, r3 234 011a 0A4B ldr r3, .L11+20 235 011c 1344 add r3, r3, r2 236 011e 9B00 lsls r3, r3, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 28 237 0120 1A46 mov r2, r3 238 0122 0123 movs r3, #1 239 0124 1360 str r3, [r2] 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 240 .loc 1 297 10 241 0126 0023 movs r3, #0 242 .L3: 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 243 .loc 1 298 1 244 0128 1846 mov r0, r3 245 012a 1037 adds r7, r7, #16 246 .LCFI3: 247 .cfi_def_cfa_offset 8 248 012c BD46 mov sp, r7 249 .LCFI4: 250 .cfi_def_cfa_register 13 251 @ sp needed 252 012e 80BD pop {r7, pc} 253 .L12: 254 .align 2 255 .L11: 256 0130 00100240 .word 1073876992 257 0134 0CC0FFF8 .word -117456884 258 0138 00000000 .word SystemCoreClock 259 013c 00127A00 .word 8000000 260 0140 00000000 .word uwTickPrio 261 0144 20819010 .word 277905696 262 .cfi_endproc 263 .LFE130: 265 .section .rodata 266 .align 2 267 .LC0: 268 0000 44726976 .ascii "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc." 268 6572732F 268 53544D33 268 32463378 268 785F4841 269 0033 6300 .ascii "c\000" 270 .section .text.HAL_RCC_OscConfig,"ax",%progbits 271 .align 1 272 .global HAL_RCC_OscConfig 273 .syntax unified 274 .thumb 275 .thumb_func 277 HAL_RCC_OscConfig: 278 .LFB131: 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC_OscInitTypeDef. 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 29 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 279 .loc 1 315 1 280 .cfi_startproc 281 @ args = 0, pretend = 0, frame = 512 282 @ frame_needed = 1, uses_anonymous_args = 0 283 0000 80B5 push {r7, lr} 284 .LCFI5: 285 .cfi_def_cfa_offset 8 286 .cfi_offset 7, -8 287 .cfi_offset 14, -4 288 0002 ADF5007D sub sp, sp, #512 289 .LCFI6: 290 .cfi_def_cfa_offset 520 291 0006 00AF add r7, sp, #0 292 .LCFI7: 293 .cfi_def_cfa_register 7 294 0008 07F50073 add r3, r7, #512 295 000c A3F5FE73 sub r3, r3, #508 296 0010 1860 str r0, [r3] 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config; 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config2; 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) 297 .loc 1 323 5 298 0012 07F50073 add r3, r7, #512 299 0016 A3F5FE73 sub r3, r3, #508 300 001a 1B68 ldr r3, [r3] 301 001c 002B cmp r3, #0 302 001e 02D1 bne .L14 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 303 .loc 1 325 12 304 0020 0123 movs r3, #1 305 0022 01F09AB9 b .L15 306 .L14: 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 307 .loc 1 329 3 308 0026 07F50073 add r3, r7, #512 309 002a A3F5FE73 sub r3, r3, #508 310 002e 1B68 ldr r3, [r3] 311 0030 1B68 ldr r3, [r3] 312 0032 002B cmp r3, #0 313 0034 2CD0 beq .L16 314 .loc 1 329 3 is_stmt 0 discriminator 1 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 30 315 0036 07F50073 add r3, r7, #512 316 003a A3F5FE73 sub r3, r3, #508 317 003e 1B68 ldr r3, [r3] 318 0040 1B68 ldr r3, [r3] 319 0042 03F00103 and r3, r3, #1 320 0046 002B cmp r3, #0 321 0048 22D1 bne .L16 322 .loc 1 329 3 discriminator 2 323 004a 07F50073 add r3, r7, #512 324 004e A3F5FE73 sub r3, r3, #508 325 0052 1B68 ldr r3, [r3] 326 0054 1B68 ldr r3, [r3] 327 0056 03F00203 and r3, r3, #2 328 005a 002B cmp r3, #0 329 005c 18D1 bne .L16 330 .loc 1 329 3 discriminator 3 331 005e 07F50073 add r3, r7, #512 332 0062 A3F5FE73 sub r3, r3, #508 333 0066 1B68 ldr r3, [r3] 334 0068 1B68 ldr r3, [r3] 335 006a 03F00803 and r3, r3, #8 336 006e 002B cmp r3, #0 337 0070 0ED1 bne .L16 338 .loc 1 329 3 discriminator 4 339 0072 07F50073 add r3, r7, #512 340 0076 A3F5FE73 sub r3, r3, #508 341 007a 1B68 ldr r3, [r3] 342 007c 1B68 ldr r3, [r3] 343 007e 03F00403 and r3, r3, #4 344 0082 002B cmp r3, #0 345 0084 04D1 bne .L16 346 .loc 1 329 3 discriminator 5 347 0086 40F24911 movw r1, #329 348 008a BA48 ldr r0, .L163 349 008c FFF7FEFF bl assert_failed 350 .L16: 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 351 .loc 1 332 25 is_stmt 1 352 0090 07F50073 add r3, r7, #512 353 0094 A3F5FE73 sub r3, r3, #508 354 0098 1B68 ldr r3, [r3] 355 009a 1B68 ldr r3, [r3] 356 .loc 1 332 43 357 009c 03F00103 and r3, r3, #1 358 .loc 1 332 5 359 00a0 002B cmp r3, #0 360 00a2 00F09D81 beq .L17 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 361 .loc 1 335 5 362 00a6 07F50073 add r3, r7, #512 363 00aa A3F5FE73 sub r3, r3, #508 364 00ae 1B68 ldr r3, [r3] 365 00b0 5B68 ldr r3, [r3, #4] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 31 366 00b2 002B cmp r3, #0 367 00b4 16D0 beq .L18 368 .loc 1 335 5 is_stmt 0 discriminator 1 369 00b6 07F50073 add r3, r7, #512 370 00ba A3F5FE73 sub r3, r3, #508 371 00be 1B68 ldr r3, [r3] 372 00c0 5B68 ldr r3, [r3, #4] 373 00c2 B3F5803F cmp r3, #65536 374 00c6 0DD0 beq .L18 375 .loc 1 335 5 discriminator 2 376 00c8 07F50073 add r3, r7, #512 377 00cc A3F5FE73 sub r3, r3, #508 378 00d0 1B68 ldr r3, [r3] 379 00d2 5B68 ldr r3, [r3, #4] 380 00d4 B3F5A02F cmp r3, #327680 381 00d8 04D0 beq .L18 382 .loc 1 335 5 discriminator 3 383 00da 40F24F11 movw r1, #335 384 00de A548 ldr r0, .L163 385 00e0 FFF7FEFF bl assert_failed 386 .L18: 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 387 .loc 1 338 9 is_stmt 1 388 00e4 A44B ldr r3, .L163+4 389 00e6 5B68 ldr r3, [r3, #4] 390 00e8 03F00C03 and r3, r3, #12 391 .loc 1 338 7 392 00ec 042B cmp r3, #4 393 00ee 0CD0 beq .L19 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ 394 .loc 1 339 13 395 00f0 A14B ldr r3, .L163+4 396 00f2 5B68 ldr r3, [r3, #4] 397 00f4 03F00C03 and r3, r3, #12 398 .loc 1 339 8 399 00f8 082B cmp r3, #8 400 00fa 5CD1 bne .L20 401 .loc 1 339 82 discriminator 1 402 00fc 9E4B ldr r3, .L163+4 403 00fe 5B68 ldr r3, [r3, #4] 404 0100 03F48033 and r3, r3, #65536 405 .loc 1 339 78 discriminator 1 406 0104 B3F5803F cmp r3, #65536 407 0108 55D1 bne .L20 408 .L19: 409 010a 4FF40033 mov r3, #131072 410 010e C7F8F031 str r3, [r7, #496] 411 .LBB164: 412 .LBB165: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 413 .loc 2 988 4 414 0112 D7F8F031 ldr r3, [r7, #496] 415 .syntax unified 416 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 417 0116 93FAA3F3 rbit r3, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 32 418 @ 0 "" 2 419 .thumb 420 .syntax unified 421 011a C7F8EC31 str r3, [r7, #492] 422 .loc 2 1001 10 423 011e D7F8EC31 ldr r3, [r7, #492] 424 .LBE165: 425 .LBE164: 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ 426 .loc 1 341 11 427 0122 B3FA83F3 clz r3, r3 428 0126 DBB2 uxtb r3, r3 429 0128 5B09 lsrs r3, r3, #5 430 012a DBB2 uxtb r3, r3 431 012c 43F00103 orr r3, r3, #1 432 0130 DBB2 uxtb r3, r3 433 0132 012B cmp r3, #1 434 0134 02D1 bne .L22 435 .loc 1 341 11 is_stmt 0 discriminator 1 436 0136 904B ldr r3, .L163+4 437 0138 1B68 ldr r3, [r3] 438 013a 15E0 b .L23 439 .L22: 440 013c 4FF40033 mov r3, #131072 441 0140 C7F8E831 str r3, [r7, #488] 442 .LBB166: 443 .LBB167: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 444 .loc 2 988 4 is_stmt 1 discriminator 2 445 0144 D7F8E831 ldr r3, [r7, #488] 446 .syntax unified 447 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 448 0148 93FAA3F3 rbit r3, r3 449 @ 0 "" 2 450 .thumb 451 .syntax unified 452 014c C7F8E431 str r3, [r7, #484] 453 0150 4FF40033 mov r3, #131072 454 0154 C7F8E031 str r3, [r7, #480] 455 .LBE167: 456 .LBE166: 457 .LBB168: 458 .LBB169: 459 0158 D7F8E031 ldr r3, [r7, #480] 460 .syntax unified 461 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 462 015c 93FAA3F3 rbit r3, r3 463 @ 0 "" 2 464 .thumb 465 .syntax unified 466 0160 C7F8DC31 str r3, [r7, #476] 467 .LBE169: 468 .LBE168: 469 .loc 1 341 11 discriminator 2 470 0164 844B ldr r3, .L163+4 471 0166 5B6A ldr r3, [r3, #36] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 33 472 .L23: 473 0168 4FF40032 mov r2, #131072 474 016c C7F8D821 str r2, [r7, #472] 475 .LBB170: 476 .LBB171: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 477 .loc 2 988 4 discriminator 12 478 0170 D7F8D821 ldr r2, [r7, #472] 479 .syntax unified 480 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 481 0174 92FAA2F2 rbit r2, r2 482 @ 0 "" 2 483 .thumb 484 .syntax unified 485 0178 C7F8D421 str r2, [r7, #468] 486 .loc 2 1001 10 discriminator 12 487 017c D7F8D421 ldr r2, [r7, #468] 488 .LBE171: 489 .LBE170: 490 .loc 1 341 11 discriminator 12 491 0180 B2FA82F2 clz r2, r2 492 0184 D2B2 uxtb r2, r2 493 0186 42F02002 orr r2, r2, #32 494 018a D2B2 uxtb r2, r2 495 018c 02F01F02 and r2, r2, #31 496 0190 0121 movs r1, #1 497 0192 01FA02F2 lsl r2, r1, r2 498 0196 1340 ands r3, r3, r2 499 .loc 1 341 9 discriminator 12 500 0198 002B cmp r3, #0 501 019a 00F02081 beq .L162 502 .loc 1 341 78 discriminator 13 503 019e 07F50073 add r3, r7, #512 504 01a2 A3F5FE73 sub r3, r3, #508 505 01a6 1B68 ldr r3, [r3] 506 01a8 5B68 ldr r3, [r3, #4] 507 .loc 1 341 57 discriminator 13 508 01aa 002B cmp r3, #0 509 01ac 40F01781 bne .L162 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 510 .loc 1 343 16 511 01b0 0123 movs r3, #1 512 01b2 01F0D2B8 b .L15 513 .L20: 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 514 .loc 1 349 7 515 01b6 07F50073 add r3, r7, #512 516 01ba A3F5FE73 sub r3, r3, #508 517 01be 1B68 ldr r3, [r3] 518 01c0 5B68 ldr r3, [r3, #4] 519 01c2 B3F5803F cmp r3, #65536 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 34 520 01c6 06D1 bne .L28 521 .loc 1 349 7 is_stmt 0 discriminator 1 522 01c8 6B4B ldr r3, .L163+4 523 01ca 1B68 ldr r3, [r3] 524 01cc 6A4A ldr r2, .L163+4 525 01ce 43F48033 orr r3, r3, #65536 526 01d2 1360 str r3, [r2] 527 01d4 36E0 b .L29 528 .L28: 529 .loc 1 349 7 discriminator 2 530 01d6 07F50073 add r3, r7, #512 531 01da A3F5FE73 sub r3, r3, #508 532 01de 1B68 ldr r3, [r3] 533 01e0 5B68 ldr r3, [r3, #4] 534 01e2 002B cmp r3, #0 535 01e4 0CD1 bne .L30 536 .loc 1 349 7 discriminator 3 537 01e6 644B ldr r3, .L163+4 538 01e8 1B68 ldr r3, [r3] 539 01ea 634A ldr r2, .L163+4 540 01ec 23F48033 bic r3, r3, #65536 541 01f0 1360 str r3, [r2] 542 01f2 614B ldr r3, .L163+4 543 01f4 1B68 ldr r3, [r3] 544 01f6 604A ldr r2, .L163+4 545 01f8 23F48023 bic r3, r3, #262144 546 01fc 1360 str r3, [r2] 547 01fe 21E0 b .L29 548 .L30: 549 .loc 1 349 7 discriminator 4 550 0200 07F50073 add r3, r7, #512 551 0204 A3F5FE73 sub r3, r3, #508 552 0208 1B68 ldr r3, [r3] 553 020a 5B68 ldr r3, [r3, #4] 554 020c B3F5A02F cmp r3, #327680 555 0210 0CD1 bne .L31 556 .loc 1 349 7 discriminator 5 557 0212 594B ldr r3, .L163+4 558 0214 1B68 ldr r3, [r3] 559 0216 584A ldr r2, .L163+4 560 0218 43F48023 orr r3, r3, #262144 561 021c 1360 str r3, [r2] 562 021e 564B ldr r3, .L163+4 563 0220 1B68 ldr r3, [r3] 564 0222 554A ldr r2, .L163+4 565 0224 43F48033 orr r3, r3, #65536 566 0228 1360 str r3, [r2] 567 022a 0BE0 b .L29 568 .L31: 569 .loc 1 349 7 discriminator 6 570 022c 524B ldr r3, .L163+4 571 022e 1B68 ldr r3, [r3] 572 0230 514A ldr r2, .L163+4 573 0232 23F48033 bic r3, r3, #65536 574 0236 1360 str r3, [r2] 575 0238 4F4B ldr r3, .L163+4 576 023a 1B68 ldr r3, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 35 577 023c 4E4A ldr r2, .L163+4 578 023e 23F48023 bic r3, r3, #262144 579 0242 1360 str r3, [r2] 580 .L29: 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the HSE predivision factor --------------------------------*/ 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 581 .loc 1 353 7 is_stmt 1 582 0244 4C4B ldr r3, .L163+4 583 0246 DB6A ldr r3, [r3, #44] 584 0248 23F00F02 bic r2, r3, #15 585 024c 07F50073 add r3, r7, #512 586 0250 A3F5FE73 sub r3, r3, #508 587 0254 1B68 ldr r3, [r3] 588 0256 9B68 ldr r3, [r3, #8] 589 0258 4749 ldr r1, .L163+4 590 025a 1343 orrs r3, r3, r2 591 025c CB62 str r3, [r1, #44] 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE State */ 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 592 .loc 1 357 27 593 025e 07F50073 add r3, r7, #512 594 0262 A3F5FE73 sub r3, r3, #508 595 0266 1B68 ldr r3, [r3] 596 0268 5B68 ldr r3, [r3, #4] 597 .loc 1 357 9 598 026a 002B cmp r3, #0 599 026c 59D0 beq .L32 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 600 .loc 1 360 21 601 026e FFF7FEFF bl HAL_GetTick 602 0272 C7F8F801 str r0, [r7, #504] 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is ready */ 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 603 .loc 1 363 14 604 0276 0AE0 b .L33 605 .L40: 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 606 .loc 1 365 15 607 0278 FFF7FEFF bl HAL_GetTick 608 027c 0246 mov r2, r0 609 .loc 1 365 29 610 027e D7F8F831 ldr r3, [r7, #504] 611 0282 D31A subs r3, r2, r3 612 .loc 1 365 13 613 0284 642B cmp r3, #100 614 0286 02D9 bls .L33 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 615 .loc 1 367 20 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 36 616 0288 0323 movs r3, #3 617 028a 01F066B8 b .L15 618 .L33: 619 028e 4FF40033 mov r3, #131072 620 0292 C7F8D031 str r3, [r7, #464] 621 .LBB172: 622 .LBB173: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 623 .loc 2 988 4 624 0296 D7F8D031 ldr r3, [r7, #464] 625 .syntax unified 626 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 627 029a 93FAA3F3 rbit r3, r3 628 @ 0 "" 2 629 .thumb 630 .syntax unified 631 029e C7F8CC31 str r3, [r7, #460] 632 .loc 2 1001 10 633 02a2 D7F8CC31 ldr r3, [r7, #460] 634 .LBE173: 635 .LBE172: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 636 .loc 1 363 15 637 02a6 B3FA83F3 clz r3, r3 638 02aa DBB2 uxtb r3, r3 639 02ac 5B09 lsrs r3, r3, #5 640 02ae DBB2 uxtb r3, r3 641 02b0 43F00103 orr r3, r3, #1 642 02b4 DBB2 uxtb r3, r3 643 02b6 012B cmp r3, #1 644 02b8 02D1 bne .L35 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 645 .loc 1 363 15 is_stmt 0 discriminator 1 646 02ba 2F4B ldr r3, .L163+4 647 02bc 1B68 ldr r3, [r3] 648 02be 15E0 b .L36 649 .L35: 650 02c0 4FF40033 mov r3, #131072 651 02c4 C7F8C831 str r3, [r7, #456] 652 .LBB174: 653 .LBB175: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 654 .loc 2 988 4 is_stmt 1 discriminator 2 655 02c8 D7F8C831 ldr r3, [r7, #456] 656 .syntax unified 657 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 658 02cc 93FAA3F3 rbit r3, r3 659 @ 0 "" 2 660 .thumb 661 .syntax unified 662 02d0 C7F8C431 str r3, [r7, #452] 663 02d4 4FF40033 mov r3, #131072 664 02d8 C7F8C031 str r3, [r7, #448] 665 .LBE175: 666 .LBE174: 667 .LBB176: 668 .LBB177: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 37 669 02dc D7F8C031 ldr r3, [r7, #448] 670 .syntax unified 671 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 672 02e0 93FAA3F3 rbit r3, r3 673 @ 0 "" 2 674 .thumb 675 .syntax unified 676 02e4 C7F8BC31 str r3, [r7, #444] 677 .LBE177: 678 .LBE176: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 679 .loc 1 363 15 discriminator 2 680 02e8 234B ldr r3, .L163+4 681 02ea 5B6A ldr r3, [r3, #36] 682 .L36: 683 02ec 4FF40032 mov r2, #131072 684 02f0 C7F8B821 str r2, [r7, #440] 685 .LBB178: 686 .LBB179: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687 .loc 2 988 4 discriminator 12 688 02f4 D7F8B821 ldr r2, [r7, #440] 689 .syntax unified 690 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 691 02f8 92FAA2F2 rbit r2, r2 692 @ 0 "" 2 693 .thumb 694 .syntax unified 695 02fc C7F8B421 str r2, [r7, #436] 696 .loc 2 1001 10 discriminator 12 697 0300 D7F8B421 ldr r2, [r7, #436] 698 .LBE179: 699 .LBE178: 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 700 .loc 1 363 15 discriminator 12 701 0304 B2FA82F2 clz r2, r2 702 0308 D2B2 uxtb r2, r2 703 030a 42F02002 orr r2, r2, #32 704 030e D2B2 uxtb r2, r2 705 0310 02F01F02 and r2, r2, #31 706 0314 0121 movs r1, #1 707 0316 01FA02F2 lsl r2, r1, r2 708 031a 1340 ands r3, r3, r2 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 709 .loc 1 363 14 discriminator 12 710 031c 002B cmp r3, #0 711 031e ABD0 beq .L40 712 0320 5EE0 b .L17 713 .L32: 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 714 .loc 1 374 21 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 38 715 0322 FFF7FEFF bl HAL_GetTick 716 0326 C7F8F801 str r0, [r7, #504] 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is disabled */ 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 717 .loc 1 377 14 718 032a 0AE0 b .L41 719 .L48: 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 720 .loc 1 379 16 721 032c FFF7FEFF bl HAL_GetTick 722 0330 0246 mov r2, r0 723 .loc 1 379 30 724 0332 D7F8F831 ldr r3, [r7, #504] 725 0336 D31A subs r3, r2, r3 726 .loc 1 379 14 727 0338 642B cmp r3, #100 728 033a 02D9 bls .L41 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 729 .loc 1 381 20 730 033c 0323 movs r3, #3 731 033e 01F00CB8 b .L15 732 .L41: 733 0342 4FF40033 mov r3, #131072 734 0346 C7F8B031 str r3, [r7, #432] 735 .LBB180: 736 .LBB181: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 737 .loc 2 988 4 738 034a D7F8B031 ldr r3, [r7, #432] 739 .syntax unified 740 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 741 034e 93FAA3F3 rbit r3, r3 742 @ 0 "" 2 743 .thumb 744 .syntax unified 745 0352 C7F8AC31 str r3, [r7, #428] 746 .loc 2 1001 10 747 0356 D7F8AC31 ldr r3, [r7, #428] 748 .LBE181: 749 .LBE180: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 750 .loc 1 377 15 751 035a B3FA83F3 clz r3, r3 752 035e DBB2 uxtb r3, r3 753 0360 5B09 lsrs r3, r3, #5 754 0362 DBB2 uxtb r3, r3 755 0364 43F00103 orr r3, r3, #1 756 0368 DBB2 uxtb r3, r3 757 036a 012B cmp r3, #1 758 036c 06D1 bne .L43 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 759 .loc 1 377 15 is_stmt 0 discriminator 1 760 036e 024B ldr r3, .L163+4 761 0370 1B68 ldr r3, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 39 762 0372 19E0 b .L44 763 .L164: 764 .align 2 765 .L163: 766 0374 00000000 .word .LC0 767 0378 00100240 .word 1073876992 768 .L43: 769 037c 4FF40033 mov r3, #131072 770 0380 C7F8A831 str r3, [r7, #424] 771 .LBB182: 772 .LBB183: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 773 .loc 2 988 4 is_stmt 1 discriminator 2 774 0384 D7F8A831 ldr r3, [r7, #424] 775 .syntax unified 776 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 777 0388 93FAA3F3 rbit r3, r3 778 @ 0 "" 2 779 .thumb 780 .syntax unified 781 038c C7F8A431 str r3, [r7, #420] 782 0390 4FF40033 mov r3, #131072 783 0394 C7F8A031 str r3, [r7, #416] 784 .LBE183: 785 .LBE182: 786 .LBB184: 787 .LBB185: 788 0398 D7F8A031 ldr r3, [r7, #416] 789 .syntax unified 790 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 791 039c 93FAA3F3 rbit r3, r3 792 @ 0 "" 2 793 .thumb 794 .syntax unified 795 03a0 C7F89C31 str r3, [r7, #412] 796 .LBE185: 797 .LBE184: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 798 .loc 1 377 15 discriminator 2 799 03a4 C04B ldr r3, .L165 800 03a6 5B6A ldr r3, [r3, #36] 801 .L44: 802 03a8 4FF40032 mov r2, #131072 803 03ac C7F89821 str r2, [r7, #408] 804 .LBB186: 805 .LBB187: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 806 .loc 2 988 4 discriminator 12 807 03b0 D7F89821 ldr r2, [r7, #408] 808 .syntax unified 809 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 810 03b4 92FAA2F2 rbit r2, r2 811 @ 0 "" 2 812 .thumb 813 .syntax unified 814 03b8 C7F89421 str r2, [r7, #404] 815 .loc 2 1001 10 discriminator 12 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 40 816 03bc D7F89421 ldr r2, [r7, #404] 817 .LBE187: 818 .LBE186: 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 819 .loc 1 377 15 discriminator 12 820 03c0 B2FA82F2 clz r2, r2 821 03c4 D2B2 uxtb r2, r2 822 03c6 42F02002 orr r2, r2, #32 823 03ca D2B2 uxtb r2, r2 824 03cc 02F01F02 and r2, r2, #31 825 03d0 0121 movs r1, #1 826 03d2 01FA02F2 lsl r2, r1, r2 827 03d6 1340 ands r3, r3, r2 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 828 .loc 1 377 14 discriminator 12 829 03d8 002B cmp r3, #0 830 03da A7D1 bne .L48 831 03dc 00E0 b .L17 832 .L162: 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 833 .loc 1 341 9 834 03de 00BF nop 835 .L17: 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 836 .loc 1 388 25 837 03e0 07F50073 add r3, r7, #512 838 03e4 A3F5FE73 sub r3, r3, #508 839 03e8 1B68 ldr r3, [r3] 840 03ea 1B68 ldr r3, [r3] 841 .loc 1 388 43 842 03ec 03F00203 and r3, r3, #2 843 .loc 1 388 5 844 03f0 002B cmp r3, #0 845 03f2 00F0A281 beq .L49 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 846 .loc 1 391 5 847 03f6 07F50073 add r3, r7, #512 848 03fa A3F5FE73 sub r3, r3, #508 849 03fe 1B68 ldr r3, [r3] 850 0400 1B69 ldr r3, [r3, #16] 851 0402 002B cmp r3, #0 852 0404 0CD0 beq .L50 853 .loc 1 391 5 is_stmt 0 discriminator 1 854 0406 07F50073 add r3, r7, #512 855 040a A3F5FE73 sub r3, r3, #508 856 040e 1B68 ldr r3, [r3] 857 0410 1B69 ldr r3, [r3, #16] 858 0412 012B cmp r3, #1 859 0414 04D0 beq .L50 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 41 860 .loc 1 391 5 discriminator 2 861 0416 40F28711 movw r1, #391 862 041a A448 ldr r0, .L165+4 863 041c FFF7FEFF bl assert_failed 864 .L50: 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 865 .loc 1 392 5 is_stmt 1 866 0420 07F50073 add r3, r7, #512 867 0424 A3F5FE73 sub r3, r3, #508 868 0428 1B68 ldr r3, [r3] 869 042a 5B69 ldr r3, [r3, #20] 870 042c 1F2B cmp r3, #31 871 042e 04D9 bls .L51 872 .loc 1 392 5 is_stmt 0 discriminator 1 873 0430 4FF4C471 mov r1, #392 874 0434 9D48 ldr r0, .L165+4 875 0436 FFF7FEFF bl assert_failed 876 .L51: 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 877 .loc 1 395 9 is_stmt 1 878 043a 9B4B ldr r3, .L165 879 043c 5B68 ldr r3, [r3, #4] 880 043e 03F00C03 and r3, r3, #12 881 .loc 1 395 7 882 0442 002B cmp r3, #0 883 0444 0BD0 beq .L52 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ 884 .loc 1 396 13 885 0446 984B ldr r3, .L165 886 0448 5B68 ldr r3, [r3, #4] 887 044a 03F00C03 and r3, r3, #12 888 .loc 1 396 8 889 044e 082B cmp r3, #8 890 0450 72D1 bne .L53 891 .loc 1 396 82 discriminator 1 892 0452 954B ldr r3, .L165 893 0454 5B68 ldr r3, [r3, #4] 894 0456 03F48033 and r3, r3, #65536 895 .loc 1 396 78 discriminator 1 896 045a 002B cmp r3, #0 897 045c 6CD1 bne .L53 898 .L52: 899 045e 0223 movs r3, #2 900 0460 C7F89031 str r3, [r7, #400] 901 .LBB188: 902 .LBB189: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 903 .loc 2 988 4 904 0464 D7F89031 ldr r3, [r7, #400] 905 .syntax unified 906 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 907 0468 93FAA3F3 rbit r3, r3 908 @ 0 "" 2 909 .thumb 910 .syntax unified ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 42 911 046c C7F88C31 str r3, [r7, #396] 912 .loc 2 1001 10 913 0470 D7F88C31 ldr r3, [r7, #396] 914 .LBE189: 915 .LBE188: 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ 916 .loc 1 399 11 917 0474 B3FA83F3 clz r3, r3 918 0478 DBB2 uxtb r3, r3 919 047a 5B09 lsrs r3, r3, #5 920 047c DBB2 uxtb r3, r3 921 047e 43F00103 orr r3, r3, #1 922 0482 DBB2 uxtb r3, r3 923 0484 012B cmp r3, #1 924 0486 02D1 bne .L55 925 .loc 1 399 11 is_stmt 0 discriminator 1 926 0488 874B ldr r3, .L165 927 048a 1B68 ldr r3, [r3] 928 048c 13E0 b .L56 929 .L55: 930 048e 0223 movs r3, #2 931 0490 C7F88831 str r3, [r7, #392] 932 .LBB190: 933 .LBB191: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 934 .loc 2 988 4 is_stmt 1 discriminator 2 935 0494 D7F88831 ldr r3, [r7, #392] 936 .syntax unified 937 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 938 0498 93FAA3F3 rbit r3, r3 939 @ 0 "" 2 940 .thumb 941 .syntax unified 942 049c C7F88431 str r3, [r7, #388] 943 04a0 0223 movs r3, #2 944 04a2 C7F88031 str r3, [r7, #384] 945 .LBE191: 946 .LBE190: 947 .LBB192: 948 .LBB193: 949 04a6 D7F88031 ldr r3, [r7, #384] 950 .syntax unified 951 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 952 04aa 93FAA3F3 rbit r3, r3 953 @ 0 "" 2 954 .thumb 955 .syntax unified 956 04ae C7F87C31 str r3, [r7, #380] 957 .LBE193: 958 .LBE192: 959 .loc 1 399 11 discriminator 2 960 04b2 7D4B ldr r3, .L165 961 04b4 5B6A ldr r3, [r3, #36] 962 .L56: 963 04b6 0222 movs r2, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 43 964 04b8 C7F87821 str r2, [r7, #376] 965 .LBB194: 966 .LBB195: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 967 .loc 2 988 4 discriminator 12 968 04bc D7F87821 ldr r2, [r7, #376] 969 .syntax unified 970 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 971 04c0 92FAA2F2 rbit r2, r2 972 @ 0 "" 2 973 .thumb 974 .syntax unified 975 04c4 C7F87421 str r2, [r7, #372] 976 .loc 2 1001 10 discriminator 12 977 04c8 D7F87421 ldr r2, [r7, #372] 978 .LBE195: 979 .LBE194: 980 .loc 1 399 11 discriminator 12 981 04cc B2FA82F2 clz r2, r2 982 04d0 D2B2 uxtb r2, r2 983 04d2 42F02002 orr r2, r2, #32 984 04d6 D2B2 uxtb r2, r2 985 04d8 02F01F02 and r2, r2, #31 986 04dc 0121 movs r1, #1 987 04de 01FA02F2 lsl r2, r1, r2 988 04e2 1340 ands r3, r3, r2 989 .loc 1 399 9 discriminator 12 990 04e4 002B cmp r3, #0 991 04e6 0AD0 beq .L60 992 .loc 1 399 78 discriminator 13 993 04e8 07F50073 add r3, r7, #512 994 04ec A3F5FE73 sub r3, r3, #508 995 04f0 1B68 ldr r3, [r3] 996 04f2 1B69 ldr r3, [r3, #16] 997 .loc 1 399 57 discriminator 13 998 04f4 012B cmp r3, #1 999 04f6 02D0 beq .L60 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 1000 .loc 1 401 16 1001 04f8 0123 movs r3, #1 1002 04fa 00F02EBF b .L15 1003 .L60: 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 1004 .loc 1 407 9 1005 04fe 6A4B ldr r3, .L165 1006 0500 1B68 ldr r3, [r3] 1007 0502 23F0F802 bic r2, r3, #248 1008 0506 07F50073 add r3, r7, #512 1009 050a A3F5FE73 sub r3, r3, #508 1010 050e 1B68 ldr r3, [r3] 1011 0510 5B69 ldr r3, [r3, #20] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 44 1012 0512 F821 movs r1, #248 1013 0514 C7F87011 str r1, [r7, #368] 1014 .LBB196: 1015 .LBB197: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1016 .loc 2 988 4 1017 0518 D7F87011 ldr r1, [r7, #368] 1018 .syntax unified 1019 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1020 051c 91FAA1F1 rbit r1, r1 1021 @ 0 "" 2 1022 .thumb 1023 .syntax unified 1024 0520 C7F86C11 str r1, [r7, #364] 1025 .loc 2 1001 10 1026 0524 D7F86C11 ldr r1, [r7, #364] 1027 .LBE197: 1028 .LBE196: 1029 .loc 1 407 9 1030 0528 B1FA81F1 clz r1, r1 1031 052c C9B2 uxtb r1, r1 1032 052e 8B40 lsls r3, r3, r1 1033 0530 5D49 ldr r1, .L165 1034 0532 1343 orrs r3, r3, r2 1035 0534 0B60 str r3, [r1] 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1036 .loc 1 399 9 1037 0536 00E1 b .L49 1038 .L53: 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI State */ 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 1039 .loc 1 413 27 1040 0538 07F50073 add r3, r7, #512 1041 053c A3F5FE73 sub r3, r3, #508 1042 0540 1B68 ldr r3, [r3] 1043 0542 1B69 ldr r3, [r3, #16] 1044 .loc 1 413 9 1045 0544 002B cmp r3, #0 1046 0546 00F08880 beq .L62 1047 054a 0123 movs r3, #1 1048 054c C7F86831 str r3, [r7, #360] 1049 .LBB198: 1050 .LBB199: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1051 .loc 2 988 4 1052 0550 D7F86831 ldr r3, [r7, #360] 1053 .syntax unified 1054 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1055 0554 93FAA3F3 rbit r3, r3 1056 @ 0 "" 2 1057 .thumb 1058 .syntax unified 1059 0558 C7F86431 str r3, [r7, #356] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 45 1060 .loc 2 1001 10 1061 055c D7F86431 ldr r3, [r7, #356] 1062 .LBE199: 1063 .LBE198: 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 1064 .loc 1 416 9 1065 0560 B3FA83F3 clz r3, r3 1066 0564 DBB2 uxtb r3, r3 1067 0566 03F18453 add r3, r3, #276824064 1068 056a 03F58413 add r3, r3, #1081344 1069 056e 9B00 lsls r3, r3, #2 1070 0570 1A46 mov r2, r3 1071 0572 0123 movs r3, #1 1072 0574 1360 str r3, [r2] 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1073 .loc 1 419 21 1074 0576 FFF7FEFF bl HAL_GetTick 1075 057a C7F8F801 str r0, [r7, #504] 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 1076 .loc 1 422 14 1077 057e 0AE0 b .L64 1078 .L71: 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 1079 .loc 1 424 15 1080 0580 FFF7FEFF bl HAL_GetTick 1081 0584 0246 mov r2, r0 1082 .loc 1 424 29 1083 0586 D7F8F831 ldr r3, [r7, #504] 1084 058a D31A subs r3, r2, r3 1085 .loc 1 424 13 1086 058c 022B cmp r3, #2 1087 058e 02D9 bls .L64 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1088 .loc 1 426 20 1089 0590 0323 movs r3, #3 1090 0592 00F0E2BE b .L15 1091 .L64: 1092 0596 0223 movs r3, #2 1093 0598 C7F86031 str r3, [r7, #352] 1094 .LBB200: 1095 .LBB201: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1096 .loc 2 988 4 1097 059c D7F86031 ldr r3, [r7, #352] 1098 .syntax unified 1099 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1100 05a0 93FAA3F3 rbit r3, r3 1101 @ 0 "" 2 1102 .thumb ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 46 1103 .syntax unified 1104 05a4 C7F85C31 str r3, [r7, #348] 1105 .loc 2 1001 10 1106 05a8 D7F85C31 ldr r3, [r7, #348] 1107 .LBE201: 1108 .LBE200: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1109 .loc 1 422 15 1110 05ac B3FA83F3 clz r3, r3 1111 05b0 DBB2 uxtb r3, r3 1112 05b2 5B09 lsrs r3, r3, #5 1113 05b4 DBB2 uxtb r3, r3 1114 05b6 43F00103 orr r3, r3, #1 1115 05ba DBB2 uxtb r3, r3 1116 05bc 012B cmp r3, #1 1117 05be 02D1 bne .L66 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1118 .loc 1 422 15 is_stmt 0 discriminator 1 1119 05c0 394B ldr r3, .L165 1120 05c2 1B68 ldr r3, [r3] 1121 05c4 13E0 b .L67 1122 .L66: 1123 05c6 0223 movs r3, #2 1124 05c8 C7F85831 str r3, [r7, #344] 1125 .LBB202: 1126 .LBB203: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1127 .loc 2 988 4 is_stmt 1 discriminator 2 1128 05cc D7F85831 ldr r3, [r7, #344] 1129 .syntax unified 1130 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1131 05d0 93FAA3F3 rbit r3, r3 1132 @ 0 "" 2 1133 .thumb 1134 .syntax unified 1135 05d4 C7F85431 str r3, [r7, #340] 1136 05d8 0223 movs r3, #2 1137 05da C7F85031 str r3, [r7, #336] 1138 .LBE203: 1139 .LBE202: 1140 .LBB204: 1141 .LBB205: 1142 05de D7F85031 ldr r3, [r7, #336] 1143 .syntax unified 1144 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1145 05e2 93FAA3F3 rbit r3, r3 1146 @ 0 "" 2 1147 .thumb 1148 .syntax unified 1149 05e6 C7F84C31 str r3, [r7, #332] 1150 .LBE205: 1151 .LBE204: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1152 .loc 1 422 15 discriminator 2 1153 05ea 2F4B ldr r3, .L165 1154 05ec 5B6A ldr r3, [r3, #36] 1155 .L67: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 47 1156 05ee 0222 movs r2, #2 1157 05f0 C7F84821 str r2, [r7, #328] 1158 .LBB206: 1159 .LBB207: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1160 .loc 2 988 4 discriminator 12 1161 05f4 D7F84821 ldr r2, [r7, #328] 1162 .syntax unified 1163 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1164 05f8 92FAA2F2 rbit r2, r2 1165 @ 0 "" 2 1166 .thumb 1167 .syntax unified 1168 05fc C7F84421 str r2, [r7, #324] 1169 .loc 2 1001 10 discriminator 12 1170 0600 D7F84421 ldr r2, [r7, #324] 1171 .LBE207: 1172 .LBE206: 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1173 .loc 1 422 15 discriminator 12 1174 0604 B2FA82F2 clz r2, r2 1175 0608 D2B2 uxtb r2, r2 1176 060a 42F02002 orr r2, r2, #32 1177 060e D2B2 uxtb r2, r2 1178 0610 02F01F02 and r2, r2, #31 1179 0614 0121 movs r1, #1 1180 0616 01FA02F2 lsl r2, r1, r2 1181 061a 1340 ands r3, r3, r2 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1182 .loc 1 422 14 discriminator 12 1183 061c 002B cmp r3, #0 1184 061e AFD0 beq .L71 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 1185 .loc 1 431 9 1186 0620 214B ldr r3, .L165 1187 0622 1B68 ldr r3, [r3] 1188 0624 23F0F802 bic r2, r3, #248 1189 0628 07F50073 add r3, r7, #512 1190 062c A3F5FE73 sub r3, r3, #508 1191 0630 1B68 ldr r3, [r3] 1192 0632 5B69 ldr r3, [r3, #20] 1193 0634 F821 movs r1, #248 1194 0636 C7F84011 str r1, [r7, #320] 1195 .LBB208: 1196 .LBB209: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1197 .loc 2 988 4 1198 063a D7F84011 ldr r1, [r7, #320] 1199 .syntax unified 1200 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1201 063e 91FAA1F1 rbit r1, r1 1202 @ 0 "" 2 1203 .thumb ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 48 1204 .syntax unified 1205 0642 C7F83C11 str r1, [r7, #316] 1206 .loc 2 1001 10 1207 0646 D7F83C11 ldr r1, [r7, #316] 1208 .LBE209: 1209 .LBE208: 1210 .loc 1 431 9 1211 064a B1FA81F1 clz r1, r1 1212 064e C9B2 uxtb r1, r1 1213 0650 8B40 lsls r3, r3, r1 1214 0652 1549 ldr r1, .L165 1215 0654 1343 orrs r3, r3, r2 1216 0656 0B60 str r3, [r1] 1217 0658 6FE0 b .L49 1218 .L62: 1219 065a 0123 movs r3, #1 1220 065c C7F83831 str r3, [r7, #312] 1221 .LBB210: 1222 .LBB211: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1223 .loc 2 988 4 1224 0660 D7F83831 ldr r3, [r7, #312] 1225 .syntax unified 1226 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1227 0664 93FAA3F3 rbit r3, r3 1228 @ 0 "" 2 1229 .thumb 1230 .syntax unified 1231 0668 C7F83431 str r3, [r7, #308] 1232 .loc 2 1001 10 1233 066c D7F83431 ldr r3, [r7, #308] 1234 .LBE211: 1235 .LBE210: 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 1236 .loc 1 436 9 1237 0670 B3FA83F3 clz r3, r3 1238 0674 DBB2 uxtb r3, r3 1239 0676 03F18453 add r3, r3, #276824064 1240 067a 03F58413 add r3, r3, #1081344 1241 067e 9B00 lsls r3, r3, #2 1242 0680 1A46 mov r2, r3 1243 0682 0023 movs r3, #0 1244 0684 1360 str r3, [r2] 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1245 .loc 1 439 21 1246 0686 FFF7FEFF bl HAL_GetTick 1247 068a C7F8F801 str r0, [r7, #504] 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is disabled */ 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 1248 .loc 1 442 14 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 49 1249 068e 0FE0 b .L74 1250 .L81: 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 1251 .loc 1 444 15 1252 0690 FFF7FEFF bl HAL_GetTick 1253 0694 0246 mov r2, r0 1254 .loc 1 444 29 1255 0696 D7F8F831 ldr r3, [r7, #504] 1256 069a D31A subs r3, r2, r3 1257 .loc 1 444 13 1258 069c 022B cmp r3, #2 1259 069e 07D9 bls .L74 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1260 .loc 1 446 20 1261 06a0 0323 movs r3, #3 1262 06a2 00F05ABE b .L15 1263 .L166: 1264 06a6 00BF .align 2 1265 .L165: 1266 06a8 00100240 .word 1073876992 1267 06ac 00000000 .word .LC0 1268 .L74: 1269 06b0 0223 movs r3, #2 1270 06b2 C7F83031 str r3, [r7, #304] 1271 .LBB212: 1272 .LBB213: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1273 .loc 2 988 4 1274 06b6 D7F83031 ldr r3, [r7, #304] 1275 .syntax unified 1276 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1277 06ba 93FAA3F3 rbit r3, r3 1278 @ 0 "" 2 1279 .thumb 1280 .syntax unified 1281 06be C7F82C31 str r3, [r7, #300] 1282 .loc 2 1001 10 1283 06c2 D7F82C31 ldr r3, [r7, #300] 1284 .LBE213: 1285 .LBE212: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1286 .loc 1 442 15 1287 06c6 B3FA83F3 clz r3, r3 1288 06ca DBB2 uxtb r3, r3 1289 06cc 5B09 lsrs r3, r3, #5 1290 06ce DBB2 uxtb r3, r3 1291 06d0 43F00103 orr r3, r3, #1 1292 06d4 DBB2 uxtb r3, r3 1293 06d6 012B cmp r3, #1 1294 06d8 02D1 bne .L76 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1295 .loc 1 442 15 is_stmt 0 discriminator 1 1296 06da 814B ldr r3, .L167 1297 06dc 1B68 ldr r3, [r3] 1298 06de 13E0 b .L77 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 50 1299 .L76: 1300 06e0 0223 movs r3, #2 1301 06e2 C7F82831 str r3, [r7, #296] 1302 .LBB214: 1303 .LBB215: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1304 .loc 2 988 4 is_stmt 1 discriminator 2 1305 06e6 D7F82831 ldr r3, [r7, #296] 1306 .syntax unified 1307 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1308 06ea 93FAA3F3 rbit r3, r3 1309 @ 0 "" 2 1310 .thumb 1311 .syntax unified 1312 06ee C7F82431 str r3, [r7, #292] 1313 06f2 0223 movs r3, #2 1314 06f4 C7F82031 str r3, [r7, #288] 1315 .LBE215: 1316 .LBE214: 1317 .LBB216: 1318 .LBB217: 1319 06f8 D7F82031 ldr r3, [r7, #288] 1320 .syntax unified 1321 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1322 06fc 93FAA3F3 rbit r3, r3 1323 @ 0 "" 2 1324 .thumb 1325 .syntax unified 1326 0700 C7F81C31 str r3, [r7, #284] 1327 .LBE217: 1328 .LBE216: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1329 .loc 1 442 15 discriminator 2 1330 0704 764B ldr r3, .L167 1331 0706 5B6A ldr r3, [r3, #36] 1332 .L77: 1333 0708 0222 movs r2, #2 1334 070a C7F81821 str r2, [r7, #280] 1335 .LBB218: 1336 .LBB219: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1337 .loc 2 988 4 discriminator 12 1338 070e D7F81821 ldr r2, [r7, #280] 1339 .syntax unified 1340 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1341 0712 92FAA2F2 rbit r2, r2 1342 @ 0 "" 2 1343 .thumb 1344 .syntax unified 1345 0716 C7F81421 str r2, [r7, #276] 1346 .loc 2 1001 10 discriminator 12 1347 071a D7F81421 ldr r2, [r7, #276] 1348 .LBE219: 1349 .LBE218: 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1350 .loc 1 442 15 discriminator 12 1351 071e B2FA82F2 clz r2, r2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 51 1352 0722 D2B2 uxtb r2, r2 1353 0724 42F02002 orr r2, r2, #32 1354 0728 D2B2 uxtb r2, r2 1355 072a 02F01F02 and r2, r2, #31 1356 072e 0121 movs r1, #1 1357 0730 01FA02F2 lsl r2, r1, r2 1358 0734 1340 ands r3, r3, r2 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1359 .loc 1 442 14 discriminator 12 1360 0736 002B cmp r3, #0 1361 0738 AAD1 bne .L81 1362 .L49: 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 1363 .loc 1 453 25 1364 073a 07F50073 add r3, r7, #512 1365 073e A3F5FE73 sub r3, r3, #508 1366 0742 1B68 ldr r3, [r3] 1367 0744 1B68 ldr r3, [r3] 1368 .loc 1 453 43 1369 0746 03F00803 and r3, r3, #8 1370 .loc 1 453 5 1371 074a 002B cmp r3, #0 1372 074c 00F02B81 beq .L82 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 1373 .loc 1 456 5 1374 0750 07F50073 add r3, r7, #512 1375 0754 A3F5FE73 sub r3, r3, #508 1376 0758 1B68 ldr r3, [r3] 1377 075a 9B69 ldr r3, [r3, #24] 1378 075c 002B cmp r3, #0 1379 075e 0CD0 beq .L83 1380 .loc 1 456 5 is_stmt 0 discriminator 1 1381 0760 07F50073 add r3, r7, #512 1382 0764 A3F5FE73 sub r3, r3, #508 1383 0768 1B68 ldr r3, [r3] 1384 076a 9B69 ldr r3, [r3, #24] 1385 076c 012B cmp r3, #1 1386 076e 04D0 beq .L83 1387 .loc 1 456 5 discriminator 2 1388 0770 4FF4E471 mov r1, #456 1389 0774 5B48 ldr r0, .L167+4 1390 0776 FFF7FEFF bl assert_failed 1391 .L83: 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSI State */ 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 1392 .loc 1 459 25 is_stmt 1 1393 077a 07F50073 add r3, r7, #512 1394 077e A3F5FE73 sub r3, r3, #508 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 52 1395 0782 1B68 ldr r3, [r3] 1396 0784 9B69 ldr r3, [r3, #24] 1397 .loc 1 459 7 1398 0786 002B cmp r3, #0 1399 0788 79D0 beq .L84 1400 078a 0123 movs r3, #1 1401 078c C7F81031 str r3, [r7, #272] 1402 .LBB220: 1403 .LBB221: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1404 .loc 2 988 4 1405 0790 D7F81031 ldr r3, [r7, #272] 1406 .syntax unified 1407 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1408 0794 93FAA3F3 rbit r3, r3 1409 @ 0 "" 2 1410 .thumb 1411 .syntax unified 1412 0798 C7F80C31 str r3, [r7, #268] 1413 .loc 2 1001 10 1414 079c D7F80C31 ldr r3, [r7, #268] 1415 .LBE221: 1416 .LBE220: 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 1417 .loc 1 462 7 1418 07a0 B3FA83F3 clz r3, r3 1419 07a4 DBB2 uxtb r3, r3 1420 07a6 1A46 mov r2, r3 1421 07a8 4F4B ldr r3, .L167+8 1422 07aa 1344 add r3, r3, r2 1423 07ac 9B00 lsls r3, r3, #2 1424 07ae 1A46 mov r2, r3 1425 07b0 0123 movs r3, #1 1426 07b2 1360 str r3, [r2] 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1427 .loc 1 465 19 1428 07b4 FFF7FEFF bl HAL_GetTick 1429 07b8 C7F8F801 str r0, [r7, #504] 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is ready */ 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 1430 .loc 1 468 12 1431 07bc 0AE0 b .L86 1432 .L91: 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 1433 .loc 1 470 13 1434 07be FFF7FEFF bl HAL_GetTick 1435 07c2 0246 mov r2, r0 1436 .loc 1 470 27 1437 07c4 D7F8F831 ldr r3, [r7, #504] 1438 07c8 D31A subs r3, r2, r3 1439 .loc 1 470 11 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 53 1440 07ca 022B cmp r3, #2 1441 07cc 02D9 bls .L86 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1442 .loc 1 472 18 1443 07ce 0323 movs r3, #3 1444 07d0 00F0C3BD b .L15 1445 .L86: 1446 07d4 0223 movs r3, #2 1447 07d6 C7F80831 str r3, [r7, #264] 1448 .LBB222: 1449 .LBB223: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1450 .loc 2 988 4 1451 07da D7F80831 ldr r3, [r7, #264] 1452 .syntax unified 1453 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1454 07de 93FAA3F3 rbit r3, r3 1455 @ 0 "" 2 1456 .thumb 1457 .syntax unified 1458 07e2 C7F80431 str r3, [r7, #260] 1459 07e6 07F50073 add r3, r7, #512 1460 07ea A3F58073 sub r3, r3, #256 1461 07ee 0222 movs r2, #2 1462 07f0 1A60 str r2, [r3] 1463 .LBE223: 1464 .LBE222: 1465 .LBB224: 1466 .LBB225: 1467 07f2 07F50073 add r3, r7, #512 1468 07f6 A3F58073 sub r3, r3, #256 1469 07fa 1B68 ldr r3, [r3] 1470 .syntax unified 1471 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1472 07fc 93FAA3F2 rbit r2, r3 1473 @ 0 "" 2 1474 .thumb 1475 .syntax unified 1476 0800 07F50073 add r3, r7, #512 1477 0804 A3F58273 sub r3, r3, #260 1478 0808 1A60 str r2, [r3] 1479 080a 07F50073 add r3, r7, #512 1480 080e A3F58473 sub r3, r3, #264 1481 0812 0222 movs r2, #2 1482 0814 1A60 str r2, [r3] 1483 .LBE225: 1484 .LBE224: 1485 .LBB226: 1486 .LBB227: 1487 0816 07F50073 add r3, r7, #512 1488 081a A3F58473 sub r3, r3, #264 1489 081e 1B68 ldr r3, [r3] 1490 .syntax unified 1491 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1492 0820 93FAA3F2 rbit r2, r3 1493 @ 0 "" 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 54 1494 .thumb 1495 .syntax unified 1496 0824 07F50073 add r3, r7, #512 1497 0828 A3F58673 sub r3, r3, #268 1498 082c 1A60 str r2, [r3] 1499 .LBE227: 1500 .LBE226: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1501 .loc 1 468 13 1502 082e 2C4B ldr r3, .L167 1503 0830 5A6A ldr r2, [r3, #36] 1504 0832 07F50073 add r3, r7, #512 1505 0836 A3F58873 sub r3, r3, #272 1506 083a 0221 movs r1, #2 1507 083c 1960 str r1, [r3] 1508 .LBB228: 1509 .LBB229: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1510 .loc 2 988 4 1511 083e 07F50073 add r3, r7, #512 1512 0842 A3F58873 sub r3, r3, #272 1513 0846 1B68 ldr r3, [r3] 1514 .syntax unified 1515 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1516 0848 93FAA3F1 rbit r1, r3 1517 @ 0 "" 2 1518 .thumb 1519 .syntax unified 1520 084c 07F50073 add r3, r7, #512 1521 0850 A3F58A73 sub r3, r3, #276 1522 0854 1960 str r1, [r3] 1523 .loc 2 1001 10 1524 0856 07F50073 add r3, r7, #512 1525 085a A3F58A73 sub r3, r3, #276 1526 085e 1B68 ldr r3, [r3] 1527 .LBE229: 1528 .LBE228: 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1529 .loc 1 468 13 1530 0860 B3FA83F3 clz r3, r3 1531 0864 DBB2 uxtb r3, r3 1532 0866 43F06003 orr r3, r3, #96 1533 086a DBB2 uxtb r3, r3 1534 086c 03F01F03 and r3, r3, #31 1535 0870 0121 movs r1, #1 1536 0872 01FA03F3 lsl r3, r1, r3 1537 0876 1340 ands r3, r3, r2 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1538 .loc 1 468 12 1539 0878 002B cmp r3, #0 1540 087a A0D0 beq .L91 1541 087c 93E0 b .L82 1542 .L84: 1543 087e 07F50073 add r3, r7, #512 1544 0882 A3F58C73 sub r3, r3, #280 1545 0886 0122 movs r2, #1 1546 0888 1A60 str r2, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 55 1547 .LBB230: 1548 .LBB231: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1549 .loc 2 988 4 1550 088a 07F50073 add r3, r7, #512 1551 088e A3F58C73 sub r3, r3, #280 1552 0892 1B68 ldr r3, [r3] 1553 .syntax unified 1554 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1555 0894 93FAA3F2 rbit r2, r3 1556 @ 0 "" 2 1557 .thumb 1558 .syntax unified 1559 0898 07F50073 add r3, r7, #512 1560 089c A3F58E73 sub r3, r3, #284 1561 08a0 1A60 str r2, [r3] 1562 .loc 2 1001 10 1563 08a2 07F50073 add r3, r7, #512 1564 08a6 A3F58E73 sub r3, r3, #284 1565 08aa 1B68 ldr r3, [r3] 1566 .LBE231: 1567 .LBE230: 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 1568 .loc 1 479 7 1569 08ac B3FA83F3 clz r3, r3 1570 08b0 DBB2 uxtb r3, r3 1571 08b2 1A46 mov r2, r3 1572 08b4 0C4B ldr r3, .L167+8 1573 08b6 1344 add r3, r3, r2 1574 08b8 9B00 lsls r3, r3, #2 1575 08ba 1A46 mov r2, r3 1576 08bc 0023 movs r3, #0 1577 08be 1360 str r3, [r2] 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1578 .loc 1 482 19 1579 08c0 FFF7FEFF bl HAL_GetTick 1580 08c4 C7F8F801 str r0, [r7, #504] 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is disabled */ 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 1581 .loc 1 485 12 1582 08c8 10E0 b .L93 1583 .L98: 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 1584 .loc 1 487 13 1585 08ca FFF7FEFF bl HAL_GetTick 1586 08ce 0246 mov r2, r0 1587 .loc 1 487 27 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 56 1588 08d0 D7F8F831 ldr r3, [r7, #504] 1589 08d4 D31A subs r3, r2, r3 1590 .loc 1 487 11 1591 08d6 022B cmp r3, #2 1592 08d8 08D9 bls .L93 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1593 .loc 1 489 18 1594 08da 0323 movs r3, #3 1595 08dc 00F03DBD b .L15 1596 .L168: 1597 .align 2 1598 .L167: 1599 08e0 00100240 .word 1073876992 1600 08e4 00000000 .word .LC0 1601 08e8 20819010 .word 277905696 1602 .L93: 1603 08ec 07F50073 add r3, r7, #512 1604 08f0 A3F59073 sub r3, r3, #288 1605 08f4 0222 movs r2, #2 1606 08f6 1A60 str r2, [r3] 1607 .LBB232: 1608 .LBB233: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1609 .loc 2 988 4 1610 08f8 07F50073 add r3, r7, #512 1611 08fc A3F59073 sub r3, r3, #288 1612 0900 1B68 ldr r3, [r3] 1613 .syntax unified 1614 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1615 0902 93FAA3F2 rbit r2, r3 1616 @ 0 "" 2 1617 .thumb 1618 .syntax unified 1619 0906 07F50073 add r3, r7, #512 1620 090a A3F59273 sub r3, r3, #292 1621 090e 1A60 str r2, [r3] 1622 0910 07F50073 add r3, r7, #512 1623 0914 A3F59473 sub r3, r3, #296 1624 0918 0222 movs r2, #2 1625 091a 1A60 str r2, [r3] 1626 .LBE233: 1627 .LBE232: 1628 .LBB234: 1629 .LBB235: 1630 091c 07F50073 add r3, r7, #512 1631 0920 A3F59473 sub r3, r3, #296 1632 0924 1B68 ldr r3, [r3] 1633 .syntax unified 1634 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1635 0926 93FAA3F2 rbit r2, r3 1636 @ 0 "" 2 1637 .thumb 1638 .syntax unified 1639 092a 07F50073 add r3, r7, #512 1640 092e A3F59673 sub r3, r3, #300 1641 0932 1A60 str r2, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 57 1642 0934 07F50073 add r3, r7, #512 1643 0938 A3F59873 sub r3, r3, #304 1644 093c 0222 movs r2, #2 1645 093e 1A60 str r2, [r3] 1646 .LBE235: 1647 .LBE234: 1648 .LBB236: 1649 .LBB237: 1650 0940 07F50073 add r3, r7, #512 1651 0944 A3F59873 sub r3, r3, #304 1652 0948 1B68 ldr r3, [r3] 1653 .syntax unified 1654 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1655 094a 93FAA3F2 rbit r2, r3 1656 @ 0 "" 2 1657 .thumb 1658 .syntax unified 1659 094e 07F50073 add r3, r7, #512 1660 0952 A3F59A73 sub r3, r3, #308 1661 0956 1A60 str r2, [r3] 1662 .LBE237: 1663 .LBE236: 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1664 .loc 1 485 13 1665 0958 B84B ldr r3, .L169 1666 095a 5A6A ldr r2, [r3, #36] 1667 095c 07F50073 add r3, r7, #512 1668 0960 A3F59C73 sub r3, r3, #312 1669 0964 0221 movs r1, #2 1670 0966 1960 str r1, [r3] 1671 .LBB238: 1672 .LBB239: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1673 .loc 2 988 4 1674 0968 07F50073 add r3, r7, #512 1675 096c A3F59C73 sub r3, r3, #312 1676 0970 1B68 ldr r3, [r3] 1677 .syntax unified 1678 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1679 0972 93FAA3F1 rbit r1, r3 1680 @ 0 "" 2 1681 .thumb 1682 .syntax unified 1683 0976 07F50073 add r3, r7, #512 1684 097a A3F59E73 sub r3, r3, #316 1685 097e 1960 str r1, [r3] 1686 .loc 2 1001 10 1687 0980 07F50073 add r3, r7, #512 1688 0984 A3F59E73 sub r3, r3, #316 1689 0988 1B68 ldr r3, [r3] 1690 .LBE239: 1691 .LBE238: 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1692 .loc 1 485 13 1693 098a B3FA83F3 clz r3, r3 1694 098e DBB2 uxtb r3, r3 1695 0990 43F06003 orr r3, r3, #96 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 58 1696 0994 DBB2 uxtb r3, r3 1697 0996 03F01F03 and r3, r3, #31 1698 099a 0121 movs r1, #1 1699 099c 01FA03F3 lsl r3, r1, r3 1700 09a0 1340 ands r3, r3, r2 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1701 .loc 1 485 12 1702 09a2 002B cmp r3, #0 1703 09a4 91D1 bne .L98 1704 .L82: 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 1705 .loc 1 495 25 1706 09a6 07F50073 add r3, r7, #512 1707 09aa A3F5FE73 sub r3, r3, #508 1708 09ae 1B68 ldr r3, [r3] 1709 09b0 1B68 ldr r3, [r3] 1710 .loc 1 495 43 1711 09b2 03F00403 and r3, r3, #4 1712 .loc 1 495 5 1713 09b6 002B cmp r3, #0 1714 09b8 00F0C081 beq .L99 1715 .LBB240: 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 1716 .loc 1 497 22 1717 09bc 0023 movs r3, #0 1718 09be 87F8FF31 strb r3, [r7, #511] 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 1719 .loc 1 500 5 1720 09c2 07F50073 add r3, r7, #512 1721 09c6 A3F5FE73 sub r3, r3, #508 1722 09ca 1B68 ldr r3, [r3] 1723 09cc DB68 ldr r3, [r3, #12] 1724 09ce 002B cmp r3, #0 1725 09d0 14D0 beq .L100 1726 .loc 1 500 5 is_stmt 0 discriminator 1 1727 09d2 07F50073 add r3, r7, #512 1728 09d6 A3F5FE73 sub r3, r3, #508 1729 09da 1B68 ldr r3, [r3] 1730 09dc DB68 ldr r3, [r3, #12] 1731 09de 012B cmp r3, #1 1732 09e0 0CD0 beq .L100 1733 .loc 1 500 5 discriminator 2 1734 09e2 07F50073 add r3, r7, #512 1735 09e6 A3F5FE73 sub r3, r3, #508 1736 09ea 1B68 ldr r3, [r3] 1737 09ec DB68 ldr r3, [r3, #12] 1738 09ee 052B cmp r3, #5 1739 09f0 04D0 beq .L100 1740 .loc 1 500 5 discriminator 3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 59 1741 09f2 4FF4FA71 mov r1, #500 1742 09f6 9248 ldr r0, .L169+4 1743 09f8 FFF7FEFF bl assert_failed 1744 .L100: 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 1745 .loc 1 504 8 is_stmt 1 1746 09fc 8F4B ldr r3, .L169 1747 09fe DB69 ldr r3, [r3, #28] 1748 0a00 03F08053 and r3, r3, #268435456 1749 .loc 1 504 7 1750 0a04 002B cmp r3, #0 1751 0a06 16D1 bne .L101 1752 .LBB241: 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 1753 .loc 1 506 7 1754 0a08 8C4B ldr r3, .L169 1755 0a0a DB69 ldr r3, [r3, #28] 1756 0a0c 8B4A ldr r2, .L169 1757 0a0e 43F08053 orr r3, r3, #268435456 1758 0a12 D361 str r3, [r2, #28] 1759 0a14 894B ldr r3, .L169 1760 0a16 DB69 ldr r3, [r3, #28] 1761 0a18 03F08052 and r2, r3, #268435456 1762 0a1c 07F50073 add r3, r7, #512 1763 0a20 A3F5FC73 sub r3, r3, #504 1764 0a24 1A60 str r2, [r3] 1765 0a26 07F50073 add r3, r7, #512 1766 0a2a A3F5FC73 sub r3, r3, #504 1767 0a2e 1B68 ldr r3, [r3] 1768 .LBE241: 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pwrclkchanged = SET; 1769 .loc 1 507 21 1770 0a30 0123 movs r3, #1 1771 0a32 87F8FF31 strb r3, [r7, #511] 1772 .L101: 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 1773 .loc 1 510 8 1774 0a36 834B ldr r3, .L169+8 1775 0a38 1B68 ldr r3, [r3] 1776 0a3a 03F48073 and r3, r3, #256 1777 .loc 1 510 7 1778 0a3e 002B cmp r3, #0 1779 0a40 1BD1 bne .L102 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable write access to Backup domain */ 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 1780 .loc 1 513 7 1781 0a42 804B ldr r3, .L169+8 1782 0a44 1B68 ldr r3, [r3] 1783 0a46 7F4A ldr r2, .L169+8 1784 0a48 43F48073 orr r3, r3, #256 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 60 1785 0a4c 1360 str r3, [r2] 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1786 .loc 1 516 19 1787 0a4e FFF7FEFF bl HAL_GetTick 1788 0a52 C7F8F801 str r0, [r7, #504] 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 1789 .loc 1 518 12 1790 0a56 0AE0 b .L103 1791 .L104: 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 1792 .loc 1 520 13 1793 0a58 FFF7FEFF bl HAL_GetTick 1794 0a5c 0246 mov r2, r0 1795 .loc 1 520 27 1796 0a5e D7F8F831 ldr r3, [r7, #504] 1797 0a62 D31A subs r3, r2, r3 1798 .loc 1 520 11 1799 0a64 642B cmp r3, #100 1800 0a66 02D9 bls .L103 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1801 .loc 1 522 18 1802 0a68 0323 movs r3, #3 1803 0a6a 00F076BC b .L15 1804 .L103: 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1805 .loc 1 518 13 1806 0a6e 754B ldr r3, .L169+8 1807 0a70 1B68 ldr r3, [r3] 1808 0a72 03F48073 and r3, r3, #256 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1809 .loc 1 518 12 1810 0a76 002B cmp r3, #0 1811 0a78 EED0 beq .L104 1812 .L102: 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 1813 .loc 1 528 5 1814 0a7a 07F50073 add r3, r7, #512 1815 0a7e A3F5FE73 sub r3, r3, #508 1816 0a82 1B68 ldr r3, [r3] 1817 0a84 DB68 ldr r3, [r3, #12] 1818 0a86 012B cmp r3, #1 1819 0a88 06D1 bne .L105 1820 .loc 1 528 5 is_stmt 0 discriminator 1 1821 0a8a 6C4B ldr r3, .L169 1822 0a8c 1B6A ldr r3, [r3, #32] 1823 0a8e 6B4A ldr r2, .L169 1824 0a90 43F00103 orr r3, r3, #1 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 61 1825 0a94 1362 str r3, [r2, #32] 1826 0a96 35E0 b .L106 1827 .L105: 1828 .loc 1 528 5 discriminator 2 1829 0a98 07F50073 add r3, r7, #512 1830 0a9c A3F5FE73 sub r3, r3, #508 1831 0aa0 1B68 ldr r3, [r3] 1832 0aa2 DB68 ldr r3, [r3, #12] 1833 0aa4 002B cmp r3, #0 1834 0aa6 0CD1 bne .L107 1835 .loc 1 528 5 discriminator 3 1836 0aa8 644B ldr r3, .L169 1837 0aaa 1B6A ldr r3, [r3, #32] 1838 0aac 634A ldr r2, .L169 1839 0aae 23F00103 bic r3, r3, #1 1840 0ab2 1362 str r3, [r2, #32] 1841 0ab4 614B ldr r3, .L169 1842 0ab6 1B6A ldr r3, [r3, #32] 1843 0ab8 604A ldr r2, .L169 1844 0aba 23F00403 bic r3, r3, #4 1845 0abe 1362 str r3, [r2, #32] 1846 0ac0 20E0 b .L106 1847 .L107: 1848 .loc 1 528 5 discriminator 4 1849 0ac2 07F50073 add r3, r7, #512 1850 0ac6 A3F5FE73 sub r3, r3, #508 1851 0aca 1B68 ldr r3, [r3] 1852 0acc DB68 ldr r3, [r3, #12] 1853 0ace 052B cmp r3, #5 1854 0ad0 0CD1 bne .L108 1855 .loc 1 528 5 discriminator 5 1856 0ad2 5A4B ldr r3, .L169 1857 0ad4 1B6A ldr r3, [r3, #32] 1858 0ad6 594A ldr r2, .L169 1859 0ad8 43F00403 orr r3, r3, #4 1860 0adc 1362 str r3, [r2, #32] 1861 0ade 574B ldr r3, .L169 1862 0ae0 1B6A ldr r3, [r3, #32] 1863 0ae2 564A ldr r2, .L169 1864 0ae4 43F00103 orr r3, r3, #1 1865 0ae8 1362 str r3, [r2, #32] 1866 0aea 0BE0 b .L106 1867 .L108: 1868 .loc 1 528 5 discriminator 6 1869 0aec 534B ldr r3, .L169 1870 0aee 1B6A ldr r3, [r3, #32] 1871 0af0 524A ldr r2, .L169 1872 0af2 23F00103 bic r3, r3, #1 1873 0af6 1362 str r3, [r2, #32] 1874 0af8 504B ldr r3, .L169 1875 0afa 1B6A ldr r3, [r3, #32] 1876 0afc 4F4A ldr r2, .L169 1877 0afe 23F00403 bic r3, r3, #4 1878 0b02 1362 str r3, [r2, #32] 1879 .L106: 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 62 1880 .loc 1 530 25 is_stmt 1 1881 0b04 07F50073 add r3, r7, #512 1882 0b08 A3F5FE73 sub r3, r3, #508 1883 0b0c 1B68 ldr r3, [r3] 1884 0b0e DB68 ldr r3, [r3, #12] 1885 .loc 1 530 7 1886 0b10 002B cmp r3, #0 1887 0b12 00F08280 beq .L109 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 1888 .loc 1 533 19 1889 0b16 FFF7FEFF bl HAL_GetTick 1890 0b1a C7F8F801 str r0, [r7, #504] 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is ready */ 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 1891 .loc 1 536 12 1892 0b1e 0CE0 b .L110 1893 .L117: 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 1894 .loc 1 538 13 1895 0b20 FFF7FEFF bl HAL_GetTick 1896 0b24 0246 mov r2, r0 1897 .loc 1 538 27 1898 0b26 D7F8F831 ldr r3, [r7, #504] 1899 0b2a D31A subs r3, r2, r3 1900 .loc 1 538 11 1901 0b2c 41F28832 movw r2, #5000 1902 0b30 9342 cmp r3, r2 1903 0b32 02D9 bls .L110 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 1904 .loc 1 540 18 1905 0b34 0323 movs r3, #3 1906 0b36 00F010BC b .L15 1907 .L110: 1908 0b3a 07F50073 add r3, r7, #512 1909 0b3e A3F5A073 sub r3, r3, #320 1910 0b42 0222 movs r2, #2 1911 0b44 1A60 str r2, [r3] 1912 .LBB242: 1913 .LBB243: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1914 .loc 2 988 4 1915 0b46 07F50073 add r3, r7, #512 1916 0b4a A3F5A073 sub r3, r3, #320 1917 0b4e 1B68 ldr r3, [r3] 1918 .syntax unified 1919 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1920 0b50 93FAA3F2 rbit r2, r3 1921 @ 0 "" 2 1922 .thumb 1923 .syntax unified 1924 0b54 07F50073 add r3, r7, #512 1925 0b58 A3F5A273 sub r3, r3, #324 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 63 1926 0b5c 1A60 str r2, [r3] 1927 0b5e 07F50073 add r3, r7, #512 1928 0b62 A3F5A473 sub r3, r3, #328 1929 0b66 0222 movs r2, #2 1930 0b68 1A60 str r2, [r3] 1931 .LBE243: 1932 .LBE242: 1933 .LBB244: 1934 .LBB245: 1935 0b6a 07F50073 add r3, r7, #512 1936 0b6e A3F5A473 sub r3, r3, #328 1937 0b72 1B68 ldr r3, [r3] 1938 .syntax unified 1939 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1940 0b74 93FAA3F2 rbit r2, r3 1941 @ 0 "" 2 1942 .thumb 1943 .syntax unified 1944 0b78 07F50073 add r3, r7, #512 1945 0b7c A3F5A673 sub r3, r3, #332 1946 0b80 1A60 str r2, [r3] 1947 .loc 2 1001 10 1948 0b82 07F50073 add r3, r7, #512 1949 0b86 A3F5A673 sub r3, r3, #332 1950 0b8a 1B68 ldr r3, [r3] 1951 .LBE245: 1952 .LBE244: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1953 .loc 1 536 13 1954 0b8c B3FA83F3 clz r3, r3 1955 0b90 DBB2 uxtb r3, r3 1956 0b92 5B09 lsrs r3, r3, #5 1957 0b94 DBB2 uxtb r3, r3 1958 0b96 43F00203 orr r3, r3, #2 1959 0b9a DBB2 uxtb r3, r3 1960 0b9c 022B cmp r3, #2 1961 0b9e 02D1 bne .L113 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1962 .loc 1 536 13 is_stmt 0 discriminator 4 1963 0ba0 264B ldr r3, .L169 1964 0ba2 1B6A ldr r3, [r3, #32] 1965 0ba4 13E0 b .L114 1966 .L113: 1967 0ba6 07F50073 add r3, r7, #512 1968 0baa A3F5A873 sub r3, r3, #336 1969 0bae 0222 movs r2, #2 1970 0bb0 1A60 str r2, [r3] 1971 .LBB246: 1972 .LBB247: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1973 .loc 2 988 4 is_stmt 1 discriminator 5 1974 0bb2 07F50073 add r3, r7, #512 1975 0bb6 A3F5A873 sub r3, r3, #336 1976 0bba 1B68 ldr r3, [r3] 1977 .syntax unified 1978 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1979 0bbc 93FAA3F2 rbit r2, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 64 1980 @ 0 "" 2 1981 .thumb 1982 .syntax unified 1983 0bc0 07F50073 add r3, r7, #512 1984 0bc4 A3F5AA73 sub r3, r3, #340 1985 0bc8 1A60 str r2, [r3] 1986 .LBE247: 1987 .LBE246: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1988 .loc 1 536 13 discriminator 5 1989 0bca 1C4B ldr r3, .L169 1990 0bcc 5B6A ldr r3, [r3, #36] 1991 .L114: 1992 0bce 07F50072 add r2, r7, #512 1993 0bd2 A2F5AC72 sub r2, r2, #344 1994 0bd6 0221 movs r1, #2 1995 0bd8 1160 str r1, [r2] 1996 .LBB248: 1997 .LBB249: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1998 .loc 2 988 4 discriminator 11 1999 0bda 07F50072 add r2, r7, #512 2000 0bde A2F5AC72 sub r2, r2, #344 2001 0be2 1268 ldr r2, [r2] 2002 .syntax unified 2003 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2004 0be4 92FAA2F1 rbit r1, r2 2005 @ 0 "" 2 2006 .thumb 2007 .syntax unified 2008 0be8 07F50072 add r2, r7, #512 2009 0bec A2F5AE72 sub r2, r2, #348 2010 0bf0 1160 str r1, [r2] 2011 .loc 2 1001 10 discriminator 11 2012 0bf2 07F50072 add r2, r7, #512 2013 0bf6 A2F5AE72 sub r2, r2, #348 2014 0bfa 1268 ldr r2, [r2] 2015 .LBE249: 2016 .LBE248: 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2017 .loc 1 536 13 discriminator 11 2018 0bfc B2FA82F2 clz r2, r2 2019 0c00 D2B2 uxtb r2, r2 2020 0c02 42F04002 orr r2, r2, #64 2021 0c06 D2B2 uxtb r2, r2 2022 0c08 02F01F02 and r2, r2, #31 2023 0c0c 0121 movs r1, #1 2024 0c0e 01FA02F2 lsl r2, r1, r2 2025 0c12 1340 ands r3, r3, r2 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2026 .loc 1 536 12 discriminator 11 2027 0c14 002B cmp r3, #0 2028 0c16 83D0 beq .L117 2029 0c18 86E0 b .L118 2030 .L109: 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 65 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 2031 .loc 1 547 19 2032 0c1a FFF7FEFF bl HAL_GetTick 2033 0c1e C7F8F801 str r0, [r7, #504] 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is disabled */ 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 2034 .loc 1 550 12 2035 0c22 11E0 b .L119 2036 .L126: 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 2037 .loc 1 552 13 2038 0c24 FFF7FEFF bl HAL_GetTick 2039 0c28 0246 mov r2, r0 2040 .loc 1 552 27 2041 0c2a D7F8F831 ldr r3, [r7, #504] 2042 0c2e D31A subs r3, r2, r3 2043 .loc 1 552 11 2044 0c30 41F28832 movw r2, #5000 2045 0c34 9342 cmp r3, r2 2046 0c36 07D9 bls .L119 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 2047 .loc 1 554 18 2048 0c38 0323 movs r3, #3 2049 0c3a 8EE3 b .L15 2050 .L170: 2051 .align 2 2052 .L169: 2053 0c3c 00100240 .word 1073876992 2054 0c40 00000000 .word .LC0 2055 0c44 00700040 .word 1073770496 2056 .L119: 2057 0c48 07F50073 add r3, r7, #512 2058 0c4c A3F5B073 sub r3, r3, #352 2059 0c50 0222 movs r2, #2 2060 0c52 1A60 str r2, [r3] 2061 .LBB250: 2062 .LBB251: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2063 .loc 2 988 4 2064 0c54 07F50073 add r3, r7, #512 2065 0c58 A3F5B073 sub r3, r3, #352 2066 0c5c 1B68 ldr r3, [r3] 2067 .syntax unified 2068 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2069 0c5e 93FAA3F2 rbit r2, r3 2070 @ 0 "" 2 2071 .thumb 2072 .syntax unified 2073 0c62 07F50073 add r3, r7, #512 2074 0c66 A3F5B273 sub r3, r3, #356 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 66 2075 0c6a 1A60 str r2, [r3] 2076 0c6c 07F50073 add r3, r7, #512 2077 0c70 A3F5B473 sub r3, r3, #360 2078 0c74 0222 movs r2, #2 2079 0c76 1A60 str r2, [r3] 2080 .LBE251: 2081 .LBE250: 2082 .LBB252: 2083 .LBB253: 2084 0c78 07F50073 add r3, r7, #512 2085 0c7c A3F5B473 sub r3, r3, #360 2086 0c80 1B68 ldr r3, [r3] 2087 .syntax unified 2088 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2089 0c82 93FAA3F2 rbit r2, r3 2090 @ 0 "" 2 2091 .thumb 2092 .syntax unified 2093 0c86 07F50073 add r3, r7, #512 2094 0c8a A3F5B673 sub r3, r3, #364 2095 0c8e 1A60 str r2, [r3] 2096 .loc 2 1001 10 2097 0c90 07F50073 add r3, r7, #512 2098 0c94 A3F5B673 sub r3, r3, #364 2099 0c98 1B68 ldr r3, [r3] 2100 .LBE253: 2101 .LBE252: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2102 .loc 1 550 13 2103 0c9a B3FA83F3 clz r3, r3 2104 0c9e DBB2 uxtb r3, r3 2105 0ca0 5B09 lsrs r3, r3, #5 2106 0ca2 DBB2 uxtb r3, r3 2107 0ca4 43F00203 orr r3, r3, #2 2108 0ca8 DBB2 uxtb r3, r3 2109 0caa 022B cmp r3, #2 2110 0cac 02D1 bne .L122 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2111 .loc 1 550 13 is_stmt 0 discriminator 4 2112 0cae BB4B ldr r3, .L171 2113 0cb0 1B6A ldr r3, [r3, #32] 2114 0cb2 13E0 b .L123 2115 .L122: 2116 0cb4 07F50073 add r3, r7, #512 2117 0cb8 A3F5B873 sub r3, r3, #368 2118 0cbc 0222 movs r2, #2 2119 0cbe 1A60 str r2, [r3] 2120 .LBB254: 2121 .LBB255: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2122 .loc 2 988 4 is_stmt 1 discriminator 5 2123 0cc0 07F50073 add r3, r7, #512 2124 0cc4 A3F5B873 sub r3, r3, #368 2125 0cc8 1B68 ldr r3, [r3] 2126 .syntax unified 2127 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2128 0cca 93FAA3F2 rbit r2, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 67 2129 @ 0 "" 2 2130 .thumb 2131 .syntax unified 2132 0cce 07F50073 add r3, r7, #512 2133 0cd2 A3F5BA73 sub r3, r3, #372 2134 0cd6 1A60 str r2, [r3] 2135 .LBE255: 2136 .LBE254: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2137 .loc 1 550 13 discriminator 5 2138 0cd8 B04B ldr r3, .L171 2139 0cda 5B6A ldr r3, [r3, #36] 2140 .L123: 2141 0cdc 07F50072 add r2, r7, #512 2142 0ce0 A2F5BC72 sub r2, r2, #376 2143 0ce4 0221 movs r1, #2 2144 0ce6 1160 str r1, [r2] 2145 .LBB256: 2146 .LBB257: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2147 .loc 2 988 4 discriminator 11 2148 0ce8 07F50072 add r2, r7, #512 2149 0cec A2F5BC72 sub r2, r2, #376 2150 0cf0 1268 ldr r2, [r2] 2151 .syntax unified 2152 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2153 0cf2 92FAA2F1 rbit r1, r2 2154 @ 0 "" 2 2155 .thumb 2156 .syntax unified 2157 0cf6 07F50072 add r2, r7, #512 2158 0cfa A2F5BE72 sub r2, r2, #380 2159 0cfe 1160 str r1, [r2] 2160 .loc 2 1001 10 discriminator 11 2161 0d00 07F50072 add r2, r7, #512 2162 0d04 A2F5BE72 sub r2, r2, #380 2163 0d08 1268 ldr r2, [r2] 2164 .LBE257: 2165 .LBE256: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2166 .loc 1 550 13 discriminator 11 2167 0d0a B2FA82F2 clz r2, r2 2168 0d0e D2B2 uxtb r2, r2 2169 0d10 42F04002 orr r2, r2, #64 2170 0d14 D2B2 uxtb r2, r2 2171 0d16 02F01F02 and r2, r2, #31 2172 0d1a 0121 movs r1, #1 2173 0d1c 01FA02F2 lsl r2, r1, r2 2174 0d20 1340 ands r3, r3, r2 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2175 .loc 1 550 12 discriminator 11 2176 0d22 002B cmp r3, #0 2177 0d24 7FF47EAF bne .L126 2178 .L118: 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 68 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Require to disable power clock if necessary */ 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(pwrclkchanged == SET) 2179 .loc 1 560 7 2180 0d28 97F8FF31 ldrb r3, [r7, #511] @ zero_extendqisi2 2181 0d2c 012B cmp r3, #1 2182 0d2e 05D1 bne .L99 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 2183 .loc 1 562 7 2184 0d30 9A4B ldr r3, .L171 2185 0d32 DB69 ldr r3, [r3, #28] 2186 0d34 994A ldr r2, .L171 2187 0d36 23F08053 bic r3, r3, #268435456 2188 0d3a D361 str r3, [r2, #28] 2189 .L99: 2190 .LBE240: 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 2191 .loc 1 568 3 2192 0d3c 07F50073 add r3, r7, #512 2193 0d40 A3F5FE73 sub r3, r3, #508 2194 0d44 1B68 ldr r3, [r3] 2195 0d46 DB69 ldr r3, [r3, #28] 2196 0d48 002B cmp r3, #0 2197 0d4a 14D0 beq .L127 2198 .loc 1 568 3 is_stmt 0 discriminator 1 2199 0d4c 07F50073 add r3, r7, #512 2200 0d50 A3F5FE73 sub r3, r3, #508 2201 0d54 1B68 ldr r3, [r3] 2202 0d56 DB69 ldr r3, [r3, #28] 2203 0d58 012B cmp r3, #1 2204 0d5a 0CD0 beq .L127 2205 .loc 1 568 3 discriminator 2 2206 0d5c 07F50073 add r3, r7, #512 2207 0d60 A3F5FE73 sub r3, r3, #508 2208 0d64 1B68 ldr r3, [r3] 2209 0d66 DB69 ldr r3, [r3, #28] 2210 0d68 022B cmp r3, #2 2211 0d6a 04D0 beq .L127 2212 .loc 1 568 3 discriminator 3 2213 0d6c 4FF40E71 mov r1, #568 2214 0d70 8B48 ldr r0, .L171+4 2215 0d72 FFF7FEFF bl assert_failed 2216 .L127: 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 2217 .loc 1 569 30 is_stmt 1 2218 0d76 07F50073 add r3, r7, #512 2219 0d7a A3F5FE73 sub r3, r3, #508 2220 0d7e 1B68 ldr r3, [r3] 2221 0d80 DB69 ldr r3, [r3, #28] 2222 .loc 1 569 6 2223 0d82 002B cmp r3, #0 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 69 2224 0d84 00F0E882 beq .L128 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 2225 .loc 1 572 8 2226 0d88 844B ldr r3, .L171 2227 0d8a 5B68 ldr r3, [r3, #4] 2228 0d8c 03F00C03 and r3, r3, #12 2229 .loc 1 572 7 2230 0d90 082B cmp r3, #8 2231 0d92 00F0B682 beq .L129 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 2232 .loc 1 574 33 2233 0d96 07F50073 add r3, r7, #512 2234 0d9a A3F5FE73 sub r3, r3, #508 2235 0d9e 1B68 ldr r3, [r3] 2236 0da0 DB69 ldr r3, [r3, #28] 2237 .loc 1 574 9 2238 0da2 022B cmp r3, #2 2239 0da4 40F00782 bne .L130 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); 2240 .loc 1 577 9 2241 0da8 07F50073 add r3, r7, #512 2242 0dac A3F5FE73 sub r3, r3, #508 2243 0db0 1B68 ldr r3, [r3] 2244 0db2 1B6A ldr r3, [r3, #32] 2245 0db4 002B cmp r3, #0 2246 0db6 0DD0 beq .L131 2247 .loc 1 577 9 is_stmt 0 discriminator 1 2248 0db8 07F50073 add r3, r7, #512 2249 0dbc A3F5FE73 sub r3, r3, #508 2250 0dc0 1B68 ldr r3, [r3] 2251 0dc2 1B6A ldr r3, [r3, #32] 2252 0dc4 B3F5803F cmp r3, #65536 2253 0dc8 04D0 beq .L131 2254 .loc 1 577 9 discriminator 2 2255 0dca 40F24121 movw r1, #577 2256 0dce 7448 ldr r0, .L171+4 2257 0dd0 FFF7FEFF bl assert_failed 2258 .L131: 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); 2259 .loc 1 578 9 is_stmt 1 2260 0dd4 07F50073 add r3, r7, #512 2261 0dd8 A3F5FE73 sub r3, r3, #508 2262 0ddc 1B68 ldr r3, [r3] 2263 0dde 5B6A ldr r3, [r3, #36] 2264 0de0 002B cmp r3, #0 2265 0de2 00F08380 beq .L132 2266 .loc 1 578 9 is_stmt 0 discriminator 1 2267 0de6 07F50073 add r3, r7, #512 2268 0dea A3F5FE73 sub r3, r3, #508 2269 0dee 1B68 ldr r3, [r3] 2270 0df0 5B6A ldr r3, [r3, #36] 2271 0df2 B3F5802F cmp r3, #262144 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 70 2272 0df6 79D0 beq .L132 2273 .loc 1 578 9 discriminator 2 2274 0df8 07F50073 add r3, r7, #512 2275 0dfc A3F5FE73 sub r3, r3, #508 2276 0e00 1B68 ldr r3, [r3] 2277 0e02 5B6A ldr r3, [r3, #36] 2278 0e04 B3F5002F cmp r3, #524288 2279 0e08 70D0 beq .L132 2280 .loc 1 578 9 discriminator 3 2281 0e0a 07F50073 add r3, r7, #512 2282 0e0e A3F5FE73 sub r3, r3, #508 2283 0e12 1B68 ldr r3, [r3] 2284 0e14 5B6A ldr r3, [r3, #36] 2285 0e16 B3F5402F cmp r3, #786432 2286 0e1a 67D0 beq .L132 2287 .loc 1 578 9 discriminator 4 2288 0e1c 07F50073 add r3, r7, #512 2289 0e20 A3F5FE73 sub r3, r3, #508 2290 0e24 1B68 ldr r3, [r3] 2291 0e26 5B6A ldr r3, [r3, #36] 2292 0e28 B3F5801F cmp r3, #1048576 2293 0e2c 5ED0 beq .L132 2294 .loc 1 578 9 discriminator 5 2295 0e2e 07F50073 add r3, r7, #512 2296 0e32 A3F5FE73 sub r3, r3, #508 2297 0e36 1B68 ldr r3, [r3] 2298 0e38 5B6A ldr r3, [r3, #36] 2299 0e3a B3F5A01F cmp r3, #1310720 2300 0e3e 55D0 beq .L132 2301 .loc 1 578 9 discriminator 6 2302 0e40 07F50073 add r3, r7, #512 2303 0e44 A3F5FE73 sub r3, r3, #508 2304 0e48 1B68 ldr r3, [r3] 2305 0e4a 5B6A ldr r3, [r3, #36] 2306 0e4c B3F5C01F cmp r3, #1572864 2307 0e50 4CD0 beq .L132 2308 .loc 1 578 9 discriminator 7 2309 0e52 07F50073 add r3, r7, #512 2310 0e56 A3F5FE73 sub r3, r3, #508 2311 0e5a 1B68 ldr r3, [r3] 2312 0e5c 5B6A ldr r3, [r3, #36] 2313 0e5e B3F5E01F cmp r3, #1835008 2314 0e62 43D0 beq .L132 2315 .loc 1 578 9 discriminator 8 2316 0e64 07F50073 add r3, r7, #512 2317 0e68 A3F5FE73 sub r3, r3, #508 2318 0e6c 1B68 ldr r3, [r3] 2319 0e6e 5B6A ldr r3, [r3, #36] 2320 0e70 B3F5001F cmp r3, #2097152 2321 0e74 3AD0 beq .L132 2322 .loc 1 578 9 discriminator 9 2323 0e76 07F50073 add r3, r7, #512 2324 0e7a A3F5FE73 sub r3, r3, #508 2325 0e7e 1B68 ldr r3, [r3] 2326 0e80 5B6A ldr r3, [r3, #36] 2327 0e82 B3F5101F cmp r3, #2359296 2328 0e86 31D0 beq .L132 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 71 2329 .loc 1 578 9 discriminator 10 2330 0e88 07F50073 add r3, r7, #512 2331 0e8c A3F5FE73 sub r3, r3, #508 2332 0e90 1B68 ldr r3, [r3] 2333 0e92 5B6A ldr r3, [r3, #36] 2334 0e94 B3F5201F cmp r3, #2621440 2335 0e98 28D0 beq .L132 2336 .loc 1 578 9 discriminator 11 2337 0e9a 07F50073 add r3, r7, #512 2338 0e9e A3F5FE73 sub r3, r3, #508 2339 0ea2 1B68 ldr r3, [r3] 2340 0ea4 5B6A ldr r3, [r3, #36] 2341 0ea6 B3F5301F cmp r3, #2883584 2342 0eaa 1FD0 beq .L132 2343 .loc 1 578 9 discriminator 12 2344 0eac 07F50073 add r3, r7, #512 2345 0eb0 A3F5FE73 sub r3, r3, #508 2346 0eb4 1B68 ldr r3, [r3] 2347 0eb6 5B6A ldr r3, [r3, #36] 2348 0eb8 B3F5401F cmp r3, #3145728 2349 0ebc 16D0 beq .L132 2350 .loc 1 578 9 discriminator 13 2351 0ebe 07F50073 add r3, r7, #512 2352 0ec2 A3F5FE73 sub r3, r3, #508 2353 0ec6 1B68 ldr r3, [r3] 2354 0ec8 5B6A ldr r3, [r3, #36] 2355 0eca B3F5501F cmp r3, #3407872 2356 0ece 0DD0 beq .L132 2357 .loc 1 578 9 discriminator 14 2358 0ed0 07F50073 add r3, r7, #512 2359 0ed4 A3F5FE73 sub r3, r3, #508 2360 0ed8 1B68 ldr r3, [r3] 2361 0eda 5B6A ldr r3, [r3, #36] 2362 0edc B3F5601F cmp r3, #3670016 2363 0ee0 04D0 beq .L132 2364 .loc 1 578 9 discriminator 15 2365 0ee2 40F24221 movw r1, #578 2366 0ee6 2E48 ldr r0, .L171+4 2367 0ee8 FFF7FEFF bl assert_failed 2368 .L132: 2369 0eec 07F50073 add r3, r7, #512 2370 0ef0 A3F5C073 sub r3, r3, #384 2371 0ef4 4FF08072 mov r2, #16777216 2372 0ef8 1A60 str r2, [r3] 2373 .LBB258: 2374 .LBB259: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2375 .loc 2 988 4 is_stmt 1 2376 0efa 07F50073 add r3, r7, #512 2377 0efe A3F5C073 sub r3, r3, #384 2378 0f02 1B68 ldr r3, [r3] 2379 .syntax unified 2380 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2381 0f04 93FAA3F2 rbit r2, r3 2382 @ 0 "" 2 2383 .thumb 2384 .syntax unified ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 72 2385 0f08 07F50073 add r3, r7, #512 2386 0f0c A3F5C273 sub r3, r3, #388 2387 0f10 1A60 str r2, [r3] 2388 .loc 2 1001 10 2389 0f12 07F50073 add r3, r7, #512 2390 0f16 A3F5C273 sub r3, r3, #388 2391 0f1a 1B68 ldr r3, [r3] 2392 .LBE259: 2393 .LBE258: 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 2394 .loc 1 584 9 2395 0f1c B3FA83F3 clz r3, r3 2396 0f20 DBB2 uxtb r3, r3 2397 0f22 03F18453 add r3, r3, #276824064 2398 0f26 03F58413 add r3, r3, #1081344 2399 0f2a 9B00 lsls r3, r3, #2 2400 0f2c 1A46 mov r2, r3 2401 0f2e 0023 movs r3, #0 2402 0f30 1360 str r3, [r2] 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 2403 .loc 1 587 21 2404 0f32 FFF7FEFF bl HAL_GetTick 2405 0f36 C7F8F801 str r0, [r7, #504] 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 2406 .loc 1 590 14 2407 0f3a 09E0 b .L134 2408 .L141: 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 2409 .loc 1 592 15 2410 0f3c FFF7FEFF bl HAL_GetTick 2411 0f40 0246 mov r2, r0 2412 .loc 1 592 29 2413 0f42 D7F8F831 ldr r3, [r7, #504] 2414 0f46 D31A subs r3, r2, r3 2415 .loc 1 592 13 2416 0f48 022B cmp r3, #2 2417 0f4a 01D9 bls .L134 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 2418 .loc 1 594 20 2419 0f4c 0323 movs r3, #3 2420 0f4e 04E2 b .L15 2421 .L134: 2422 0f50 07F50073 add r3, r7, #512 2423 0f54 A3F5C473 sub r3, r3, #392 2424 0f58 4FF00072 mov r2, #33554432 2425 0f5c 1A60 str r2, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 73 2426 .LBB260: 2427 .LBB261: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2428 .loc 2 988 4 2429 0f5e 07F50073 add r3, r7, #512 2430 0f62 A3F5C473 sub r3, r3, #392 2431 0f66 1B68 ldr r3, [r3] 2432 .syntax unified 2433 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2434 0f68 93FAA3F2 rbit r2, r3 2435 @ 0 "" 2 2436 .thumb 2437 .syntax unified 2438 0f6c 07F50073 add r3, r7, #512 2439 0f70 A3F5C673 sub r3, r3, #396 2440 0f74 1A60 str r2, [r3] 2441 .loc 2 1001 10 2442 0f76 07F50073 add r3, r7, #512 2443 0f7a A3F5C673 sub r3, r3, #396 2444 0f7e 1B68 ldr r3, [r3] 2445 .LBE261: 2446 .LBE260: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2447 .loc 1 590 15 2448 0f80 B3FA83F3 clz r3, r3 2449 0f84 DBB2 uxtb r3, r3 2450 0f86 5B09 lsrs r3, r3, #5 2451 0f88 DBB2 uxtb r3, r3 2452 0f8a 43F00103 orr r3, r3, #1 2453 0f8e DBB2 uxtb r3, r3 2454 0f90 012B cmp r3, #1 2455 0f92 07D1 bne .L136 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2456 .loc 1 590 15 is_stmt 0 discriminator 1 2457 0f94 014B ldr r3, .L171 2458 0f96 1B68 ldr r3, [r3] 2459 0f98 2CE0 b .L137 2460 .L172: 2461 0f9a 00BF .align 2 2462 .L171: 2463 0f9c 00100240 .word 1073876992 2464 0fa0 00000000 .word .LC0 2465 .L136: 2466 0fa4 07F50073 add r3, r7, #512 2467 0fa8 A3F5C873 sub r3, r3, #400 2468 0fac 4FF00072 mov r2, #33554432 2469 0fb0 1A60 str r2, [r3] 2470 .LBB262: 2471 .LBB263: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2472 .loc 2 988 4 is_stmt 1 discriminator 2 2473 0fb2 07F50073 add r3, r7, #512 2474 0fb6 A3F5C873 sub r3, r3, #400 2475 0fba 1B68 ldr r3, [r3] 2476 .syntax unified 2477 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2478 0fbc 93FAA3F2 rbit r2, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 74 2479 @ 0 "" 2 2480 .thumb 2481 .syntax unified 2482 0fc0 07F50073 add r3, r7, #512 2483 0fc4 A3F5CA73 sub r3, r3, #404 2484 0fc8 1A60 str r2, [r3] 2485 0fca 07F50073 add r3, r7, #512 2486 0fce A3F5CC73 sub r3, r3, #408 2487 0fd2 4FF00072 mov r2, #33554432 2488 0fd6 1A60 str r2, [r3] 2489 .LBE263: 2490 .LBE262: 2491 .LBB264: 2492 .LBB265: 2493 0fd8 07F50073 add r3, r7, #512 2494 0fdc A3F5CC73 sub r3, r3, #408 2495 0fe0 1B68 ldr r3, [r3] 2496 .syntax unified 2497 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2498 0fe2 93FAA3F2 rbit r2, r3 2499 @ 0 "" 2 2500 .thumb 2501 .syntax unified 2502 0fe6 07F50073 add r3, r7, #512 2503 0fea A3F5CE73 sub r3, r3, #412 2504 0fee 1A60 str r2, [r3] 2505 .LBE265: 2506 .LBE264: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2507 .loc 1 590 15 discriminator 2 2508 0ff0 C94B ldr r3, .L173 2509 0ff2 5B6A ldr r3, [r3, #36] 2510 .L137: 2511 0ff4 07F50072 add r2, r7, #512 2512 0ff8 A2F5D072 sub r2, r2, #416 2513 0ffc 4FF00071 mov r1, #33554432 2514 1000 1160 str r1, [r2] 2515 .LBB266: 2516 .LBB267: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2517 .loc 2 988 4 discriminator 12 2518 1002 07F50072 add r2, r7, #512 2519 1006 A2F5D072 sub r2, r2, #416 2520 100a 1268 ldr r2, [r2] 2521 .syntax unified 2522 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2523 100c 92FAA2F1 rbit r1, r2 2524 @ 0 "" 2 2525 .thumb 2526 .syntax unified 2527 1010 07F50072 add r2, r7, #512 2528 1014 A2F5D272 sub r2, r2, #420 2529 1018 1160 str r1, [r2] 2530 .loc 2 1001 10 discriminator 12 2531 101a 07F50072 add r2, r7, #512 2532 101e A2F5D272 sub r2, r2, #420 2533 1022 1268 ldr r2, [r2] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 75 2534 .LBE267: 2535 .LBE266: 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2536 .loc 1 590 15 discriminator 12 2537 1024 B2FA82F2 clz r2, r2 2538 1028 D2B2 uxtb r2, r2 2539 102a 42F02002 orr r2, r2, #32 2540 102e D2B2 uxtb r2, r2 2541 1030 02F01F02 and r2, r2, #31 2542 1034 0121 movs r1, #1 2543 1036 01FA02F2 lsl r2, r1, r2 2544 103a 1340 ands r3, r3, r2 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2545 .loc 1 590 14 discriminator 12 2546 103c 002B cmp r3, #0 2547 103e 7FF47DAF bne .L141 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source and multiplication factor. */ 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 2548 .loc 1 605 7 2549 1042 B54B ldr r3, .L173 2550 1044 5B68 ldr r3, [r3, #4] 2551 1046 23F47412 bic r2, r3, #3997696 2552 104a 07F50073 add r3, r7, #512 2553 104e A3F5FE73 sub r3, r3, #508 2554 1052 1B68 ldr r3, [r3] 2555 1054 596A ldr r1, [r3, #36] 2556 1056 07F50073 add r3, r7, #512 2557 105a A3F5FE73 sub r3, r3, #508 2558 105e 1B68 ldr r3, [r3] 2559 1060 1B6A ldr r3, [r3, #32] 2560 1062 0B43 orrs r3, r3, r1 2561 1064 AC49 ldr r1, .L173 2562 1066 1343 orrs r3, r3, r2 2563 1068 4B60 str r3, [r1, #4] 2564 106a 07F50073 add r3, r7, #512 2565 106e A3F5D473 sub r3, r3, #424 2566 1072 4FF08072 mov r2, #16777216 2567 1076 1A60 str r2, [r3] 2568 .LBB268: 2569 .LBB269: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2570 .loc 2 988 4 2571 1078 07F50073 add r3, r7, #512 2572 107c A3F5D473 sub r3, r3, #424 2573 1080 1B68 ldr r3, [r3] 2574 .syntax unified 2575 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2576 1082 93FAA3F2 rbit r2, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 76 2577 @ 0 "" 2 2578 .thumb 2579 .syntax unified 2580 1086 07F50073 add r3, r7, #512 2581 108a A3F5D673 sub r3, r3, #428 2582 108e 1A60 str r2, [r3] 2583 .loc 2 1001 10 2584 1090 07F50073 add r3, r7, #512 2585 1094 A3F5D673 sub r3, r3, #428 2586 1098 1B68 ldr r3, [r3] 2587 .LBE269: 2588 .LBE268: 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the main PLL. */ 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 2589 .loc 1 609 9 2590 109a B3FA83F3 clz r3, r3 2591 109e DBB2 uxtb r3, r3 2592 10a0 03F18453 add r3, r3, #276824064 2593 10a4 03F58413 add r3, r3, #1081344 2594 10a8 9B00 lsls r3, r3, #2 2595 10aa 1A46 mov r2, r3 2596 10ac 0123 movs r3, #1 2597 10ae 1360 str r3, [r2] 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 2598 .loc 1 612 21 2599 10b0 FFF7FEFF bl HAL_GetTick 2600 10b4 C7F8F801 str r0, [r7, #504] 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is ready */ 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 2601 .loc 1 615 14 2602 10b8 09E0 b .L143 2603 .L150: 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 2604 .loc 1 617 15 2605 10ba FFF7FEFF bl HAL_GetTick 2606 10be 0246 mov r2, r0 2607 .loc 1 617 29 2608 10c0 D7F8F831 ldr r3, [r7, #504] 2609 10c4 D31A subs r3, r2, r3 2610 .loc 1 617 13 2611 10c6 022B cmp r3, #2 2612 10c8 01D9 bls .L143 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 2613 .loc 1 619 20 2614 10ca 0323 movs r3, #3 2615 10cc 45E1 b .L15 2616 .L143: 2617 10ce 07F50073 add r3, r7, #512 2618 10d2 A3F5D873 sub r3, r3, #432 2619 10d6 4FF00072 mov r2, #33554432 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 77 2620 10da 1A60 str r2, [r3] 2621 .LBB270: 2622 .LBB271: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2623 .loc 2 988 4 2624 10dc 07F50073 add r3, r7, #512 2625 10e0 A3F5D873 sub r3, r3, #432 2626 10e4 1B68 ldr r3, [r3] 2627 .syntax unified 2628 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2629 10e6 93FAA3F2 rbit r2, r3 2630 @ 0 "" 2 2631 .thumb 2632 .syntax unified 2633 10ea 07F50073 add r3, r7, #512 2634 10ee A3F5DA73 sub r3, r3, #436 2635 10f2 1A60 str r2, [r3] 2636 .loc 2 1001 10 2637 10f4 07F50073 add r3, r7, #512 2638 10f8 A3F5DA73 sub r3, r3, #436 2639 10fc 1B68 ldr r3, [r3] 2640 .LBE271: 2641 .LBE270: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2642 .loc 1 615 15 2643 10fe B3FA83F3 clz r3, r3 2644 1102 DBB2 uxtb r3, r3 2645 1104 5B09 lsrs r3, r3, #5 2646 1106 DBB2 uxtb r3, r3 2647 1108 43F00103 orr r3, r3, #1 2648 110c DBB2 uxtb r3, r3 2649 110e 012B cmp r3, #1 2650 1110 02D1 bne .L145 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2651 .loc 1 615 15 is_stmt 0 discriminator 1 2652 1112 814B ldr r3, .L173 2653 1114 1B68 ldr r3, [r3] 2654 1116 27E0 b .L146 2655 .L145: 2656 1118 07F50073 add r3, r7, #512 2657 111c A3F5DC73 sub r3, r3, #440 2658 1120 4FF00072 mov r2, #33554432 2659 1124 1A60 str r2, [r3] 2660 .LBB272: 2661 .LBB273: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2662 .loc 2 988 4 is_stmt 1 discriminator 2 2663 1126 07F50073 add r3, r7, #512 2664 112a A3F5DC73 sub r3, r3, #440 2665 112e 1B68 ldr r3, [r3] 2666 .syntax unified 2667 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2668 1130 93FAA3F2 rbit r2, r3 2669 @ 0 "" 2 2670 .thumb 2671 .syntax unified 2672 1134 07F50073 add r3, r7, #512 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 78 2673 1138 A3F5DE73 sub r3, r3, #444 2674 113c 1A60 str r2, [r3] 2675 113e 07F50073 add r3, r7, #512 2676 1142 A3F5E073 sub r3, r3, #448 2677 1146 4FF00072 mov r2, #33554432 2678 114a 1A60 str r2, [r3] 2679 .LBE273: 2680 .LBE272: 2681 .LBB274: 2682 .LBB275: 2683 114c 07F50073 add r3, r7, #512 2684 1150 A3F5E073 sub r3, r3, #448 2685 1154 1B68 ldr r3, [r3] 2686 .syntax unified 2687 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2688 1156 93FAA3F2 rbit r2, r3 2689 @ 0 "" 2 2690 .thumb 2691 .syntax unified 2692 115a 07F50073 add r3, r7, #512 2693 115e A3F5E273 sub r3, r3, #452 2694 1162 1A60 str r2, [r3] 2695 .LBE275: 2696 .LBE274: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2697 .loc 1 615 15 discriminator 2 2698 1164 6C4B ldr r3, .L173 2699 1166 5B6A ldr r3, [r3, #36] 2700 .L146: 2701 1168 07F50072 add r2, r7, #512 2702 116c A2F5E472 sub r2, r2, #456 2703 1170 4FF00071 mov r1, #33554432 2704 1174 1160 str r1, [r2] 2705 .LBB276: 2706 .LBB277: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2707 .loc 2 988 4 discriminator 12 2708 1176 07F50072 add r2, r7, #512 2709 117a A2F5E472 sub r2, r2, #456 2710 117e 1268 ldr r2, [r2] 2711 .syntax unified 2712 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2713 1180 92FAA2F1 rbit r1, r2 2714 @ 0 "" 2 2715 .thumb 2716 .syntax unified 2717 1184 07F50072 add r2, r7, #512 2718 1188 A2F5E672 sub r2, r2, #460 2719 118c 1160 str r1, [r2] 2720 .loc 2 1001 10 discriminator 12 2721 118e 07F50072 add r2, r7, #512 2722 1192 A2F5E672 sub r2, r2, #460 2723 1196 1268 ldr r2, [r2] 2724 .LBE277: 2725 .LBE276: 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2726 .loc 1 615 15 discriminator 12 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 79 2727 1198 B2FA82F2 clz r2, r2 2728 119c D2B2 uxtb r2, r2 2729 119e 42F02002 orr r2, r2, #32 2730 11a2 D2B2 uxtb r2, r2 2731 11a4 02F01F02 and r2, r2, #31 2732 11a8 0121 movs r1, #1 2733 11aa 01FA02F2 lsl r2, r1, r2 2734 11ae 1340 ands r3, r3, r2 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2735 .loc 1 615 14 discriminator 12 2736 11b0 002B cmp r3, #0 2737 11b2 82D0 beq .L150 2738 11b4 D0E0 b .L128 2739 .L130: 2740 11b6 07F50073 add r3, r7, #512 2741 11ba A3F5E873 sub r3, r3, #464 2742 11be 4FF08072 mov r2, #16777216 2743 11c2 1A60 str r2, [r3] 2744 .LBB278: 2745 .LBB279: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2746 .loc 2 988 4 2747 11c4 07F50073 add r3, r7, #512 2748 11c8 A3F5E873 sub r3, r3, #464 2749 11cc 1B68 ldr r3, [r3] 2750 .syntax unified 2751 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2752 11ce 93FAA3F2 rbit r2, r3 2753 @ 0 "" 2 2754 .thumb 2755 .syntax unified 2756 11d2 07F50073 add r3, r7, #512 2757 11d6 A3F5EA73 sub r3, r3, #468 2758 11da 1A60 str r2, [r3] 2759 .loc 2 1001 10 2760 11dc 07F50073 add r3, r7, #512 2761 11e0 A3F5EA73 sub r3, r3, #468 2762 11e4 1B68 ldr r3, [r3] 2763 .LBE279: 2764 .LBE278: 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 2765 .loc 1 626 9 2766 11e6 B3FA83F3 clz r3, r3 2767 11ea DBB2 uxtb r3, r3 2768 11ec 03F18453 add r3, r3, #276824064 2769 11f0 03F58413 add r3, r3, #1081344 2770 11f4 9B00 lsls r3, r3, #2 2771 11f6 1A46 mov r2, r3 2772 11f8 0023 movs r3, #0 2773 11fa 1360 str r3, [r2] 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 80 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 2774 .loc 1 629 21 2775 11fc FFF7FEFF bl HAL_GetTick 2776 1200 C7F8F801 str r0, [r7, #504] 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 2777 .loc 1 632 14 2778 1204 09E0 b .L152 2779 .L159: 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 2780 .loc 1 634 15 2781 1206 FFF7FEFF bl HAL_GetTick 2782 120a 0246 mov r2, r0 2783 .loc 1 634 29 2784 120c D7F8F831 ldr r3, [r7, #504] 2785 1210 D31A subs r3, r2, r3 2786 .loc 1 634 13 2787 1212 022B cmp r3, #2 2788 1214 01D9 bls .L152 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 2789 .loc 1 636 20 2790 1216 0323 movs r3, #3 2791 1218 9FE0 b .L15 2792 .L152: 2793 121a 07F50073 add r3, r7, #512 2794 121e A3F5EC73 sub r3, r3, #472 2795 1222 4FF00072 mov r2, #33554432 2796 1226 1A60 str r2, [r3] 2797 .LBB280: 2798 .LBB281: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2799 .loc 2 988 4 2800 1228 07F50073 add r3, r7, #512 2801 122c A3F5EC73 sub r3, r3, #472 2802 1230 1B68 ldr r3, [r3] 2803 .syntax unified 2804 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2805 1232 93FAA3F2 rbit r2, r3 2806 @ 0 "" 2 2807 .thumb 2808 .syntax unified 2809 1236 07F50073 add r3, r7, #512 2810 123a A3F5EE73 sub r3, r3, #476 2811 123e 1A60 str r2, [r3] 2812 .loc 2 1001 10 2813 1240 07F50073 add r3, r7, #512 2814 1244 A3F5EE73 sub r3, r3, #476 2815 1248 1B68 ldr r3, [r3] 2816 .LBE281: 2817 .LBE280: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2818 .loc 1 632 15 2819 124a B3FA83F3 clz r3, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 81 2820 124e DBB2 uxtb r3, r3 2821 1250 5B09 lsrs r3, r3, #5 2822 1252 DBB2 uxtb r3, r3 2823 1254 43F00103 orr r3, r3, #1 2824 1258 DBB2 uxtb r3, r3 2825 125a 012B cmp r3, #1 2826 125c 02D1 bne .L154 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2827 .loc 1 632 15 is_stmt 0 discriminator 1 2828 125e 2E4B ldr r3, .L173 2829 1260 1B68 ldr r3, [r3] 2830 1262 27E0 b .L155 2831 .L154: 2832 1264 07F50073 add r3, r7, #512 2833 1268 A3F5F073 sub r3, r3, #480 2834 126c 4FF00072 mov r2, #33554432 2835 1270 1A60 str r2, [r3] 2836 .LBB282: 2837 .LBB283: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2838 .loc 2 988 4 is_stmt 1 discriminator 2 2839 1272 07F50073 add r3, r7, #512 2840 1276 A3F5F073 sub r3, r3, #480 2841 127a 1B68 ldr r3, [r3] 2842 .syntax unified 2843 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2844 127c 93FAA3F2 rbit r2, r3 2845 @ 0 "" 2 2846 .thumb 2847 .syntax unified 2848 1280 07F50073 add r3, r7, #512 2849 1284 A3F5F273 sub r3, r3, #484 2850 1288 1A60 str r2, [r3] 2851 128a 07F50073 add r3, r7, #512 2852 128e A3F5F473 sub r3, r3, #488 2853 1292 4FF00072 mov r2, #33554432 2854 1296 1A60 str r2, [r3] 2855 .LBE283: 2856 .LBE282: 2857 .LBB284: 2858 .LBB285: 2859 1298 07F50073 add r3, r7, #512 2860 129c A3F5F473 sub r3, r3, #488 2861 12a0 1B68 ldr r3, [r3] 2862 .syntax unified 2863 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2864 12a2 93FAA3F2 rbit r2, r3 2865 @ 0 "" 2 2866 .thumb 2867 .syntax unified 2868 12a6 07F50073 add r3, r7, #512 2869 12aa A3F5F673 sub r3, r3, #492 2870 12ae 1A60 str r2, [r3] 2871 .LBE285: 2872 .LBE284: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2873 .loc 1 632 15 discriminator 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 82 2874 12b0 194B ldr r3, .L173 2875 12b2 5B6A ldr r3, [r3, #36] 2876 .L155: 2877 12b4 07F50072 add r2, r7, #512 2878 12b8 A2F5F872 sub r2, r2, #496 2879 12bc 4FF00071 mov r1, #33554432 2880 12c0 1160 str r1, [r2] 2881 .LBB286: 2882 .LBB287: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 2883 .loc 2 988 4 discriminator 12 2884 12c2 07F50072 add r2, r7, #512 2885 12c6 A2F5F872 sub r2, r2, #496 2886 12ca 1268 ldr r2, [r2] 2887 .syntax unified 2888 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2889 12cc 92FAA2F1 rbit r1, r2 2890 @ 0 "" 2 2891 .thumb 2892 .syntax unified 2893 12d0 07F50072 add r2, r7, #512 2894 12d4 A2F5FA72 sub r2, r2, #500 2895 12d8 1160 str r1, [r2] 2896 .loc 2 1001 10 discriminator 12 2897 12da 07F50072 add r2, r7, #512 2898 12de A2F5FA72 sub r2, r2, #500 2899 12e2 1268 ldr r2, [r2] 2900 .LBE287: 2901 .LBE286: 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2902 .loc 1 632 15 discriminator 12 2903 12e4 B2FA82F2 clz r2, r2 2904 12e8 D2B2 uxtb r2, r2 2905 12ea 42F02002 orr r2, r2, #32 2906 12ee D2B2 uxtb r2, r2 2907 12f0 02F01F02 and r2, r2, #31 2908 12f4 0121 movs r1, #1 2909 12f6 01FA02F2 lsl r2, r1, r2 2910 12fa 1340 ands r3, r3, r2 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2911 .loc 1 632 14 discriminator 12 2912 12fc 002B cmp r3, #0 2913 12fe 82D1 bne .L159 2914 1300 2AE0 b .L128 2915 .L129: 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 2916 .loc 1 644 33 2917 1302 07F50073 add r3, r7, #512 2918 1306 A3F5FE73 sub r3, r3, #508 2919 130a 1B68 ldr r3, [r3] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 83 2920 130c DB69 ldr r3, [r3, #28] 2921 .loc 1 644 9 2922 130e 012B cmp r3, #1 2923 1310 04D1 bne .L160 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 2924 .loc 1 646 16 2925 1312 0123 movs r3, #1 2926 1314 21E0 b .L15 2927 .L174: 2928 1316 00BF .align 2 2929 .L173: 2930 1318 00100240 .word 1073876992 2931 .L160: 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config = RCC->CFGR; 2932 .loc 1 651 25 2933 131c 114B ldr r3, .L175 2934 .loc 1 651 20 2935 131e 5B68 ldr r3, [r3, #4] 2936 1320 C7F8F431 str r3, [r7, #500] 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 2937 .loc 1 658 13 2938 1324 D7F8F431 ldr r3, [r7, #500] 2939 1328 03F48032 and r2, r3, #65536 2940 .loc 1 658 78 2941 132c 07F50073 add r3, r7, #512 2942 1330 A3F5FE73 sub r3, r3, #508 2943 1334 1B68 ldr r3, [r3] 2944 1336 1B6A ldr r3, [r3, #32] 2945 .loc 1 658 11 2946 1338 9A42 cmp r2, r3 2947 133a 0BD1 bne .L161 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2948 .loc 1 659 13 discriminator 1 2949 133c D7F8F431 ldr r3, [r7, #500] 2950 1340 03F47012 and r2, r3, #3932160 2951 .loc 1 659 78 discriminator 1 2952 1344 07F50073 add r3, r7, #512 2953 1348 A3F5FE73 sub r3, r3, #508 2954 134c 1B68 ldr r3, [r3] 2955 134e 5B6A ldr r3, [r3, #36] 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 2956 .loc 1 658 90 discriminator 1 2957 1350 9A42 cmp r2, r3 2958 1352 01D0 beq .L128 2959 .L161: 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 84 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 2960 .loc 1 662 18 2961 1354 0123 movs r3, #1 2962 1356 00E0 b .L15 2963 .L128: 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 2964 .loc 1 668 10 2965 1358 0023 movs r3, #0 2966 .L15: 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 2967 .loc 1 669 1 2968 135a 1846 mov r0, r3 2969 135c 07F50077 add r7, r7, #512 2970 .LCFI8: 2971 .cfi_def_cfa_offset 8 2972 1360 BD46 mov sp, r7 2973 .LCFI9: 2974 .cfi_def_cfa_register 13 2975 @ sp needed 2976 1362 80BD pop {r7, pc} 2977 .L176: 2978 .align 2 2979 .L175: 2980 1364 00100240 .word 1073876992 2981 .cfi_endproc 2982 .LFE131: 2984 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 2985 .align 1 2986 .global HAL_RCC_ClockConfig 2987 .syntax unified 2988 .thumb 2989 .thumb_func 2991 HAL_RCC_ClockConfig: 2992 .LFB132: 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param FLatency FLASH Latency 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 85 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * occur when the clock source will be ready. 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * currently used as system clock source. 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 2993 .loc 1 695 1 2994 .cfi_startproc 2995 @ args = 0, pretend = 0, frame = 120 2996 @ frame_needed = 1, uses_anonymous_args = 0 2997 0000 80B5 push {r7, lr} 2998 .LCFI10: 2999 .cfi_def_cfa_offset 8 3000 .cfi_offset 7, -8 3001 .cfi_offset 14, -4 3002 0002 9EB0 sub sp, sp, #120 3003 .LCFI11: 3004 .cfi_def_cfa_offset 128 3005 0004 00AF add r7, sp, #0 3006 .LCFI12: 3007 .cfi_def_cfa_register 7 3008 0006 7860 str r0, [r7, #4] 3009 0008 3960 str r1, [r7] 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; 3010 .loc 1 696 12 3011 000a 0023 movs r3, #0 3012 000c 7B67 str r3, [r7, #116] 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) 3013 .loc 1 699 5 3014 000e 7B68 ldr r3, [r7, #4] 3015 0010 002B cmp r3, #0 3016 0012 01D1 bne .L178 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3017 .loc 1 701 12 3018 0014 0123 movs r3, #1 3019 0016 05E2 b .L179 3020 .L178: 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 3021 .loc 1 705 3 3022 0018 7B68 ldr r3, [r7, #4] 3023 001a 1B68 ldr r3, [r3] 3024 001c 03F00103 and r3, r3, #1 3025 0020 002B cmp r3, #0 3026 0022 16D1 bne .L180 3027 .loc 1 705 3 is_stmt 0 discriminator 1 3028 0024 7B68 ldr r3, [r7, #4] 3029 0026 1B68 ldr r3, [r3] 3030 0028 03F00203 and r3, r3, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 86 3031 002c 002B cmp r3, #0 3032 002e 10D1 bne .L180 3033 .loc 1 705 3 discriminator 2 3034 0030 7B68 ldr r3, [r7, #4] 3035 0032 1B68 ldr r3, [r3] 3036 0034 03F00403 and r3, r3, #4 3037 0038 002B cmp r3, #0 3038 003a 0AD1 bne .L180 3039 .loc 1 705 3 discriminator 3 3040 003c 7B68 ldr r3, [r7, #4] 3041 003e 1B68 ldr r3, [r3] 3042 0040 03F00803 and r3, r3, #8 3043 0044 002B cmp r3, #0 3044 0046 04D1 bne .L180 3045 .loc 1 705 3 discriminator 4 3046 0048 40F2C121 movw r1, #705 3047 004c 9A48 ldr r0, .L216 3048 004e FFF7FEFF bl assert_failed 3049 .L180: 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 3050 .loc 1 706 3 is_stmt 1 3051 0052 3B68 ldr r3, [r7] 3052 0054 002B cmp r3, #0 3053 0056 0AD0 beq .L181 3054 .loc 1 706 3 is_stmt 0 discriminator 1 3055 0058 3B68 ldr r3, [r7] 3056 005a 012B cmp r3, #1 3057 005c 07D0 beq .L181 3058 .loc 1 706 3 discriminator 2 3059 005e 3B68 ldr r3, [r7] 3060 0060 022B cmp r3, #2 3061 0062 04D0 beq .L181 3062 .loc 1 706 3 discriminator 3 3063 0064 40F2C221 movw r1, #706 3064 0068 9348 ldr r0, .L216 3065 006a FFF7FEFF bl assert_failed 3066 .L181: 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HCLK) of the device. */ 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) 3067 .loc 1 713 17 is_stmt 1 3068 006e 934B ldr r3, .L216+4 3069 0070 1B68 ldr r3, [r3] 3070 0072 03F00703 and r3, r3, #7 3071 .loc 1 713 5 3072 0076 3A68 ldr r2, [r7] 3073 0078 9A42 cmp r2, r3 3074 007a 10D9 bls .L182 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 3075 .loc 1 716 5 3076 007c 8F4B ldr r3, .L216+4 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 87 3077 007e 1B68 ldr r3, [r3] 3078 0080 23F00702 bic r2, r3, #7 3079 0084 8D49 ldr r1, .L216+4 3080 0086 3B68 ldr r3, [r7] 3081 0088 1343 orrs r3, r3, r2 3082 008a 0B60 str r3, [r1] 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 3083 .loc 1 720 8 3084 008c 8B4B ldr r3, .L216+4 3085 008e 1B68 ldr r3, [r3] 3086 0090 03F00703 and r3, r3, #7 3087 .loc 1 720 7 3088 0094 3A68 ldr r2, [r7] 3089 0096 9A42 cmp r2, r3 3090 0098 01D0 beq .L182 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3091 .loc 1 722 14 3092 009a 0123 movs r3, #1 3093 009c C2E1 b .L179 3094 .L182: 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 3095 .loc 1 727 25 3096 009e 7B68 ldr r3, [r7, #4] 3097 00a0 1B68 ldr r3, [r3] 3098 .loc 1 727 38 3099 00a2 03F00203 and r3, r3, #2 3100 .loc 1 727 5 3101 00a6 002B cmp r3, #0 3102 00a8 31D0 beq .L183 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 3103 .loc 1 729 5 3104 00aa 7B68 ldr r3, [r7, #4] 3105 00ac 9B68 ldr r3, [r3, #8] 3106 00ae 002B cmp r3, #0 3107 00b0 24D0 beq .L184 3108 .loc 1 729 5 is_stmt 0 discriminator 1 3109 00b2 7B68 ldr r3, [r7, #4] 3110 00b4 9B68 ldr r3, [r3, #8] 3111 00b6 802B cmp r3, #128 3112 00b8 20D0 beq .L184 3113 .loc 1 729 5 discriminator 2 3114 00ba 7B68 ldr r3, [r7, #4] 3115 00bc 9B68 ldr r3, [r3, #8] 3116 00be 902B cmp r3, #144 3117 00c0 1CD0 beq .L184 3118 .loc 1 729 5 discriminator 3 3119 00c2 7B68 ldr r3, [r7, #4] 3120 00c4 9B68 ldr r3, [r3, #8] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 88 3121 00c6 A02B cmp r3, #160 3122 00c8 18D0 beq .L184 3123 .loc 1 729 5 discriminator 4 3124 00ca 7B68 ldr r3, [r7, #4] 3125 00cc 9B68 ldr r3, [r3, #8] 3126 00ce B02B cmp r3, #176 3127 00d0 14D0 beq .L184 3128 .loc 1 729 5 discriminator 5 3129 00d2 7B68 ldr r3, [r7, #4] 3130 00d4 9B68 ldr r3, [r3, #8] 3131 00d6 C02B cmp r3, #192 3132 00d8 10D0 beq .L184 3133 .loc 1 729 5 discriminator 6 3134 00da 7B68 ldr r3, [r7, #4] 3135 00dc 9B68 ldr r3, [r3, #8] 3136 00de D02B cmp r3, #208 3137 00e0 0CD0 beq .L184 3138 .loc 1 729 5 discriminator 7 3139 00e2 7B68 ldr r3, [r7, #4] 3140 00e4 9B68 ldr r3, [r3, #8] 3141 00e6 E02B cmp r3, #224 3142 00e8 08D0 beq .L184 3143 .loc 1 729 5 discriminator 8 3144 00ea 7B68 ldr r3, [r7, #4] 3145 00ec 9B68 ldr r3, [r3, #8] 3146 00ee F02B cmp r3, #240 3147 00f0 04D0 beq .L184 3148 .loc 1 729 5 discriminator 9 3149 00f2 40F2D921 movw r1, #729 3150 00f6 7048 ldr r0, .L216 3151 00f8 FFF7FEFF bl assert_failed 3152 .L184: 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 3153 .loc 1 730 5 is_stmt 1 3154 00fc 704B ldr r3, .L216+8 3155 00fe 5B68 ldr r3, [r3, #4] 3156 0100 23F0F002 bic r2, r3, #240 3157 0104 7B68 ldr r3, [r7, #4] 3158 0106 9B68 ldr r3, [r3, #8] 3159 0108 6D49 ldr r1, .L216+8 3160 010a 1343 orrs r3, r3, r2 3161 010c 4B60 str r3, [r1, #4] 3162 .L183: 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 3163 .loc 1 734 25 3164 010e 7B68 ldr r3, [r7, #4] 3165 0110 1B68 ldr r3, [r3] 3166 .loc 1 734 38 3167 0112 03F00103 and r3, r3, #1 3168 .loc 1 734 5 3169 0116 002B cmp r3, #0 3170 0118 00F0F580 beq .L185 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 89 3171 .loc 1 736 5 3172 011c 7B68 ldr r3, [r7, #4] 3173 011e 5B68 ldr r3, [r3, #4] 3174 0120 002B cmp r3, #0 3175 0122 0CD0 beq .L186 3176 .loc 1 736 5 is_stmt 0 discriminator 1 3177 0124 7B68 ldr r3, [r7, #4] 3178 0126 5B68 ldr r3, [r3, #4] 3179 0128 012B cmp r3, #1 3180 012a 08D0 beq .L186 3181 .loc 1 736 5 discriminator 2 3182 012c 7B68 ldr r3, [r7, #4] 3183 012e 5B68 ldr r3, [r3, #4] 3184 0130 022B cmp r3, #2 3185 0132 04D0 beq .L186 3186 .loc 1 736 5 discriminator 3 3187 0134 4FF43871 mov r1, #736 3188 0138 5F48 ldr r0, .L216 3189 013a FFF7FEFF bl assert_failed 3190 .L186: 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 3191 .loc 1 739 25 is_stmt 1 3192 013e 7B68 ldr r3, [r7, #4] 3193 0140 5B68 ldr r3, [r3, #4] 3194 .loc 1 739 7 3195 0142 012B cmp r3, #1 3196 0144 3DD1 bne .L187 3197 0146 4FF40033 mov r3, #131072 3198 014a 3B67 str r3, [r7, #112] 3199 .LBB288: 3200 .LBB289: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3201 .loc 2 988 4 3202 014c 3B6F ldr r3, [r7, #112] 3203 .syntax unified 3204 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3205 014e 93FAA3F3 rbit r3, r3 3206 @ 0 "" 2 3207 .thumb 3208 .syntax unified 3209 0152 FB66 str r3, [r7, #108] 3210 .loc 2 1001 10 3211 0154 FB6E ldr r3, [r7, #108] 3212 .LBE289: 3213 .LBE288: 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE ready flag */ 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 3214 .loc 1 742 10 3215 0156 B3FA83F3 clz r3, r3 3216 015a DBB2 uxtb r3, r3 3217 015c 5B09 lsrs r3, r3, #5 3218 015e DBB2 uxtb r3, r3 3219 0160 43F00103 orr r3, r3, #1 3220 0164 DBB2 uxtb r3, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 90 3221 0166 012B cmp r3, #1 3222 0168 02D1 bne .L189 3223 .loc 1 742 10 is_stmt 0 discriminator 1 3224 016a 554B ldr r3, .L216+8 3225 016c 1B68 ldr r3, [r3] 3226 016e 0FE0 b .L190 3227 .L189: 3228 0170 4FF40033 mov r3, #131072 3229 0174 BB66 str r3, [r7, #104] 3230 .LBB290: 3231 .LBB291: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3232 .loc 2 988 4 is_stmt 1 discriminator 2 3233 0176 BB6E ldr r3, [r7, #104] 3234 .syntax unified 3235 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3236 0178 93FAA3F3 rbit r3, r3 3237 @ 0 "" 2 3238 .thumb 3239 .syntax unified 3240 017c 7B66 str r3, [r7, #100] 3241 017e 4FF40033 mov r3, #131072 3242 0182 3B66 str r3, [r7, #96] 3243 .LBE291: 3244 .LBE290: 3245 .LBB292: 3246 .LBB293: 3247 0184 3B6E ldr r3, [r7, #96] 3248 .syntax unified 3249 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3250 0186 93FAA3F3 rbit r3, r3 3251 @ 0 "" 2 3252 .thumb 3253 .syntax unified 3254 018a FB65 str r3, [r7, #92] 3255 .LBE293: 3256 .LBE292: 3257 .loc 1 742 10 discriminator 2 3258 018c 4C4B ldr r3, .L216+8 3259 018e 5B6A ldr r3, [r3, #36] 3260 .L190: 3261 0190 4FF40032 mov r2, #131072 3262 0194 BA65 str r2, [r7, #88] 3263 .LBB294: 3264 .LBB295: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3265 .loc 2 988 4 discriminator 12 3266 0196 BA6D ldr r2, [r7, #88] 3267 .syntax unified 3268 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3269 0198 92FAA2F2 rbit r2, r2 3270 @ 0 "" 2 3271 .thumb 3272 .syntax unified 3273 019c 7A65 str r2, [r7, #84] 3274 .loc 2 1001 10 discriminator 12 3275 019e 7A6D ldr r2, [r7, #84] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 91 3276 .LBE295: 3277 .LBE294: 3278 .loc 1 742 10 discriminator 12 3279 01a0 B2FA82F2 clz r2, r2 3280 01a4 D2B2 uxtb r2, r2 3281 01a6 42F02002 orr r2, r2, #32 3282 01aa D2B2 uxtb r2, r2 3283 01ac 02F01F02 and r2, r2, #31 3284 01b0 0121 movs r1, #1 3285 01b2 01FA02F2 lsl r2, r1, r2 3286 01b6 1340 ands r3, r3, r2 3287 .loc 1 742 9 discriminator 12 3288 01b8 002B cmp r3, #0 3289 01ba 40F08380 bne .L194 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3290 .loc 1 744 16 3291 01be 0123 movs r3, #1 3292 01c0 30E1 b .L179 3293 .L187: 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 3294 .loc 1 748 30 3295 01c2 7B68 ldr r3, [r7, #4] 3296 01c4 5B68 ldr r3, [r3, #4] 3297 .loc 1 748 12 3298 01c6 022B cmp r3, #2 3299 01c8 3CD1 bne .L195 3300 01ca 4FF00073 mov r3, #33554432 3301 01ce 3B65 str r3, [r7, #80] 3302 .LBB296: 3303 .LBB297: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3304 .loc 2 988 4 3305 01d0 3B6D ldr r3, [r7, #80] 3306 .syntax unified 3307 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3308 01d2 93FAA3F3 rbit r3, r3 3309 @ 0 "" 2 3310 .thumb 3311 .syntax unified 3312 01d6 FB64 str r3, [r7, #76] 3313 .loc 2 1001 10 3314 01d8 FB6C ldr r3, [r7, #76] 3315 .LBE297: 3316 .LBE296: 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the PLL ready flag */ 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 3317 .loc 1 751 10 3318 01da B3FA83F3 clz r3, r3 3319 01de DBB2 uxtb r3, r3 3320 01e0 5B09 lsrs r3, r3, #5 3321 01e2 DBB2 uxtb r3, r3 3322 01e4 43F00103 orr r3, r3, #1 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 92 3323 01e8 DBB2 uxtb r3, r3 3324 01ea 012B cmp r3, #1 3325 01ec 02D1 bne .L197 3326 .loc 1 751 10 is_stmt 0 discriminator 1 3327 01ee 344B ldr r3, .L216+8 3328 01f0 1B68 ldr r3, [r3] 3329 01f2 0FE0 b .L198 3330 .L197: 3331 01f4 4FF00073 mov r3, #33554432 3332 01f8 BB64 str r3, [r7, #72] 3333 .LBB298: 3334 .LBB299: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3335 .loc 2 988 4 is_stmt 1 discriminator 2 3336 01fa BB6C ldr r3, [r7, #72] 3337 .syntax unified 3338 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3339 01fc 93FAA3F3 rbit r3, r3 3340 @ 0 "" 2 3341 .thumb 3342 .syntax unified 3343 0200 7B64 str r3, [r7, #68] 3344 0202 4FF00073 mov r3, #33554432 3345 0206 3B64 str r3, [r7, #64] 3346 .LBE299: 3347 .LBE298: 3348 .LBB300: 3349 .LBB301: 3350 0208 3B6C ldr r3, [r7, #64] 3351 .syntax unified 3352 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3353 020a 93FAA3F3 rbit r3, r3 3354 @ 0 "" 2 3355 .thumb 3356 .syntax unified 3357 020e FB63 str r3, [r7, #60] 3358 .LBE301: 3359 .LBE300: 3360 .loc 1 751 10 discriminator 2 3361 0210 2B4B ldr r3, .L216+8 3362 0212 5B6A ldr r3, [r3, #36] 3363 .L198: 3364 0214 4FF00072 mov r2, #33554432 3365 0218 BA63 str r2, [r7, #56] 3366 .LBB302: 3367 .LBB303: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3368 .loc 2 988 4 discriminator 12 3369 021a BA6B ldr r2, [r7, #56] 3370 .syntax unified 3371 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3372 021c 92FAA2F2 rbit r2, r2 3373 @ 0 "" 2 3374 .thumb 3375 .syntax unified 3376 0220 7A63 str r2, [r7, #52] 3377 .loc 2 1001 10 discriminator 12 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 93 3378 0222 7A6B ldr r2, [r7, #52] 3379 .LBE303: 3380 .LBE302: 3381 .loc 1 751 10 discriminator 12 3382 0224 B2FA82F2 clz r2, r2 3383 0228 D2B2 uxtb r2, r2 3384 022a 42F02002 orr r2, r2, #32 3385 022e D2B2 uxtb r2, r2 3386 0230 02F01F02 and r2, r2, #31 3387 0234 0121 movs r1, #1 3388 0236 01FA02F2 lsl r2, r1, r2 3389 023a 1340 ands r3, r3, r2 3390 .loc 1 751 9 discriminator 12 3391 023c 002B cmp r3, #0 3392 023e 41D1 bne .L194 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3393 .loc 1 753 16 3394 0240 0123 movs r3, #1 3395 0242 EFE0 b .L179 3396 .L195: 3397 0244 0223 movs r3, #2 3398 0246 3B63 str r3, [r7, #48] 3399 .LBB304: 3400 .LBB305: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3401 .loc 2 988 4 3402 0248 3B6B ldr r3, [r7, #48] 3403 .syntax unified 3404 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3405 024a 93FAA3F3 rbit r3, r3 3406 @ 0 "" 2 3407 .thumb 3408 .syntax unified 3409 024e FB62 str r3, [r7, #44] 3410 .loc 2 1001 10 3411 0250 FB6A ldr r3, [r7, #44] 3412 .LBE305: 3413 .LBE304: 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI ready flag */ 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 3414 .loc 1 760 10 3415 0252 B3FA83F3 clz r3, r3 3416 0256 DBB2 uxtb r3, r3 3417 0258 5B09 lsrs r3, r3, #5 3418 025a DBB2 uxtb r3, r3 3419 025c 43F00103 orr r3, r3, #1 3420 0260 DBB2 uxtb r3, r3 3421 0262 012B cmp r3, #1 3422 0264 02D1 bne .L203 3423 .loc 1 760 10 is_stmt 0 discriminator 1 3424 0266 164B ldr r3, .L216+8 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 94 3425 0268 1B68 ldr r3, [r3] 3426 026a 0DE0 b .L204 3427 .L203: 3428 026c 0223 movs r3, #2 3429 026e BB62 str r3, [r7, #40] 3430 .LBB306: 3431 .LBB307: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3432 .loc 2 988 4 is_stmt 1 discriminator 2 3433 0270 BB6A ldr r3, [r7, #40] 3434 .syntax unified 3435 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3436 0272 93FAA3F3 rbit r3, r3 3437 @ 0 "" 2 3438 .thumb 3439 .syntax unified 3440 0276 7B62 str r3, [r7, #36] 3441 0278 0223 movs r3, #2 3442 027a 3B62 str r3, [r7, #32] 3443 .LBE307: 3444 .LBE306: 3445 .LBB308: 3446 .LBB309: 3447 027c 3B6A ldr r3, [r7, #32] 3448 .syntax unified 3449 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3450 027e 93FAA3F3 rbit r3, r3 3451 @ 0 "" 2 3452 .thumb 3453 .syntax unified 3454 0282 FB61 str r3, [r7, #28] 3455 .LBE309: 3456 .LBE308: 3457 .loc 1 760 10 discriminator 2 3458 0284 0E4B ldr r3, .L216+8 3459 0286 5B6A ldr r3, [r3, #36] 3460 .L204: 3461 0288 0222 movs r2, #2 3462 028a BA61 str r2, [r7, #24] 3463 .LBB310: 3464 .LBB311: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3465 .loc 2 988 4 discriminator 12 3466 028c BA69 ldr r2, [r7, #24] 3467 .syntax unified 3468 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3469 028e 92FAA2F2 rbit r2, r2 3470 @ 0 "" 2 3471 .thumb 3472 .syntax unified 3473 0292 7A61 str r2, [r7, #20] 3474 .loc 2 1001 10 discriminator 12 3475 0294 7A69 ldr r2, [r7, #20] 3476 .LBE311: 3477 .LBE310: 3478 .loc 1 760 10 discriminator 12 3479 0296 B2FA82F2 clz r2, r2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 95 3480 029a D2B2 uxtb r2, r2 3481 029c 42F02002 orr r2, r2, #32 3482 02a0 D2B2 uxtb r2, r2 3483 02a2 02F01F02 and r2, r2, #31 3484 02a6 0121 movs r1, #1 3485 02a8 01FA02F2 lsl r2, r1, r2 3486 02ac 1340 ands r3, r3, r2 3487 .loc 1 760 9 discriminator 12 3488 02ae 002B cmp r3, #0 3489 02b0 08D1 bne .L194 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3490 .loc 1 762 16 3491 02b2 0123 movs r3, #1 3492 02b4 B6E0 b .L179 3493 .L217: 3494 02b6 00BF .align 2 3495 .L216: 3496 02b8 00000000 .word .LC0 3497 02bc 00200240 .word 1073881088 3498 02c0 00100240 .word 1073876992 3499 .L194: 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 3500 .loc 1 766 5 3501 02c4 594B ldr r3, .L218 3502 02c6 5B68 ldr r3, [r3, #4] 3503 02c8 23F00302 bic r2, r3, #3 3504 02cc 7B68 ldr r3, [r7, #4] 3505 02ce 5B68 ldr r3, [r3, #4] 3506 02d0 5649 ldr r1, .L218 3507 02d2 1343 orrs r3, r3, r2 3508 02d4 4B60 str r3, [r1, #4] 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); 3509 .loc 1 769 17 3510 02d6 FFF7FEFF bl HAL_GetTick 3511 02da 7867 str r0, [r7, #116] 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 3512 .loc 1 771 11 3513 02dc 0AE0 b .L208 3514 .L209: 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 3515 .loc 1 773 12 3516 02de FFF7FEFF bl HAL_GetTick 3517 02e2 0246 mov r2, r0 3518 .loc 1 773 26 3519 02e4 7B6F ldr r3, [r7, #116] 3520 02e6 D31A subs r3, r2, r3 3521 .loc 1 773 10 3522 02e8 41F28832 movw r2, #5000 3523 02ec 9342 cmp r3, r2 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 96 3524 02ee 01D9 bls .L208 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; 3525 .loc 1 775 16 3526 02f0 0323 movs r3, #3 3527 02f2 97E0 b .L179 3528 .L208: 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3529 .loc 1 771 12 3530 02f4 4D4B ldr r3, .L218 3531 02f6 5B68 ldr r3, [r3, #4] 3532 02f8 03F00C02 and r2, r3, #12 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3533 .loc 1 771 63 3534 02fc 7B68 ldr r3, [r7, #4] 3535 02fe 5B68 ldr r3, [r3, #4] 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3536 .loc 1 771 78 3537 0300 9B00 lsls r3, r3, #2 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3538 .loc 1 771 11 3539 0302 9A42 cmp r2, r3 3540 0304 EBD1 bne .L209 3541 .L185: 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) 3542 .loc 1 780 17 3543 0306 4A4B ldr r3, .L218+4 3544 0308 1B68 ldr r3, [r3] 3545 030a 03F00703 and r3, r3, #7 3546 .loc 1 780 5 3547 030e 3A68 ldr r2, [r7] 3548 0310 9A42 cmp r2, r3 3549 0312 10D2 bcs .L210 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 3550 .loc 1 783 5 3551 0314 464B ldr r3, .L218+4 3552 0316 1B68 ldr r3, [r3] 3553 0318 23F00702 bic r2, r3, #7 3554 031c 4449 ldr r1, .L218+4 3555 031e 3B68 ldr r3, [r7] 3556 0320 1343 orrs r3, r3, r2 3557 0322 0B60 str r3, [r1] 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) 3558 .loc 1 787 8 3559 0324 424B ldr r3, .L218+4 3560 0326 1B68 ldr r3, [r3] 3561 0328 03F00703 and r3, r3, #7 3562 .loc 1 787 7 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 97 3563 032c 3A68 ldr r2, [r7] 3564 032e 9A42 cmp r2, r3 3565 0330 01D0 beq .L210 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; 3566 .loc 1 789 14 3567 0332 0123 movs r3, #1 3568 0334 76E0 b .L179 3569 .L210: 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 3570 .loc 1 794 25 3571 0336 7B68 ldr r3, [r7, #4] 3572 0338 1B68 ldr r3, [r3] 3573 .loc 1 794 38 3574 033a 03F00403 and r3, r3, #4 3575 .loc 1 794 5 3576 033e 002B cmp r3, #0 3577 0340 25D0 beq .L211 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 3578 .loc 1 796 5 3579 0342 7B68 ldr r3, [r7, #4] 3580 0344 DB68 ldr r3, [r3, #12] 3581 0346 002B cmp r3, #0 3582 0348 18D0 beq .L212 3583 .loc 1 796 5 is_stmt 0 discriminator 1 3584 034a 7B68 ldr r3, [r7, #4] 3585 034c DB68 ldr r3, [r3, #12] 3586 034e B3F5806F cmp r3, #1024 3587 0352 13D0 beq .L212 3588 .loc 1 796 5 discriminator 2 3589 0354 7B68 ldr r3, [r7, #4] 3590 0356 DB68 ldr r3, [r3, #12] 3591 0358 B3F5A06F cmp r3, #1280 3592 035c 0ED0 beq .L212 3593 .loc 1 796 5 discriminator 3 3594 035e 7B68 ldr r3, [r7, #4] 3595 0360 DB68 ldr r3, [r3, #12] 3596 0362 B3F5C06F cmp r3, #1536 3597 0366 09D0 beq .L212 3598 .loc 1 796 5 discriminator 4 3599 0368 7B68 ldr r3, [r7, #4] 3600 036a DB68 ldr r3, [r3, #12] 3601 036c B3F5E06F cmp r3, #1792 3602 0370 04D0 beq .L212 3603 .loc 1 796 5 discriminator 5 3604 0372 4FF44771 mov r1, #796 3605 0376 2F48 ldr r0, .L218+8 3606 0378 FFF7FEFF bl assert_failed 3607 .L212: 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 3608 .loc 1 797 5 is_stmt 1 3609 037c 2B4B ldr r3, .L218 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 98 3610 037e 5B68 ldr r3, [r3, #4] 3611 0380 23F4E062 bic r2, r3, #1792 3612 0384 7B68 ldr r3, [r7, #4] 3613 0386 DB68 ldr r3, [r3, #12] 3614 0388 2849 ldr r1, .L218 3615 038a 1343 orrs r3, r3, r2 3616 038c 4B60 str r3, [r1, #4] 3617 .L211: 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 3618 .loc 1 801 25 3619 038e 7B68 ldr r3, [r7, #4] 3620 0390 1B68 ldr r3, [r3] 3621 .loc 1 801 38 3622 0392 03F00803 and r3, r3, #8 3623 .loc 1 801 5 3624 0396 002B cmp r3, #0 3625 0398 26D0 beq .L213 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 3626 .loc 1 803 5 3627 039a 7B68 ldr r3, [r7, #4] 3628 039c 1B69 ldr r3, [r3, #16] 3629 039e 002B cmp r3, #0 3630 03a0 18D0 beq .L214 3631 .loc 1 803 5 is_stmt 0 discriminator 1 3632 03a2 7B68 ldr r3, [r7, #4] 3633 03a4 1B69 ldr r3, [r3, #16] 3634 03a6 B3F5806F cmp r3, #1024 3635 03aa 13D0 beq .L214 3636 .loc 1 803 5 discriminator 2 3637 03ac 7B68 ldr r3, [r7, #4] 3638 03ae 1B69 ldr r3, [r3, #16] 3639 03b0 B3F5A06F cmp r3, #1280 3640 03b4 0ED0 beq .L214 3641 .loc 1 803 5 discriminator 3 3642 03b6 7B68 ldr r3, [r7, #4] 3643 03b8 1B69 ldr r3, [r3, #16] 3644 03ba B3F5C06F cmp r3, #1536 3645 03be 09D0 beq .L214 3646 .loc 1 803 5 discriminator 4 3647 03c0 7B68 ldr r3, [r7, #4] 3648 03c2 1B69 ldr r3, [r3, #16] 3649 03c4 B3F5E06F cmp r3, #1792 3650 03c8 04D0 beq .L214 3651 .loc 1 803 5 discriminator 5 3652 03ca 40F22331 movw r1, #803 3653 03ce 1948 ldr r0, .L218+8 3654 03d0 FFF7FEFF bl assert_failed 3655 .L214: 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 3656 .loc 1 804 5 is_stmt 1 3657 03d4 154B ldr r3, .L218 3658 03d6 5B68 ldr r3, [r3, #4] 3659 03d8 23F46052 bic r2, r3, #14336 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 99 3660 03dc 7B68 ldr r3, [r7, #4] 3661 03de 1B69 ldr r3, [r3, #16] 3662 03e0 DB00 lsls r3, r3, #3 3663 03e2 1249 ldr r1, .L218 3664 03e4 1343 orrs r3, r3, r2 3665 03e6 4B60 str r3, [r1, #4] 3666 .L213: 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF 3667 .loc 1 808 21 3668 03e8 FFF7FEFF bl HAL_RCC_GetSysClockFreq 3669 03ec 0146 mov r1, r0 3670 .loc 1 808 68 3671 03ee 0F4B ldr r3, .L218 3672 03f0 5B68 ldr r3, [r3, #4] 3673 .loc 1 808 75 3674 03f2 03F0F003 and r3, r3, #240 3675 03f6 F022 movs r2, #240 3676 03f8 3A61 str r2, [r7, #16] 3677 .LBB312: 3678 .LBB313: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3679 .loc 2 988 4 3680 03fa 3A69 ldr r2, [r7, #16] 3681 .syntax unified 3682 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3683 03fc 92FAA2F2 rbit r2, r2 3684 @ 0 "" 2 3685 .thumb 3686 .syntax unified 3687 0400 FA60 str r2, [r7, #12] 3688 .loc 2 1001 10 3689 0402 FA68 ldr r2, [r7, #12] 3690 .LBE313: 3691 .LBE312: 3692 .loc 1 808 94 3693 0404 B2FA82F2 clz r2, r2 3694 0408 D2B2 uxtb r2, r2 3695 .loc 1 808 91 3696 040a D340 lsrs r3, r3, r2 3697 .loc 1 808 63 3698 040c 0A4A ldr r2, .L218+12 3699 040e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 3700 .loc 1 808 47 3701 0410 21FA03F3 lsr r3, r1, r3 3702 .loc 1 808 19 3703 0414 094A ldr r2, .L218+16 3704 0416 1360 str r3, [r2] 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_InitTick (uwTickPrio); 3705 .loc 1 811 3 3706 0418 094B ldr r3, .L218+20 3707 041a 1B68 ldr r3, [r3] 3708 041c 1846 mov r0, r3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 100 3709 041e FFF7FEFF bl HAL_InitTick 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; 3710 .loc 1 813 10 3711 0422 0023 movs r3, #0 3712 .L179: 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3713 .loc 1 814 1 3714 0424 1846 mov r0, r3 3715 0426 7837 adds r7, r7, #120 3716 .LCFI13: 3717 .cfi_def_cfa_offset 8 3718 0428 BD46 mov sp, r7 3719 .LCFI14: 3720 .cfi_def_cfa_register 13 3721 @ sp needed 3722 042a 80BD pop {r7, pc} 3723 .L219: 3724 .align 2 3725 .L218: 3726 042c 00100240 .word 1073876992 3727 0430 00200240 .word 1073881088 3728 0434 00000000 .word .LC0 3729 0438 00000000 .word AHBPrescTable 3730 043c 00000000 .word SystemCoreClock 3731 0440 00000000 .word uwTickPrio 3732 .cfi_endproc 3733 .LFE132: 3735 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 3736 .align 1 3737 .global HAL_RCC_MCOConfig 3738 .syntax unified 3739 .thumb 3740 .thumb_func 3742 HAL_RCC_MCOConfig: 3743 .LFB133: 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC clocks control functions 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Peripheral Control functions ##### 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequencies. 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 101 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3744 .loc 1 887 1 3745 .cfi_startproc 3746 @ args = 0, pretend = 0, frame = 40 3747 @ frame_needed = 1, uses_anonymous_args = 0 3748 0000 80B5 push {r7, lr} ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 102 3749 .LCFI15: 3750 .cfi_def_cfa_offset 8 3751 .cfi_offset 7, -8 3752 .cfi_offset 14, -4 3753 0002 8AB0 sub sp, sp, #40 3754 .LCFI16: 3755 .cfi_def_cfa_offset 48 3756 0004 00AF add r7, sp, #0 3757 .LCFI17: 3758 .cfi_def_cfa_register 7 3759 0006 F860 str r0, [r7, #12] 3760 0008 B960 str r1, [r7, #8] 3761 000a 7A60 str r2, [r7, #4] 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 3762 .loc 1 891 3 3763 000c FB68 ldr r3, [r7, #12] 3764 000e 002B cmp r3, #0 3765 0010 04D0 beq .L221 3766 .loc 1 891 3 is_stmt 0 discriminator 1 3767 0012 40F27B31 movw r1, #891 3768 0016 2A48 ldr r0, .L224 3769 0018 FFF7FEFF bl assert_failed 3770 .L221: 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 3771 .loc 1 892 3 is_stmt 1 3772 001c 7B68 ldr r3, [r7, #4] 3773 001e 002B cmp r3, #0 3774 0020 04D0 beq .L222 3775 .loc 1 892 3 is_stmt 0 discriminator 1 3776 0022 4FF45F71 mov r1, #892 3777 0026 2648 ldr r0, .L224 3778 0028 FFF7FEFF bl assert_failed 3779 .L222: 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 3780 .loc 1 893 3 is_stmt 1 3781 002c BB68 ldr r3, [r7, #8] 3782 002e 002B cmp r3, #0 3783 0030 1CD0 beq .L223 3784 .loc 1 893 3 is_stmt 0 discriminator 1 3785 0032 BB68 ldr r3, [r7, #8] 3786 0034 B3F1007F cmp r3, #33554432 3787 0038 18D0 beq .L223 3788 .loc 1 893 3 discriminator 2 3789 003a BB68 ldr r3, [r7, #8] 3790 003c B3F1407F cmp r3, #50331648 3791 0040 14D0 beq .L223 3792 .loc 1 893 3 discriminator 3 3793 0042 BB68 ldr r3, [r7, #8] 3794 0044 B3F1806F cmp r3, #67108864 3795 0048 10D0 beq .L223 3796 .loc 1 893 3 discriminator 4 3797 004a BB68 ldr r3, [r7, #8] 3798 004c B3F1A06F cmp r3, #83886080 3799 0050 0CD0 beq .L223 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 103 3800 .loc 1 893 3 discriminator 5 3801 0052 BB68 ldr r3, [r7, #8] 3802 0054 B3F1C06F cmp r3, #100663296 3803 0058 08D0 beq .L223 3804 .loc 1 893 3 discriminator 6 3805 005a BB68 ldr r3, [r7, #8] 3806 005c B3F1E06F cmp r3, #117440512 3807 0060 04D0 beq .L223 3808 .loc 1 893 3 discriminator 7 3809 0062 40F27D31 movw r1, #893 3810 0066 1648 ldr r0, .L224 3811 0068 FFF7FEFF bl assert_failed 3812 .L223: 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Prevent unused argument(s) compilation warning */ 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** UNUSED(RCC_MCOx); 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; 3813 .loc 1 899 18 is_stmt 1 3814 006c 0223 movs r3, #2 3815 006e BB61 str r3, [r7, #24] 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; 3816 .loc 1 900 18 3817 0070 0323 movs r3, #3 3818 0072 3B62 str r3, [r7, #32] 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; 3819 .loc 1 901 18 3820 0074 0023 movs r3, #0 3821 0076 FB61 str r3, [r7, #28] 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; 3822 .loc 1 902 18 3823 0078 4FF48073 mov r3, #256 3824 007c 7B61 str r3, [r7, #20] 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; 3825 .loc 1 903 18 3826 007e 0023 movs r3, #0 3827 0080 7B62 str r3, [r7, #36] 3828 .LBB314: 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* MCO1 Clock Enable */ 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MCO1_CLK_ENABLE(); 3829 .loc 1 906 3 3830 0082 104B ldr r3, .L224+4 3831 0084 5B69 ldr r3, [r3, #20] 3832 0086 0F4A ldr r2, .L224+4 3833 0088 43F40033 orr r3, r3, #131072 3834 008c 5361 str r3, [r2, #20] 3835 008e 0D4B ldr r3, .L224+4 3836 0090 5B69 ldr r3, [r3, #20] 3837 0092 03F40033 and r3, r3, #131072 3838 0096 3B61 str r3, [r7, #16] 3839 0098 3B69 ldr r3, [r7, #16] 3840 .LBE314: 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); 3841 .loc 1 908 3 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 104 3842 009a 07F11403 add r3, r7, #20 3843 009e 1946 mov r1, r3 3844 00a0 4FF09040 mov r0, #1207959552 3845 00a4 FFF7FEFF bl HAL_GPIO_Init 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO clock source */ 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); 3846 .loc 1 911 3 3847 00a8 064B ldr r3, .L224+4 3848 00aa 5B68 ldr r3, [r3, #4] 3849 00ac 23F0E062 bic r2, r3, #117440512 3850 00b0 0449 ldr r1, .L224+4 3851 00b2 BB68 ldr r3, [r7, #8] 3852 00b4 1343 orrs r3, r3, r2 3853 00b6 4B60 str r3, [r1, #4] 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3854 .loc 1 912 1 3855 00b8 00BF nop 3856 00ba 2837 adds r7, r7, #40 3857 .LCFI18: 3858 .cfi_def_cfa_offset 8 3859 00bc BD46 mov sp, r7 3860 .LCFI19: 3861 .cfi_def_cfa_register 13 3862 @ sp needed 3863 00be 80BD pop {r7, pc} 3864 .L225: 3865 .align 2 3866 .L224: 3867 00c0 00000000 .word .LC0 3868 00c4 00100240 .word 1073876992 3869 .cfi_endproc 3870 .LFE133: 3872 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 3873 .align 1 3874 .global HAL_RCC_EnableCSS 3875 .syntax unified 3876 .thumb 3877 .thumb_func 3879 HAL_RCC_EnableCSS: 3880 .LFB134: 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Enables the Clock Security System. 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3881 .loc 1 924 1 3882 .cfi_startproc 3883 @ args = 0, pretend = 0, frame = 8 3884 @ frame_needed = 1, uses_anonymous_args = 0 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 105 3885 @ link register save eliminated. 3886 0000 80B4 push {r7} 3887 .LCFI20: 3888 .cfi_def_cfa_offset 4 3889 .cfi_offset 7, -4 3890 0002 83B0 sub sp, sp, #12 3891 .LCFI21: 3892 .cfi_def_cfa_offset 16 3893 0004 00AF add r7, sp, #0 3894 .LCFI22: 3895 .cfi_def_cfa_register 7 3896 0006 4FF40023 mov r3, #524288 3897 000a 7B60 str r3, [r7, #4] 3898 .LBB315: 3899 .LBB316: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3900 .loc 2 988 4 3901 000c 7B68 ldr r3, [r7, #4] 3902 .syntax unified 3903 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3904 000e 93FAA3F3 rbit r3, r3 3905 @ 0 "" 2 3906 .thumb 3907 .syntax unified 3908 0012 3B60 str r3, [r7] 3909 .loc 2 1001 10 3910 0014 3B68 ldr r3, [r7] 3911 .LBE316: 3912 .LBE315: 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; 3913 .loc 1 925 22 3914 0016 B3FA83F3 clz r3, r3 3915 001a DBB2 uxtb r3, r3 3916 001c 03F18453 add r3, r3, #276824064 3917 0020 03F58413 add r3, r3, #1081344 3918 0024 9B00 lsls r3, r3, #2 3919 .loc 1 925 4 3920 0026 1A46 mov r2, r3 3921 .loc 1 925 38 3922 0028 0123 movs r3, #1 3923 002a 1360 str r3, [r2] 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3924 .loc 1 926 1 3925 002c 00BF nop 3926 002e 0C37 adds r7, r7, #12 3927 .LCFI23: 3928 .cfi_def_cfa_offset 4 3929 0030 BD46 mov sp, r7 3930 .LCFI24: 3931 .cfi_def_cfa_register 13 3932 @ sp needed 3933 0032 5DF8047B ldr r7, [sp], #4 3934 .LCFI25: 3935 .cfi_restore 7 3936 .cfi_def_cfa_offset 0 3937 0036 7047 bx lr 3938 .cfi_endproc ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 106 3939 .LFE134: 3941 .section .text.HAL_RCC_DisableCSS,"ax",%progbits 3942 .align 1 3943 .global HAL_RCC_DisableCSS 3944 .syntax unified 3945 .thumb 3946 .thumb_func 3948 HAL_RCC_DisableCSS: 3949 .LFB135: 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Disables the Clock Security System. 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 3950 .loc 1 933 1 3951 .cfi_startproc 3952 @ args = 0, pretend = 0, frame = 8 3953 @ frame_needed = 1, uses_anonymous_args = 0 3954 @ link register save eliminated. 3955 0000 80B4 push {r7} 3956 .LCFI26: 3957 .cfi_def_cfa_offset 4 3958 .cfi_offset 7, -4 3959 0002 83B0 sub sp, sp, #12 3960 .LCFI27: 3961 .cfi_def_cfa_offset 16 3962 0004 00AF add r7, sp, #0 3963 .LCFI28: 3964 .cfi_def_cfa_register 7 3965 0006 4FF40023 mov r3, #524288 3966 000a 7B60 str r3, [r7, #4] 3967 .LBB317: 3968 .LBB318: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3969 .loc 2 988 4 3970 000c 7B68 ldr r3, [r7, #4] 3971 .syntax unified 3972 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3973 000e 93FAA3F3 rbit r3, r3 3974 @ 0 "" 2 3975 .thumb 3976 .syntax unified 3977 0012 3B60 str r3, [r7] 3978 .loc 2 1001 10 3979 0014 3B68 ldr r3, [r7] 3980 .LBE318: 3981 .LBE317: 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; 3982 .loc 1 934 22 3983 0016 B3FA83F3 clz r3, r3 3984 001a DBB2 uxtb r3, r3 3985 001c 03F18453 add r3, r3, #276824064 3986 0020 03F58413 add r3, r3, #1081344 3987 0024 9B00 lsls r3, r3, #2 3988 .loc 1 934 4 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 107 3989 0026 1A46 mov r2, r3 3990 .loc 1 934 38 3991 0028 0023 movs r3, #0 3992 002a 1360 str r3, [r2] 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 3993 .loc 1 935 1 3994 002c 00BF nop 3995 002e 0C37 adds r7, r7, #12 3996 .LCFI29: 3997 .cfi_def_cfa_offset 4 3998 0030 BD46 mov sp, r7 3999 .LCFI30: 4000 .cfi_def_cfa_register 13 4001 @ sp needed 4002 0032 5DF8047B ldr r7, [sp], #4 4003 .LCFI31: 4004 .cfi_restore 7 4005 .cfi_def_cfa_offset 0 4006 0036 7047 bx lr 4007 .cfi_endproc 4008 .LFE135: 4010 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 4011 .align 1 4012 .global HAL_RCC_GetSysClockFreq 4013 .syntax unified 4014 .thumb 4015 .thumb_func 4017 HAL_RCC_GetSysClockFreq: 4018 .LFB136: 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * constant and the selected clock source: 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor. 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * in voltage and temperature. 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * have wrong result. 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * value for HSE crystal. 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 108 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval SYSCLK frequency 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4019 .loc 1 967 1 4020 .cfi_startproc 4021 @ args = 0, pretend = 0, frame = 24 4022 @ frame_needed = 1, uses_anonymous_args = 0 4023 @ link register save eliminated. 4024 0000 80B4 push {r7} 4025 .LCFI32: 4026 .cfi_def_cfa_offset 4 4027 .cfi_offset 7, -4 4028 0002 87B0 sub sp, sp, #28 4029 .LCFI33: 4030 .cfi_def_cfa_offset 32 4031 0004 00AF add r7, sp, #0 4032 .LCFI34: 4033 .cfi_def_cfa_register 7 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 4034 .loc 1 968 12 4035 0006 0023 movs r3, #0 4036 0008 FB60 str r3, [r7, #12] 4037 .loc 1 968 25 4038 000a 0023 movs r3, #0 4039 000c BB60 str r3, [r7, #8] 4040 .loc 1 968 38 4041 000e 0023 movs r3, #0 4042 0010 7B61 str r3, [r7, #20] 4043 .loc 1 968 51 4044 0012 0023 movs r3, #0 4045 0014 7B60 str r3, [r7, #4] 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; 4046 .loc 1 969 12 4047 0016 0023 movs r3, #0 4048 0018 3B61 str r3, [r7, #16] 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tmpreg = RCC->CFGR; 4049 .loc 1 971 15 4050 001a 1E4B ldr r3, .L239 4051 .loc 1 971 10 4052 001c 5B68 ldr r3, [r3, #4] 4053 001e FB60 str r3, [r7, #12] 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) 4054 .loc 1 974 18 4055 0020 FB68 ldr r3, [r7, #12] 4056 0022 03F00C03 and r3, r3, #12 4057 .loc 1 974 3 4058 0026 042B cmp r3, #4 4059 0028 02D0 beq .L231 4060 002a 082B cmp r3, #8 4061 002c 03D0 beq .L232 4062 002e 26E0 b .L238 4063 .L231: 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 109 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; 4064 .loc 1 978 20 4065 0030 194B ldr r3, .L239+4 4066 0032 3B61 str r3, [r7, #16] 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 4067 .loc 1 979 7 4068 0034 26E0 b .L234 4069 .L232: 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; 4070 .loc 1 983 72 4071 0036 FB68 ldr r3, [r7, #12] 4072 0038 9B0C lsrs r3, r3, #18 4073 003a 03F00F03 and r3, r3, #15 4074 .loc 1 983 34 4075 003e 174A ldr r2, .L239+8 4076 0040 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 4077 .loc 1 983 14 4078 0042 7B60 str r3, [r7, #4] 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos 4079 .loc 1 984 49 4080 0044 134B ldr r3, .L239 4081 0046 DB6A ldr r3, [r3, #44] 4082 .loc 1 984 77 4083 0048 03F00F03 and r3, r3, #15 4084 .loc 1 984 34 4085 004c 144A ldr r2, .L239+12 4086 004e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 4087 .loc 1 984 14 4088 0050 BB60 str r3, [r7, #8] 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) 4089 .loc 1 986 19 4090 0052 FB68 ldr r3, [r7, #12] 4091 0054 03F48033 and r3, r3, #65536 4092 .loc 1 986 10 4093 0058 002B cmp r3, #0 4094 005a 08D0 beq .L235 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 4095 .loc 1 989 18 4096 005c 0E4A ldr r2, .L239+4 4097 005e BB68 ldr r3, [r7, #8] 4098 0060 B2FBF3F2 udiv r2, r2, r3 4099 .loc 1 989 16 4100 0064 7B68 ldr r3, [r7, #4] 4101 0066 02FB03F3 mul r3, r2, r3 4102 006a 7B61 str r3, [r7, #20] 4103 006c 04E0 b .L236 4104 .L235: 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 110 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); 4105 .loc 1 994 16 4106 006e 7B68 ldr r3, [r7, #4] 4107 0070 0C4A ldr r2, .L239+16 4108 0072 02FB03F3 mul r3, r2, r3 4109 0076 7B61 str r3, [r7, #20] 4110 .L236: 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC_HSE_PREDIV) == RCC_CFGR_PLLSRC_HSE_PREDIV) 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ 1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ 1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ 1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = pllclk; 4111 .loc 1 1008 20 4112 0078 7B69 ldr r3, [r7, #20] 4113 007a 3B61 str r3, [r7, #16] 1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 4114 .loc 1 1009 7 4115 007c 02E0 b .L234 4116 .L238: 1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ 1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** default: /* HSI used as system clock */ 1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 4117 .loc 1 1014 20 4118 007e 064B ldr r3, .L239+4 4119 0080 3B61 str r3, [r7, #16] 1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; 4120 .loc 1 1015 7 4121 0082 00BF nop 4122 .L234: 1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return sysclockfreq; 4123 .loc 1 1018 10 4124 0084 3B69 ldr r3, [r7, #16] 1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4125 .loc 1 1019 1 4126 0086 1846 mov r0, r3 4127 0088 1C37 adds r7, r7, #28 4128 .LCFI35: 4129 .cfi_def_cfa_offset 4 4130 008a BD46 mov sp, r7 4131 .LCFI36: 4132 .cfi_def_cfa_register 13 4133 @ sp needed ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 111 4134 008c 5DF8047B ldr r7, [sp], #4 4135 .LCFI37: 4136 .cfi_restore 7 4137 .cfi_def_cfa_offset 0 4138 0090 7047 bx lr 4139 .L240: 4140 0092 00BF .align 2 4141 .L239: 4142 0094 00100240 .word 1073876992 4143 0098 00127A00 .word 8000000 4144 009c 00000000 .word aPLLMULFactorTable 4145 00a0 00000000 .word aPredivFactorTable 4146 00a4 00093D00 .word 4000000 4147 .cfi_endproc 4148 .LFE136: 4150 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 4151 .align 1 4152 .global HAL_RCC_GetHCLKFreq 4153 .syntax unified 4154 .thumb 4155 .thumb_func 4157 HAL_RCC_GetHCLKFreq: 4158 .LFB137: 1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the HCLK frequency 1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated within this function 1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HCLK frequency 1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4159 .loc 1 1031 1 4160 .cfi_startproc 4161 @ args = 0, pretend = 0, frame = 0 4162 @ frame_needed = 1, uses_anonymous_args = 0 4163 @ link register save eliminated. 4164 0000 80B4 push {r7} 4165 .LCFI38: 4166 .cfi_def_cfa_offset 4 4167 .cfi_offset 7, -4 4168 0002 00AF add r7, sp, #0 4169 .LCFI39: 4170 .cfi_def_cfa_register 7 1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return SystemCoreClock; 4171 .loc 1 1032 10 4172 0004 034B ldr r3, .L243 4173 0006 1B68 ldr r3, [r3] 1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4174 .loc 1 1033 1 4175 0008 1846 mov r0, r3 4176 000a BD46 mov sp, r7 4177 .LCFI40: 4178 .cfi_def_cfa_register 13 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 112 4179 @ sp needed 4180 000c 5DF8047B ldr r7, [sp], #4 4181 .LCFI41: 4182 .cfi_restore 7 4183 .cfi_def_cfa_offset 0 4184 0010 7047 bx lr 4185 .L244: 4186 0012 00BF .align 2 4187 .L243: 4188 0014 00000000 .word SystemCoreClock 4189 .cfi_endproc 4190 .LFE137: 4192 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 4193 .align 1 4194 .global HAL_RCC_GetPCLK1Freq 4195 .syntax unified 4196 .thumb 4197 .thumb_func 4199 HAL_RCC_GetPCLK1Freq: 4200 .LFB138: 1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency 1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK1 frequency 1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) 1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4201 .loc 1 1042 1 4202 .cfi_startproc 4203 @ args = 0, pretend = 0, frame = 8 4204 @ frame_needed = 1, uses_anonymous_args = 0 4205 0000 80B5 push {r7, lr} 4206 .LCFI42: 4207 .cfi_def_cfa_offset 8 4208 .cfi_offset 7, -8 4209 .cfi_offset 14, -4 4210 0002 82B0 sub sp, sp, #8 4211 .LCFI43: 4212 .cfi_def_cfa_offset 16 4213 0004 00AF add r7, sp, #0 4214 .LCFI44: 4215 .cfi_def_cfa_register 7 1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BIT 4216 .loc 1 1044 11 4217 0006 FFF7FEFF bl HAL_RCC_GetHCLKFreq 4218 000a 0146 mov r1, r0 4219 .loc 1 1044 54 4220 000c 0B4B ldr r3, .L248 4221 000e 5B68 ldr r3, [r3, #4] 4222 .loc 1 1044 61 4223 0010 03F4E063 and r3, r3, #1792 4224 0014 4FF4E062 mov r2, #1792 4225 0018 7A60 str r2, [r7, #4] 4226 .LBB319: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 113 4227 .LBB320: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4228 .loc 2 988 4 4229 001a 7A68 ldr r2, [r7, #4] 4230 .syntax unified 4231 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4232 001c 92FAA2F2 rbit r2, r2 4233 @ 0 "" 2 4234 .thumb 4235 .syntax unified 4236 0020 3A60 str r2, [r7] 4237 .loc 2 1001 10 4238 0022 3A68 ldr r2, [r7] 4239 .LBE320: 4240 .LBE319: 4241 .loc 1 1044 82 4242 0024 B2FA82F2 clz r2, r2 4243 0028 D2B2 uxtb r2, r2 4244 .loc 1 1044 79 4245 002a D340 lsrs r3, r3, r2 4246 .loc 1 1044 49 4247 002c 044A ldr r2, .L248+4 4248 002e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 4249 .loc 1 1044 33 4250 0030 21FA03F3 lsr r3, r1, r3 1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4251 .loc 1 1045 1 4252 0034 1846 mov r0, r3 4253 0036 0837 adds r7, r7, #8 4254 .LCFI45: 4255 .cfi_def_cfa_offset 8 4256 0038 BD46 mov sp, r7 4257 .LCFI46: 4258 .cfi_def_cfa_register 13 4259 @ sp needed 4260 003a 80BD pop {r7, pc} 4261 .L249: 4262 .align 2 4263 .L248: 4264 003c 00100240 .word 1073876992 4265 0040 00000000 .word APBPrescTable 4266 .cfi_endproc 4267 .LFE138: 4269 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 4270 .align 1 4271 .global HAL_RCC_GetPCLK2Freq 4272 .syntax unified 4273 .thumb 4274 .thumb_func 4276 HAL_RCC_GetPCLK2Freq: 4277 .LFB139: 1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK2 frequency ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 114 1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4278 .loc 1 1054 1 4279 .cfi_startproc 4280 @ args = 0, pretend = 0, frame = 8 4281 @ frame_needed = 1, uses_anonymous_args = 0 4282 0000 80B5 push {r7, lr} 4283 .LCFI47: 4284 .cfi_def_cfa_offset 8 4285 .cfi_offset 7, -8 4286 .cfi_offset 14, -4 4287 0002 82B0 sub sp, sp, #8 4288 .LCFI48: 4289 .cfi_def_cfa_offset 16 4290 0004 00AF add r7, sp, #0 4291 .LCFI49: 4292 .cfi_def_cfa_register 7 1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITN 4293 .loc 1 1056 11 4294 0006 FFF7FEFF bl HAL_RCC_GetHCLKFreq 4295 000a 0146 mov r1, r0 4296 .loc 1 1056 53 4297 000c 0B4B ldr r3, .L253 4298 000e 5B68 ldr r3, [r3, #4] 4299 .loc 1 1056 60 4300 0010 03F46053 and r3, r3, #14336 4301 0014 4FF46052 mov r2, #14336 4302 0018 7A60 str r2, [r7, #4] 4303 .LBB321: 4304 .LBB322: 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4305 .loc 2 988 4 4306 001a 7A68 ldr r2, [r7, #4] 4307 .syntax unified 4308 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4309 001c 92FAA2F2 rbit r2, r2 4310 @ 0 "" 2 4311 .thumb 4312 .syntax unified 4313 0020 3A60 str r2, [r7] 4314 .loc 2 1001 10 4315 0022 3A68 ldr r2, [r7] 4316 .LBE322: 4317 .LBE321: 4318 .loc 1 1056 81 4319 0024 B2FA82F2 clz r2, r2 4320 0028 D2B2 uxtb r2, r2 4321 .loc 1 1056 78 4322 002a D340 lsrs r3, r3, r2 4323 .loc 1 1056 48 4324 002c 044A ldr r2, .L253+4 4325 002e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 4326 .loc 1 1056 32 4327 0030 21FA03F3 lsr r3, r1, r3 1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 115 4328 .loc 1 1057 1 4329 0034 1846 mov r0, r3 4330 0036 0837 adds r7, r7, #8 4331 .LCFI50: 4332 .cfi_def_cfa_offset 8 4333 0038 BD46 mov sp, r7 4334 .LCFI51: 4335 .cfi_def_cfa_register 13 4336 @ sp needed 4337 003a 80BD pop {r7, pc} 4338 .L254: 4339 .align 2 4340 .L253: 4341 003c 00100240 .word 1073876992 4342 0040 00000000 .word APBPrescTable 4343 .cfi_endproc 4344 .LFE139: 4346 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 4347 .align 1 4348 .global HAL_RCC_GetOscConfig 4349 .syntax unified 4350 .thumb 4351 .thumb_func 4353 HAL_RCC_GetOscConfig: 4354 .LFB140: 1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal 1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. 1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * will be configured. 1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4355 .loc 1 1067 1 4356 .cfi_startproc 4357 @ args = 0, pretend = 0, frame = 8 4358 @ frame_needed = 1, uses_anonymous_args = 0 4359 0000 80B5 push {r7, lr} 4360 .LCFI52: 4361 .cfi_def_cfa_offset 8 4362 .cfi_offset 7, -8 4363 .cfi_offset 14, -4 4364 0002 82B0 sub sp, sp, #8 4365 .LCFI53: 4366 .cfi_def_cfa_offset 16 4367 0004 00AF add r7, sp, #0 4368 .LCFI54: 4369 .cfi_def_cfa_register 7 4370 0006 7860 str r0, [r7, #4] 1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); 4371 .loc 1 1069 3 4372 0008 7B68 ldr r3, [r7, #4] 4373 000a 002B cmp r3, #0 4374 000c 04D1 bne .L256 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 116 4375 .loc 1 1069 3 is_stmt 0 discriminator 1 4376 000e 40F22D41 movw r1, #1069 4377 0012 3E48 ldr r0, .L269 4378 0014 FFF7FEFF bl assert_failed 4379 .L256: 1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ 4380 .loc 1 1072 37 is_stmt 1 4381 0018 7B68 ldr r3, [r7, #4] 4382 001a 0F22 movs r2, #15 4383 001c 1A60 str r2, [r3] 1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; 1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 4384 .loc 1 1077 10 4385 001e 3C4B ldr r3, .L269+4 4386 0020 1B68 ldr r3, [r3] 4387 .loc 1 1077 15 4388 0022 03F48023 and r3, r3, #262144 4389 .loc 1 1077 5 4390 0026 B3F5802F cmp r3, #262144 4391 002a 04D1 bne .L257 1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 4392 .loc 1 1079 33 4393 002c 7B68 ldr r3, [r7, #4] 4394 002e 4FF4A022 mov r2, #327680 4395 0032 5A60 str r2, [r3, #4] 4396 0034 0EE0 b .L258 4397 .L257: 1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) 4398 .loc 1 1081 15 4399 0036 364B ldr r3, .L269+4 4400 0038 1B68 ldr r3, [r3] 4401 .loc 1 1081 20 4402 003a 03F48033 and r3, r3, #65536 4403 .loc 1 1081 10 4404 003e B3F5803F cmp r3, #65536 4405 0042 04D1 bne .L259 1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 4406 .loc 1 1083 33 4407 0044 7B68 ldr r3, [r7, #4] 4408 0046 4FF48032 mov r2, #65536 4409 004a 5A60 str r2, [r3, #4] 4410 004c 02E0 b .L258 4411 .L259: 1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; 4412 .loc 1 1087 33 4413 004e 7B68 ldr r3, [r7, #4] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 117 4414 0050 0022 movs r2, #0 4415 0052 5A60 str r2, [r3, #4] 4416 .L258: 1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) 1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV(); 4417 .loc 1 1090 39 4418 0054 2E4B ldr r3, .L269+4 4419 0056 DB6A ldr r3, [r3, #44] 4420 0058 03F00F02 and r2, r3, #15 4421 .loc 1 1090 37 4422 005c 7B68 ldr r3, [r7, #4] 4423 005e 9A60 str r2, [r3, #8] 1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif 1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) 4424 .loc 1 1094 10 4425 0060 2B4B ldr r3, .L269+4 4426 0062 1B68 ldr r3, [r3] 4427 .loc 1 1094 15 4428 0064 03F00103 and r3, r3, #1 4429 .loc 1 1094 5 4430 0068 012B cmp r3, #1 4431 006a 03D1 bne .L260 1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 4432 .loc 1 1096 33 4433 006c 7B68 ldr r3, [r7, #4] 4434 006e 0122 movs r2, #1 4435 0070 1A61 str r2, [r3, #16] 4436 0072 02E0 b .L261 4437 .L260: 1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 4438 .loc 1 1100 33 4439 0074 7B68 ldr r3, [r7, #4] 4440 0076 0022 movs r2, #0 4441 0078 1A61 str r2, [r3, #16] 4442 .L261: 1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_ 4443 .loc 1 1103 59 4444 007a 254B ldr r3, .L269+4 4445 007c 1B68 ldr r3, [r3] 4446 .loc 1 1103 44 4447 007e DB08 lsrs r3, r3, #3 4448 0080 03F01F02 and r2, r3, #31 4449 .loc 1 1103 42 4450 0084 7B68 ldr r3, [r7, #4] 4451 0086 5A61 str r2, [r3, #20] 1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 118 4452 .loc 1 1106 10 4453 0088 214B ldr r3, .L269+4 4454 008a 1B6A ldr r3, [r3, #32] 4455 .loc 1 1106 17 4456 008c 03F00403 and r3, r3, #4 4457 .loc 1 1106 5 4458 0090 042B cmp r3, #4 4459 0092 03D1 bne .L262 1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 4460 .loc 1 1108 33 4461 0094 7B68 ldr r3, [r7, #4] 4462 0096 0522 movs r2, #5 4463 0098 DA60 str r2, [r3, #12] 4464 009a 0CE0 b .L263 4465 .L262: 1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 4466 .loc 1 1110 15 4467 009c 1C4B ldr r3, .L269+4 4468 009e 1B6A ldr r3, [r3, #32] 4469 .loc 1 1110 22 4470 00a0 03F00103 and r3, r3, #1 4471 .loc 1 1110 10 4472 00a4 012B cmp r3, #1 4473 00a6 03D1 bne .L264 1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 4474 .loc 1 1112 33 4475 00a8 7B68 ldr r3, [r7, #4] 4476 00aa 0122 movs r2, #1 4477 00ac DA60 str r2, [r3, #12] 4478 00ae 02E0 b .L263 4479 .L264: 1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 4480 .loc 1 1116 33 4481 00b0 7B68 ldr r3, [r7, #4] 4482 00b2 0022 movs r2, #0 4483 00b4 DA60 str r2, [r3, #12] 4484 .L263: 1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ 1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) 4485 .loc 1 1120 10 4486 00b6 164B ldr r3, .L269+4 4487 00b8 5B6A ldr r3, [r3, #36] 4488 .loc 1 1120 16 4489 00ba 03F00103 and r3, r3, #1 4490 .loc 1 1120 5 4491 00be 012B cmp r3, #1 4492 00c0 03D1 bne .L265 1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 119 4493 .loc 1 1122 33 4494 00c2 7B68 ldr r3, [r7, #4] 4495 00c4 0122 movs r2, #1 4496 00c6 9A61 str r2, [r3, #24] 4497 00c8 02E0 b .L266 4498 .L265: 1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 4499 .loc 1 1126 33 4500 00ca 7B68 ldr r3, [r7, #4] 4501 00cc 0022 movs r2, #0 4502 00ce 9A61 str r2, [r3, #24] 4503 .L266: 1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) 4504 .loc 1 1131 10 4505 00d0 0F4B ldr r3, .L269+4 4506 00d2 1B68 ldr r3, [r3] 4507 .loc 1 1131 15 4508 00d4 03F08073 and r3, r3, #16777216 4509 .loc 1 1131 5 4510 00d8 B3F1807F cmp r3, #16777216 4511 00dc 03D1 bne .L267 1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 4512 .loc 1 1133 37 4513 00de 7B68 ldr r3, [r7, #4] 4514 00e0 0222 movs r2, #2 4515 00e2 DA61 str r2, [r3, #28] 4516 00e4 02E0 b .L268 4517 .L267: 1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else 1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 4518 .loc 1 1137 37 4519 00e6 7B68 ldr r3, [r7, #4] 4520 00e8 0122 movs r2, #1 4521 00ea DA61 str r2, [r3, #28] 4522 .L268: 1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); 4523 .loc 1 1139 52 4524 00ec 084B ldr r3, .L269+4 4525 00ee 5B68 ldr r3, [r3, #4] 4526 .loc 1 1139 38 4527 00f0 03F48032 and r2, r3, #65536 4528 .loc 1 1139 36 4529 00f4 7B68 ldr r3, [r7, #4] 4530 00f6 1A62 str r2, [r3, #32] 1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); 4531 .loc 1 1140 49 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 120 4532 00f8 054B ldr r3, .L269+4 4533 00fa 5B68 ldr r3, [r3, #4] 4534 .loc 1 1140 35 4535 00fc 03F47012 and r2, r3, #3932160 4536 .loc 1 1140 33 4537 0100 7B68 ldr r3, [r7, #4] 4538 0102 5A62 str r2, [r3, #36] 1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) 1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); 1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ 1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4539 .loc 1 1144 1 4540 0104 00BF nop 4541 0106 0837 adds r7, r7, #8 4542 .LCFI55: 4543 .cfi_def_cfa_offset 8 4544 0108 BD46 mov sp, r7 4545 .LCFI56: 4546 .cfi_def_cfa_register 13 4547 @ sp needed 4548 010a 80BD pop {r7, pc} 4549 .L270: 4550 .align 2 4551 .L269: 4552 010c 00000000 .word .LC0 4553 0110 00100240 .word 1073876992 4554 .cfi_endproc 4555 .LFE140: 4557 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 4558 .align 1 4559 .global HAL_RCC_GetClockConfig 4560 .syntax unified 4561 .thumb 4562 .thumb_func 4564 HAL_RCC_GetClockConfig: 4565 .LFB141: 1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal 1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. 1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the current clock configuration. 1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4566 .loc 1 1155 1 4567 .cfi_startproc 4568 @ args = 0, pretend = 0, frame = 8 4569 @ frame_needed = 1, uses_anonymous_args = 0 4570 0000 80B5 push {r7, lr} 4571 .LCFI57: 4572 .cfi_def_cfa_offset 8 4573 .cfi_offset 7, -8 4574 .cfi_offset 14, -4 4575 0002 82B0 sub sp, sp, #8 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 121 4576 .LCFI58: 4577 .cfi_def_cfa_offset 16 4578 0004 00AF add r7, sp, #0 4579 .LCFI59: 4580 .cfi_def_cfa_register 7 4581 0006 7860 str r0, [r7, #4] 4582 0008 3960 str r1, [r7] 1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ 1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); 4583 .loc 1 1157 3 4584 000a 7B68 ldr r3, [r7, #4] 4585 000c 002B cmp r3, #0 4586 000e 04D1 bne .L272 4587 .loc 1 1157 3 is_stmt 0 discriminator 1 4588 0010 40F28541 movw r1, #1157 4589 0014 1848 ldr r0, .L274 4590 0016 FFF7FEFF bl assert_failed 4591 .L272: 1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); 4592 .loc 1 1158 3 is_stmt 1 4593 001a 3B68 ldr r3, [r7] 4594 001c 002B cmp r3, #0 4595 001e 04D1 bne .L273 4596 .loc 1 1158 3 is_stmt 0 discriminator 1 4597 0020 40F28641 movw r1, #1158 4598 0024 1448 ldr r0, .L274 4599 0026 FFF7FEFF bl assert_failed 4600 .L273: 1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ 1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 4601 .loc 1 1161 32 is_stmt 1 4602 002a 7B68 ldr r3, [r7, #4] 4603 002c 0F22 movs r2, #15 4604 002e 1A60 str r2, [r3] 1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 4605 .loc 1 1164 51 4606 0030 124B ldr r3, .L274+4 4607 0032 5B68 ldr r3, [r3, #4] 4608 .loc 1 1164 37 4609 0034 03F00302 and r2, r3, #3 4610 .loc 1 1164 35 4611 0038 7B68 ldr r3, [r7, #4] 4612 003a 5A60 str r2, [r3, #4] 1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 4613 .loc 1 1167 52 4614 003c 0F4B ldr r3, .L274+4 4615 003e 5B68 ldr r3, [r3, #4] 4616 .loc 1 1167 38 4617 0040 03F0F002 and r2, r3, #240 4618 .loc 1 1167 36 4619 0044 7B68 ldr r3, [r7, #4] 4620 0046 9A60 str r2, [r3, #8] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 122 1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 4621 .loc 1 1170 53 4622 0048 0C4B ldr r3, .L274+4 4623 004a 5B68 ldr r3, [r3, #4] 4624 .loc 1 1170 39 4625 004c 03F4E062 and r2, r3, #1792 4626 .loc 1 1170 37 4627 0050 7B68 ldr r3, [r7, #4] 4628 0052 DA60 str r2, [r3, #12] 1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); 4629 .loc 1 1173 54 4630 0054 094B ldr r3, .L274+4 4631 0056 5B68 ldr r3, [r3, #4] 4632 .loc 1 1173 39 4633 0058 DB08 lsrs r3, r3, #3 4634 005a 03F4E062 and r2, r3, #1792 4635 .loc 1 1173 37 4636 005e 7B68 ldr r3, [r7, #4] 4637 0060 1A61 str r2, [r3, #16] 1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 4638 .loc 1 1176 32 4639 0062 074B ldr r3, .L274+8 4640 0064 1B68 ldr r3, [r3] 4641 .loc 1 1176 16 4642 0066 03F00702 and r2, r3, #7 4643 .loc 1 1176 14 4644 006a 3B68 ldr r3, [r7] 4645 006c 1A60 str r2, [r3] 1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4646 .loc 1 1177 1 4647 006e 00BF nop 4648 0070 0837 adds r7, r7, #8 4649 .LCFI60: 4650 .cfi_def_cfa_offset 8 4651 0072 BD46 mov sp, r7 4652 .LCFI61: 4653 .cfi_def_cfa_register 13 4654 @ sp needed 4655 0074 80BD pop {r7, pc} 4656 .L275: 4657 0076 00BF .align 2 4658 .L274: 4659 0078 00000000 .word .LC0 4660 007c 00100240 .word 1073876992 4661 0080 00200240 .word 1073881088 4662 .cfi_endproc 4663 .LFE141: 4665 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 4666 .align 1 4667 .global HAL_RCC_NMI_IRQHandler 4668 .syntax unified ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 123 4669 .thumb 4670 .thumb_func 4672 HAL_RCC_NMI_IRQHandler: 4673 .LFB142: 1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. 1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None 1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4674 .loc 1 1185 1 4675 .cfi_startproc 4676 @ args = 0, pretend = 0, frame = 0 4677 @ frame_needed = 1, uses_anonymous_args = 0 4678 0000 80B5 push {r7, lr} 4679 .LCFI62: 4680 .cfi_def_cfa_offset 8 4681 .cfi_offset 7, -8 4682 .cfi_offset 14, -4 4683 0002 00AF add r7, sp, #0 4684 .LCFI63: 4685 .cfi_def_cfa_register 7 1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) 4686 .loc 1 1187 6 4687 0004 064B ldr r3, .L279 4688 0006 9B68 ldr r3, [r3, #8] 4689 0008 03F08003 and r3, r3, #128 4690 .loc 1 1187 5 4691 000c 802B cmp r3, #128 4692 000e 04D1 bne .L278 1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 4693 .loc 1 1190 5 4694 0010 FFF7FEFF bl HAL_RCC_CSSCallback 1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 4695 .loc 1 1193 5 4696 0014 034B ldr r3, .L279+4 4697 0016 8022 movs r2, #128 4698 0018 1A70 strb r2, [r3] 4699 .L278: 1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4700 .loc 1 1195 1 4701 001a 00BF nop 4702 001c 80BD pop {r7, pc} 4703 .L280: 4704 001e 00BF .align 2 4705 .L279: 4706 0020 00100240 .word 1073876992 4707 0024 0A100240 .word 1073877002 4708 .cfi_endproc ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 124 4709 .LFE142: 4711 .section .text.HAL_RCC_CSSCallback,"ax",%progbits 4712 .align 1 4713 .weak HAL_RCC_CSSCallback 4714 .syntax unified 4715 .thumb 4716 .thumb_func 4718 HAL_RCC_CSSCallback: 4719 .LFB143: 1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** 1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback 1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval none 1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { 4720 .loc 1 1202 1 4721 .cfi_startproc 4722 @ args = 0, pretend = 0, frame = 0 4723 @ frame_needed = 1, uses_anonymous_args = 0 4724 @ link register save eliminated. 4725 0000 80B4 push {r7} 4726 .LCFI64: 4727 .cfi_def_cfa_offset 4 4728 .cfi_offset 7, -4 4729 0002 00AF add r7, sp, #0 4730 .LCFI65: 4731 .cfi_def_cfa_register 7 1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, 1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file 1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ 1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } 4732 .loc 1 1206 1 4733 0004 00BF nop 4734 0006 BD46 mov sp, r7 4735 .LCFI66: 4736 .cfi_def_cfa_register 13 4737 @ sp needed 4738 0008 5DF8047B ldr r7, [sp], #4 4739 .LCFI67: 4740 .cfi_restore 7 4741 .cfi_def_cfa_offset 0 4742 000c 7047 bx lr 4743 .cfi_endproc 4744 .LFE143: 4746 .text 4747 .Letext0: 4748 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 4749 .file 4 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 4750 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" 4751 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 4752 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 4753 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 4754 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 4755 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 4756 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 125 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_rcc.c C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:20 .rodata.aPLLMULFactorTable:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:23 .rodata.aPLLMULFactorTable:00000000 aPLLMULFactorTable C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:27 .rodata.aPredivFactorTable:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:30 .rodata.aPredivFactorTable:00000000 aPredivFactorTable C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:34 .text.HAL_RCC_DeInit:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:40 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:256 .text.HAL_RCC_DeInit:00000130 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:266 .rodata:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:271 .text.HAL_RCC_OscConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:277 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:766 .text.HAL_RCC_OscConfig:00000374 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:769 .text.HAL_RCC_OscConfig:0000037c $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:1266 .text.HAL_RCC_OscConfig:000006a8 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:1269 .text.HAL_RCC_OscConfig:000006b0 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:1599 .text.HAL_RCC_OscConfig:000008e0 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:1603 .text.HAL_RCC_OscConfig:000008ec $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2053 .text.HAL_RCC_OscConfig:00000c3c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2057 .text.HAL_RCC_OscConfig:00000c48 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2463 .text.HAL_RCC_OscConfig:00000f9c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2466 .text.HAL_RCC_OscConfig:00000fa4 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2930 .text.HAL_RCC_OscConfig:00001318 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2933 .text.HAL_RCC_OscConfig:0000131c $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2980 .text.HAL_RCC_OscConfig:00001364 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2985 .text.HAL_RCC_ClockConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:2991 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3496 .text.HAL_RCC_ClockConfig:000002b8 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3501 .text.HAL_RCC_ClockConfig:000002c4 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4017 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3726 .text.HAL_RCC_ClockConfig:0000042c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3736 .text.HAL_RCC_MCOConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3742 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3867 .text.HAL_RCC_MCOConfig:000000c0 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3873 .text.HAL_RCC_EnableCSS:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3879 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3942 .text.HAL_RCC_DisableCSS:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:3948 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4011 .text.HAL_RCC_GetSysClockFreq:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4142 .text.HAL_RCC_GetSysClockFreq:00000094 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4151 .text.HAL_RCC_GetHCLKFreq:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4157 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4188 .text.HAL_RCC_GetHCLKFreq:00000014 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4193 .text.HAL_RCC_GetPCLK1Freq:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4199 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4264 .text.HAL_RCC_GetPCLK1Freq:0000003c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4270 .text.HAL_RCC_GetPCLK2Freq:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4276 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4341 .text.HAL_RCC_GetPCLK2Freq:0000003c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4347 .text.HAL_RCC_GetOscConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4353 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4552 .text.HAL_RCC_GetOscConfig:0000010c $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4558 .text.HAL_RCC_GetClockConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4564 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4659 .text.HAL_RCC_GetClockConfig:00000078 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4666 .text.HAL_RCC_NMI_IRQHandler:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4672 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler ARM GAS C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s page 126 C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4718 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4706 .text.HAL_RCC_NMI_IRQHandler:00000020 $d C:\Users\zl835\AppData\Local\Temp\ccW0HLUt.s:4712 .text.HAL_RCC_CSSCallback:00000000 $t UNDEFINED SYMBOLS HAL_GetTick HAL_InitTick SystemCoreClock uwTickPrio assert_failed AHBPrescTable HAL_GPIO_Init APBPrescTable