stm32f1xx_hal_pcd.h 37 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010
  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F1xx_HAL_PCD_H
  21. #define STM32F1xx_HAL_PCD_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f1xx_ll_usb.h"
  27. #if defined (USB) || defined (USB_OTG_FS)
  28. /** @addtogroup STM32F1xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PCD
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup PCD_Exported_Types PCD Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief PCD State structure definition
  40. */
  41. typedef enum
  42. {
  43. HAL_PCD_STATE_RESET = 0x00,
  44. HAL_PCD_STATE_READY = 0x01,
  45. HAL_PCD_STATE_ERROR = 0x02,
  46. HAL_PCD_STATE_BUSY = 0x03,
  47. HAL_PCD_STATE_TIMEOUT = 0x04
  48. } PCD_StateTypeDef;
  49. /* Device LPM suspend state */
  50. typedef enum
  51. {
  52. LPM_L0 = 0x00, /* on */
  53. LPM_L1 = 0x01, /* LPM L1 sleep */
  54. LPM_L2 = 0x02, /* suspend */
  55. LPM_L3 = 0x03, /* off */
  56. } PCD_LPM_StateTypeDef;
  57. typedef enum
  58. {
  59. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  60. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  61. } PCD_LPM_MsgTypeDef;
  62. typedef enum
  63. {
  64. PCD_BCD_ERROR = 0xFF,
  65. PCD_BCD_CONTACT_DETECTION = 0xFE,
  66. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  67. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  68. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  69. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  70. } PCD_BCD_MsgTypeDef;
  71. #if defined (USB)
  72. #endif /* defined (USB) */
  73. #if defined (USB_OTG_FS)
  74. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  75. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  76. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  77. #endif /* defined (USB_OTG_FS) */
  78. #if defined (USB)
  79. typedef USB_TypeDef PCD_TypeDef;
  80. typedef USB_CfgTypeDef PCD_InitTypeDef;
  81. typedef USB_EPTypeDef PCD_EPTypeDef;
  82. #endif /* defined (USB) */
  83. /**
  84. * @brief PCD Handle Structure definition
  85. */
  86. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  87. typedef struct __PCD_HandleTypeDef
  88. #else
  89. typedef struct
  90. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  91. {
  92. PCD_TypeDef *Instance; /*!< Register base address */
  93. PCD_InitTypeDef Init; /*!< PCD required parameters */
  94. __IO uint8_t USB_Address; /*!< USB Address */
  95. #if defined (USB_OTG_FS)
  96. PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
  97. PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
  98. #endif /* defined (USB_OTG_FS) */
  99. #if defined (USB)
  100. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  101. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  102. #endif /* defined (USB) */
  103. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  104. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  105. __IO uint32_t ErrorCode; /*!< PCD Error code */
  106. uint32_t Setup[12]; /*!< Setup packet buffer */
  107. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  108. uint32_t BESL;
  109. void *pData; /*!< Pointer to upper stack Handler */
  110. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  111. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  112. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  113. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  114. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  115. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  116. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  117. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  118. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  119. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  120. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  121. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  122. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  123. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  124. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  125. } PCD_HandleTypeDef;
  126. /**
  127. * @}
  128. */
  129. /* Include PCD HAL Extended module */
  130. #include "stm32f1xx_hal_pcd_ex.h"
  131. /* Exported constants --------------------------------------------------------*/
  132. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  133. * @{
  134. */
  135. /** @defgroup PCD_Speed PCD Speed
  136. * @{
  137. */
  138. #define PCD_SPEED_FULL USBD_FS_SPEED
  139. /**
  140. * @}
  141. */
  142. /** @defgroup PCD_PHY_Module PCD PHY Module
  143. * @{
  144. */
  145. #define PCD_PHY_ULPI 1U
  146. #define PCD_PHY_EMBEDDED 2U
  147. #define PCD_PHY_UTMI 3U
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  152. * @brief PCD Error Code definition
  153. * @{
  154. */
  155. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  156. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  157. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  158. /**
  159. * @}
  160. */
  161. /**
  162. * @}
  163. */
  164. /* Exported macros -----------------------------------------------------------*/
  165. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  166. * @brief macros to handle interrupts and specific clock configurations
  167. * @{
  168. */
  169. #if defined (USB_OTG_FS)
  170. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  172. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  173. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  174. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  175. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  176. ~(USB_OTG_PCGCCTL_STOPCLK)
  177. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  178. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  179. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  180. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  181. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  182. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  183. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  184. do { \
  185. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  186. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  187. } while(0U)
  188. #endif /* defined (USB_OTG_FS) */
  189. #if defined (USB)
  190. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  191. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  192. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  193. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  194. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  195. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  196. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  197. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  198. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  199. do { \
  200. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  201. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  202. } while(0U)
  203. #endif /* defined (USB) */
  204. /**
  205. * @}
  206. */
  207. /* Exported functions --------------------------------------------------------*/
  208. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  209. * @{
  210. */
  211. /* Initialization/de-initialization functions ********************************/
  212. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  213. * @{
  214. */
  215. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  216. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  217. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  218. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  219. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  220. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  221. * @brief HAL USB OTG PCD Callback ID enumeration definition
  222. * @{
  223. */
  224. typedef enum
  225. {
  226. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  227. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  228. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  229. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  230. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  231. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  232. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  233. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  234. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  235. } HAL_PCD_CallbackIDTypeDef;
  236. /**
  237. * @}
  238. */
  239. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  240. * @brief HAL USB OTG PCD Callback pointer definition
  241. * @{
  242. */
  243. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  244. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  245. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  246. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  247. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  248. /**
  249. * @}
  250. */
  251. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  252. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  253. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  254. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  255. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  256. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  257. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  258. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  259. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  260. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  261. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  262. /**
  263. * @}
  264. */
  265. /* I/O operation functions ***************************************************/
  266. /* Non-Blocking mode: Interrupt */
  267. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  268. * @{
  269. */
  270. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  271. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  272. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  273. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  274. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  275. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  276. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  277. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  278. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  279. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  280. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  281. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  282. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  283. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  284. /**
  285. * @}
  286. */
  287. /* Peripheral Control functions **********************************************/
  288. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  289. * @{
  290. */
  291. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  292. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  293. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  294. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  295. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  296. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  297. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  298. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  299. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  300. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  301. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  302. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  303. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  304. /**
  305. * @}
  306. */
  307. /* Peripheral State functions ************************************************/
  308. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  309. * @{
  310. */
  311. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  312. /**
  313. * @}
  314. */
  315. /**
  316. * @}
  317. */
  318. /* Private constants ---------------------------------------------------------*/
  319. /** @defgroup PCD_Private_Constants PCD Private Constants
  320. * @{
  321. */
  322. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  323. * @{
  324. */
  325. #if defined (USB_OTG_FS)
  326. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
  327. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
  328. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
  329. #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  330. #endif /* defined (USB_OTG_FS) */
  331. #if defined (USB)
  332. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  333. #endif /* defined (USB) */
  334. /**
  335. * @}
  336. */
  337. #if defined (USB)
  338. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  339. * @{
  340. */
  341. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  342. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  343. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  344. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  345. /**
  346. * @}
  347. */
  348. /** @defgroup PCD_ENDP PCD ENDP
  349. * @{
  350. */
  351. #define PCD_ENDP0 0U
  352. #define PCD_ENDP1 1U
  353. #define PCD_ENDP2 2U
  354. #define PCD_ENDP3 3U
  355. #define PCD_ENDP4 4U
  356. #define PCD_ENDP5 5U
  357. #define PCD_ENDP6 6U
  358. #define PCD_ENDP7 7U
  359. /**
  360. * @}
  361. */
  362. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  363. * @{
  364. */
  365. #define PCD_SNG_BUF 0U
  366. #define PCD_DBL_BUF 1U
  367. /**
  368. * @}
  369. */
  370. #endif /* defined (USB) */
  371. /**
  372. * @}
  373. */
  374. #if defined (USB_OTG_FS)
  375. #ifndef USB_OTG_DOEPINT_OTEPSPR
  376. #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */
  377. #endif
  378. #ifndef USB_OTG_DOEPMSK_OTEPSPRM
  379. #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */
  380. #endif
  381. #ifndef USB_OTG_DOEPINT_NAK
  382. #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */
  383. #endif
  384. #ifndef USB_OTG_DOEPMSK_NAKM
  385. #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */
  386. #endif
  387. #ifndef USB_OTG_DOEPINT_STPKTRX
  388. #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */
  389. #endif
  390. #ifndef USB_OTG_DOEPMSK_NYETM
  391. #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */
  392. #endif
  393. #endif /* defined (USB_OTG_FS) */
  394. /* Private macros ------------------------------------------------------------*/
  395. /** @defgroup PCD_Private_Macros PCD Private Macros
  396. * @{
  397. */
  398. #if defined (USB)
  399. /******************** Bit definition for USB_COUNTn_RX register *************/
  400. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  401. #define USB_CNTRX_BLSIZE (0x1U << 15)
  402. /* SetENDPOINT */
  403. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  404. /* GetENDPOINT */
  405. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  406. /* ENDPOINT transfer */
  407. #define USB_EP0StartXfer USB_EPStartXfer
  408. /**
  409. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  410. * @param USBx USB peripheral instance register address.
  411. * @param bEpNum Endpoint Number.
  412. * @param wType Endpoint Type.
  413. * @retval None
  414. */
  415. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  416. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  417. /**
  418. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  419. * @param USBx USB peripheral instance register address.
  420. * @param bEpNum Endpoint Number.
  421. * @retval Endpoint Type
  422. */
  423. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  424. /**
  425. * @brief free buffer used from the application realizing it to the line
  426. * toggles bit SW_BUF in the double buffered endpoint register
  427. * @param USBx USB device.
  428. * @param bEpNum, bDir
  429. * @retval None
  430. */
  431. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  432. if ((bDir) == 0U) \
  433. { \
  434. /* OUT double buffered endpoint */ \
  435. PCD_TX_DTOG((USBx), (bEpNum)); \
  436. } \
  437. else if ((bDir) == 1U) \
  438. { \
  439. /* IN double buffered endpoint */ \
  440. PCD_RX_DTOG((USBx), (bEpNum)); \
  441. } \
  442. } while(0)
  443. /**
  444. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  445. * @param USBx USB peripheral instance register address.
  446. * @param bEpNum Endpoint Number.
  447. * @param wState new state
  448. * @retval None
  449. */
  450. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  451. register uint16_t _wRegVal; \
  452. \
  453. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  454. /* toggle first bit ? */ \
  455. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  456. { \
  457. _wRegVal ^= USB_EPTX_DTOG1; \
  458. } \
  459. /* toggle second bit ? */ \
  460. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  461. { \
  462. _wRegVal ^= USB_EPTX_DTOG2; \
  463. } \
  464. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  465. } while(0) /* PCD_SET_EP_TX_STATUS */
  466. /**
  467. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  468. * @param USBx USB peripheral instance register address.
  469. * @param bEpNum Endpoint Number.
  470. * @param wState new state
  471. * @retval None
  472. */
  473. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  474. register uint16_t _wRegVal; \
  475. \
  476. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  477. /* toggle first bit ? */ \
  478. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  479. { \
  480. _wRegVal ^= USB_EPRX_DTOG1; \
  481. } \
  482. /* toggle second bit ? */ \
  483. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  484. { \
  485. _wRegVal ^= USB_EPRX_DTOG2; \
  486. } \
  487. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  488. } while(0) /* PCD_SET_EP_RX_STATUS */
  489. /**
  490. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  491. * @param USBx USB peripheral instance register address.
  492. * @param bEpNum Endpoint Number.
  493. * @param wStaterx new state.
  494. * @param wStatetx new state.
  495. * @retval None
  496. */
  497. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  498. register uint16_t _wRegVal; \
  499. \
  500. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  501. /* toggle first bit ? */ \
  502. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  503. { \
  504. _wRegVal ^= USB_EPRX_DTOG1; \
  505. } \
  506. /* toggle second bit ? */ \
  507. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  508. { \
  509. _wRegVal ^= USB_EPRX_DTOG2; \
  510. } \
  511. /* toggle first bit ? */ \
  512. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  513. { \
  514. _wRegVal ^= USB_EPTX_DTOG1; \
  515. } \
  516. /* toggle second bit ? */ \
  517. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  518. { \
  519. _wRegVal ^= USB_EPTX_DTOG2; \
  520. } \
  521. \
  522. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  523. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  524. /**
  525. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  526. * /STAT_RX[1:0])
  527. * @param USBx USB peripheral instance register address.
  528. * @param bEpNum Endpoint Number.
  529. * @retval status
  530. */
  531. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  532. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  533. /**
  534. * @brief sets directly the VALID tx/rx-status into the endpoint register
  535. * @param USBx USB peripheral instance register address.
  536. * @param bEpNum Endpoint Number.
  537. * @retval None
  538. */
  539. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  540. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  541. /**
  542. * @brief checks stall condition in an endpoint.
  543. * @param USBx USB peripheral instance register address.
  544. * @param bEpNum Endpoint Number.
  545. * @retval TRUE = endpoint in stall condition.
  546. */
  547. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  548. == USB_EP_TX_STALL)
  549. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  550. == USB_EP_RX_STALL)
  551. /**
  552. * @brief set & clear EP_KIND bit.
  553. * @param USBx USB peripheral instance register address.
  554. * @param bEpNum Endpoint Number.
  555. * @retval None
  556. */
  557. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  558. register uint16_t _wRegVal; \
  559. \
  560. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  561. \
  562. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  563. } while(0) /* PCD_SET_EP_KIND */
  564. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  565. register uint16_t _wRegVal; \
  566. \
  567. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  568. \
  569. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  570. } while(0) /* PCD_CLEAR_EP_KIND */
  571. /**
  572. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  573. * @param USBx USB peripheral instance register address.
  574. * @param bEpNum Endpoint Number.
  575. * @retval None
  576. */
  577. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  578. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  579. /**
  580. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  581. * @param USBx USB peripheral instance register address.
  582. * @param bEpNum Endpoint Number.
  583. * @retval None
  584. */
  585. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  586. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  587. /**
  588. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  589. * @param USBx USB peripheral instance register address.
  590. * @param bEpNum Endpoint Number.
  591. * @retval None
  592. */
  593. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  594. register uint16_t _wRegVal; \
  595. \
  596. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  597. \
  598. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  599. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  600. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  601. register uint16_t _wRegVal; \
  602. \
  603. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  604. \
  605. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  606. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  607. /**
  608. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  609. * @param USBx USB peripheral instance register address.
  610. * @param bEpNum Endpoint Number.
  611. * @retval None
  612. */
  613. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  614. register uint16_t _wEPVal; \
  615. \
  616. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  617. \
  618. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  619. } while(0) /* PCD_RX_DTOG */
  620. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  621. register uint16_t _wEPVal; \
  622. \
  623. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  624. \
  625. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  626. } while(0) /* PCD_TX_DTOG */
  627. /**
  628. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  629. * @param USBx USB peripheral instance register address.
  630. * @param bEpNum Endpoint Number.
  631. * @retval None
  632. */
  633. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  634. register uint16_t _wRegVal; \
  635. \
  636. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  637. \
  638. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  639. { \
  640. PCD_RX_DTOG((USBx), (bEpNum)); \
  641. } \
  642. } while(0) /* PCD_CLEAR_RX_DTOG */
  643. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  644. register uint16_t _wRegVal; \
  645. \
  646. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  647. \
  648. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  649. { \
  650. PCD_TX_DTOG((USBx), (bEpNum)); \
  651. } \
  652. } while(0) /* PCD_CLEAR_TX_DTOG */
  653. /**
  654. * @brief Sets address in an endpoint register.
  655. * @param USBx USB peripheral instance register address.
  656. * @param bEpNum Endpoint Number.
  657. * @param bAddr Address.
  658. * @retval None
  659. */
  660. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  661. register uint16_t _wRegVal; \
  662. \
  663. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  664. \
  665. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  666. } while(0) /* PCD_SET_EP_ADDRESS */
  667. /**
  668. * @brief Gets address in an endpoint register.
  669. * @param USBx USB peripheral instance register address.
  670. * @param bEpNum Endpoint Number.
  671. * @retval None
  672. */
  673. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  674. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  675. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  676. /**
  677. * @brief sets address of the tx/rx buffer.
  678. * @param USBx USB peripheral instance register address.
  679. * @param bEpNum Endpoint Number.
  680. * @param wAddr address to be set (must be word aligned).
  681. * @retval None
  682. */
  683. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  684. register __IO uint16_t *_wRegVal; \
  685. register uint32_t _wRegBase = (uint32_t)USBx; \
  686. \
  687. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  688. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  689. *_wRegVal = ((wAddr) >> 1) << 1; \
  690. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  691. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  692. register __IO uint16_t *_wRegVal; \
  693. register uint32_t _wRegBase = (uint32_t)USBx; \
  694. \
  695. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  696. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  697. *_wRegVal = ((wAddr) >> 1) << 1; \
  698. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  699. /**
  700. * @brief Gets address of the tx/rx buffer.
  701. * @param USBx USB peripheral instance register address.
  702. * @param bEpNum Endpoint Number.
  703. * @retval address of the buffer.
  704. */
  705. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  706. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  707. /**
  708. * @brief Sets counter of rx buffer with no. of blocks.
  709. * @param pdwReg Register pointer
  710. * @param wCount Counter.
  711. * @param wNBlocks no. of Blocks.
  712. * @retval None
  713. */
  714. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  715. (wNBlocks) = (wCount) >> 5; \
  716. if (((wCount) & 0x1fU) == 0U) \
  717. { \
  718. (wNBlocks)--; \
  719. } \
  720. *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  721. } while(0) /* PCD_CALC_BLK32 */
  722. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  723. (wNBlocks) = (wCount) >> 1; \
  724. if (((wCount) & 0x1U) != 0U) \
  725. { \
  726. (wNBlocks)++; \
  727. } \
  728. *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  729. } while(0) /* PCD_CALC_BLK2 */
  730. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
  731. uint32_t wNBlocks; \
  732. if ((wCount) == 0U) \
  733. { \
  734. *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  735. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  736. } \
  737. else if((wCount) <= 62U) \
  738. { \
  739. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  740. } \
  741. else \
  742. { \
  743. PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
  744. } \
  745. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  746. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  747. register uint32_t _wRegBase = (uint32_t)(USBx); \
  748. register __IO uint16_t *pdwReg; \
  749. \
  750. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  751. pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  752. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  753. } while(0)
  754. /**
  755. * @brief sets counter for the tx/rx buffer.
  756. * @param USBx USB peripheral instance register address.
  757. * @param bEpNum Endpoint Number.
  758. * @param wCount Counter value.
  759. * @retval None
  760. */
  761. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  762. register uint32_t _wRegBase = (uint32_t)(USBx); \
  763. register __IO uint16_t *_wRegVal; \
  764. \
  765. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  766. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  767. *_wRegVal = (uint16_t)(wCount); \
  768. } while(0)
  769. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  770. register uint32_t _wRegBase = (uint32_t)(USBx); \
  771. register __IO uint16_t *_wRegVal; \
  772. \
  773. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  774. _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  775. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  776. } while(0)
  777. /**
  778. * @brief gets counter of the tx buffer.
  779. * @param USBx USB peripheral instance register address.
  780. * @param bEpNum Endpoint Number.
  781. * @retval Counter value
  782. */
  783. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  784. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  785. /**
  786. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  787. * @param USBx USB peripheral instance register address.
  788. * @param bEpNum Endpoint Number.
  789. * @param wBuf0Addr buffer 0 address.
  790. * @retval Counter value
  791. */
  792. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  793. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  794. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  795. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  796. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  797. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  798. /**
  799. * @brief Sets addresses in a double buffer endpoint.
  800. * @param USBx USB peripheral instance register address.
  801. * @param bEpNum Endpoint Number.
  802. * @param wBuf0Addr: buffer 0 address.
  803. * @param wBuf1Addr = buffer 1 address.
  804. * @retval None
  805. */
  806. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  807. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  808. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  809. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  810. /**
  811. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  812. * @param USBx USB peripheral instance register address.
  813. * @param bEpNum Endpoint Number.
  814. * @retval None
  815. */
  816. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  817. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  818. /**
  819. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  820. * @param USBx USB peripheral instance register address.
  821. * @param bEpNum Endpoint Number.
  822. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  823. * EP_DBUF_IN = IN
  824. * @param wCount: Counter value
  825. * @retval None
  826. */
  827. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  828. if ((bDir) == 0U) \
  829. /* OUT endpoint */ \
  830. { \
  831. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  832. } \
  833. else \
  834. { \
  835. if ((bDir) == 1U) \
  836. { \
  837. /* IN endpoint */ \
  838. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  839. } \
  840. } \
  841. } while(0) /* SetEPDblBuf0Count*/
  842. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  843. register uint32_t _wBase = (uint32_t)(USBx); \
  844. __IO uint16_t *_wEPRegVal; \
  845. \
  846. if ((bDir) == 0U) \
  847. { \
  848. /* OUT endpoint */ \
  849. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  850. } \
  851. else \
  852. { \
  853. if ((bDir) == 1U) \
  854. { \
  855. /* IN endpoint */ \
  856. _wBase += (uint32_t)(USBx)->BTABLE; \
  857. _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  858. *_wEPRegVal = (uint16_t)(wCount); \
  859. } \
  860. } \
  861. } while(0) /* SetEPDblBuf1Count */
  862. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  863. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  864. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  865. } while(0) /* PCD_SET_EP_DBUF_CNT */
  866. /**
  867. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  868. * @param USBx USB peripheral instance register address.
  869. * @param bEpNum Endpoint Number.
  870. * @retval None
  871. */
  872. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  873. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  874. #endif /* defined (USB) */
  875. /**
  876. * @}
  877. */
  878. /**
  879. * @}
  880. */
  881. /**
  882. * @}
  883. */
  884. #endif /* defined (USB) || defined (USB_OTG_FS) */
  885. #ifdef __cplusplus
  886. }
  887. #endif
  888. #endif /* STM32F1xx_HAL_PCD_H */
  889. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/