stm32f4xx_it.lst 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986
  1. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 6
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "stm32f4xx_it.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .section .text.NMI_Handler,"ax",%progbits
  21. 20 .align 1
  22. 21 .global NMI_Handler
  23. 22 .syntax unified
  24. 23 .thumb
  25. 24 .thumb_func
  26. 26 NMI_Handler:
  27. 27 .LFB238:
  28. 28 .file 1 "Core/Src/stm32f4xx_it.c"
  29. 1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
  30. 2:Core/Src/stm32f4xx_it.c **** /**
  31. 3:Core/Src/stm32f4xx_it.c **** ******************************************************************************
  32. 4:Core/Src/stm32f4xx_it.c **** * @file stm32f4xx_it.c
  33. 5:Core/Src/stm32f4xx_it.c **** * @brief Interrupt Service Routines.
  34. 6:Core/Src/stm32f4xx_it.c **** ******************************************************************************
  35. 7:Core/Src/stm32f4xx_it.c **** * @attention
  36. 8:Core/Src/stm32f4xx_it.c **** *
  37. 9:Core/Src/stm32f4xx_it.c **** * Copyright (c) 2024 STMicroelectronics.
  38. 10:Core/Src/stm32f4xx_it.c **** * All rights reserved.
  39. 11:Core/Src/stm32f4xx_it.c **** *
  40. 12:Core/Src/stm32f4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
  41. 13:Core/Src/stm32f4xx_it.c **** * in the root directory of this software component.
  42. 14:Core/Src/stm32f4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
  43. 15:Core/Src/stm32f4xx_it.c **** *
  44. 16:Core/Src/stm32f4xx_it.c **** ******************************************************************************
  45. 17:Core/Src/stm32f4xx_it.c **** */
  46. 18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */
  47. 19:Core/Src/stm32f4xx_it.c ****
  48. 20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
  49. 21:Core/Src/stm32f4xx_it.c **** #include "main.h"
  50. 22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
  51. 23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
  52. 24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
  53. 25:Core/Src/stm32f4xx_it.c **** #include "soft_uart.h"
  54. 26:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */
  55. 27:Core/Src/stm32f4xx_it.c ****
  56. 28:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
  57. 29:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
  58. 30:Core/Src/stm32f4xx_it.c ****
  59. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 2
  60. 31:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */
  61. 32:Core/Src/stm32f4xx_it.c ****
  62. 33:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
  63. 34:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
  64. 35:Core/Src/stm32f4xx_it.c ****
  65. 36:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */
  66. 37:Core/Src/stm32f4xx_it.c ****
  67. 38:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
  68. 39:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
  69. 40:Core/Src/stm32f4xx_it.c ****
  70. 41:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */
  71. 42:Core/Src/stm32f4xx_it.c ****
  72. 43:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
  73. 44:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
  74. 45:Core/Src/stm32f4xx_it.c ****
  75. 46:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */
  76. 47:Core/Src/stm32f4xx_it.c ****
  77. 48:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
  78. 49:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
  79. 50:Core/Src/stm32f4xx_it.c ****
  80. 51:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */
  81. 52:Core/Src/stm32f4xx_it.c ****
  82. 53:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
  83. 54:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
  84. 55:Core/Src/stm32f4xx_it.c ****
  85. 56:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */
  86. 57:Core/Src/stm32f4xx_it.c ****
  87. 58:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
  88. 59:Core/Src/stm32f4xx_it.c **** extern ADC_HandleTypeDef hadc1;
  89. 60:Core/Src/stm32f4xx_it.c **** extern CAN_HandleTypeDef hcan1;
  90. 61:Core/Src/stm32f4xx_it.c **** extern CAN_HandleTypeDef hcan2;
  91. 62:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_rx;
  92. 63:Core/Src/stm32f4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  93. 64:Core/Src/stm32f4xx_it.c **** extern UART_HandleTypeDef huart1;
  94. 65:Core/Src/stm32f4xx_it.c **** extern TIM_HandleTypeDef htim9;
  95. 66:Core/Src/stm32f4xx_it.c ****
  96. 67:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
  97. 68:Core/Src/stm32f4xx_it.c ****
  98. 69:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */
  99. 70:Core/Src/stm32f4xx_it.c ****
  100. 71:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
  101. 72:Core/Src/stm32f4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
  102. 73:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
  103. 74:Core/Src/stm32f4xx_it.c **** /**
  104. 75:Core/Src/stm32f4xx_it.c **** * @brief This function handles Non maskable interrupt.
  105. 76:Core/Src/stm32f4xx_it.c **** */
  106. 77:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void)
  107. 78:Core/Src/stm32f4xx_it.c **** {
  108. 29 .loc 1 78 1
  109. 30 .cfi_startproc
  110. 31 @ args = 0, pretend = 0, frame = 0
  111. 32 @ frame_needed = 1, uses_anonymous_args = 0
  112. 33 @ link register save eliminated.
  113. 34 0000 80B4 push {r7}
  114. 35 .LCFI0:
  115. 36 .cfi_def_cfa_offset 4
  116. 37 .cfi_offset 7, -4
  117. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 3
  118. 38 0002 00AF add r7, sp, #0
  119. 39 .LCFI1:
  120. 40 .cfi_def_cfa_register 7
  121. 41 .L2:
  122. 79:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  123. 80:Core/Src/stm32f4xx_it.c ****
  124. 81:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
  125. 82:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  126. 83:Core/Src/stm32f4xx_it.c **** while (1)
  127. 42 .loc 1 83 9 discriminator 1
  128. 43 0004 FEE7 b .L2
  129. 44 .cfi_endproc
  130. 45 .LFE238:
  131. 47 .section .text.MemManage_Handler,"ax",%progbits
  132. 48 .align 1
  133. 49 .global MemManage_Handler
  134. 50 .syntax unified
  135. 51 .thumb
  136. 52 .thumb_func
  137. 54 MemManage_Handler:
  138. 55 .LFB239:
  139. 84:Core/Src/stm32f4xx_it.c **** {
  140. 85:Core/Src/stm32f4xx_it.c **** }
  141. 86:Core/Src/stm32f4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
  142. 87:Core/Src/stm32f4xx_it.c **** }
  143. 88:Core/Src/stm32f4xx_it.c ****
  144. 89:Core/Src/stm32f4xx_it.c **** /**
  145. 90:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault.
  146. 91:Core/Src/stm32f4xx_it.c **** */
  147. 92:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void)
  148. 93:Core/Src/stm32f4xx_it.c **** {
  149. 56 .loc 1 93 1
  150. 57 .cfi_startproc
  151. 58 @ args = 0, pretend = 0, frame = 0
  152. 59 @ frame_needed = 1, uses_anonymous_args = 0
  153. 60 @ link register save eliminated.
  154. 61 0000 80B4 push {r7}
  155. 62 .LCFI2:
  156. 63 .cfi_def_cfa_offset 4
  157. 64 .cfi_offset 7, -4
  158. 65 0002 00AF add r7, sp, #0
  159. 66 .LCFI3:
  160. 67 .cfi_def_cfa_register 7
  161. 68 .L4:
  162. 94:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  163. 95:Core/Src/stm32f4xx_it.c ****
  164. 96:Core/Src/stm32f4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
  165. 97:Core/Src/stm32f4xx_it.c **** while (1)
  166. 69 .loc 1 97 9 discriminator 1
  167. 70 0004 FEE7 b .L4
  168. 71 .cfi_endproc
  169. 72 .LFE239:
  170. 74 .section .text.BusFault_Handler,"ax",%progbits
  171. 75 .align 1
  172. 76 .global BusFault_Handler
  173. 77 .syntax unified
  174. 78 .thumb
  175. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 4
  176. 79 .thumb_func
  177. 81 BusFault_Handler:
  178. 82 .LFB240:
  179. 98:Core/Src/stm32f4xx_it.c **** {
  180. 99:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  181. 100:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
  182. 101:Core/Src/stm32f4xx_it.c **** }
  183. 102:Core/Src/stm32f4xx_it.c **** }
  184. 103:Core/Src/stm32f4xx_it.c ****
  185. 104:Core/Src/stm32f4xx_it.c **** /**
  186. 105:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
  187. 106:Core/Src/stm32f4xx_it.c **** */
  188. 107:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void)
  189. 108:Core/Src/stm32f4xx_it.c **** {
  190. 83 .loc 1 108 1
  191. 84 .cfi_startproc
  192. 85 @ args = 0, pretend = 0, frame = 0
  193. 86 @ frame_needed = 1, uses_anonymous_args = 0
  194. 87 @ link register save eliminated.
  195. 88 0000 80B4 push {r7}
  196. 89 .LCFI4:
  197. 90 .cfi_def_cfa_offset 4
  198. 91 .cfi_offset 7, -4
  199. 92 0002 00AF add r7, sp, #0
  200. 93 .LCFI5:
  201. 94 .cfi_def_cfa_register 7
  202. 95 .L6:
  203. 109:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
  204. 110:Core/Src/stm32f4xx_it.c ****
  205. 111:Core/Src/stm32f4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
  206. 112:Core/Src/stm32f4xx_it.c **** while (1)
  207. 96 .loc 1 112 9 discriminator 1
  208. 97 0004 FEE7 b .L6
  209. 98 .cfi_endproc
  210. 99 .LFE240:
  211. 101 .section .text.UsageFault_Handler,"ax",%progbits
  212. 102 .align 1
  213. 103 .global UsageFault_Handler
  214. 104 .syntax unified
  215. 105 .thumb
  216. 106 .thumb_func
  217. 108 UsageFault_Handler:
  218. 109 .LFB241:
  219. 113:Core/Src/stm32f4xx_it.c **** {
  220. 114:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  221. 115:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
  222. 116:Core/Src/stm32f4xx_it.c **** }
  223. 117:Core/Src/stm32f4xx_it.c **** }
  224. 118:Core/Src/stm32f4xx_it.c ****
  225. 119:Core/Src/stm32f4xx_it.c **** /**
  226. 120:Core/Src/stm32f4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
  227. 121:Core/Src/stm32f4xx_it.c **** */
  228. 122:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
  229. 123:Core/Src/stm32f4xx_it.c **** {
  230. 110 .loc 1 123 1
  231. 111 .cfi_startproc
  232. 112 @ args = 0, pretend = 0, frame = 0
  233. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 5
  234. 113 @ frame_needed = 1, uses_anonymous_args = 0
  235. 114 @ link register save eliminated.
  236. 115 0000 80B4 push {r7}
  237. 116 .LCFI6:
  238. 117 .cfi_def_cfa_offset 4
  239. 118 .cfi_offset 7, -4
  240. 119 0002 00AF add r7, sp, #0
  241. 120 .LCFI7:
  242. 121 .cfi_def_cfa_register 7
  243. 122 .L8:
  244. 124:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
  245. 125:Core/Src/stm32f4xx_it.c ****
  246. 126:Core/Src/stm32f4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
  247. 127:Core/Src/stm32f4xx_it.c **** while (1)
  248. 123 .loc 1 127 9 discriminator 1
  249. 124 0004 FEE7 b .L8
  250. 125 .cfi_endproc
  251. 126 .LFE241:
  252. 128 .section .text.SVC_Handler,"ax",%progbits
  253. 129 .align 1
  254. 130 .global SVC_Handler
  255. 131 .syntax unified
  256. 132 .thumb
  257. 133 .thumb_func
  258. 135 SVC_Handler:
  259. 136 .LFB242:
  260. 128:Core/Src/stm32f4xx_it.c **** {
  261. 129:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  262. 130:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
  263. 131:Core/Src/stm32f4xx_it.c **** }
  264. 132:Core/Src/stm32f4xx_it.c **** }
  265. 133:Core/Src/stm32f4xx_it.c ****
  266. 134:Core/Src/stm32f4xx_it.c **** /**
  267. 135:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction.
  268. 136:Core/Src/stm32f4xx_it.c **** */
  269. 137:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void)
  270. 138:Core/Src/stm32f4xx_it.c **** {
  271. 137 .loc 1 138 1
  272. 138 .cfi_startproc
  273. 139 @ args = 0, pretend = 0, frame = 0
  274. 140 @ frame_needed = 1, uses_anonymous_args = 0
  275. 141 @ link register save eliminated.
  276. 142 0000 80B4 push {r7}
  277. 143 .LCFI8:
  278. 144 .cfi_def_cfa_offset 4
  279. 145 .cfi_offset 7, -4
  280. 146 0002 00AF add r7, sp, #0
  281. 147 .LCFI9:
  282. 148 .cfi_def_cfa_register 7
  283. 139:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
  284. 140:Core/Src/stm32f4xx_it.c ****
  285. 141:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
  286. 142:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
  287. 143:Core/Src/stm32f4xx_it.c ****
  288. 144:Core/Src/stm32f4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
  289. 145:Core/Src/stm32f4xx_it.c **** }
  290. 149 .loc 1 145 1
  291. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 6
  292. 150 0004 00BF nop
  293. 151 0006 BD46 mov sp, r7
  294. 152 .LCFI10:
  295. 153 .cfi_def_cfa_register 13
  296. 154 @ sp needed
  297. 155 0008 5DF8047B ldr r7, [sp], #4
  298. 156 .LCFI11:
  299. 157 .cfi_restore 7
  300. 158 .cfi_def_cfa_offset 0
  301. 159 000c 7047 bx lr
  302. 160 .cfi_endproc
  303. 161 .LFE242:
  304. 163 .section .text.DebugMon_Handler,"ax",%progbits
  305. 164 .align 1
  306. 165 .global DebugMon_Handler
  307. 166 .syntax unified
  308. 167 .thumb
  309. 168 .thumb_func
  310. 170 DebugMon_Handler:
  311. 171 .LFB243:
  312. 146:Core/Src/stm32f4xx_it.c ****
  313. 147:Core/Src/stm32f4xx_it.c **** /**
  314. 148:Core/Src/stm32f4xx_it.c **** * @brief This function handles Debug monitor.
  315. 149:Core/Src/stm32f4xx_it.c **** */
  316. 150:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
  317. 151:Core/Src/stm32f4xx_it.c **** {
  318. 172 .loc 1 151 1
  319. 173 .cfi_startproc
  320. 174 @ args = 0, pretend = 0, frame = 0
  321. 175 @ frame_needed = 1, uses_anonymous_args = 0
  322. 176 @ link register save eliminated.
  323. 177 0000 80B4 push {r7}
  324. 178 .LCFI12:
  325. 179 .cfi_def_cfa_offset 4
  326. 180 .cfi_offset 7, -4
  327. 181 0002 00AF add r7, sp, #0
  328. 182 .LCFI13:
  329. 183 .cfi_def_cfa_register 7
  330. 152:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  331. 153:Core/Src/stm32f4xx_it.c ****
  332. 154:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
  333. 155:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  334. 156:Core/Src/stm32f4xx_it.c ****
  335. 157:Core/Src/stm32f4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
  336. 158:Core/Src/stm32f4xx_it.c **** }
  337. 184 .loc 1 158 1
  338. 185 0004 00BF nop
  339. 186 0006 BD46 mov sp, r7
  340. 187 .LCFI14:
  341. 188 .cfi_def_cfa_register 13
  342. 189 @ sp needed
  343. 190 0008 5DF8047B ldr r7, [sp], #4
  344. 191 .LCFI15:
  345. 192 .cfi_restore 7
  346. 193 .cfi_def_cfa_offset 0
  347. 194 000c 7047 bx lr
  348. 195 .cfi_endproc
  349. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 7
  350. 196 .LFE243:
  351. 198 .section .text.PendSV_Handler,"ax",%progbits
  352. 199 .align 1
  353. 200 .global PendSV_Handler
  354. 201 .syntax unified
  355. 202 .thumb
  356. 203 .thumb_func
  357. 205 PendSV_Handler:
  358. 206 .LFB244:
  359. 159:Core/Src/stm32f4xx_it.c ****
  360. 160:Core/Src/stm32f4xx_it.c **** /**
  361. 161:Core/Src/stm32f4xx_it.c **** * @brief This function handles Pendable request for system service.
  362. 162:Core/Src/stm32f4xx_it.c **** */
  363. 163:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void)
  364. 164:Core/Src/stm32f4xx_it.c **** {
  365. 207 .loc 1 164 1
  366. 208 .cfi_startproc
  367. 209 @ args = 0, pretend = 0, frame = 0
  368. 210 @ frame_needed = 1, uses_anonymous_args = 0
  369. 211 @ link register save eliminated.
  370. 212 0000 80B4 push {r7}
  371. 213 .LCFI16:
  372. 214 .cfi_def_cfa_offset 4
  373. 215 .cfi_offset 7, -4
  374. 216 0002 00AF add r7, sp, #0
  375. 217 .LCFI17:
  376. 218 .cfi_def_cfa_register 7
  377. 165:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
  378. 166:Core/Src/stm32f4xx_it.c ****
  379. 167:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
  380. 168:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
  381. 169:Core/Src/stm32f4xx_it.c ****
  382. 170:Core/Src/stm32f4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
  383. 171:Core/Src/stm32f4xx_it.c **** }
  384. 219 .loc 1 171 1
  385. 220 0004 00BF nop
  386. 221 0006 BD46 mov sp, r7
  387. 222 .LCFI18:
  388. 223 .cfi_def_cfa_register 13
  389. 224 @ sp needed
  390. 225 0008 5DF8047B ldr r7, [sp], #4
  391. 226 .LCFI19:
  392. 227 .cfi_restore 7
  393. 228 .cfi_def_cfa_offset 0
  394. 229 000c 7047 bx lr
  395. 230 .cfi_endproc
  396. 231 .LFE244:
  397. 233 .section .text.SysTick_Handler,"ax",%progbits
  398. 234 .align 1
  399. 235 .global SysTick_Handler
  400. 236 .syntax unified
  401. 237 .thumb
  402. 238 .thumb_func
  403. 240 SysTick_Handler:
  404. 241 .LFB245:
  405. 172:Core/Src/stm32f4xx_it.c ****
  406. 173:Core/Src/stm32f4xx_it.c **** /**
  407. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 8
  408. 174:Core/Src/stm32f4xx_it.c **** * @brief This function handles System tick timer.
  409. 175:Core/Src/stm32f4xx_it.c **** */
  410. 176:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void)
  411. 177:Core/Src/stm32f4xx_it.c **** {
  412. 242 .loc 1 177 1
  413. 243 .cfi_startproc
  414. 244 @ args = 0, pretend = 0, frame = 0
  415. 245 @ frame_needed = 1, uses_anonymous_args = 0
  416. 246 @ link register save eliminated.
  417. 247 0000 80B4 push {r7}
  418. 248 .LCFI20:
  419. 249 .cfi_def_cfa_offset 4
  420. 250 .cfi_offset 7, -4
  421. 251 0002 00AF add r7, sp, #0
  422. 252 .LCFI21:
  423. 253 .cfi_def_cfa_register 7
  424. 178:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
  425. 179:Core/Src/stm32f4xx_it.c ****
  426. 180:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
  427. 181:Core/Src/stm32f4xx_it.c ****
  428. 182:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
  429. 183:Core/Src/stm32f4xx_it.c ****
  430. 184:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
  431. 185:Core/Src/stm32f4xx_it.c **** }
  432. 254 .loc 1 185 1
  433. 255 0004 00BF nop
  434. 256 0006 BD46 mov sp, r7
  435. 257 .LCFI22:
  436. 258 .cfi_def_cfa_register 13
  437. 259 @ sp needed
  438. 260 0008 5DF8047B ldr r7, [sp], #4
  439. 261 .LCFI23:
  440. 262 .cfi_restore 7
  441. 263 .cfi_def_cfa_offset 0
  442. 264 000c 7047 bx lr
  443. 265 .cfi_endproc
  444. 266 .LFE245:
  445. 268 .section .text.ADC_IRQHandler,"ax",%progbits
  446. 269 .align 1
  447. 270 .global ADC_IRQHandler
  448. 271 .syntax unified
  449. 272 .thumb
  450. 273 .thumb_func
  451. 275 ADC_IRQHandler:
  452. 276 .LFB246:
  453. 186:Core/Src/stm32f4xx_it.c ****
  454. 187:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
  455. 188:Core/Src/stm32f4xx_it.c **** /* STM32F4xx Peripheral Interrupt Handlers */
  456. 189:Core/Src/stm32f4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
  457. 190:Core/Src/stm32f4xx_it.c **** /* For the available peripheral interrupt handler names, */
  458. 191:Core/Src/stm32f4xx_it.c **** /* please refer to the startup file (startup_stm32f4xx.s). */
  459. 192:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
  460. 193:Core/Src/stm32f4xx_it.c ****
  461. 194:Core/Src/stm32f4xx_it.c **** /**
  462. 195:Core/Src/stm32f4xx_it.c **** * @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
  463. 196:Core/Src/stm32f4xx_it.c **** */
  464. 197:Core/Src/stm32f4xx_it.c **** void ADC_IRQHandler(void)
  465. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 9
  466. 198:Core/Src/stm32f4xx_it.c **** {
  467. 277 .loc 1 198 1
  468. 278 .cfi_startproc
  469. 279 @ args = 0, pretend = 0, frame = 0
  470. 280 @ frame_needed = 1, uses_anonymous_args = 0
  471. 281 0000 80B5 push {r7, lr}
  472. 282 .LCFI24:
  473. 283 .cfi_def_cfa_offset 8
  474. 284 .cfi_offset 7, -8
  475. 285 .cfi_offset 14, -4
  476. 286 0002 00AF add r7, sp, #0
  477. 287 .LCFI25:
  478. 288 .cfi_def_cfa_register 7
  479. 199:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN ADC_IRQn 0 */
  480. 200:Core/Src/stm32f4xx_it.c ****
  481. 201:Core/Src/stm32f4xx_it.c **** /* USER CODE END ADC_IRQn 0 */
  482. 202:Core/Src/stm32f4xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
  483. 289 .loc 1 202 3
  484. 290 0004 0248 ldr r0, .L14
  485. 291 0006 FFF7FEFF bl HAL_ADC_IRQHandler
  486. 203:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN ADC_IRQn 1 */
  487. 204:Core/Src/stm32f4xx_it.c ****
  488. 205:Core/Src/stm32f4xx_it.c **** /* USER CODE END ADC_IRQn 1 */
  489. 206:Core/Src/stm32f4xx_it.c **** }
  490. 292 .loc 1 206 1
  491. 293 000a 00BF nop
  492. 294 000c 80BD pop {r7, pc}
  493. 295 .L15:
  494. 296 000e 00BF .align 2
  495. 297 .L14:
  496. 298 0010 00000000 .word hadc1
  497. 299 .cfi_endproc
  498. 300 .LFE246:
  499. 302 .section .text.CAN1_RX0_IRQHandler,"ax",%progbits
  500. 303 .align 1
  501. 304 .global CAN1_RX0_IRQHandler
  502. 305 .syntax unified
  503. 306 .thumb
  504. 307 .thumb_func
  505. 309 CAN1_RX0_IRQHandler:
  506. 310 .LFB247:
  507. 207:Core/Src/stm32f4xx_it.c ****
  508. 208:Core/Src/stm32f4xx_it.c **** /**
  509. 209:Core/Src/stm32f4xx_it.c **** * @brief This function handles CAN1 RX0 interrupts.
  510. 210:Core/Src/stm32f4xx_it.c **** */
  511. 211:Core/Src/stm32f4xx_it.c **** void CAN1_RX0_IRQHandler(void)
  512. 212:Core/Src/stm32f4xx_it.c **** {
  513. 311 .loc 1 212 1
  514. 312 .cfi_startproc
  515. 313 @ args = 0, pretend = 0, frame = 0
  516. 314 @ frame_needed = 1, uses_anonymous_args = 0
  517. 315 0000 80B5 push {r7, lr}
  518. 316 .LCFI26:
  519. 317 .cfi_def_cfa_offset 8
  520. 318 .cfi_offset 7, -8
  521. 319 .cfi_offset 14, -4
  522. 320 0002 00AF add r7, sp, #0
  523. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 10
  524. 321 .LCFI27:
  525. 322 .cfi_def_cfa_register 7
  526. 213:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN1_RX0_IRQn 0 */
  527. 214:Core/Src/stm32f4xx_it.c ****
  528. 215:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN1_RX0_IRQn 0 */
  529. 216:Core/Src/stm32f4xx_it.c **** HAL_CAN_IRQHandler(&hcan1);
  530. 323 .loc 1 216 3
  531. 324 0004 0248 ldr r0, .L17
  532. 325 0006 FFF7FEFF bl HAL_CAN_IRQHandler
  533. 217:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN1_RX0_IRQn 1 */
  534. 218:Core/Src/stm32f4xx_it.c ****
  535. 219:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN1_RX0_IRQn 1 */
  536. 220:Core/Src/stm32f4xx_it.c **** }
  537. 326 .loc 1 220 1
  538. 327 000a 00BF nop
  539. 328 000c 80BD pop {r7, pc}
  540. 329 .L18:
  541. 330 000e 00BF .align 2
  542. 331 .L17:
  543. 332 0010 00000000 .word hcan1
  544. 333 .cfi_endproc
  545. 334 .LFE247:
  546. 336 .section .text.CAN1_SCE_IRQHandler,"ax",%progbits
  547. 337 .align 1
  548. 338 .global CAN1_SCE_IRQHandler
  549. 339 .syntax unified
  550. 340 .thumb
  551. 341 .thumb_func
  552. 343 CAN1_SCE_IRQHandler:
  553. 344 .LFB248:
  554. 221:Core/Src/stm32f4xx_it.c ****
  555. 222:Core/Src/stm32f4xx_it.c **** /**
  556. 223:Core/Src/stm32f4xx_it.c **** * @brief This function handles CAN1 SCE interrupt.
  557. 224:Core/Src/stm32f4xx_it.c **** */
  558. 225:Core/Src/stm32f4xx_it.c **** void CAN1_SCE_IRQHandler(void)
  559. 226:Core/Src/stm32f4xx_it.c **** {
  560. 345 .loc 1 226 1
  561. 346 .cfi_startproc
  562. 347 @ args = 0, pretend = 0, frame = 0
  563. 348 @ frame_needed = 1, uses_anonymous_args = 0
  564. 349 0000 80B5 push {r7, lr}
  565. 350 .LCFI28:
  566. 351 .cfi_def_cfa_offset 8
  567. 352 .cfi_offset 7, -8
  568. 353 .cfi_offset 14, -4
  569. 354 0002 00AF add r7, sp, #0
  570. 355 .LCFI29:
  571. 356 .cfi_def_cfa_register 7
  572. 227:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN1_SCE_IRQn 0 */
  573. 228:Core/Src/stm32f4xx_it.c ****
  574. 229:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN1_SCE_IRQn 0 */
  575. 230:Core/Src/stm32f4xx_it.c **** HAL_CAN_IRQHandler(&hcan1);
  576. 357 .loc 1 230 3
  577. 358 0004 0248 ldr r0, .L20
  578. 359 0006 FFF7FEFF bl HAL_CAN_IRQHandler
  579. 231:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN1_SCE_IRQn 1 */
  580. 232:Core/Src/stm32f4xx_it.c ****
  581. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 11
  582. 233:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN1_SCE_IRQn 1 */
  583. 234:Core/Src/stm32f4xx_it.c **** }
  584. 360 .loc 1 234 1
  585. 361 000a 00BF nop
  586. 362 000c 80BD pop {r7, pc}
  587. 363 .L21:
  588. 364 000e 00BF .align 2
  589. 365 .L20:
  590. 366 0010 00000000 .word hcan1
  591. 367 .cfi_endproc
  592. 368 .LFE248:
  593. 370 .section .text.TIM1_BRK_TIM9_IRQHandler,"ax",%progbits
  594. 371 .align 1
  595. 372 .global TIM1_BRK_TIM9_IRQHandler
  596. 373 .syntax unified
  597. 374 .thumb
  598. 375 .thumb_func
  599. 377 TIM1_BRK_TIM9_IRQHandler:
  600. 378 .LFB249:
  601. 235:Core/Src/stm32f4xx_it.c ****
  602. 236:Core/Src/stm32f4xx_it.c **** /**
  603. 237:Core/Src/stm32f4xx_it.c **** * @brief This function handles TIM1 break interrupt and TIM9 global interrupt.
  604. 238:Core/Src/stm32f4xx_it.c **** */
  605. 239:Core/Src/stm32f4xx_it.c **** void TIM1_BRK_TIM9_IRQHandler(void)
  606. 240:Core/Src/stm32f4xx_it.c **** {
  607. 379 .loc 1 240 1
  608. 380 .cfi_startproc
  609. 381 @ args = 0, pretend = 0, frame = 0
  610. 382 @ frame_needed = 1, uses_anonymous_args = 0
  611. 383 0000 80B5 push {r7, lr}
  612. 384 .LCFI30:
  613. 385 .cfi_def_cfa_offset 8
  614. 386 .cfi_offset 7, -8
  615. 387 .cfi_offset 14, -4
  616. 388 0002 00AF add r7, sp, #0
  617. 389 .LCFI31:
  618. 390 .cfi_def_cfa_register 7
  619. 241:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */
  620. 242:Core/Src/stm32f4xx_it.c ****
  621. 243:Core/Src/stm32f4xx_it.c **** /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */
  622. 244:Core/Src/stm32f4xx_it.c **** HAL_TIM_IRQHandler(&htim9);
  623. 391 .loc 1 244 3
  624. 392 0004 0248 ldr r0, .L23
  625. 393 0006 FFF7FEFF bl HAL_TIM_IRQHandler
  626. 245:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */
  627. 246:Core/Src/stm32f4xx_it.c ****
  628. 247:Core/Src/stm32f4xx_it.c **** /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */
  629. 248:Core/Src/stm32f4xx_it.c **** }
  630. 394 .loc 1 248 1
  631. 395 000a 00BF nop
  632. 396 000c 80BD pop {r7, pc}
  633. 397 .L24:
  634. 398 000e 00BF .align 2
  635. 399 .L23:
  636. 400 0010 00000000 .word htim9
  637. 401 .cfi_endproc
  638. 402 .LFE249:
  639. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 12
  640. 404 .section .text.USART1_IRQHandler,"ax",%progbits
  641. 405 .align 1
  642. 406 .global USART1_IRQHandler
  643. 407 .syntax unified
  644. 408 .thumb
  645. 409 .thumb_func
  646. 411 USART1_IRQHandler:
  647. 412 .LFB250:
  648. 249:Core/Src/stm32f4xx_it.c ****
  649. 250:Core/Src/stm32f4xx_it.c **** /**
  650. 251:Core/Src/stm32f4xx_it.c **** * @brief This function handles USART1 global interrupt.
  651. 252:Core/Src/stm32f4xx_it.c **** */
  652. 253:Core/Src/stm32f4xx_it.c **** void USART1_IRQHandler(void)
  653. 254:Core/Src/stm32f4xx_it.c **** {
  654. 413 .loc 1 254 1
  655. 414 .cfi_startproc
  656. 415 @ args = 0, pretend = 0, frame = 0
  657. 416 @ frame_needed = 1, uses_anonymous_args = 0
  658. 417 0000 80B5 push {r7, lr}
  659. 418 .LCFI32:
  660. 419 .cfi_def_cfa_offset 8
  661. 420 .cfi_offset 7, -8
  662. 421 .cfi_offset 14, -4
  663. 422 0002 00AF add r7, sp, #0
  664. 423 .LCFI33:
  665. 424 .cfi_def_cfa_register 7
  666. 255:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
  667. 256:Core/Src/stm32f4xx_it.c ****
  668. 257:Core/Src/stm32f4xx_it.c **** /* USER CODE END USART1_IRQn 0 */
  669. 258:Core/Src/stm32f4xx_it.c **** HAL_UART_IRQHandler(&huart1);
  670. 425 .loc 1 258 3
  671. 426 0004 0348 ldr r0, .L26
  672. 427 0006 FFF7FEFF bl HAL_UART_IRQHandler
  673. 259:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
  674. 260:Core/Src/stm32f4xx_it.c **** USER_UART_IRQHandler(&huart1);
  675. 428 .loc 1 260 3
  676. 429 000a 0248 ldr r0, .L26
  677. 430 000c FFF7FEFF bl USER_UART_IRQHandler
  678. 261:Core/Src/stm32f4xx_it.c **** /* USER CODE END USART1_IRQn 1 */
  679. 262:Core/Src/stm32f4xx_it.c **** }
  680. 431 .loc 1 262 1
  681. 432 0010 00BF nop
  682. 433 0012 80BD pop {r7, pc}
  683. 434 .L27:
  684. 435 .align 2
  685. 436 .L26:
  686. 437 0014 00000000 .word huart1
  687. 438 .cfi_endproc
  688. 439 .LFE250:
  689. 441 .section .text.DMA2_Stream2_IRQHandler,"ax",%progbits
  690. 442 .align 1
  691. 443 .global DMA2_Stream2_IRQHandler
  692. 444 .syntax unified
  693. 445 .thumb
  694. 446 .thumb_func
  695. 448 DMA2_Stream2_IRQHandler:
  696. 449 .LFB251:
  697. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 13
  698. 263:Core/Src/stm32f4xx_it.c ****
  699. 264:Core/Src/stm32f4xx_it.c **** /**
  700. 265:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream2 global interrupt.
  701. 266:Core/Src/stm32f4xx_it.c **** */
  702. 267:Core/Src/stm32f4xx_it.c **** void DMA2_Stream2_IRQHandler(void)
  703. 268:Core/Src/stm32f4xx_it.c **** {
  704. 450 .loc 1 268 1
  705. 451 .cfi_startproc
  706. 452 @ args = 0, pretend = 0, frame = 0
  707. 453 @ frame_needed = 1, uses_anonymous_args = 0
  708. 454 0000 80B5 push {r7, lr}
  709. 455 .LCFI34:
  710. 456 .cfi_def_cfa_offset 8
  711. 457 .cfi_offset 7, -8
  712. 458 .cfi_offset 14, -4
  713. 459 0002 00AF add r7, sp, #0
  714. 460 .LCFI35:
  715. 461 .cfi_def_cfa_register 7
  716. 269:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
  717. 270:Core/Src/stm32f4xx_it.c ****
  718. 271:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream2_IRQn 0 */
  719. 272:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_rx);
  720. 462 .loc 1 272 3
  721. 463 0004 0248 ldr r0, .L29
  722. 464 0006 FFF7FEFF bl HAL_DMA_IRQHandler
  723. 273:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
  724. 274:Core/Src/stm32f4xx_it.c ****
  725. 275:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream2_IRQn 1 */
  726. 276:Core/Src/stm32f4xx_it.c **** }
  727. 465 .loc 1 276 1
  728. 466 000a 00BF nop
  729. 467 000c 80BD pop {r7, pc}
  730. 468 .L30:
  731. 469 000e 00BF .align 2
  732. 470 .L29:
  733. 471 0010 00000000 .word hdma_usart1_rx
  734. 472 .cfi_endproc
  735. 473 .LFE251:
  736. 475 .section .text.CAN2_RX0_IRQHandler,"ax",%progbits
  737. 476 .align 1
  738. 477 .global CAN2_RX0_IRQHandler
  739. 478 .syntax unified
  740. 479 .thumb
  741. 480 .thumb_func
  742. 482 CAN2_RX0_IRQHandler:
  743. 483 .LFB252:
  744. 277:Core/Src/stm32f4xx_it.c ****
  745. 278:Core/Src/stm32f4xx_it.c **** /**
  746. 279:Core/Src/stm32f4xx_it.c **** * @brief This function handles CAN2 RX0 interrupts.
  747. 280:Core/Src/stm32f4xx_it.c **** */
  748. 281:Core/Src/stm32f4xx_it.c **** void CAN2_RX0_IRQHandler(void)
  749. 282:Core/Src/stm32f4xx_it.c **** {
  750. 484 .loc 1 282 1
  751. 485 .cfi_startproc
  752. 486 @ args = 0, pretend = 0, frame = 0
  753. 487 @ frame_needed = 1, uses_anonymous_args = 0
  754. 488 0000 80B5 push {r7, lr}
  755. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 14
  756. 489 .LCFI36:
  757. 490 .cfi_def_cfa_offset 8
  758. 491 .cfi_offset 7, -8
  759. 492 .cfi_offset 14, -4
  760. 493 0002 00AF add r7, sp, #0
  761. 494 .LCFI37:
  762. 495 .cfi_def_cfa_register 7
  763. 283:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN2_RX0_IRQn 0 */
  764. 284:Core/Src/stm32f4xx_it.c ****
  765. 285:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN2_RX0_IRQn 0 */
  766. 286:Core/Src/stm32f4xx_it.c **** HAL_CAN_IRQHandler(&hcan2);
  767. 496 .loc 1 286 3
  768. 497 0004 0248 ldr r0, .L32
  769. 498 0006 FFF7FEFF bl HAL_CAN_IRQHandler
  770. 287:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN2_RX0_IRQn 1 */
  771. 288:Core/Src/stm32f4xx_it.c ****
  772. 289:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN2_RX0_IRQn 1 */
  773. 290:Core/Src/stm32f4xx_it.c **** }
  774. 499 .loc 1 290 1
  775. 500 000a 00BF nop
  776. 501 000c 80BD pop {r7, pc}
  777. 502 .L33:
  778. 503 000e 00BF .align 2
  779. 504 .L32:
  780. 505 0010 00000000 .word hcan2
  781. 506 .cfi_endproc
  782. 507 .LFE252:
  783. 509 .section .text.CAN2_SCE_IRQHandler,"ax",%progbits
  784. 510 .align 1
  785. 511 .global CAN2_SCE_IRQHandler
  786. 512 .syntax unified
  787. 513 .thumb
  788. 514 .thumb_func
  789. 516 CAN2_SCE_IRQHandler:
  790. 517 .LFB253:
  791. 291:Core/Src/stm32f4xx_it.c ****
  792. 292:Core/Src/stm32f4xx_it.c **** /**
  793. 293:Core/Src/stm32f4xx_it.c **** * @brief This function handles CAN2 SCE interrupt.
  794. 294:Core/Src/stm32f4xx_it.c **** */
  795. 295:Core/Src/stm32f4xx_it.c **** void CAN2_SCE_IRQHandler(void)
  796. 296:Core/Src/stm32f4xx_it.c **** {
  797. 518 .loc 1 296 1
  798. 519 .cfi_startproc
  799. 520 @ args = 0, pretend = 0, frame = 0
  800. 521 @ frame_needed = 1, uses_anonymous_args = 0
  801. 522 0000 80B5 push {r7, lr}
  802. 523 .LCFI38:
  803. 524 .cfi_def_cfa_offset 8
  804. 525 .cfi_offset 7, -8
  805. 526 .cfi_offset 14, -4
  806. 527 0002 00AF add r7, sp, #0
  807. 528 .LCFI39:
  808. 529 .cfi_def_cfa_register 7
  809. 297:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN2_SCE_IRQn 0 */
  810. 298:Core/Src/stm32f4xx_it.c ****
  811. 299:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN2_SCE_IRQn 0 */
  812. 300:Core/Src/stm32f4xx_it.c **** HAL_CAN_IRQHandler(&hcan2);
  813. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 15
  814. 530 .loc 1 300 3
  815. 531 0004 0248 ldr r0, .L35
  816. 532 0006 FFF7FEFF bl HAL_CAN_IRQHandler
  817. 301:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN CAN2_SCE_IRQn 1 */
  818. 302:Core/Src/stm32f4xx_it.c ****
  819. 303:Core/Src/stm32f4xx_it.c **** /* USER CODE END CAN2_SCE_IRQn 1 */
  820. 304:Core/Src/stm32f4xx_it.c **** }
  821. 533 .loc 1 304 1
  822. 534 000a 00BF nop
  823. 535 000c 80BD pop {r7, pc}
  824. 536 .L36:
  825. 537 000e 00BF .align 2
  826. 538 .L35:
  827. 539 0010 00000000 .word hcan2
  828. 540 .cfi_endproc
  829. 541 .LFE253:
  830. 543 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits
  831. 544 .align 1
  832. 545 .global DMA2_Stream7_IRQHandler
  833. 546 .syntax unified
  834. 547 .thumb
  835. 548 .thumb_func
  836. 550 DMA2_Stream7_IRQHandler:
  837. 551 .LFB254:
  838. 305:Core/Src/stm32f4xx_it.c ****
  839. 306:Core/Src/stm32f4xx_it.c **** /**
  840. 307:Core/Src/stm32f4xx_it.c **** * @brief This function handles DMA2 stream7 global interrupt.
  841. 308:Core/Src/stm32f4xx_it.c **** */
  842. 309:Core/Src/stm32f4xx_it.c **** void DMA2_Stream7_IRQHandler(void)
  843. 310:Core/Src/stm32f4xx_it.c **** {
  844. 552 .loc 1 310 1
  845. 553 .cfi_startproc
  846. 554 @ args = 0, pretend = 0, frame = 0
  847. 555 @ frame_needed = 1, uses_anonymous_args = 0
  848. 556 0000 80B5 push {r7, lr}
  849. 557 .LCFI40:
  850. 558 .cfi_def_cfa_offset 8
  851. 559 .cfi_offset 7, -8
  852. 560 .cfi_offset 14, -4
  853. 561 0002 00AF add r7, sp, #0
  854. 562 .LCFI41:
  855. 563 .cfi_def_cfa_register 7
  856. 311:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
  857. 312:Core/Src/stm32f4xx_it.c ****
  858. 313:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 0 */
  859. 314:Core/Src/stm32f4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_tx);
  860. 564 .loc 1 314 3
  861. 565 0004 0248 ldr r0, .L38
  862. 566 0006 FFF7FEFF bl HAL_DMA_IRQHandler
  863. 315:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
  864. 316:Core/Src/stm32f4xx_it.c ****
  865. 317:Core/Src/stm32f4xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 1 */
  866. 318:Core/Src/stm32f4xx_it.c **** }
  867. 567 .loc 1 318 1
  868. 568 000a 00BF nop
  869. 569 000c 80BD pop {r7, pc}
  870. 570 .L39:
  871. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 16
  872. 571 000e 00BF .align 2
  873. 572 .L38:
  874. 573 0010 00000000 .word hdma_usart1_tx
  875. 574 .cfi_endproc
  876. 575 .LFE254:
  877. 577 .text
  878. 578 .Letext0:
  879. 579 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
  880. 580 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
  881. 581 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h"
  882. 582 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
  883. 583 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  884. 584 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
  885. 585 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
  886. 586 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h"
  887. 587 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h"
  888. 588 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
  889. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 17
  890. DEFINED SYMBOLS
  891. *ABS*:00000000 stm32f4xx_it.c
  892. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:20 .text.NMI_Handler:00000000 $t
  893. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:26 .text.NMI_Handler:00000000 NMI_Handler
  894. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:48 .text.MemManage_Handler:00000000 $t
  895. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:54 .text.MemManage_Handler:00000000 MemManage_Handler
  896. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:75 .text.BusFault_Handler:00000000 $t
  897. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:81 .text.BusFault_Handler:00000000 BusFault_Handler
  898. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:102 .text.UsageFault_Handler:00000000 $t
  899. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:108 .text.UsageFault_Handler:00000000 UsageFault_Handler
  900. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:129 .text.SVC_Handler:00000000 $t
  901. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:135 .text.SVC_Handler:00000000 SVC_Handler
  902. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:164 .text.DebugMon_Handler:00000000 $t
  903. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:170 .text.DebugMon_Handler:00000000 DebugMon_Handler
  904. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:199 .text.PendSV_Handler:00000000 $t
  905. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:205 .text.PendSV_Handler:00000000 PendSV_Handler
  906. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:234 .text.SysTick_Handler:00000000 $t
  907. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:240 .text.SysTick_Handler:00000000 SysTick_Handler
  908. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:269 .text.ADC_IRQHandler:00000000 $t
  909. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:275 .text.ADC_IRQHandler:00000000 ADC_IRQHandler
  910. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:298 .text.ADC_IRQHandler:00000010 $d
  911. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:303 .text.CAN1_RX0_IRQHandler:00000000 $t
  912. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:309 .text.CAN1_RX0_IRQHandler:00000000 CAN1_RX0_IRQHandler
  913. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:332 .text.CAN1_RX0_IRQHandler:00000010 $d
  914. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:337 .text.CAN1_SCE_IRQHandler:00000000 $t
  915. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:343 .text.CAN1_SCE_IRQHandler:00000000 CAN1_SCE_IRQHandler
  916. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:366 .text.CAN1_SCE_IRQHandler:00000010 $d
  917. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:371 .text.TIM1_BRK_TIM9_IRQHandler:00000000 $t
  918. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:377 .text.TIM1_BRK_TIM9_IRQHandler:00000000 TIM1_BRK_TIM9_IRQHandler
  919. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:400 .text.TIM1_BRK_TIM9_IRQHandler:00000010 $d
  920. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:405 .text.USART1_IRQHandler:00000000 $t
  921. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:411 .text.USART1_IRQHandler:00000000 USART1_IRQHandler
  922. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:437 .text.USART1_IRQHandler:00000014 $d
  923. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:442 .text.DMA2_Stream2_IRQHandler:00000000 $t
  924. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:448 .text.DMA2_Stream2_IRQHandler:00000000 DMA2_Stream2_IRQHandler
  925. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:471 .text.DMA2_Stream2_IRQHandler:00000010 $d
  926. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:476 .text.CAN2_RX0_IRQHandler:00000000 $t
  927. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:482 .text.CAN2_RX0_IRQHandler:00000000 CAN2_RX0_IRQHandler
  928. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:505 .text.CAN2_RX0_IRQHandler:00000010 $d
  929. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:510 .text.CAN2_SCE_IRQHandler:00000000 $t
  930. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:516 .text.CAN2_SCE_IRQHandler:00000000 CAN2_SCE_IRQHandler
  931. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:539 .text.CAN2_SCE_IRQHandler:00000010 $d
  932. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:544 .text.DMA2_Stream7_IRQHandler:00000000 $t
  933. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:550 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler
  934. C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s:573 .text.DMA2_Stream7_IRQHandler:00000010 $d
  935. UNDEFINED SYMBOLS
  936. HAL_ADC_IRQHandler
  937. hadc1
  938. HAL_CAN_IRQHandler
  939. hcan1
  940. HAL_TIM_IRQHandler
  941. htim9
  942. HAL_UART_IRQHandler
  943. USER_UART_IRQHandler
  944. huart1
  945. HAL_DMA_IRQHandler
  946. ARM GAS C:\Users\10728\AppData\Local\Temp\cc8yxUHg.s page 18
  947. hdma_usart1_rx
  948. hcan2
  949. hdma_usart1_tx