EFTZ_PMU_Bootloader/build/stm32f4xx_hal_rcc.lst

ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 6
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"stm32f4xx_hal_rcc.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.section	.text.HAL_RCC_DeInit,"ax",%progbits
  20              		.align	1
  21              		.weak	HAL_RCC_DeInit
  22              		.syntax unified
  23              		.thumb
  24              		.thumb_func
  26              	HAL_RCC_DeInit:
  27              	.LFB235:
  28              		.file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c"
   1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
   2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ******************************************************************************
   3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @file    stm32f4xx_hal_rcc.c
   4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @author  MCD Application Team
   5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief   RCC HAL module driver.
   6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *          This file provides firmware functions to manage the following
   7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *          functionalities of the Reset and Clock Control (RCC) peripheral:
   8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *           + Initialization and de-initialization functions
   9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *           + Peripheral Control functions
  10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
  11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   @verbatim
  12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ==============================================================================
  13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                       ##### RCC specific features #####
  14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ==============================================================================
  15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
  16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       After reset the device is running from Internal High Speed oscillator
  17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
  18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       and I-Cache are disabled, and all peripherals are off except internal
  19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       SRAM, Flash and JTAG.
  20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
  21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           all peripherals mapped on these busses are running at HSI speed.
  22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
  23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) All GPIOs are in input floating state, except the JTAG pins which
  24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           are assigned to be used for debug purpose.
  25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
  27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       Once the device started from reset, the user application has to:
  28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) Configure the clock source to be used to drive the System clock
  29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           (if the application needs higher frequency/performance)
  30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) Configure the System clock frequency and Flash settings
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 2


  31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) Configure the AHB and APB busses prescalers
  32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) Enable the clock for the peripheral(s) to be used
  33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) Configure the clock source(s) for peripherals which clocks are not
  34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
  35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                       ##### RCC Limitations #####
  37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ==============================================================================
  38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
  39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       A delay between an RCC peripheral clock enable and the effective peripheral
  40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       enabling should be taken into account in order to manage the peripheral read/write
  41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       from/to registers.
  42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) This delay depends on the peripheral mapping.
  43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
  44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           after the clock enable bit is set on the hardware register
  45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
  46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           after the clock enable bit is set on the hardware register
  47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
  49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       Implemented Workaround:
  50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (+) For AHB & APB peripherals, a dummy read to the peripheral register has been
  51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
  52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   @endverbatim
  54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ******************************************************************************
  55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @attention
  56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
  57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * Copyright (c) 2017 STMicroelectronics.
  58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * All rights reserved.
  59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
  60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * This software is licensed under terms that can be found in the LICENSE file in
  61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * the root directory of this software component.
  62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   ******************************************************************************
  64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
  65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
  67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h"
  68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver
  70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
  71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
  72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC
  74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief RCC HAL module driver
  75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
  76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
  77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
  79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
  81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
  82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants
  83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
  84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
  85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
  87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE()   __HAL_RCC_GPIOA_CLK_ENABLE()
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 3


  88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT        GPIOA
  89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN              GPIO_PIN_8
  90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE()   __HAL_RCC_GPIOC_CLK_ENABLE()
  92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT         GPIOC
  93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN               GPIO_PIN_9
  94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
  95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @}
  96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
  97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
  98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
  99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @}
 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/
 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *  @{
 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  *  @brief    Initialization and Configuration functions
 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  *
 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  ===============================================================================
 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****            ##### Initialization and de-initialization functions #####
 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  ===============================================================================
 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       This section provides functions allowing to configure the internal/external oscillators
 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****        and APB2).
 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..] Internal/external clock and PLL configuration
 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              the PLL as System clock source.
 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              clock source.
 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              through the PLL as System clock source. Can be used also as RTC clock source.
 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****            (++) The first output is used to generate the high speed system clock (up to 168 MHz)
 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****            (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                 the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              and if a HSE clock failure occurs(HSE used directly or through PLL as System
 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              clock source), the System clocks automatically switched to HSI and an interrupt
 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 4


 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              (Non-Maskable Interrupt) exception vector.
 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              clock (through a configurable prescaler) on PA8 pin.
 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              clock (through a configurable prescaler) on PC9 pin.
 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..] System, AHB and APB busses clocks configuration
 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              HSE and PLL.
 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              The AHB clock (HCLK) is derived from System clock through configurable
 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              prescaler and used to clock the CPU, memory and peripherals mapped
 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              from AHB clock through configurable prescalers and used to clock
 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              the peripherals mapped on these busses. You can use
 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              Depending on the device voltage range, the maximum frequency should
 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              be adapted accordingly (refer to the product datasheets for more details).
 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices,
 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz
 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              Depending on the device voltage range, the maximum frequency should
 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              be adapted accordingly (refer to the product datasheets for more details).
 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              PCLK2 84 MHz and PCLK1 42 MHz.
 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              Depending on the device voltage range, the maximum frequency should
 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              be adapted accordingly (refer to the product datasheets for more details).
 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****          (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz,
 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              PCLK2 100 MHz and PCLK1 50 MHz.
 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              Depending on the device voltage range, the maximum frequency should
 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****              be adapted accordingly (refer to the product datasheets for more details).
 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Resets the RCC clock configuration to the default reset state.
 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The default reset state of the clock configuration is given below:
 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - HSI ON and used as system clock source
 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - HSE and PLL OFF
 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - AHB, APB1 and APB2 prescaler set to 1.
 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - CSS, MCO1 and MCO2 OFF
 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - All interrupts disabled
 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   This function doesn't modify the configuration of the
 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - Peripheral clocks
 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            - LSI, LSE and RTC clocks
 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval HAL status
 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void)
 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 5


  29              		.loc 1 201 1
  30              		.cfi_startproc
  31              		@ args = 0, pretend = 0, frame = 0
  32              		@ frame_needed = 1, uses_anonymous_args = 0
  33              		@ link register save eliminated.
  34 0000 80B4     		push	{r7}
  35              	.LCFI0:
  36              		.cfi_def_cfa_offset 4
  37              		.cfi_offset 7, -4
  38 0002 00AF     		add	r7, sp, #0
  39              	.LCFI1:
  40              		.cfi_def_cfa_register 7
 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return HAL_OK;
  41              		.loc 1 202 10
  42 0004 0023     		movs	r3, #0
 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
  43              		.loc 1 203 1
  44 0006 1846     		mov	r0, r3
  45 0008 BD46     		mov	sp, r7
  46              	.LCFI2:
  47              		.cfi_def_cfa_register 13
  48              		@ sp needed
  49 000a 5DF8047B 		ldr	r7, [sp], #4
  50              	.LCFI3:
  51              		.cfi_restore 7
  52              		.cfi_def_cfa_offset 0
  53 000e 7047     		bx	lr
  54              		.cfi_endproc
  55              	.LFE235:
  57              		.section	.text.HAL_RCC_OscConfig,"ax",%progbits
  58              		.align	1
  59              		.weak	HAL_RCC_OscConfig
  60              		.syntax unified
  61              		.thumb
  62              		.thumb_func
  64              	HAL_RCC_OscConfig:
  65              	.LFB236:
 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Initializes the RCC Oscillators according to the specified parameters in the
 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         RCC_OscInitTypeDef.
 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         contains the configuration information for the RCC Oscillators.
 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The PLL is not disabled when used as system clock.
 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         supported by this API. User should request a transition to LSE Off
 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         first and then LSE On or LSE Bypass.
 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         supported by this API. User should request a transition to HSE Off
 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         first and then HSE On or HSE Bypass.
 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval HAL status
 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
  66              		.loc 1 220 1
  67              		.cfi_startproc
  68              		@ args = 0, pretend = 0, frame = 24
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 6


  69              		@ frame_needed = 1, uses_anonymous_args = 0
  70 0000 80B5     		push	{r7, lr}
  71              	.LCFI4:
  72              		.cfi_def_cfa_offset 8
  73              		.cfi_offset 7, -8
  74              		.cfi_offset 14, -4
  75 0002 86B0     		sub	sp, sp, #24
  76              	.LCFI5:
  77              		.cfi_def_cfa_offset 32
  78 0004 00AF     		add	r7, sp, #0
  79              	.LCFI6:
  80              		.cfi_def_cfa_register 7
  81 0006 7860     		str	r0, [r7, #4]
 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   uint32_t tickstart, pll_config;
 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check Null pointer */
 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(RCC_OscInitStruct == NULL)
  82              		.loc 1 224 5
  83 0008 7B68     		ldr	r3, [r7, #4]
  84 000a 002B     		cmp	r3, #0
  85 000c 01D1     		bne	.L4
 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     return HAL_ERROR;
  86              		.loc 1 226 12
  87 000e 0123     		movs	r3, #1
  88 0010 67E2     		b	.L5
  89              	.L4:
 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check the parameters */
 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*------------------------------- HSE Configuration ------------------------*/
 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  90              		.loc 1 232 25
  91 0012 7B68     		ldr	r3, [r7, #4]
  92 0014 1B68     		ldr	r3, [r3]
  93              		.loc 1 232 43
  94 0016 03F00103 		and	r3, r3, #1
  95              		.loc 1 232 5
  96 001a 002B     		cmp	r3, #0
  97 001c 75D0     		beq	.L6
 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the parameters */
 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis
 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
  98              		.loc 1 237 9
  99 001e 884B     		ldr	r3, .L59
 100 0020 9B68     		ldr	r3, [r3, #8]
 101 0022 03F00C03 		and	r3, r3, #12
 102              		.loc 1 237 7
 103 0026 042B     		cmp	r3, #4
 104 0028 0CD0     		beq	.L7
 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 
 105              		.loc 1 238 9 discriminator 1
 106 002a 854B     		ldr	r3, .L59
 107 002c 9B68     		ldr	r3, [r3, #8]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 7


 108 002e 03F00C03 		and	r3, r3, #12
 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 
 109              		.loc 1 237 60 discriminator 1
 110 0032 082B     		cmp	r3, #8
 111 0034 12D1     		bne	.L8
 112              		.loc 1 238 68
 113 0036 824B     		ldr	r3, .L59
 114 0038 5B68     		ldr	r3, [r3, #4]
 115              		.loc 1 238 78
 116 003a 03F48003 		and	r3, r3, #4194304
 117              		.loc 1 238 60
 118 003e B3F5800F 		cmp	r3, #4194304
 119 0042 0BD1     		bne	.L8
 120              	.L7:
 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_
 121              		.loc 1 240 11
 122 0044 7E4B     		ldr	r3, .L59
 123 0046 1B68     		ldr	r3, [r3]
 124 0048 03F40033 		and	r3, r3, #131072
 125              		.loc 1 240 9
 126 004c 002B     		cmp	r3, #0
 127 004e 5BD0     		beq	.L58
 128              		.loc 1 240 78 discriminator 1
 129 0050 7B68     		ldr	r3, [r7, #4]
 130 0052 5B68     		ldr	r3, [r3, #4]
 131              		.loc 1 240 57 discriminator 1
 132 0054 002B     		cmp	r3, #0
 133 0056 57D1     		bne	.L58
 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 134              		.loc 1 242 16
 135 0058 0123     		movs	r3, #1
 136 005a 42E2     		b	.L5
 137              	.L8:
 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Set the new HSE configuration ---------------------------------------*/
 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 138              		.loc 1 248 7
 139 005c 7B68     		ldr	r3, [r7, #4]
 140 005e 5B68     		ldr	r3, [r3, #4]
 141 0060 B3F5803F 		cmp	r3, #65536
 142 0064 06D1     		bne	.L10
 143              		.loc 1 248 7 is_stmt 0 discriminator 1
 144 0066 764B     		ldr	r3, .L59
 145 0068 1B68     		ldr	r3, [r3]
 146 006a 754A     		ldr	r2, .L59
 147 006c 43F48033 		orr	r3, r3, #65536
 148 0070 1360     		str	r3, [r2]
 149 0072 1DE0     		b	.L11
 150              	.L10:
 151              		.loc 1 248 7 discriminator 2
 152 0074 7B68     		ldr	r3, [r7, #4]
 153 0076 5B68     		ldr	r3, [r3, #4]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 8


 154 0078 B3F5A02F 		cmp	r3, #327680
 155 007c 0CD1     		bne	.L12
 156              		.loc 1 248 7 discriminator 3
 157 007e 704B     		ldr	r3, .L59
 158 0080 1B68     		ldr	r3, [r3]
 159 0082 6F4A     		ldr	r2, .L59
 160 0084 43F48023 		orr	r3, r3, #262144
 161 0088 1360     		str	r3, [r2]
 162 008a 6D4B     		ldr	r3, .L59
 163 008c 1B68     		ldr	r3, [r3]
 164 008e 6C4A     		ldr	r2, .L59
 165 0090 43F48033 		orr	r3, r3, #65536
 166 0094 1360     		str	r3, [r2]
 167 0096 0BE0     		b	.L11
 168              	.L12:
 169              		.loc 1 248 7 discriminator 4
 170 0098 694B     		ldr	r3, .L59
 171 009a 1B68     		ldr	r3, [r3]
 172 009c 684A     		ldr	r2, .L59
 173 009e 23F48033 		bic	r3, r3, #65536
 174 00a2 1360     		str	r3, [r2]
 175 00a4 664B     		ldr	r3, .L59
 176 00a6 1B68     		ldr	r3, [r3]
 177 00a8 654A     		ldr	r2, .L59
 178 00aa 23F48023 		bic	r3, r3, #262144
 179 00ae 1360     		str	r3, [r2]
 180              	.L11:
 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check the HSE State */
 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
 181              		.loc 1 251 28 is_stmt 1
 182 00b0 7B68     		ldr	r3, [r7, #4]
 183 00b2 5B68     		ldr	r3, [r3, #4]
 184              		.loc 1 251 9
 185 00b4 002B     		cmp	r3, #0
 186 00b6 13D0     		beq	.L13
 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick */
 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 187              		.loc 1 254 21
 188 00b8 FFF7FEFF 		bl	HAL_GetTick
 189 00bc 3861     		str	r0, [r7, #16]
 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till HSE is ready */
 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 190              		.loc 1 257 14
 191 00be 08E0     		b	.L14
 192              	.L15:
 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 193              		.loc 1 259 15
 194 00c0 FFF7FEFF 		bl	HAL_GetTick
 195 00c4 0246     		mov	r2, r0
 196              		.loc 1 259 29
 197 00c6 3B69     		ldr	r3, [r7, #16]
 198 00c8 D31A     		subs	r3, r2, r3
 199              		.loc 1 259 13
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 9


 200 00ca 642B     		cmp	r3, #100
 201 00cc 01D9     		bls	.L14
 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 202              		.loc 1 261 20
 203 00ce 0323     		movs	r3, #3
 204 00d0 07E2     		b	.L5
 205              	.L14:
 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 206              		.loc 1 257 15
 207 00d2 5B4B     		ldr	r3, .L59
 208 00d4 1B68     		ldr	r3, [r3]
 209 00d6 03F40033 		and	r3, r3, #131072
 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 210              		.loc 1 257 14
 211 00da 002B     		cmp	r3, #0
 212 00dc F0D0     		beq	.L15
 213 00de 14E0     		b	.L6
 214              	.L13:
 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick */
 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 215              		.loc 1 268 21
 216 00e0 FFF7FEFF 		bl	HAL_GetTick
 217 00e4 3861     		str	r0, [r7, #16]
 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till HSE is bypassed or disabled */
 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 218              		.loc 1 271 14
 219 00e6 08E0     		b	.L16
 220              	.L17:
 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 221              		.loc 1 273 15
 222 00e8 FFF7FEFF 		bl	HAL_GetTick
 223 00ec 0246     		mov	r2, r0
 224              		.loc 1 273 29
 225 00ee 3B69     		ldr	r3, [r7, #16]
 226 00f0 D31A     		subs	r3, r2, r3
 227              		.loc 1 273 13
 228 00f2 642B     		cmp	r3, #100
 229 00f4 01D9     		bls	.L16
 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 230              		.loc 1 275 20
 231 00f6 0323     		movs	r3, #3
 232 00f8 F3E1     		b	.L5
 233              	.L16:
 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 234              		.loc 1 271 15
 235 00fa 514B     		ldr	r3, .L59
 236 00fc 1B68     		ldr	r3, [r3]
 237 00fe 03F40033 		and	r3, r3, #131072
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 10


 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 238              		.loc 1 271 14
 239 0102 002B     		cmp	r3, #0
 240 0104 F0D1     		bne	.L17
 241 0106 00E0     		b	.L6
 242              	.L58:
 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 243              		.loc 1 240 9
 244 0108 00BF     		nop
 245              	.L6:
 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*----------------------------- HSI Configuration --------------------------*/
 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 246              		.loc 1 282 25
 247 010a 7B68     		ldr	r3, [r7, #4]
 248 010c 1B68     		ldr	r3, [r3]
 249              		.loc 1 282 43
 250 010e 03F00203 		and	r3, r3, #2
 251              		.loc 1 282 5
 252 0112 002B     		cmp	r3, #0
 253 0114 63D0     		beq	.L18
 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the parameters */
 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
 254              		.loc 1 289 9
 255 0116 4A4B     		ldr	r3, .L59
 256 0118 9B68     		ldr	r3, [r3, #8]
 257 011a 03F00C03 		and	r3, r3, #12
 258              		.loc 1 289 7
 259 011e 002B     		cmp	r3, #0
 260 0120 0BD0     		beq	.L19
 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 
 261              		.loc 1 290 9 discriminator 1
 262 0122 474B     		ldr	r3, .L59
 263 0124 9B68     		ldr	r3, [r3, #8]
 264 0126 03F00C03 		and	r3, r3, #12
 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) 
 265              		.loc 1 289 60 discriminator 1
 266 012a 082B     		cmp	r3, #8
 267 012c 1CD1     		bne	.L20
 268              		.loc 1 290 68
 269 012e 444B     		ldr	r3, .L59
 270 0130 5B68     		ldr	r3, [r3, #4]
 271              		.loc 1 290 78
 272 0132 03F48003 		and	r3, r3, #4194304
 273              		.loc 1 290 60
 274 0136 002B     		cmp	r3, #0
 275 0138 16D1     		bne	.L20
 276              	.L19:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 11


 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* When HSI is used as system clock it will not disabled */
 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_
 277              		.loc 1 293 11
 278 013a 414B     		ldr	r3, .L59
 279 013c 1B68     		ldr	r3, [r3]
 280 013e 03F00203 		and	r3, r3, #2
 281              		.loc 1 293 9
 282 0142 002B     		cmp	r3, #0
 283 0144 05D0     		beq	.L21
 284              		.loc 1 293 78 discriminator 1
 285 0146 7B68     		ldr	r3, [r7, #4]
 286 0148 DB68     		ldr	r3, [r3, #12]
 287              		.loc 1 293 57 discriminator 1
 288 014a 012B     		cmp	r3, #1
 289 014c 01D0     		beq	.L21
 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 290              		.loc 1 295 16
 291 014e 0123     		movs	r3, #1
 292 0150 C7E1     		b	.L5
 293              	.L21:
 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Otherwise, just the calibration is allowed */
 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 294              		.loc 1 301 9
 295 0152 3B4B     		ldr	r3, .L59
 296 0154 1B68     		ldr	r3, [r3]
 297 0156 23F0F802 		bic	r2, r3, #248
 298 015a 7B68     		ldr	r3, [r7, #4]
 299 015c 1B69     		ldr	r3, [r3, #16]
 300 015e DB00     		lsls	r3, r3, #3
 301 0160 3749     		ldr	r1, .L59
 302 0162 1343     		orrs	r3, r3, r2
 303 0164 0B60     		str	r3, [r1]
 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 304              		.loc 1 293 9
 305 0166 3AE0     		b	.L18
 306              	.L20:
 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check the HSI State */
 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
 307              		.loc 1 307 28
 308 0168 7B68     		ldr	r3, [r7, #4]
 309 016a DB68     		ldr	r3, [r3, #12]
 310              		.loc 1 307 9
 311 016c 002B     		cmp	r3, #0
 312 016e 20D0     		beq	.L22
 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Enable the Internal High Speed oscillator (HSI). */
 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_HSI_ENABLE();
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 12


 313              		.loc 1 310 9
 314 0170 344B     		ldr	r3, .L59+4
 315 0172 0122     		movs	r2, #1
 316 0174 1A60     		str	r2, [r3]
 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick*/
 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 317              		.loc 1 313 21
 318 0176 FFF7FEFF 		bl	HAL_GetTick
 319 017a 3861     		str	r0, [r7, #16]
 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till HSI is ready */
 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 320              		.loc 1 316 14
 321 017c 08E0     		b	.L23
 322              	.L24:
 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 323              		.loc 1 318 15
 324 017e FFF7FEFF 		bl	HAL_GetTick
 325 0182 0246     		mov	r2, r0
 326              		.loc 1 318 29
 327 0184 3B69     		ldr	r3, [r7, #16]
 328 0186 D31A     		subs	r3, r2, r3
 329              		.loc 1 318 13
 330 0188 022B     		cmp	r3, #2
 331 018a 01D9     		bls	.L23
 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 332              		.loc 1 320 20
 333 018c 0323     		movs	r3, #3
 334 018e A8E1     		b	.L5
 335              	.L23:
 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 336              		.loc 1 316 15
 337 0190 2B4B     		ldr	r3, .L59
 338 0192 1B68     		ldr	r3, [r3]
 339 0194 03F00203 		and	r3, r3, #2
 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 340              		.loc 1 316 14
 341 0198 002B     		cmp	r3, #0
 342 019a F0D0     		beq	.L24
 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 343              		.loc 1 325 9
 344 019c 284B     		ldr	r3, .L59
 345 019e 1B68     		ldr	r3, [r3]
 346 01a0 23F0F802 		bic	r2, r3, #248
 347 01a4 7B68     		ldr	r3, [r7, #4]
 348 01a6 1B69     		ldr	r3, [r3, #16]
 349 01a8 DB00     		lsls	r3, r3, #3
 350 01aa 2549     		ldr	r1, .L59
 351 01ac 1343     		orrs	r3, r3, r2
 352 01ae 0B60     		str	r3, [r1]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 13


 353 01b0 15E0     		b	.L18
 354              	.L22:
 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Disable the Internal High Speed oscillator (HSI). */
 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_HSI_DISABLE();
 355              		.loc 1 330 9
 356 01b2 244B     		ldr	r3, .L59+4
 357 01b4 0022     		movs	r2, #0
 358 01b6 1A60     		str	r2, [r3]
 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick*/
 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 359              		.loc 1 333 21
 360 01b8 FFF7FEFF 		bl	HAL_GetTick
 361 01bc 3861     		str	r0, [r7, #16]
 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till HSI is ready */
 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 362              		.loc 1 336 14
 363 01be 08E0     		b	.L25
 364              	.L26:
 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 365              		.loc 1 338 15
 366 01c0 FFF7FEFF 		bl	HAL_GetTick
 367 01c4 0246     		mov	r2, r0
 368              		.loc 1 338 29
 369 01c6 3B69     		ldr	r3, [r7, #16]
 370 01c8 D31A     		subs	r3, r2, r3
 371              		.loc 1 338 13
 372 01ca 022B     		cmp	r3, #2
 373 01cc 01D9     		bls	.L25
 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 374              		.loc 1 340 20
 375 01ce 0323     		movs	r3, #3
 376 01d0 87E1     		b	.L5
 377              	.L25:
 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 378              		.loc 1 336 15
 379 01d2 1B4B     		ldr	r3, .L59
 380 01d4 1B68     		ldr	r3, [r3]
 381 01d6 03F00203 		and	r3, r3, #2
 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 382              		.loc 1 336 14
 383 01da 002B     		cmp	r3, #0
 384 01dc F0D1     		bne	.L26
 385              	.L18:
 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*------------------------------ LSI Configuration -------------------------*/
 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 14


 386              		.loc 1 347 25
 387 01de 7B68     		ldr	r3, [r7, #4]
 388 01e0 1B68     		ldr	r3, [r3]
 389              		.loc 1 347 43
 390 01e2 03F00803 		and	r3, r3, #8
 391              		.loc 1 347 5
 392 01e6 002B     		cmp	r3, #0
 393 01e8 36D0     		beq	.L27
 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the parameters */
 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the LSI State */
 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
 394              		.loc 1 353 26
 395 01ea 7B68     		ldr	r3, [r7, #4]
 396 01ec 5B69     		ldr	r3, [r3, #20]
 397              		.loc 1 353 7
 398 01ee 002B     		cmp	r3, #0
 399 01f0 16D0     		beq	.L28
 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Enable the Internal Low Speed oscillator (LSI). */
 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       __HAL_RCC_LSI_ENABLE();
 400              		.loc 1 356 7
 401 01f2 154B     		ldr	r3, .L59+8
 402 01f4 0122     		movs	r2, #1
 403 01f6 1A60     		str	r2, [r3]
 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Get Start Tick*/
 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 404              		.loc 1 359 19
 405 01f8 FFF7FEFF 		bl	HAL_GetTick
 406 01fc 3861     		str	r0, [r7, #16]
 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Wait till LSI is ready */
 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 407              		.loc 1 362 12
 408 01fe 08E0     		b	.L29
 409              	.L30:
 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 410              		.loc 1 364 13
 411 0200 FFF7FEFF 		bl	HAL_GetTick
 412 0204 0246     		mov	r2, r0
 413              		.loc 1 364 27
 414 0206 3B69     		ldr	r3, [r7, #16]
 415 0208 D31A     		subs	r3, r2, r3
 416              		.loc 1 364 11
 417 020a 022B     		cmp	r3, #2
 418 020c 01D9     		bls	.L29
 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_TIMEOUT;
 419              		.loc 1 366 18
 420 020e 0323     		movs	r3, #3
 421 0210 67E1     		b	.L5
 422              	.L29:
 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 15


 423              		.loc 1 362 13
 424 0212 0B4B     		ldr	r3, .L59
 425 0214 5B6F     		ldr	r3, [r3, #116]
 426 0216 03F00203 		and	r3, r3, #2
 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 427              		.loc 1 362 12
 428 021a 002B     		cmp	r3, #0
 429 021c F0D0     		beq	.L30
 430 021e 1BE0     		b	.L27
 431              	.L28:
 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Disable the Internal Low Speed oscillator (LSI). */
 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       __HAL_RCC_LSI_DISABLE();
 432              		.loc 1 373 7
 433 0220 094B     		ldr	r3, .L59+8
 434 0222 0022     		movs	r2, #0
 435 0224 1A60     		str	r2, [r3]
 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Get Start Tick */
 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 436              		.loc 1 376 19
 437 0226 FFF7FEFF 		bl	HAL_GetTick
 438 022a 3861     		str	r0, [r7, #16]
 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Wait till LSI is ready */
 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 439              		.loc 1 379 12
 440 022c 0EE0     		b	.L31
 441              	.L32:
 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 442              		.loc 1 381 13
 443 022e FFF7FEFF 		bl	HAL_GetTick
 444 0232 0246     		mov	r2, r0
 445              		.loc 1 381 27
 446 0234 3B69     		ldr	r3, [r7, #16]
 447 0236 D31A     		subs	r3, r2, r3
 448              		.loc 1 381 11
 449 0238 022B     		cmp	r3, #2
 450 023a 07D9     		bls	.L31
 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_TIMEOUT;
 451              		.loc 1 383 18
 452 023c 0323     		movs	r3, #3
 453 023e 50E1     		b	.L5
 454              	.L60:
 455              		.align	2
 456              	.L59:
 457 0240 00380240 		.word	1073887232
 458 0244 00004742 		.word	1111949312
 459 0248 800E4742 		.word	1111953024
 460              	.L31:
 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 16


 461              		.loc 1 379 13
 462 024c 884B     		ldr	r3, .L61
 463 024e 5B6F     		ldr	r3, [r3, #116]
 464 0250 03F00203 		and	r3, r3, #2
 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 465              		.loc 1 379 12
 466 0254 002B     		cmp	r3, #0
 467 0256 EAD1     		bne	.L32
 468              	.L27:
 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*------------------------------ LSE Configuration -------------------------*/
 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 469              		.loc 1 389 25
 470 0258 7B68     		ldr	r3, [r7, #4]
 471 025a 1B68     		ldr	r3, [r3]
 472              		.loc 1 389 43
 473 025c 03F00403 		and	r3, r3, #4
 474              		.loc 1 389 5
 475 0260 002B     		cmp	r3, #0
 476 0262 00F09780 		beq	.L33
 477              	.LBB2:
 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     FlagStatus       pwrclkchanged = RESET;
 478              		.loc 1 391 22
 479 0266 0023     		movs	r3, #0
 480 0268 FB75     		strb	r3, [r7, #23]
 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the parameters */
 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Update LSE configuration in Backup Domain control register    */
 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Requires to enable write access to Backup Domain of necessary */
 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 481              		.loc 1 398 8
 482 026a 814B     		ldr	r3, .L61
 483 026c 1B6C     		ldr	r3, [r3, #64]
 484 026e 03F08053 		and	r3, r3, #268435456
 485              		.loc 1 398 7
 486 0272 002B     		cmp	r3, #0
 487 0274 0FD1     		bne	.L34
 488              	.LBB3:
 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_ENABLE();
 489              		.loc 1 400 7
 490 0276 0023     		movs	r3, #0
 491 0278 BB60     		str	r3, [r7, #8]
 492 027a 7D4B     		ldr	r3, .L61
 493 027c 1B6C     		ldr	r3, [r3, #64]
 494 027e 7C4A     		ldr	r2, .L61
 495 0280 43F08053 		orr	r3, r3, #268435456
 496 0284 1364     		str	r3, [r2, #64]
 497 0286 7A4B     		ldr	r3, .L61
 498 0288 1B6C     		ldr	r3, [r3, #64]
 499 028a 03F08053 		and	r3, r3, #268435456
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 17


 500 028e BB60     		str	r3, [r7, #8]
 501 0290 BB68     		ldr	r3, [r7, #8]
 502              	.LBE3:
 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       pwrclkchanged = SET;
 503              		.loc 1 401 21
 504 0292 0123     		movs	r3, #1
 505 0294 FB75     		strb	r3, [r7, #23]
 506              	.L34:
 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 507              		.loc 1 404 8
 508 0296 774B     		ldr	r3, .L61+4
 509 0298 1B68     		ldr	r3, [r3]
 510 029a 03F48073 		and	r3, r3, #256
 511              		.loc 1 404 7
 512 029e 002B     		cmp	r3, #0
 513 02a0 18D1     		bne	.L35
 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Enable write access to Backup domain */
 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       SET_BIT(PWR->CR, PWR_CR_DBP);
 514              		.loc 1 407 7
 515 02a2 744B     		ldr	r3, .L61+4
 516 02a4 1B68     		ldr	r3, [r3]
 517 02a6 734A     		ldr	r2, .L61+4
 518 02a8 43F48073 		orr	r3, r3, #256
 519 02ac 1360     		str	r3, [r2]
 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Wait for Backup domain Write protection disable */
 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 520              		.loc 1 410 19
 521 02ae FFF7FEFF 		bl	HAL_GetTick
 522 02b2 3861     		str	r0, [r7, #16]
 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 523              		.loc 1 412 12
 524 02b4 08E0     		b	.L36
 525              	.L37:
 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 526              		.loc 1 414 13
 527 02b6 FFF7FEFF 		bl	HAL_GetTick
 528 02ba 0246     		mov	r2, r0
 529              		.loc 1 414 27
 530 02bc 3B69     		ldr	r3, [r7, #16]
 531 02be D31A     		subs	r3, r2, r3
 532              		.loc 1 414 11
 533 02c0 022B     		cmp	r3, #2
 534 02c2 01D9     		bls	.L36
 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_TIMEOUT;
 535              		.loc 1 416 18
 536 02c4 0323     		movs	r3, #3
 537 02c6 0CE1     		b	.L5
 538              	.L36:
 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 539              		.loc 1 412 13
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 18


 540 02c8 6A4B     		ldr	r3, .L61+4
 541 02ca 1B68     		ldr	r3, [r3]
 542 02cc 03F48073 		and	r3, r3, #256
 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 543              		.loc 1 412 12
 544 02d0 002B     		cmp	r3, #0
 545 02d2 F0D0     		beq	.L37
 546              	.L35:
 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Set the new LSE configuration -----------------------------------------*/
 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 547              		.loc 1 422 5
 548 02d4 7B68     		ldr	r3, [r7, #4]
 549 02d6 9B68     		ldr	r3, [r3, #8]
 550 02d8 012B     		cmp	r3, #1
 551 02da 06D1     		bne	.L38
 552              		.loc 1 422 5 is_stmt 0 discriminator 1
 553 02dc 644B     		ldr	r3, .L61
 554 02de 1B6F     		ldr	r3, [r3, #112]
 555 02e0 634A     		ldr	r2, .L61
 556 02e2 43F00103 		orr	r3, r3, #1
 557 02e6 1367     		str	r3, [r2, #112]
 558 02e8 1CE0     		b	.L39
 559              	.L38:
 560              		.loc 1 422 5 discriminator 2
 561 02ea 7B68     		ldr	r3, [r7, #4]
 562 02ec 9B68     		ldr	r3, [r3, #8]
 563 02ee 052B     		cmp	r3, #5
 564 02f0 0CD1     		bne	.L40
 565              		.loc 1 422 5 discriminator 3
 566 02f2 5F4B     		ldr	r3, .L61
 567 02f4 1B6F     		ldr	r3, [r3, #112]
 568 02f6 5E4A     		ldr	r2, .L61
 569 02f8 43F00403 		orr	r3, r3, #4
 570 02fc 1367     		str	r3, [r2, #112]
 571 02fe 5C4B     		ldr	r3, .L61
 572 0300 1B6F     		ldr	r3, [r3, #112]
 573 0302 5B4A     		ldr	r2, .L61
 574 0304 43F00103 		orr	r3, r3, #1
 575 0308 1367     		str	r3, [r2, #112]
 576 030a 0BE0     		b	.L39
 577              	.L40:
 578              		.loc 1 422 5 discriminator 4
 579 030c 584B     		ldr	r3, .L61
 580 030e 1B6F     		ldr	r3, [r3, #112]
 581 0310 574A     		ldr	r2, .L61
 582 0312 23F00103 		bic	r3, r3, #1
 583 0316 1367     		str	r3, [r2, #112]
 584 0318 554B     		ldr	r3, .L61
 585 031a 1B6F     		ldr	r3, [r3, #112]
 586 031c 544A     		ldr	r2, .L61
 587 031e 23F00403 		bic	r3, r3, #4
 588 0322 1367     		str	r3, [r2, #112]
 589              	.L39:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 19


 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check the LSE State */
 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 590              		.loc 1 424 26 is_stmt 1
 591 0324 7B68     		ldr	r3, [r7, #4]
 592 0326 9B68     		ldr	r3, [r3, #8]
 593              		.loc 1 424 7
 594 0328 002B     		cmp	r3, #0
 595 032a 15D0     		beq	.L41
 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Get Start Tick*/
 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 596              		.loc 1 427 19
 597 032c FFF7FEFF 		bl	HAL_GetTick
 598 0330 3861     		str	r0, [r7, #16]
 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Wait till LSE is ready */
 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 599              		.loc 1 430 12
 600 0332 0AE0     		b	.L42
 601              	.L43:
 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 602              		.loc 1 432 13
 603 0334 FFF7FEFF 		bl	HAL_GetTick
 604 0338 0246     		mov	r2, r0
 605              		.loc 1 432 27
 606 033a 3B69     		ldr	r3, [r7, #16]
 607 033c D31A     		subs	r3, r2, r3
 608              		.loc 1 432 11
 609 033e 41F28832 		movw	r2, #5000
 610 0342 9342     		cmp	r3, r2
 611 0344 01D9     		bls	.L42
 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_TIMEOUT;
 612              		.loc 1 434 18
 613 0346 0323     		movs	r3, #3
 614 0348 CBE0     		b	.L5
 615              	.L42:
 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 616              		.loc 1 430 13
 617 034a 494B     		ldr	r3, .L61
 618 034c 1B6F     		ldr	r3, [r3, #112]
 619 034e 03F00203 		and	r3, r3, #2
 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 620              		.loc 1 430 12
 621 0352 002B     		cmp	r3, #0
 622 0354 EED0     		beq	.L43
 623 0356 14E0     		b	.L44
 624              	.L41:
 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Get Start Tick */
 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 625              		.loc 1 441 19
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 20


 626 0358 FFF7FEFF 		bl	HAL_GetTick
 627 035c 3861     		str	r0, [r7, #16]
 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Wait till LSE is ready */
 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 628              		.loc 1 444 12
 629 035e 0AE0     		b	.L45
 630              	.L46:
 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 631              		.loc 1 446 13
 632 0360 FFF7FEFF 		bl	HAL_GetTick
 633 0364 0246     		mov	r2, r0
 634              		.loc 1 446 27
 635 0366 3B69     		ldr	r3, [r7, #16]
 636 0368 D31A     		subs	r3, r2, r3
 637              		.loc 1 446 11
 638 036a 41F28832 		movw	r2, #5000
 639 036e 9342     		cmp	r3, r2
 640 0370 01D9     		bls	.L45
 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_TIMEOUT;
 641              		.loc 1 448 18
 642 0372 0323     		movs	r3, #3
 643 0374 B5E0     		b	.L5
 644              	.L45:
 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 645              		.loc 1 444 13
 646 0376 3E4B     		ldr	r3, .L61
 647 0378 1B6F     		ldr	r3, [r3, #112]
 648 037a 03F00203 		and	r3, r3, #2
 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 649              		.loc 1 444 12
 650 037e 002B     		cmp	r3, #0
 651 0380 EED1     		bne	.L46
 652              	.L44:
 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Restore clock configuration if changed */
 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(pwrclkchanged == SET)
 653              		.loc 1 454 7
 654 0382 FB7D     		ldrb	r3, [r7, #23]	@ zero_extendqisi2
 655 0384 012B     		cmp	r3, #1
 656 0386 05D1     		bne	.L33
 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_DISABLE();
 657              		.loc 1 456 7
 658 0388 394B     		ldr	r3, .L61
 659 038a 1B6C     		ldr	r3, [r3, #64]
 660 038c 384A     		ldr	r2, .L61
 661 038e 23F08053 		bic	r3, r3, #268435456
 662 0392 1364     		str	r3, [r2, #64]
 663              	.L33:
 664              	.LBE2:
 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 21


 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*-------------------------------- PLL Configuration -----------------------*/
 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check the parameters */
 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 665              		.loc 1 462 30
 666 0394 7B68     		ldr	r3, [r7, #4]
 667 0396 9B69     		ldr	r3, [r3, #24]
 668              		.loc 1 462 6
 669 0398 002B     		cmp	r3, #0
 670 039a 00F0A180 		beq	.L47
 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check if the PLL is used as system clock or not */
 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
 671              		.loc 1 465 8
 672 039e 344B     		ldr	r3, .L61
 673 03a0 9B68     		ldr	r3, [r3, #8]
 674 03a2 03F00C03 		and	r3, r3, #12
 675              		.loc 1 465 7
 676 03a6 082B     		cmp	r3, #8
 677 03a8 5CD0     		beq	.L48
 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 678              		.loc 1 467 33
 679 03aa 7B68     		ldr	r3, [r7, #4]
 680 03ac 9B69     		ldr	r3, [r3, #24]
 681              		.loc 1 467 9
 682 03ae 022B     		cmp	r3, #2
 683 03b0 41D1     		bne	.L49
 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Check the parameters */
 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Disable the main PLL. */
 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 684              		.loc 1 477 9
 685 03b2 314B     		ldr	r3, .L61+8
 686 03b4 0022     		movs	r2, #0
 687 03b6 1A60     		str	r2, [r3]
 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick */
 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 688              		.loc 1 480 21
 689 03b8 FFF7FEFF 		bl	HAL_GetTick
 690 03bc 3861     		str	r0, [r7, #16]
 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till PLL is ready */
 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 691              		.loc 1 483 14
 692 03be 08E0     		b	.L50
 693              	.L51:
 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 22


 694              		.loc 1 485 15
 695 03c0 FFF7FEFF 		bl	HAL_GetTick
 696 03c4 0246     		mov	r2, r0
 697              		.loc 1 485 29
 698 03c6 3B69     		ldr	r3, [r7, #16]
 699 03c8 D31A     		subs	r3, r2, r3
 700              		.loc 1 485 13
 701 03ca 022B     		cmp	r3, #2
 702 03cc 01D9     		bls	.L50
 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 703              		.loc 1 487 20
 704 03ce 0323     		movs	r3, #3
 705 03d0 87E0     		b	.L5
 706              	.L50:
 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 707              		.loc 1 483 15
 708 03d2 274B     		ldr	r3, .L61
 709 03d4 1B68     		ldr	r3, [r3]
 710 03d6 03F00073 		and	r3, r3, #33554432
 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 711              		.loc 1 483 14
 712 03da 002B     		cmp	r3, #0
 713 03dc F0D1     		bne	.L51
 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Configure the main PLL clock source, multiplication and division factors. */
 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                  
 714              		.loc 1 492 9
 715 03de 7B68     		ldr	r3, [r7, #4]
 716 03e0 DA69     		ldr	r2, [r3, #28]
 717 03e2 7B68     		ldr	r3, [r7, #4]
 718 03e4 1B6A     		ldr	r3, [r3, #32]
 719 03e6 1A43     		orrs	r2, r2, r3
 720 03e8 7B68     		ldr	r3, [r7, #4]
 721 03ea 5B6A     		ldr	r3, [r3, #36]
 722 03ec 9B01     		lsls	r3, r3, #6
 723 03ee 1A43     		orrs	r2, r2, r3
 724 03f0 7B68     		ldr	r3, [r7, #4]
 725 03f2 9B6A     		ldr	r3, [r3, #40]
 726 03f4 5B08     		lsrs	r3, r3, #1
 727 03f6 013B     		subs	r3, r3, #1
 728 03f8 1B04     		lsls	r3, r3, #16
 729 03fa 1A43     		orrs	r2, r2, r3
 730 03fc 7B68     		ldr	r3, [r7, #4]
 731 03fe DB6A     		ldr	r3, [r3, #44]
 732 0400 1B06     		lsls	r3, r3, #24
 733 0402 1B49     		ldr	r1, .L61
 734 0404 1343     		orrs	r3, r3, r2
 735 0406 4B60     		str	r3, [r1, #4]
 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                                  RCC_OscInitStruct->PLL.PLLM                                       
 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                                  (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)             
 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                                  (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po
 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                                  (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Enable the main PLL. */
 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_PLL_ENABLE();
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 23


 736              		.loc 1 498 9
 737 0408 1B4B     		ldr	r3, .L61+8
 738 040a 0122     		movs	r2, #1
 739 040c 1A60     		str	r2, [r3]
 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick */
 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 740              		.loc 1 501 21
 741 040e FFF7FEFF 		bl	HAL_GetTick
 742 0412 3861     		str	r0, [r7, #16]
 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till PLL is ready */
 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 743              		.loc 1 504 14
 744 0414 08E0     		b	.L52
 745              	.L53:
 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 746              		.loc 1 506 15
 747 0416 FFF7FEFF 		bl	HAL_GetTick
 748 041a 0246     		mov	r2, r0
 749              		.loc 1 506 29
 750 041c 3B69     		ldr	r3, [r7, #16]
 751 041e D31A     		subs	r3, r2, r3
 752              		.loc 1 506 13
 753 0420 022B     		cmp	r3, #2
 754 0422 01D9     		bls	.L52
 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 755              		.loc 1 508 20
 756 0424 0323     		movs	r3, #3
 757 0426 5CE0     		b	.L5
 758              	.L52:
 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 759              		.loc 1 504 15
 760 0428 114B     		ldr	r3, .L61
 761 042a 1B68     		ldr	r3, [r3]
 762 042c 03F00073 		and	r3, r3, #33554432
 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 763              		.loc 1 504 14
 764 0430 002B     		cmp	r3, #0
 765 0432 F0D0     		beq	.L53
 766 0434 54E0     		b	.L47
 767              	.L49:
 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Disable the main PLL. */
 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 768              		.loc 1 515 9
 769 0436 104B     		ldr	r3, .L61+8
 770 0438 0022     		movs	r2, #0
 771 043a 1A60     		str	r2, [r3]
 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Get Start Tick */
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 24


 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 772              		.loc 1 518 21
 773 043c FFF7FEFF 		bl	HAL_GetTick
 774 0440 3861     		str	r0, [r7, #16]
 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Wait till PLL is ready */
 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 775              		.loc 1 521 14
 776 0442 08E0     		b	.L54
 777              	.L55:
 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 778              		.loc 1 523 15
 779 0444 FFF7FEFF 		bl	HAL_GetTick
 780 0448 0246     		mov	r2, r0
 781              		.loc 1 523 29
 782 044a 3B69     		ldr	r3, [r7, #16]
 783 044c D31A     		subs	r3, r2, r3
 784              		.loc 1 523 13
 785 044e 022B     		cmp	r3, #2
 786 0450 01D9     		bls	.L54
 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           {
 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             return HAL_TIMEOUT;
 787              		.loc 1 525 20
 788 0452 0323     		movs	r3, #3
 789 0454 45E0     		b	.L5
 790              	.L54:
 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 791              		.loc 1 521 15
 792 0456 064B     		ldr	r3, .L61
 793 0458 1B68     		ldr	r3, [r3]
 794 045a 03F00073 		and	r3, r3, #33554432
 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 795              		.loc 1 521 14
 796 045e 002B     		cmp	r3, #0
 797 0460 F0D1     		bne	.L55
 798 0462 3DE0     		b	.L47
 799              	.L48:
 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           }
 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check if there is a request to disable the PLL used as System clock source */
 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 800              		.loc 1 533 33
 801 0464 7B68     		ldr	r3, [r7, #4]
 802 0466 9B69     		ldr	r3, [r3, #24]
 803              		.loc 1 533 9
 804 0468 012B     		cmp	r3, #1
 805 046a 07D1     		bne	.L56
 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 806              		.loc 1 535 16
 807 046c 0123     		movs	r3, #1
 808 046e 38E0     		b	.L5
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 25


 809              	.L62:
 810              		.align	2
 811              	.L61:
 812 0470 00380240 		.word	1073887232
 813 0474 00700040 		.word	1073770496
 814 0478 60004742 		.word	1111949408
 815              	.L56:
 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* Do not return HAL_ERROR if request repeats the current configuration */
 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         pll_config = RCC->PLLCFGR;
 816              		.loc 1 540 25
 817 047c 1B4B     		ldr	r3, .L63
 818              		.loc 1 540 20
 819 047e 5B68     		ldr	r3, [r3, #4]
 820 0480 FB60     		str	r3, [r7, #12]
 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR)
 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_
 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #else
 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 821              		.loc 1 550 37
 822 0482 7B68     		ldr	r3, [r7, #4]
 823 0484 9B69     		ldr	r3, [r3, #24]
 824              		.loc 1 550 12
 825 0486 012B     		cmp	r3, #1
 826 0488 28D0     		beq	.L57
 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 827              		.loc 1 551 14 discriminator 1
 828 048a FB68     		ldr	r3, [r7, #12]
 829 048c 03F48002 		and	r2, r3, #4194304
 830              		.loc 1 551 80 discriminator 1
 831 0490 7B68     		ldr	r3, [r7, #4]
 832 0492 DB69     		ldr	r3, [r3, #28]
 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 833              		.loc 1 550 64 discriminator 1
 834 0494 9A42     		cmp	r2, r3
 835 0496 21D1     		bne	.L57
 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
 836              		.loc 1 552 14
 837 0498 FB68     		ldr	r3, [r7, #12]
 838 049a 03F03F02 		and	r2, r3, #63
 839              		.loc 1 552 86
 840 049e 7B68     		ldr	r3, [r7, #4]
 841 04a0 1B6A     		ldr	r3, [r3, #32]
 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 842              		.loc 1 551 92
 843 04a2 9A42     		cmp	r2, r3
 844 04a4 1AD1     		bne	.L57
 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
 845              		.loc 1 553 14
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 26


 846 04a6 FA68     		ldr	r2, [r7, #12]
 847 04a8 47F6C073 		movw	r3, #32704
 848 04ac 1340     		ands	r3, r3, r2
 849              		.loc 1 553 79
 850 04ae 7A68     		ldr	r2, [r7, #4]
 851 04b0 526A     		ldr	r2, [r2, #36]
 852              		.loc 1 553 86
 853 04b2 9201     		lsls	r2, r2, #6
 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR
 854              		.loc 1 552 111
 855 04b4 9342     		cmp	r3, r2
 856 04b6 11D1     		bne	.L57
 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
 857              		.loc 1 554 14
 858 04b8 FB68     		ldr	r3, [r7, #12]
 859 04ba 03F44032 		and	r2, r3, #196608
 860              		.loc 1 554 81
 861 04be 7B68     		ldr	r3, [r7, #4]
 862 04c0 9B6A     		ldr	r3, [r3, #40]
 863              		.loc 1 554 87
 864 04c2 5B08     		lsrs	r3, r3, #1
 865              		.loc 1 554 94
 866 04c4 013B     		subs	r3, r3, #1
 867              		.loc 1 554 101
 868 04c6 1B04     		lsls	r3, r3, #16
 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR
 869              		.loc 1 553 111
 870 04c8 9A42     		cmp	r2, r3
 871 04ca 07D1     		bne	.L57
 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
 872              		.loc 1 555 14
 873 04cc FB68     		ldr	r3, [r7, #12]
 874 04ce 03F07062 		and	r2, r3, #251658240
 875              		.loc 1 555 79
 876 04d2 7B68     		ldr	r3, [r7, #4]
 877 04d4 DB6A     		ldr	r3, [r3, #44]
 878              		.loc 1 555 85
 879 04d6 1B06     		lsls	r3, r3, #24
 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U))
 880              		.loc 1 554 126
 881 04d8 9A42     		cmp	r2, r3
 882 04da 01D0     		beq	.L47
 883              	.L57:
 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif
 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         {
 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****           return HAL_ERROR;
 884              		.loc 1 558 18
 885 04dc 0123     		movs	r3, #1
 886 04de 00E0     		b	.L5
 887              	.L47:
 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         }
 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return HAL_OK;
 888              		.loc 1 563 10
 889 04e0 0023     		movs	r3, #0
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 27


 890              	.L5:
 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 891              		.loc 1 564 1
 892 04e2 1846     		mov	r0, r3
 893 04e4 1837     		adds	r7, r7, #24
 894              	.LCFI7:
 895              		.cfi_def_cfa_offset 8
 896 04e6 BD46     		mov	sp, r7
 897              	.LCFI8:
 898              		.cfi_def_cfa_register 13
 899              		@ sp needed
 900 04e8 80BD     		pop	{r7, pc}
 901              	.L64:
 902 04ea 00BF     		.align	2
 903              	.L63:
 904 04ec 00380240 		.word	1073887232
 905              		.cfi_endproc
 906              	.LFE236:
 908              		.section	.text.HAL_RCC_ClockConfig,"ax",%progbits
 909              		.align	1
 910              		.global	HAL_RCC_ClockConfig
 911              		.syntax unified
 912              		.thumb
 913              		.thumb_func
 915              	HAL_RCC_ClockConfig:
 916              	.LFB237:
 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Initializes the CPU, AHB and APB busses clocks according to the specified
 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         parameters in the RCC_ClkInitStruct.
 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         contains the configuration information for the RCC peripheral.
 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  FLatency FLASH Latency, this parameter depend on device selected
 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         and updated by HAL_RCC_GetHCLKFreq() function called within this function
 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The HSI is used (enabled by hardware) as system clock source after
 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         startup from Reset, wake-up from STOP and STANDBY mode, or in case
 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         of failure of the HSE used directly or indirectly as system clock
 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         (if the Clock Security System CSS is enabled).
 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   A switch from one clock source to another occurs only if the target
 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         clock source is ready (clock stable after startup delay or PLL locked).
 583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         If a clock source which is not yet ready is selected, the switch will
 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         occur when the clock source will be ready.
 585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Depending on the device voltage range, the software has to set correctly
 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
 588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         (for more details refer to section above "Initialization/de-initialization functions")
 589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
 590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 917              		.loc 1 592 1
 918              		.cfi_startproc
 919              		@ args = 0, pretend = 0, frame = 16
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 28


 920              		@ frame_needed = 1, uses_anonymous_args = 0
 921 0000 80B5     		push	{r7, lr}
 922              	.LCFI9:
 923              		.cfi_def_cfa_offset 8
 924              		.cfi_offset 7, -8
 925              		.cfi_offset 14, -4
 926 0002 84B0     		sub	sp, sp, #16
 927              	.LCFI10:
 928              		.cfi_def_cfa_offset 24
 929 0004 00AF     		add	r7, sp, #0
 930              	.LCFI11:
 931              		.cfi_def_cfa_register 7
 932 0006 7860     		str	r0, [r7, #4]
 933 0008 3960     		str	r1, [r7]
 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   uint32_t tickstart;
 594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check Null pointer */
 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(RCC_ClkInitStruct == NULL)
 934              		.loc 1 596 5
 935 000a 7B68     		ldr	r3, [r7, #4]
 936 000c 002B     		cmp	r3, #0
 937 000e 01D1     		bne	.L66
 597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     return HAL_ERROR;
 938              		.loc 1 598 12
 939 0010 0123     		movs	r3, #1
 940 0012 CCE0     		b	.L67
 941              	.L66:
 599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check the parameters */
 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_FLASH_LATENCY(FLatency));
 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
 606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     must be correctly programmed according to the frequency of the CPU clock
 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     (HCLK) and the supply voltage of the device. */
 608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Increasing the number of wait states because of higher CPU frequency */
 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(FLatency > __HAL_FLASH_GET_LATENCY())
 942              		.loc 1 610 17
 943 0014 684B     		ldr	r3, .L83
 944 0016 1B68     		ldr	r3, [r3]
 945 0018 03F00703 		and	r3, r3, #7
 946              		.loc 1 610 5
 947 001c 3A68     		ldr	r2, [r7]
 948 001e 9A42     		cmp	r2, r3
 949 0020 0CD9     		bls	.L68
 611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 950              		.loc 1 613 5
 951 0022 654B     		ldr	r3, .L83
 952 0024 3A68     		ldr	r2, [r7]
 953 0026 D2B2     		uxtb	r2, r2
 954 0028 1A70     		strb	r2, [r3]
 614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 29


 615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(__HAL_FLASH_GET_LATENCY() != FLatency)
 955              		.loc 1 617 8
 956 002a 634B     		ldr	r3, .L83
 957 002c 1B68     		ldr	r3, [r3]
 958 002e 03F00703 		and	r3, r3, #7
 959              		.loc 1 617 7
 960 0032 3A68     		ldr	r2, [r7]
 961 0034 9A42     		cmp	r2, r3
 962 0036 01D0     		beq	.L68
 618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       return HAL_ERROR;
 963              		.loc 1 619 14
 964 0038 0123     		movs	r3, #1
 965 003a B8E0     		b	.L67
 966              	.L68:
 620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*-------------------------- HCLK Configuration --------------------------*/
 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 967              		.loc 1 624 25
 968 003c 7B68     		ldr	r3, [r7, #4]
 969 003e 1B68     		ldr	r3, [r3]
 970              		.loc 1 624 38
 971 0040 03F00203 		and	r3, r3, #2
 972              		.loc 1 624 5
 973 0044 002B     		cmp	r3, #0
 974 0046 20D0     		beq	.L69
 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Set the highest APBx dividers in order to ensure that we do not go through
 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****        a non-spec phase whatever we decrease or increase HCLK. */
 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 975              		.loc 1 628 27
 976 0048 7B68     		ldr	r3, [r7, #4]
 977 004a 1B68     		ldr	r3, [r3]
 978              		.loc 1 628 40
 979 004c 03F00403 		and	r3, r3, #4
 980              		.loc 1 628 7
 981 0050 002B     		cmp	r3, #0
 982 0052 05D0     		beq	.L70
 629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 983              		.loc 1 630 7
 984 0054 594B     		ldr	r3, .L83+4
 985 0056 9B68     		ldr	r3, [r3, #8]
 986 0058 584A     		ldr	r2, .L83+4
 987 005a 43F4E053 		orr	r3, r3, #7168
 988 005e 9360     		str	r3, [r2, #8]
 989              	.L70:
 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 990              		.loc 1 633 27
 991 0060 7B68     		ldr	r3, [r7, #4]
 992 0062 1B68     		ldr	r3, [r3]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 30


 993              		.loc 1 633 40
 994 0064 03F00803 		and	r3, r3, #8
 995              		.loc 1 633 7
 996 0068 002B     		cmp	r3, #0
 997 006a 05D0     		beq	.L71
 634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 998              		.loc 1 635 7
 999 006c 534B     		ldr	r3, .L83+4
 1000 006e 9B68     		ldr	r3, [r3, #8]
 1001 0070 524A     		ldr	r2, .L83+4
 1002 0072 43F46043 		orr	r3, r3, #57344
 1003 0076 9360     		str	r3, [r2, #8]
 1004              	.L71:
 636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 1005              		.loc 1 639 5
 1006 0078 504B     		ldr	r3, .L83+4
 1007 007a 9B68     		ldr	r3, [r3, #8]
 1008 007c 23F0F002 		bic	r2, r3, #240
 1009 0080 7B68     		ldr	r3, [r7, #4]
 1010 0082 9B68     		ldr	r3, [r3, #8]
 1011 0084 4D49     		ldr	r1, .L83+4
 1012 0086 1343     		orrs	r3, r3, r2
 1013 0088 8B60     		str	r3, [r1, #8]
 1014              	.L69:
 640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*------------------------- SYSCLK Configuration ---------------------------*/
 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 1015              		.loc 1 643 25
 1016 008a 7B68     		ldr	r3, [r7, #4]
 1017 008c 1B68     		ldr	r3, [r3]
 1018              		.loc 1 643 38
 1019 008e 03F00103 		and	r3, r3, #1
 1020              		.loc 1 643 5
 1021 0092 002B     		cmp	r3, #0
 1022 0094 44D0     		beq	.L72
 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* HSE is selected as System Clock Source */
 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 1023              		.loc 1 648 25
 1024 0096 7B68     		ldr	r3, [r7, #4]
 1025 0098 5B68     		ldr	r3, [r3, #4]
 1026              		.loc 1 648 7
 1027 009a 012B     		cmp	r3, #1
 1028 009c 07D1     		bne	.L73
 649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check the HSE ready flag */
 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 1029              		.loc 1 651 10
 1030 009e 474B     		ldr	r3, .L83+4
 1031 00a0 1B68     		ldr	r3, [r3]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 31


 1032 00a2 03F40033 		and	r3, r3, #131072
 1033              		.loc 1 651 9
 1034 00a6 002B     		cmp	r3, #0
 1035 00a8 19D1     		bne	.L74
 652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 1036              		.loc 1 653 16
 1037 00aa 0123     		movs	r3, #1
 1038 00ac 7FE0     		b	.L67
 1039              	.L73:
 654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* PLL is selected as System Clock Source */
 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
 1040              		.loc 1 657 31
 1041 00ae 7B68     		ldr	r3, [r7, #4]
 1042 00b0 5B68     		ldr	r3, [r3, #4]
 1043              		.loc 1 657 12
 1044 00b2 022B     		cmp	r3, #2
 1045 00b4 03D0     		beq	.L75
 658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
 1046              		.loc 1 658 31 discriminator 1
 1047 00b6 7B68     		ldr	r3, [r7, #4]
 1048 00b8 5B68     		ldr	r3, [r3, #4]
 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
 1049              		.loc 1 657 76 discriminator 1
 1050 00ba 032B     		cmp	r3, #3
 1051 00bc 07D1     		bne	.L76
 1052              	.L75:
 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check the PLL ready flag */
 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 1053              		.loc 1 661 10
 1054 00be 3F4B     		ldr	r3, .L83+4
 1055 00c0 1B68     		ldr	r3, [r3]
 1056 00c2 03F00073 		and	r3, r3, #33554432
 1057              		.loc 1 661 9
 1058 00c6 002B     		cmp	r3, #0
 1059 00c8 09D1     		bne	.L74
 662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 1060              		.loc 1 663 16
 1061 00ca 0123     		movs	r3, #1
 1062 00cc 6FE0     		b	.L67
 1063              	.L76:
 664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* HSI is selected as System Clock Source */
 667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     else
 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* Check the HSI ready flag */
 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 1064              		.loc 1 670 10
 1065 00ce 3B4B     		ldr	r3, .L83+4
 1066 00d0 1B68     		ldr	r3, [r3]
 1067 00d2 03F00203 		and	r3, r3, #2
 1068              		.loc 1 670 9
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 32


 1069 00d6 002B     		cmp	r3, #0
 1070 00d8 01D1     		bne	.L74
 671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_ERROR;
 1071              		.loc 1 672 16
 1072 00da 0123     		movs	r3, #1
 1073 00dc 67E0     		b	.L67
 1074              	.L74:
 673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 1075              		.loc 1 676 5
 1076 00de 374B     		ldr	r3, .L83+4
 1077 00e0 9B68     		ldr	r3, [r3, #8]
 1078 00e2 23F00302 		bic	r2, r3, #3
 1079 00e6 7B68     		ldr	r3, [r7, #4]
 1080 00e8 5B68     		ldr	r3, [r3, #4]
 1081 00ea 3449     		ldr	r1, .L83+4
 1082 00ec 1343     		orrs	r3, r3, r2
 1083 00ee 8B60     		str	r3, [r1, #8]
 677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Get Start Tick */
 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 1084              		.loc 1 679 17
 1085 00f0 FFF7FEFF 		bl	HAL_GetTick
 1086 00f4 F860     		str	r0, [r7, #12]
 680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 1087              		.loc 1 681 11
 1088 00f6 0AE0     		b	.L78
 1089              	.L79:
 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 1090              		.loc 1 683 12
 1091 00f8 FFF7FEFF 		bl	HAL_GetTick
 1092 00fc 0246     		mov	r2, r0
 1093              		.loc 1 683 26
 1094 00fe FB68     		ldr	r3, [r7, #12]
 1095 0100 D31A     		subs	r3, r2, r3
 1096              		.loc 1 683 10
 1097 0102 41F28832 		movw	r2, #5000
 1098 0106 9342     		cmp	r3, r2
 1099 0108 01D9     		bls	.L78
 684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         return HAL_TIMEOUT;
 1100              		.loc 1 685 16
 1101 010a 0323     		movs	r3, #3
 1102 010c 4FE0     		b	.L67
 1103              	.L78:
 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 1104              		.loc 1 681 12
 1105 010e 2B4B     		ldr	r3, .L83+4
 1106 0110 9B68     		ldr	r3, [r3, #8]
 1107 0112 03F00C02 		and	r2, r3, #12
 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 1108              		.loc 1 681 63
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 33


 1109 0116 7B68     		ldr	r3, [r7, #4]
 1110 0118 5B68     		ldr	r3, [r3, #4]
 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 1111              		.loc 1 681 78
 1112 011a 9B00     		lsls	r3, r3, #2
 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 1113              		.loc 1 681 11
 1114 011c 9A42     		cmp	r2, r3
 1115 011e EBD1     		bne	.L79
 1116              	.L72:
 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Decreasing the number of wait states because of lower CPU frequency */
 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(FLatency < __HAL_FLASH_GET_LATENCY())
 1117              		.loc 1 691 17
 1118 0120 254B     		ldr	r3, .L83
 1119 0122 1B68     		ldr	r3, [r3]
 1120 0124 03F00703 		and	r3, r3, #7
 1121              		.loc 1 691 5
 1122 0128 3A68     		ldr	r2, [r7]
 1123 012a 9A42     		cmp	r2, r3
 1124 012c 0CD2     		bcs	.L80
 692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****      /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 1125              		.loc 1 694 5
 1126 012e 224B     		ldr	r3, .L83
 1127 0130 3A68     		ldr	r2, [r7]
 1128 0132 D2B2     		uxtb	r2, r2
 1129 0134 1A70     		strb	r2, [r3]
 695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     if(__HAL_FLASH_GET_LATENCY() != FLatency)
 1130              		.loc 1 698 8
 1131 0136 204B     		ldr	r3, .L83
 1132 0138 1B68     		ldr	r3, [r3]
 1133 013a 03F00703 		and	r3, r3, #7
 1134              		.loc 1 698 7
 1135 013e 3A68     		ldr	r2, [r7]
 1136 0140 9A42     		cmp	r2, r3
 1137 0142 01D0     		beq	.L80
 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       return HAL_ERROR;
 1138              		.loc 1 700 14
 1139 0144 0123     		movs	r3, #1
 1140 0146 32E0     		b	.L67
 1141              	.L80:
 701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*-------------------------- PCLK1 Configuration ---------------------------*/
 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 1142              		.loc 1 705 25
 1143 0148 7B68     		ldr	r3, [r7, #4]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 34


 1144 014a 1B68     		ldr	r3, [r3]
 1145              		.loc 1 705 38
 1146 014c 03F00403 		and	r3, r3, #4
 1147              		.loc 1 705 5
 1148 0150 002B     		cmp	r3, #0
 1149 0152 08D0     		beq	.L81
 706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 1150              		.loc 1 708 5
 1151 0154 194B     		ldr	r3, .L83+4
 1152 0156 9B68     		ldr	r3, [r3, #8]
 1153 0158 23F4E052 		bic	r2, r3, #7168
 1154 015c 7B68     		ldr	r3, [r7, #4]
 1155 015e DB68     		ldr	r3, [r3, #12]
 1156 0160 1649     		ldr	r1, .L83+4
 1157 0162 1343     		orrs	r3, r3, r2
 1158 0164 8B60     		str	r3, [r1, #8]
 1159              	.L81:
 709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /*-------------------------- PCLK2 Configuration ---------------------------*/
 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 1160              		.loc 1 712 25
 1161 0166 7B68     		ldr	r3, [r7, #4]
 1162 0168 1B68     		ldr	r3, [r3]
 1163              		.loc 1 712 38
 1164 016a 03F00803 		and	r3, r3, #8
 1165              		.loc 1 712 5
 1166 016e 002B     		cmp	r3, #0
 1167 0170 09D0     		beq	.L82
 713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
 1168              		.loc 1 715 5
 1169 0172 124B     		ldr	r3, .L83+4
 1170 0174 9B68     		ldr	r3, [r3, #8]
 1171 0176 23F46042 		bic	r2, r3, #57344
 1172 017a 7B68     		ldr	r3, [r7, #4]
 1173 017c 1B69     		ldr	r3, [r3, #16]
 1174 017e DB00     		lsls	r3, r3, #3
 1175 0180 0E49     		ldr	r1, .L83+4
 1176 0182 1343     		orrs	r3, r3, r2
 1177 0184 8B60     		str	r3, [r1, #8]
 1178              	.L82:
 716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF
 1179              		.loc 1 719 21
 1180 0186 FFF7FEFF 		bl	HAL_RCC_GetSysClockFreq
 1181 018a 0246     		mov	r2, r0
 1182              		.loc 1 719 68
 1183 018c 0B4B     		ldr	r3, .L83+4
 1184 018e 9B68     		ldr	r3, [r3, #8]
 1185              		.loc 1 719 91
 1186 0190 1B09     		lsrs	r3, r3, #4
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 35


 1187 0192 03F00F03 		and	r3, r3, #15
 1188              		.loc 1 719 63
 1189 0196 0A49     		ldr	r1, .L83+8
 1190 0198 CB5C     		ldrb	r3, [r1, r3]	@ zero_extendqisi2
 1191              		.loc 1 719 47
 1192 019a 22FA03F3 		lsr	r3, r2, r3
 1193              		.loc 1 719 19
 1194 019e 094A     		ldr	r2, .L83+12
 1195 01a0 1360     		str	r3, [r2]
 720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Configure the source of time base considering new system clocks settings */
 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   HAL_InitTick (uwTickPrio);
 1196              		.loc 1 722 3
 1197 01a2 094B     		ldr	r3, .L83+16
 1198 01a4 1B68     		ldr	r3, [r3]
 1199 01a6 1846     		mov	r0, r3
 1200 01a8 FFF7FEFF 		bl	HAL_InitTick
 723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return HAL_OK;
 1201              		.loc 1 724 10
 1202 01ac 0023     		movs	r3, #0
 1203              	.L67:
 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1204              		.loc 1 725 1
 1205 01ae 1846     		mov	r0, r3
 1206 01b0 1037     		adds	r7, r7, #16
 1207              	.LCFI12:
 1208              		.cfi_def_cfa_offset 8
 1209 01b2 BD46     		mov	sp, r7
 1210              	.LCFI13:
 1211              		.cfi_def_cfa_register 13
 1212              		@ sp needed
 1213 01b4 80BD     		pop	{r7, pc}
 1214              	.L84:
 1215 01b6 00BF     		.align	2
 1216              	.L83:
 1217 01b8 003C0240 		.word	1073888256
 1218 01bc 00380240 		.word	1073887232
 1219 01c0 00000000 		.word	AHBPrescTable
 1220 01c4 00000000 		.word	SystemCoreClock
 1221 01c8 00000000 		.word	uwTickPrio
 1222              		.cfi_endproc
 1223              	.LFE237:
 1225              		.section	.text.HAL_RCC_MCOConfig,"ax",%progbits
 1226              		.align	1
 1227              		.global	HAL_RCC_MCOConfig
 1228              		.syntax unified
 1229              		.thumb
 1230              		.thumb_func
 1232              	HAL_RCC_MCOConfig:
 1233              	.LFB238:
 726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @}
 729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 36


 732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  *  @brief   RCC clocks control functions
 733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  *
 734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim
 735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  ===============================================================================
 736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****                       ##### Peripheral Control functions #####
 737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****  ===============================================================================
 738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     [..]
 739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     This subsection provides a set of functions allowing to control the RCC Clocks
 740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     frequencies.
 741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim
 743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @{
 744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
 748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   PA8/PC9 should be configured in alternate function mode.
 749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_MCOx specifies the output direction for the clock source.
 750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
 752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
 753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_MCOSource specifies the clock source to output.
 754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
 756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
 757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
 758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
 759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
 760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a
 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for
 762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
 763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_MCODiv specifies the MCOx prescaler.
 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCODIV_1: no division applied to MCOx clock
 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
 770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *            @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
 771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note  For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have
 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *        at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5).
 773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
 774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
 776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1234              		.loc 1 776 1
 1235              		.cfi_startproc
 1236              		@ args = 0, pretend = 0, frame = 48
 1237              		@ frame_needed = 1, uses_anonymous_args = 0
 1238 0000 80B5     		push	{r7, lr}
 1239              	.LCFI14:
 1240              		.cfi_def_cfa_offset 8
 1241              		.cfi_offset 7, -8
 1242              		.cfi_offset 14, -4
 1243 0002 8CB0     		sub	sp, sp, #48
 1244              	.LCFI15:
 1245              		.cfi_def_cfa_offset 56
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 37


 1246 0004 00AF     		add	r7, sp, #0
 1247              	.LCFI16:
 1248              		.cfi_def_cfa_register 7
 1249 0006 F860     		str	r0, [r7, #12]
 1250 0008 B960     		str	r1, [r7, #8]
 1251 000a 7A60     		str	r2, [r7, #4]
 777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   GPIO_InitTypeDef GPIO_InitStruct;
 778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check the parameters */
 779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_RCC_MCO(RCC_MCOx));
 780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   assert_param(IS_RCC_MCODIV(RCC_MCODiv));
 781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* RCC_MCO1 */
 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(RCC_MCOx == RCC_MCO1)
 1252              		.loc 1 782 5
 1253 000c FB68     		ldr	r3, [r7, #12]
 1254 000e 002B     		cmp	r3, #0
 1255 0010 29D1     		bne	.L86
 1256              	.LBB4:
 783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* MCO1 Clock Enable */
 787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __MCO1_CLK_ENABLE();
 1257              		.loc 1 787 5
 1258 0012 0023     		movs	r3, #0
 1259 0014 BB61     		str	r3, [r7, #24]
 1260 0016 2B4B     		ldr	r3, .L89
 1261 0018 1B6B     		ldr	r3, [r3, #48]
 1262 001a 2A4A     		ldr	r2, .L89
 1263 001c 43F00103 		orr	r3, r3, #1
 1264 0020 1363     		str	r3, [r2, #48]
 1265 0022 284B     		ldr	r3, .L89
 1266 0024 1B6B     		ldr	r3, [r3, #48]
 1267 0026 03F00103 		and	r3, r3, #1
 1268 002a BB61     		str	r3, [r7, #24]
 1269 002c BB69     		ldr	r3, [r7, #24]
 1270              	.LBE4:
 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Pin = MCO1_PIN;
 1271              		.loc 1 790 25
 1272 002e 4FF48073 		mov	r3, #256
 1273 0032 FB61     		str	r3, [r7, #28]
 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 1274              		.loc 1 791 26
 1275 0034 0223     		movs	r3, #2
 1276 0036 3B62     		str	r3, [r7, #32]
 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 1277              		.loc 1 792 27
 1278 0038 0323     		movs	r3, #3
 1279 003a BB62     		str	r3, [r7, #40]
 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 1280              		.loc 1 793 26
 1281 003c 0023     		movs	r3, #0
 1282 003e 7B62     		str	r3, [r7, #36]
 794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 1283              		.loc 1 794 31
 1284 0040 0023     		movs	r3, #0
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 38


 1285 0042 FB62     		str	r3, [r7, #44]
 795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
 1286              		.loc 1 795 5
 1287 0044 07F11C03 		add	r3, r7, #28
 1288 0048 1946     		mov	r1, r3
 1289 004a 1F48     		ldr	r0, .L89+4
 1290 004c FFF7FEFF 		bl	HAL_GPIO_Init
 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
 798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
 1291              		.loc 1 798 5
 1292 0050 1C4B     		ldr	r3, .L89
 1293 0052 9B68     		ldr	r3, [r3, #8]
 1294 0054 23F0EC62 		bic	r2, r3, #123731968
 1295 0058 B968     		ldr	r1, [r7, #8]
 1296 005a 7B68     		ldr	r3, [r7, #4]
 1297 005c 0B43     		orrs	r3, r3, r1
 1298 005e 1949     		ldr	r1, .L89
 1299 0060 1343     		orrs	r3, r3, r2
 1300 0062 8B60     		str	r3, [r1, #8]
 799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****    /* This RCC MCO1 enable feature is available only on STM32F410xx devices */
 801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN)
 802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_RCC_MCO1_ENABLE();
 803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */
 804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2)
 806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
 807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
 809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* MCO2 Clock Enable */
 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __MCO2_CLK_ENABLE();
 812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Configure the MCO2 pin in alternate function mode */
 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Pin = MCO2_PIN;
 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
 820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U)))
 823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****    /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */
 825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN)
 826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_RCC_MCO2_ENABLE();
 827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */
 828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */
 830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1301              		.loc 1 830 1
 1302 0064 29E0     		b	.L88
 1303              	.L86:
 1304              	.LBB5:
 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 39


 1305              		.loc 1 811 5
 1306 0066 0023     		movs	r3, #0
 1307 0068 7B61     		str	r3, [r7, #20]
 1308 006a 164B     		ldr	r3, .L89
 1309 006c 1B6B     		ldr	r3, [r3, #48]
 1310 006e 154A     		ldr	r2, .L89
 1311 0070 43F00403 		orr	r3, r3, #4
 1312 0074 1363     		str	r3, [r2, #48]
 1313 0076 134B     		ldr	r3, .L89
 1314 0078 1B6B     		ldr	r3, [r3, #48]
 1315 007a 03F00403 		and	r3, r3, #4
 1316 007e 7B61     		str	r3, [r7, #20]
 1317 0080 7B69     		ldr	r3, [r7, #20]
 1318              	.LBE5:
 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 1319              		.loc 1 814 25
 1320 0082 4FF40073 		mov	r3, #512
 1321 0086 FB61     		str	r3, [r7, #28]
 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 1322              		.loc 1 815 26
 1323 0088 0223     		movs	r3, #2
 1324 008a 3B62     		str	r3, [r7, #32]
 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 1325              		.loc 1 816 27
 1326 008c 0323     		movs	r3, #3
 1327 008e BB62     		str	r3, [r7, #40]
 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 1328              		.loc 1 817 26
 1329 0090 0023     		movs	r3, #0
 1330 0092 7B62     		str	r3, [r7, #36]
 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
 1331              		.loc 1 818 31
 1332 0094 0023     		movs	r3, #0
 1333 0096 FB62     		str	r3, [r7, #44]
 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 1334              		.loc 1 819 5
 1335 0098 07F11C03 		add	r3, r7, #28
 1336 009c 1946     		mov	r1, r3
 1337 009e 0B48     		ldr	r0, .L89+8
 1338 00a0 FFF7FEFF 		bl	HAL_GPIO_Init
 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 1339              		.loc 1 822 5
 1340 00a4 074B     		ldr	r3, .L89
 1341 00a6 9B68     		ldr	r3, [r3, #8]
 1342 00a8 23F07842 		bic	r2, r3, #-134217728
 1343 00ac 7B68     		ldr	r3, [r7, #4]
 1344 00ae D900     		lsls	r1, r3, #3
 1345 00b0 BB68     		ldr	r3, [r7, #8]
 1346 00b2 0B43     		orrs	r3, r3, r1
 1347 00b4 0349     		ldr	r1, .L89
 1348 00b6 1343     		orrs	r3, r3, r2
 1349 00b8 8B60     		str	r3, [r1, #8]
 1350              	.L88:
 1351              		.loc 1 830 1
 1352 00ba 00BF     		nop
 1353 00bc 3037     		adds	r7, r7, #48
 1354              	.LCFI17:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 40


 1355              		.cfi_def_cfa_offset 8
 1356 00be BD46     		mov	sp, r7
 1357              	.LCFI18:
 1358              		.cfi_def_cfa_register 13
 1359              		@ sp needed
 1360 00c0 80BD     		pop	{r7, pc}
 1361              	.L90:
 1362 00c2 00BF     		.align	2
 1363              	.L89:
 1364 00c4 00380240 		.word	1073887232
 1365 00c8 00000240 		.word	1073872896
 1366 00cc 00080240 		.word	1073874944
 1367              		.cfi_endproc
 1368              	.LFE238:
 1370              		.section	.text.HAL_RCC_EnableCSS,"ax",%progbits
 1371              		.align	1
 1372              		.global	HAL_RCC_EnableCSS
 1373              		.syntax unified
 1374              		.thumb
 1375              		.thumb_func
 1377              	HAL_RCC_EnableCSS:
 1378              	.LFB239:
 831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Enables the Clock Security System.
 834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   If a failure is detected on the HSE oscillator clock, this oscillator
 835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         is automatically disabled and an interrupt is generated to inform the
 836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         software about the failure (Clock Security System Interrupt, CSSI),
 837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         allowing the MCU to perform rescue operations. The CSSI is linked to
 838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
 839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
 840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
 842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1379              		.loc 1 842 1
 1380              		.cfi_startproc
 1381              		@ args = 0, pretend = 0, frame = 0
 1382              		@ frame_needed = 1, uses_anonymous_args = 0
 1383              		@ link register save eliminated.
 1384 0000 80B4     		push	{r7}
 1385              	.LCFI19:
 1386              		.cfi_def_cfa_offset 4
 1387              		.cfi_offset 7, -4
 1388 0002 00AF     		add	r7, sp, #0
 1389              	.LCFI20:
 1390              		.cfi_def_cfa_register 7
 843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
 1391              		.loc 1 843 3
 1392 0004 034B     		ldr	r3, .L92
 1393              		.loc 1 843 38
 1394 0006 0122     		movs	r2, #1
 1395 0008 1A60     		str	r2, [r3]
 844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1396              		.loc 1 844 1
 1397 000a 00BF     		nop
 1398 000c BD46     		mov	sp, r7
 1399              	.LCFI21:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 41


 1400              		.cfi_def_cfa_register 13
 1401              		@ sp needed
 1402 000e 5DF8047B 		ldr	r7, [sp], #4
 1403              	.LCFI22:
 1404              		.cfi_restore 7
 1405              		.cfi_def_cfa_offset 0
 1406 0012 7047     		bx	lr
 1407              	.L93:
 1408              		.align	2
 1409              	.L92:
 1410 0014 4C004742 		.word	1111949388
 1411              		.cfi_endproc
 1412              	.LFE239:
 1414              		.section	.text.HAL_RCC_DisableCSS,"ax",%progbits
 1415              		.align	1
 1416              		.global	HAL_RCC_DisableCSS
 1417              		.syntax unified
 1418              		.thumb
 1419              		.thumb_func
 1421              	HAL_RCC_DisableCSS:
 1422              	.LFB240:
 845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Disables the Clock Security System.
 848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
 849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
 851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1423              		.loc 1 851 1
 1424              		.cfi_startproc
 1425              		@ args = 0, pretend = 0, frame = 0
 1426              		@ frame_needed = 1, uses_anonymous_args = 0
 1427              		@ link register save eliminated.
 1428 0000 80B4     		push	{r7}
 1429              	.LCFI23:
 1430              		.cfi_def_cfa_offset 4
 1431              		.cfi_offset 7, -4
 1432 0002 00AF     		add	r7, sp, #0
 1433              	.LCFI24:
 1434              		.cfi_def_cfa_register 7
 852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
 1435              		.loc 1 852 3
 1436 0004 034B     		ldr	r3, .L95
 1437              		.loc 1 852 38
 1438 0006 0022     		movs	r2, #0
 1439 0008 1A60     		str	r2, [r3]
 853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1440              		.loc 1 853 1
 1441 000a 00BF     		nop
 1442 000c BD46     		mov	sp, r7
 1443              	.LCFI25:
 1444              		.cfi_def_cfa_register 13
 1445              		@ sp needed
 1446 000e 5DF8047B 		ldr	r7, [sp], #4
 1447              	.LCFI26:
 1448              		.cfi_restore 7
 1449              		.cfi_def_cfa_offset 0
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 42


 1450 0012 7047     		bx	lr
 1451              	.L96:
 1452              		.align	2
 1453              	.L95:
 1454 0014 4C004742 		.word	1111949388
 1455              		.cfi_endproc
 1456              	.LFE240:
 1458              		.global	__aeabi_uldivmod
 1459              		.section	.text.HAL_RCC_GetSysClockFreq,"ax",%progbits
 1460              		.align	1
 1461              		.weak	HAL_RCC_GetSysClockFreq
 1462              		.syntax unified
 1463              		.thumb
 1464              		.thumb_func
 1466              	HAL_RCC_GetSysClockFreq:
 1467              	.LFB241:
 854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Returns the SYSCLK frequency
 857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The system frequency computed by this function is not the real
 859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         frequency in the chip. It is calculated based on the predefined
 860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         constant and the selected clock source:
 861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
 862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note     If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
 863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note     If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
 864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *           or HSI_VALUE(*) multiplied/divided by the PLL factors.
 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note     (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
 866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *               16 MHz) but the real value may vary depending on the variations
 867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *               in voltage and temperature.
 868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note     (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
 869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *                25 MHz), user has to ensure that HSE_VALUE is same as the real
 870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *                frequency of the crystal used. Otherwise, this function may
 871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *                have wrong result.
 872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The result of this function could be not correct when using fractional
 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         value for HSE crystal.
 875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   This function can be used by the user application to compute the
 877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         baudrate for the communication peripherals or configure other parameters.
 878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Each time SYSCLK changes, this function must be called to update the
 880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorre
 881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval SYSCLK frequency
 884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void)
 886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1468              		.loc 1 886 1
 1469              		.cfi_startproc
 1470              		@ args = 0, pretend = 0, frame = 80
 1471              		@ frame_needed = 1, uses_anonymous_args = 0
 1472 0000 2DE9B04F 		push	{r4, r5, r7, r8, r9, r10, fp, lr}
 1473              	.LCFI27:
 1474              		.cfi_def_cfa_offset 32
 1475              		.cfi_offset 4, -32
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 43


 1476              		.cfi_offset 5, -28
 1477              		.cfi_offset 7, -24
 1478              		.cfi_offset 8, -20
 1479              		.cfi_offset 9, -16
 1480              		.cfi_offset 10, -12
 1481              		.cfi_offset 11, -8
 1482              		.cfi_offset 14, -4
 1483 0004 94B0     		sub	sp, sp, #80
 1484              	.LCFI28:
 1485              		.cfi_def_cfa_offset 112
 1486 0006 00AF     		add	r7, sp, #0
 1487              	.LCFI29:
 1488              		.cfi_def_cfa_register 7
 887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
 1489              		.loc 1 887 12
 1490 0008 0023     		movs	r3, #0
 1491 000a 7B64     		str	r3, [r7, #68]
 1492              		.loc 1 887 23
 1493 000c 0023     		movs	r3, #0
 1494 000e FB64     		str	r3, [r7, #76]
 1495              		.loc 1 887 36
 1496 0010 0023     		movs	r3, #0
 1497 0012 3B64     		str	r3, [r7, #64]
 888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   uint32_t sysclockfreq = 0U;
 1498              		.loc 1 888 12
 1499 0014 0023     		movs	r3, #0
 1500 0016 BB64     		str	r3, [r7, #72]
 889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get SYSCLK source -------------------------------------------------------*/
 891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   switch (RCC->CFGR & RCC_CFGR_SWS)
 1501              		.loc 1 891 14
 1502 0018 794B     		ldr	r3, .L106
 1503 001a 9B68     		ldr	r3, [r3, #8]
 1504              		.loc 1 891 21
 1505 001c 03F00C03 		and	r3, r3, #12
 1506              		.loc 1 891 3
 1507 0020 082B     		cmp	r3, #8
 1508 0022 0DD0     		beq	.L98
 1509 0024 082B     		cmp	r3, #8
 1510 0026 00F2E180 		bhi	.L99
 1511 002a 002B     		cmp	r3, #0
 1512 002c 02D0     		beq	.L100
 1513 002e 042B     		cmp	r3, #4
 1514 0030 03D0     		beq	.L101
 1515 0032 DBE0     		b	.L99
 1516              	.L100:
 892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
 894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       sysclockfreq = HSI_VALUE;
 1517              		.loc 1 895 20
 1518 0034 734B     		ldr	r3, .L106+4
 1519 0036 BB64     		str	r3, [r7, #72]
 896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****        break;
 1520              		.loc 1 896 8
 1521 0038 DBE0     		b	.L102
 1522              	.L101:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 44


 897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
 899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       sysclockfreq = HSE_VALUE;
 1523              		.loc 1 900 20
 1524 003a 734B     		ldr	r3, .L106+8
 1525 003c BB64     		str	r3, [r7, #72]
 901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       break;
 1526              		.loc 1 901 7
 1527 003e D8E0     		b	.L102
 1528              	.L98:
 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     case RCC_CFGR_SWS_PLL:  /* PLL used as system clock  source */
 904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
 906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       SYSCLK = PLL_VCO / PLLP */
 907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
 1529              		.loc 1 907 17
 1530 0040 6F4B     		ldr	r3, .L106
 1531 0042 5B68     		ldr	r3, [r3, #4]
 1532              		.loc 1 907 12
 1533 0044 03F03F03 		and	r3, r3, #63
 1534 0048 7B64     		str	r3, [r7, #68]
 908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
 1535              		.loc 1 908 10
 1536 004a 6D4B     		ldr	r3, .L106
 1537 004c 5B68     		ldr	r3, [r3, #4]
 1538 004e 03F48003 		and	r3, r3, #4194304
 1539              		.loc 1 908 9
 1540 0052 002B     		cmp	r3, #0
 1541 0054 63D0     		beq	.L103
 909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* HSE used as PLL clock source */
 911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN
 1542              		.loc 1 911 72
 1543 0056 6A4B     		ldr	r3, .L106
 1544 0058 5B68     		ldr	r3, [r3, #4]
 1545              		.loc 1 911 102
 1546 005a 9B09     		lsrs	r3, r3, #6
 1547              		.loc 1 911 56
 1548 005c 0022     		movs	r2, #0
 1549 005e BB63     		str	r3, [r7, #56]
 1550 0060 FA63     		str	r2, [r7, #60]
 1551 0062 BB6B     		ldr	r3, [r7, #56]
 1552 0064 C3F30803 		ubfx	r3, r3, #0, #9
 1553 0068 3B63     		str	r3, [r7, #48]
 1554 006a 0023     		movs	r3, #0
 1555 006c 7B63     		str	r3, [r7, #52]
 1556              		.loc 1 911 53
 1557 006e D7E90C45 		ldrd	r4, [r7, #48]
 1558 0072 2246     		mov	r2, r4
 1559 0074 2B46     		mov	r3, r5
 1560 0076 4FF00000 		mov	r0, #0
 1561 007a 4FF00001 		mov	r1, #0
 1562 007e 5901     		lsls	r1, r3, #5
 1563 0080 41EAD261 		orr	r1, r1, r2, lsr #27
 1564 0084 5001     		lsls	r0, r2, #5
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 45


 1565 0086 0246     		mov	r2, r0
 1566 0088 0B46     		mov	r3, r1
 1567 008a 2146     		mov	r1, r4
 1568 008c 511A     		subs	r1, r2, r1
 1569 008e 3961     		str	r1, [r7, #16]
 1570 0090 2946     		mov	r1, r5
 1571 0092 63EB0103 		sbc	r3, r3, r1
 1572 0096 7B61     		str	r3, [r7, #20]
 1573 0098 4FF00002 		mov	r2, #0
 1574 009c 4FF00003 		mov	r3, #0
 1575 00a0 D7E904AB 		ldrd	r10, [r7, #16]
 1576 00a4 5946     		mov	r1, fp
 1577 00a6 8B01     		lsls	r3, r1, #6
 1578 00a8 5146     		mov	r1, r10
 1579 00aa 43EA9163 		orr	r3, r3, r1, lsr #26
 1580 00ae 5146     		mov	r1, r10
 1581 00b0 8A01     		lsls	r2, r1, #6
 1582 00b2 5146     		mov	r1, r10
 1583 00b4 B2EB0108 		subs	r8, r2, r1
 1584 00b8 5946     		mov	r1, fp
 1585 00ba 63EB0109 		sbc	r9, r3, r1
 1586 00be 4FF00002 		mov	r2, #0
 1587 00c2 4FF00003 		mov	r3, #0
 1588 00c6 4FEAC903 		lsl	r3, r9, #3
 1589 00ca 43EA5873 		orr	r3, r3, r8, lsr #29
 1590 00ce 4FEAC802 		lsl	r2, r8, #3
 1591 00d2 9046     		mov	r8, r2
 1592 00d4 9946     		mov	r9, r3
 1593 00d6 2346     		mov	r3, r4
 1594 00d8 18EB0303 		adds	r3, r8, r3
 1595 00dc BB60     		str	r3, [r7, #8]
 1596 00de 2B46     		mov	r3, r5
 1597 00e0 49EB0303 		adc	r3, r9, r3
 1598 00e4 FB60     		str	r3, [r7, #12]
 1599 00e6 4FF00002 		mov	r2, #0
 1600 00ea 4FF00003 		mov	r3, #0
 1601 00ee D7E90245 		ldrd	r4, [r7, #8]
 1602 00f2 2946     		mov	r1, r5
 1603 00f4 4B02     		lsls	r3, r1, #9
 1604 00f6 2146     		mov	r1, r4
 1605 00f8 43EAD153 		orr	r3, r3, r1, lsr #23
 1606 00fc 2146     		mov	r1, r4
 1607 00fe 4A02     		lsls	r2, r1, #9
 1608 0100 1046     		mov	r0, r2
 1609 0102 1946     		mov	r1, r3
 1610              		.loc 1 911 132
 1611 0104 7B6C     		ldr	r3, [r7, #68]
 1612 0106 0022     		movs	r2, #0
 1613 0108 BB62     		str	r3, [r7, #40]
 1614 010a FA62     		str	r2, [r7, #44]
 1615              		.loc 1 911 130
 1616 010c D7E90A23 		ldrd	r2, [r7, #40]
 1617 0110 FFF7FEFF 		bl	__aeabi_uldivmod
 1618 0114 0246     		mov	r2, r0
 1619 0116 0B46     		mov	r3, r1
 1620              		.loc 1 911 16
 1621 0118 1346     		mov	r3, r2
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 46


 1622 011a FB64     		str	r3, [r7, #76]
 1623 011c 58E0     		b	.L104
 1624              	.L103:
 912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       else
 914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       {
 915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         /* HSI used as PLL clock source */
 916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****         pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN
 1625              		.loc 1 916 72
 1626 011e 384B     		ldr	r3, .L106
 1627 0120 5B68     		ldr	r3, [r3, #4]
 1628              		.loc 1 916 102
 1629 0122 9B09     		lsrs	r3, r3, #6
 1630              		.loc 1 916 56
 1631 0124 0022     		movs	r2, #0
 1632 0126 1846     		mov	r0, r3
 1633 0128 1146     		mov	r1, r2
 1634 012a C0F30803 		ubfx	r3, r0, #0, #9
 1635 012e 3B62     		str	r3, [r7, #32]
 1636 0130 0023     		movs	r3, #0
 1637 0132 7B62     		str	r3, [r7, #36]
 1638              		.loc 1 916 53
 1639 0134 D7E90889 		ldrd	r8, [r7, #32]
 1640 0138 4246     		mov	r2, r8
 1641 013a 4B46     		mov	r3, r9
 1642 013c 4FF00000 		mov	r0, #0
 1643 0140 4FF00001 		mov	r1, #0
 1644 0144 5901     		lsls	r1, r3, #5
 1645 0146 41EAD261 		orr	r1, r1, r2, lsr #27
 1646 014a 5001     		lsls	r0, r2, #5
 1647 014c 0246     		mov	r2, r0
 1648 014e 0B46     		mov	r3, r1
 1649 0150 4146     		mov	r1, r8
 1650 0152 B2EB010A 		subs	r10, r2, r1
 1651 0156 4946     		mov	r1, r9
 1652 0158 63EB010B 		sbc	fp, r3, r1
 1653 015c 4FF00002 		mov	r2, #0
 1654 0160 4FF00003 		mov	r3, #0
 1655 0164 4FEA8B13 		lsl	r3, fp, #6
 1656 0168 43EA9A63 		orr	r3, r3, r10, lsr #26
 1657 016c 4FEA8A12 		lsl	r2, r10, #6
 1658 0170 B2EB0A04 		subs	r4, r2, r10
 1659 0174 63EB0B05 		sbc	r5, r3, fp
 1660 0178 4FF00002 		mov	r2, #0
 1661 017c 4FF00003 		mov	r3, #0
 1662 0180 EB00     		lsls	r3, r5, #3
 1663 0182 43EA5473 		orr	r3, r3, r4, lsr #29
 1664 0186 E200     		lsls	r2, r4, #3
 1665 0188 1446     		mov	r4, r2
 1666 018a 1D46     		mov	r5, r3
 1667 018c 4346     		mov	r3, r8
 1668 018e E318     		adds	r3, r4, r3
 1669 0190 3B60     		str	r3, [r7]
 1670 0192 4B46     		mov	r3, r9
 1671 0194 45EB0303 		adc	r3, r5, r3
 1672 0198 7B60     		str	r3, [r7, #4]
 1673 019a 4FF00002 		mov	r2, #0
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 47


 1674 019e 4FF00003 		mov	r3, #0
 1675 01a2 D7E90045 		ldrd	r4, [r7]
 1676 01a6 2946     		mov	r1, r5
 1677 01a8 8B02     		lsls	r3, r1, #10
 1678 01aa 2146     		mov	r1, r4
 1679 01ac 43EA9153 		orr	r3, r3, r1, lsr #22
 1680 01b0 2146     		mov	r1, r4
 1681 01b2 8A02     		lsls	r2, r1, #10
 1682 01b4 1046     		mov	r0, r2
 1683 01b6 1946     		mov	r1, r3
 1684              		.loc 1 916 132
 1685 01b8 7B6C     		ldr	r3, [r7, #68]
 1686 01ba 0022     		movs	r2, #0
 1687 01bc BB61     		str	r3, [r7, #24]
 1688 01be FA61     		str	r2, [r7, #28]
 1689              		.loc 1 916 130
 1690 01c0 D7E90623 		ldrd	r2, [r7, #24]
 1691 01c4 FFF7FEFF 		bl	__aeabi_uldivmod
 1692 01c8 0246     		mov	r2, r0
 1693 01ca 0B46     		mov	r3, r1
 1694              		.loc 1 916 16
 1695 01cc 1346     		mov	r3, r2
 1696 01ce FB64     		str	r3, [r7, #76]
 1697              	.L104:
 917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       }
 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
 1698              		.loc 1 918 21
 1699 01d0 0B4B     		ldr	r3, .L106
 1700 01d2 5B68     		ldr	r3, [r3, #4]
 1701              		.loc 1 918 51
 1702 01d4 1B0C     		lsrs	r3, r3, #16
 1703 01d6 03F00303 		and	r3, r3, #3
 1704              		.loc 1 918 76
 1705 01da 0133     		adds	r3, r3, #1
 1706              		.loc 1 918 12
 1707 01dc 5B00     		lsls	r3, r3, #1
 1708 01de 3B64     		str	r3, [r7, #64]
 919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       sysclockfreq = pllvco/pllp;
 1709              		.loc 1 920 20
 1710 01e0 FA6C     		ldr	r2, [r7, #76]
 1711 01e2 3B6C     		ldr	r3, [r7, #64]
 1712 01e4 B2FBF3F3 		udiv	r3, r2, r3
 1713 01e8 BB64     		str	r3, [r7, #72]
 921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       break;
 1714              		.loc 1 921 7
 1715 01ea 02E0     		b	.L102
 1716              	.L99:
 922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     default:
 924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     {
 925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       sysclockfreq = HSI_VALUE;
 1717              		.loc 1 925 20
 1718 01ec 054B     		ldr	r3, .L106+4
 1719 01ee BB64     		str	r3, [r7, #72]
 926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****       break;
 1720              		.loc 1 926 7
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 48


 1721 01f0 00BF     		nop
 1722              	.L102:
 927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     }
 928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return sysclockfreq;
 1723              		.loc 1 929 10
 1724 01f2 BB6C     		ldr	r3, [r7, #72]
 930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1725              		.loc 1 930 1
 1726 01f4 1846     		mov	r0, r3
 1727 01f6 5037     		adds	r7, r7, #80
 1728              	.LCFI30:
 1729              		.cfi_def_cfa_offset 32
 1730 01f8 BD46     		mov	sp, r7
 1731              	.LCFI31:
 1732              		.cfi_def_cfa_register 13
 1733              		@ sp needed
 1734 01fa BDE8B08F 		pop	{r4, r5, r7, r8, r9, r10, fp, pc}
 1735              	.L107:
 1736 01fe 00BF     		.align	2
 1737              	.L106:
 1738 0200 00380240 		.word	1073887232
 1739 0204 0024F400 		.word	16000000
 1740 0208 00127A00 		.word	8000000
 1741              		.cfi_endproc
 1742              	.LFE241:
 1744              		.section	.text.HAL_RCC_GetHCLKFreq,"ax",%progbits
 1745              		.align	1
 1746              		.global	HAL_RCC_GetHCLKFreq
 1747              		.syntax unified
 1748              		.thumb
 1749              		.thumb_func
 1751              	HAL_RCC_GetHCLKFreq:
 1752              	.LFB242:
 931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Returns the HCLK frequency
 934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Each time HCLK changes, this function must be called to update the
 935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         right HCLK value. Otherwise, any configuration based on this function will be incorrect
 936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *
 937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
 938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         and updated within this function
 939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval HCLK frequency
 940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
 942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1753              		.loc 1 942 1
 1754              		.cfi_startproc
 1755              		@ args = 0, pretend = 0, frame = 0
 1756              		@ frame_needed = 1, uses_anonymous_args = 0
 1757              		@ link register save eliminated.
 1758 0000 80B4     		push	{r7}
 1759              	.LCFI32:
 1760              		.cfi_def_cfa_offset 4
 1761              		.cfi_offset 7, -4
 1762 0002 00AF     		add	r7, sp, #0
 1763              	.LCFI33:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 49


 1764              		.cfi_def_cfa_register 7
 943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return SystemCoreClock;
 1765              		.loc 1 943 10
 1766 0004 034B     		ldr	r3, .L110
 1767 0006 1B68     		ldr	r3, [r3]
 944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1768              		.loc 1 944 1
 1769 0008 1846     		mov	r0, r3
 1770 000a BD46     		mov	sp, r7
 1771              	.LCFI34:
 1772              		.cfi_def_cfa_register 13
 1773              		@ sp needed
 1774 000c 5DF8047B 		ldr	r7, [sp], #4
 1775              	.LCFI35:
 1776              		.cfi_restore 7
 1777              		.cfi_def_cfa_offset 0
 1778 0010 7047     		bx	lr
 1779              	.L111:
 1780 0012 00BF     		.align	2
 1781              	.L110:
 1782 0014 00000000 		.word	SystemCoreClock
 1783              		.cfi_endproc
 1784              	.LFE242:
 1786              		.section	.text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
 1787              		.align	1
 1788              		.global	HAL_RCC_GetPCLK1Freq
 1789              		.syntax unified
 1790              		.thumb
 1791              		.thumb_func
 1793              	HAL_RCC_GetPCLK1Freq:
 1794              	.LFB243:
 945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Returns the PCLK1 frequency
 948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Each time PCLK1 changes, this function must be called to update the
 949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
 950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval PCLK1 frequency
 951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
 953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1795              		.loc 1 953 1
 1796              		.cfi_startproc
 1797              		@ args = 0, pretend = 0, frame = 0
 1798              		@ frame_needed = 1, uses_anonymous_args = 0
 1799 0000 80B5     		push	{r7, lr}
 1800              	.LCFI36:
 1801              		.cfi_def_cfa_offset 8
 1802              		.cfi_offset 7, -8
 1803              		.cfi_offset 14, -4
 1804 0002 00AF     		add	r7, sp, #0
 1805              	.LCFI37:
 1806              		.cfi_def_cfa_register 7
 954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
 955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]
 1807              		.loc 1 955 11
 1808 0004 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 1809 0008 0246     		mov	r2, r0
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 50


 1810              		.loc 1 955 54
 1811 000a 054B     		ldr	r3, .L114
 1812 000c 9B68     		ldr	r3, [r3, #8]
 1813              		.loc 1 955 78
 1814 000e 9B0A     		lsrs	r3, r3, #10
 1815 0010 03F00703 		and	r3, r3, #7
 1816              		.loc 1 955 49
 1817 0014 0349     		ldr	r1, .L114+4
 1818 0016 CB5C     		ldrb	r3, [r1, r3]	@ zero_extendqisi2
 1819              		.loc 1 955 33
 1820 0018 22FA03F3 		lsr	r3, r2, r3
 956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1821              		.loc 1 956 1
 1822 001c 1846     		mov	r0, r3
 1823 001e 80BD     		pop	{r7, pc}
 1824              	.L115:
 1825              		.align	2
 1826              	.L114:
 1827 0020 00380240 		.word	1073887232
 1828 0024 00000000 		.word	APBPrescTable
 1829              		.cfi_endproc
 1830              	.LFE243:
 1832              		.section	.text.HAL_RCC_GetPCLK2Freq,"ax",%progbits
 1833              		.align	1
 1834              		.global	HAL_RCC_GetPCLK2Freq
 1835              		.syntax unified
 1836              		.thumb
 1837              		.thumb_func
 1839              	HAL_RCC_GetPCLK2Freq:
 1840              	.LFB244:
 957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Returns the PCLK2 frequency
 960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note   Each time PCLK2 changes, this function must be called to update the
 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
 962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval PCLK2 frequency
 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void)
 965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1841              		.loc 1 965 1
 1842              		.cfi_startproc
 1843              		@ args = 0, pretend = 0, frame = 0
 1844              		@ frame_needed = 1, uses_anonymous_args = 0
 1845 0000 80B5     		push	{r7, lr}
 1846              	.LCFI38:
 1847              		.cfi_def_cfa_offset 8
 1848              		.cfi_offset 7, -8
 1849              		.cfi_offset 14, -4
 1850 0002 00AF     		add	r7, sp, #0
 1851              	.LCFI39:
 1852              		.cfi_def_cfa_register 7
 966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos])
 1853              		.loc 1 967 11
 1854 0004 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 1855 0008 0246     		mov	r2, r0
 1856              		.loc 1 967 53
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 51


 1857 000a 054B     		ldr	r3, .L118
 1858 000c 9B68     		ldr	r3, [r3, #8]
 1859              		.loc 1 967 77
 1860 000e 5B0B     		lsrs	r3, r3, #13
 1861 0010 03F00703 		and	r3, r3, #7
 1862              		.loc 1 967 48
 1863 0014 0349     		ldr	r1, .L118+4
 1864 0016 CB5C     		ldrb	r3, [r1, r3]	@ zero_extendqisi2
 1865              		.loc 1 967 32
 1866 0018 22FA03F3 		lsr	r3, r2, r3
 968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 1867              		.loc 1 968 1
 1868 001c 1846     		mov	r0, r3
 1869 001e 80BD     		pop	{r7, pc}
 1870              	.L119:
 1871              		.align	2
 1872              	.L118:
 1873 0020 00380240 		.word	1073887232
 1874 0024 00000000 		.word	APBPrescTable
 1875              		.cfi_endproc
 1876              	.LFE244:
 1878              		.section	.text.HAL_RCC_GetOscConfig,"ax",%progbits
 1879              		.align	1
 1880              		.weak	HAL_RCC_GetOscConfig
 1881              		.syntax unified
 1882              		.thumb
 1883              		.thumb_func
 1885              	HAL_RCC_GetOscConfig:
 1886              	.LFB245:
 969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
 971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Configures the RCC_OscInitStruct according to the internal
 972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * RCC configuration registers.
 973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
 974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * will be configured.
 975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
 976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 1887              		.loc 1 978 1
 1888              		.cfi_startproc
 1889              		@ args = 0, pretend = 0, frame = 8
 1890              		@ frame_needed = 1, uses_anonymous_args = 0
 1891              		@ link register save eliminated.
 1892 0000 80B4     		push	{r7}
 1893              	.LCFI40:
 1894              		.cfi_def_cfa_offset 4
 1895              		.cfi_offset 7, -4
 1896 0002 83B0     		sub	sp, sp, #12
 1897              	.LCFI41:
 1898              		.cfi_def_cfa_offset 16
 1899 0004 00AF     		add	r7, sp, #0
 1900              	.LCFI42:
 1901              		.cfi_def_cfa_register 7
 1902 0006 7860     		str	r0, [r7, #4]
 979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Set all possible values for the Oscillator type parameter ---------------*/
 980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 52


 1903              		.loc 1 980 37
 1904 0008 7B68     		ldr	r3, [r7, #4]
 1905 000a 0F22     		movs	r2, #15
 1906 000c 1A60     		str	r2, [r3]
 981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the HSE configuration -----------------------------------------------*/
 983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
 1907              		.loc 1 983 10
 1908 000e 454B     		ldr	r3, .L133
 1909 0010 1B68     		ldr	r3, [r3]
 1910              		.loc 1 983 15
 1911 0012 03F48023 		and	r3, r3, #262144
 1912              		.loc 1 983 5
 1913 0016 B3F5802F 		cmp	r3, #262144
 1914 001a 04D1     		bne	.L121
 984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
 1915              		.loc 1 985 33
 1916 001c 7B68     		ldr	r3, [r7, #4]
 1917 001e 4FF4A022 		mov	r2, #327680
 1918 0022 5A60     		str	r2, [r3, #4]
 1919 0024 0EE0     		b	.L122
 1920              	.L121:
 986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
 1921              		.loc 1 987 15
 1922 0026 3F4B     		ldr	r3, .L133
 1923 0028 1B68     		ldr	r3, [r3]
 1924              		.loc 1 987 20
 1925 002a 03F48033 		and	r3, r3, #65536
 1926              		.loc 1 987 10
 1927 002e B3F5803F 		cmp	r3, #65536
 1928 0032 04D1     		bne	.L123
 988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_ON;
 1929              		.loc 1 989 33
 1930 0034 7B68     		ldr	r3, [r7, #4]
 1931 0036 4FF48032 		mov	r2, #65536
 1932 003a 5A60     		str	r2, [r3, #4]
 1933 003c 02E0     		b	.L122
 1934              	.L123:
 990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
 992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
 1935              		.loc 1 993 33
 1936 003e 7B68     		ldr	r3, [r7, #4]
 1937 0040 0022     		movs	r2, #0
 1938 0042 5A60     		str	r2, [r3, #4]
 1939              	.L122:
 994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
 996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the HSI configuration -----------------------------------------------*/
 997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
 1940              		.loc 1 997 10
 1941 0044 374B     		ldr	r3, .L133
 1942 0046 1B68     		ldr	r3, [r3]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 53


 1943              		.loc 1 997 15
 1944 0048 03F00103 		and	r3, r3, #1
 1945              		.loc 1 997 5
 1946 004c 012B     		cmp	r3, #1
 1947 004e 03D1     		bne	.L124
 998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
 999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_ON;
 1948              		.loc 1 999 33
 1949 0050 7B68     		ldr	r3, [r7, #4]
 1950 0052 0122     		movs	r2, #1
 1951 0054 DA60     		str	r2, [r3, #12]
 1952 0056 02E0     		b	.L125
 1953              	.L124:
1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
 1954              		.loc 1 1003 33
 1955 0058 7B68     		ldr	r3, [r7, #4]
 1956 005a 0022     		movs	r2, #0
 1957 005c DA60     		str	r2, [r3, #12]
 1958              	.L125:
1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_P
 1959              		.loc 1 1006 59
 1960 005e 314B     		ldr	r3, .L133
 1961 0060 1B68     		ldr	r3, [r3]
 1962              		.loc 1 1006 44
 1963 0062 DB08     		lsrs	r3, r3, #3
 1964 0064 03F01F02 		and	r2, r3, #31
 1965              		.loc 1 1006 42
 1966 0068 7B68     		ldr	r3, [r7, #4]
 1967 006a 1A61     		str	r2, [r3, #16]
1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the LSE configuration -----------------------------------------------*/
1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
 1968              		.loc 1 1009 10
 1969 006c 2D4B     		ldr	r3, .L133
 1970 006e 1B6F     		ldr	r3, [r3, #112]
 1971              		.loc 1 1009 17
 1972 0070 03F00403 		and	r3, r3, #4
 1973              		.loc 1 1009 5
 1974 0074 042B     		cmp	r3, #4
 1975 0076 03D1     		bne	.L126
1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
 1976              		.loc 1 1011 33
 1977 0078 7B68     		ldr	r3, [r7, #4]
 1978 007a 0522     		movs	r2, #5
 1979 007c 9A60     		str	r2, [r3, #8]
 1980 007e 0CE0     		b	.L127
 1981              	.L126:
1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
 1982              		.loc 1 1013 15
 1983 0080 284B     		ldr	r3, .L133
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 54


 1984 0082 1B6F     		ldr	r3, [r3, #112]
 1985              		.loc 1 1013 22
 1986 0084 03F00103 		and	r3, r3, #1
 1987              		.loc 1 1013 10
 1988 0088 012B     		cmp	r3, #1
 1989 008a 03D1     		bne	.L128
1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_ON;
 1990              		.loc 1 1015 33
 1991 008c 7B68     		ldr	r3, [r7, #4]
 1992 008e 0122     		movs	r2, #1
 1993 0090 9A60     		str	r2, [r3, #8]
 1994 0092 02E0     		b	.L127
 1995              	.L128:
1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
 1996              		.loc 1 1019 33
 1997 0094 7B68     		ldr	r3, [r7, #4]
 1998 0096 0022     		movs	r2, #0
 1999 0098 9A60     		str	r2, [r3, #8]
 2000              	.L127:
1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the LSI configuration -----------------------------------------------*/
1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
 2001              		.loc 1 1023 10
 2002 009a 224B     		ldr	r3, .L133
 2003 009c 5B6F     		ldr	r3, [r3, #116]
 2004              		.loc 1 1023 16
 2005 009e 03F00103 		and	r3, r3, #1
 2006              		.loc 1 1023 5
 2007 00a2 012B     		cmp	r3, #1
 2008 00a4 03D1     		bne	.L129
1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_ON;
 2009              		.loc 1 1025 33
 2010 00a6 7B68     		ldr	r3, [r7, #4]
 2011 00a8 0122     		movs	r2, #1
 2012 00aa 5A61     		str	r2, [r3, #20]
 2013 00ac 02E0     		b	.L130
 2014              	.L129:
1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
 2015              		.loc 1 1029 33
 2016 00ae 7B68     		ldr	r3, [r7, #4]
 2017 00b0 0022     		movs	r2, #0
 2018 00b2 5A61     		str	r2, [r3, #20]
 2019              	.L130:
1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the PLL configuration -----------------------------------------------*/
1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
 2020              		.loc 1 1033 10
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 55


 2021 00b4 1B4B     		ldr	r3, .L133
 2022 00b6 1B68     		ldr	r3, [r3]
 2023              		.loc 1 1033 15
 2024 00b8 03F08073 		and	r3, r3, #16777216
 2025              		.loc 1 1033 5
 2026 00bc B3F1807F 		cmp	r3, #16777216
 2027 00c0 03D1     		bne	.L131
1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
 2028              		.loc 1 1035 37
 2029 00c2 7B68     		ldr	r3, [r7, #4]
 2030 00c4 0222     		movs	r2, #2
 2031 00c6 9A61     		str	r2, [r3, #24]
 2032 00c8 02E0     		b	.L132
 2033              	.L131:
1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   else
1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
 2034              		.loc 1 1039 37
 2035 00ca 7B68     		ldr	r3, [r7, #4]
 2036 00cc 0122     		movs	r2, #1
 2037 00ce 9A61     		str	r2, [r3, #24]
 2038              	.L132:
1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
 2039              		.loc 1 1041 52
 2040 00d0 144B     		ldr	r3, .L133
 2041 00d2 5B68     		ldr	r3, [r3, #4]
 2042              		.loc 1 1041 38
 2043 00d4 03F48002 		and	r2, r3, #4194304
 2044              		.loc 1 1041 36
 2045 00d8 7B68     		ldr	r3, [r7, #4]
 2046 00da DA61     		str	r2, [r3, #28]
1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
 2047              		.loc 1 1042 47
 2048 00dc 114B     		ldr	r3, .L133
 2049 00de 5B68     		ldr	r3, [r3, #4]
 2050              		.loc 1 1042 33
 2051 00e0 03F03F02 		and	r2, r3, #63
 2052              		.loc 1 1042 31
 2053 00e4 7B68     		ldr	r3, [r7, #4]
 2054 00e6 1A62     		str	r2, [r3, #32]
1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po
 2055              		.loc 1 1043 48
 2056 00e8 0E4B     		ldr	r3, .L133
 2057 00ea 5B68     		ldr	r3, [r3, #4]
 2058              		.loc 1 1043 33
 2059 00ec 9B09     		lsrs	r3, r3, #6
 2060 00ee C3F30802 		ubfx	r2, r3, #0, #9
 2061              		.loc 1 1043 31
 2062 00f2 7B68     		ldr	r3, [r7, #4]
 2063 00f4 5A62     		str	r2, [r3, #36]
1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0
 2064              		.loc 1 1044 50
 2065 00f6 0B4B     		ldr	r3, .L133
 2066 00f8 5B68     		ldr	r3, [r3, #4]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 56


 2067              		.loc 1 1044 60
 2068 00fa 03F44033 		and	r3, r3, #196608
 2069              		.loc 1 1044 80
 2070 00fe 03F58033 		add	r3, r3, #65536
 2071              		.loc 1 1044 102
 2072 0102 5B00     		lsls	r3, r3, #1
 2073              		.loc 1 1044 33
 2074 0104 1A0C     		lsrs	r2, r3, #16
 2075              		.loc 1 1044 31
 2076 0106 7B68     		ldr	r3, [r7, #4]
 2077 0108 9A62     		str	r2, [r3, #40]
1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po
 2078              		.loc 1 1045 48
 2079 010a 064B     		ldr	r3, .L133
 2080 010c 5B68     		ldr	r3, [r3, #4]
 2081              		.loc 1 1045 33
 2082 010e 1B0E     		lsrs	r3, r3, #24
 2083 0110 03F00F02 		and	r2, r3, #15
 2084              		.loc 1 1045 31
 2085 0114 7B68     		ldr	r3, [r7, #4]
 2086 0116 DA62     		str	r2, [r3, #44]
1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 2087              		.loc 1 1046 1
 2088 0118 00BF     		nop
 2089 011a 0C37     		adds	r7, r7, #12
 2090              	.LCFI43:
 2091              		.cfi_def_cfa_offset 4
 2092 011c BD46     		mov	sp, r7
 2093              	.LCFI44:
 2094              		.cfi_def_cfa_register 13
 2095              		@ sp needed
 2096 011e 5DF8047B 		ldr	r7, [sp], #4
 2097              	.LCFI45:
 2098              		.cfi_restore 7
 2099              		.cfi_def_cfa_offset 0
 2100 0122 7047     		bx	lr
 2101              	.L134:
 2102              		.align	2
 2103              	.L133:
 2104 0124 00380240 		.word	1073887232
 2105              		.cfi_endproc
 2106              	.LFE245:
 2108              		.section	.text.HAL_RCC_GetClockConfig,"ax",%progbits
 2109              		.align	1
 2110              		.global	HAL_RCC_GetClockConfig
 2111              		.syntax unified
 2112              		.thumb
 2113              		.thumb_func
 2115              	HAL_RCC_GetClockConfig:
 2116              	.LFB246:
1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  Configures the RCC_ClkInitStruct according to the internal
1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * RCC configuration registers.
1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * will be configured.
1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @param  pFLatency Pointer on the Flash Latency.
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 57


1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 2117              		.loc 1 1057 1
 2118              		.cfi_startproc
 2119              		@ args = 0, pretend = 0, frame = 8
 2120              		@ frame_needed = 1, uses_anonymous_args = 0
 2121              		@ link register save eliminated.
 2122 0000 80B4     		push	{r7}
 2123              	.LCFI46:
 2124              		.cfi_def_cfa_offset 4
 2125              		.cfi_offset 7, -4
 2126 0002 83B0     		sub	sp, sp, #12
 2127              	.LCFI47:
 2128              		.cfi_def_cfa_offset 16
 2129 0004 00AF     		add	r7, sp, #0
 2130              	.LCFI48:
 2131              		.cfi_def_cfa_register 7
 2132 0006 7860     		str	r0, [r7, #4]
 2133 0008 3960     		str	r1, [r7]
1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Set all possible values for the Clock type parameter --------------------*/
1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 
 2134              		.loc 1 1059 32
 2135 000a 7B68     		ldr	r3, [r7, #4]
 2136 000c 0F22     		movs	r2, #15
 2137 000e 1A60     		str	r2, [r3]
1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the SYSCLK configuration --------------------------------------------*/
1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 2138              		.loc 1 1062 51
 2139 0010 124B     		ldr	r3, .L136
 2140 0012 9B68     		ldr	r3, [r3, #8]
 2141              		.loc 1 1062 37
 2142 0014 03F00302 		and	r2, r3, #3
 2143              		.loc 1 1062 35
 2144 0018 7B68     		ldr	r3, [r7, #4]
 2145 001a 5A60     		str	r2, [r3, #4]
1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the HCLK configuration ----------------------------------------------*/
1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
 2146              		.loc 1 1065 52
 2147 001c 0F4B     		ldr	r3, .L136
 2148 001e 9B68     		ldr	r3, [r3, #8]
 2149              		.loc 1 1065 38
 2150 0020 03F0F002 		and	r2, r3, #240
 2151              		.loc 1 1065 36
 2152 0024 7B68     		ldr	r3, [r7, #4]
 2153 0026 9A60     		str	r2, [r3, #8]
1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the APB1 configuration ----------------------------------------------*/
1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
 2154              		.loc 1 1068 53
 2155 0028 0C4B     		ldr	r3, .L136
 2156 002a 9B68     		ldr	r3, [r3, #8]
 2157              		.loc 1 1068 39
 2158 002c 03F4E052 		and	r2, r3, #7168
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 58


 2159              		.loc 1 1068 37
 2160 0030 7B68     		ldr	r3, [r7, #4]
 2161 0032 DA60     		str	r2, [r3, #12]
1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the APB2 configuration ----------------------------------------------*/
1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
 2162              		.loc 1 1071 54
 2163 0034 094B     		ldr	r3, .L136
 2164 0036 9B68     		ldr	r3, [r3, #8]
 2165              		.loc 1 1071 39
 2166 0038 DB08     		lsrs	r3, r3, #3
 2167 003a 03F4E052 		and	r2, r3, #7168
 2168              		.loc 1 1071 37
 2169 003e 7B68     		ldr	r3, [r7, #4]
 2170 0040 1A61     		str	r2, [r3, #16]
1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Get the Flash Wait State (Latency) configuration ------------------------*/
1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 2171              		.loc 1 1074 32
 2172 0042 074B     		ldr	r3, .L136+4
 2173 0044 1B68     		ldr	r3, [r3]
 2174              		.loc 1 1074 16
 2175 0046 03F00702 		and	r2, r3, #7
 2176              		.loc 1 1074 14
 2177 004a 3B68     		ldr	r3, [r7]
 2178 004c 1A60     		str	r2, [r3]
1075:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 2179              		.loc 1 1075 1
 2180 004e 00BF     		nop
 2181 0050 0C37     		adds	r7, r7, #12
 2182              	.LCFI49:
 2183              		.cfi_def_cfa_offset 4
 2184 0052 BD46     		mov	sp, r7
 2185              	.LCFI50:
 2186              		.cfi_def_cfa_register 13
 2187              		@ sp needed
 2188 0054 5DF8047B 		ldr	r7, [sp], #4
 2189              	.LCFI51:
 2190              		.cfi_restore 7
 2191              		.cfi_def_cfa_offset 0
 2192 0058 7047     		bx	lr
 2193              	.L137:
 2194 005a 00BF     		.align	2
 2195              	.L136:
 2196 005c 00380240 		.word	1073887232
 2197 0060 003C0240 		.word	1073888256
 2198              		.cfi_endproc
 2199              	.LFE246:
 2201              		.section	.text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
 2202              		.align	1
 2203              		.global	HAL_RCC_NMI_IRQHandler
 2204              		.syntax unified
 2205              		.thumb
 2206              		.thumb_func
 2208              	HAL_RCC_NMI_IRQHandler:
 2209              	.LFB247:
1076:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 59


1077:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1078:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief This function handles the RCC CSS interrupt request.
1079:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @note This API should be called under the NMI_Handler().
1080:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
1081:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
1082:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1083:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 2210              		.loc 1 1083 1
 2211              		.cfi_startproc
 2212              		@ args = 0, pretend = 0, frame = 0
 2213              		@ frame_needed = 1, uses_anonymous_args = 0
 2214 0000 80B5     		push	{r7, lr}
 2215              	.LCFI52:
 2216              		.cfi_def_cfa_offset 8
 2217              		.cfi_offset 7, -8
 2218              		.cfi_offset 14, -4
 2219 0002 00AF     		add	r7, sp, #0
 2220              	.LCFI53:
 2221              		.cfi_def_cfa_register 7
1084:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   if(__HAL_RCC_GET_IT(RCC_IT_CSS))
 2222              		.loc 1 1085 6
 2223 0004 064B     		ldr	r3, .L141
 2224 0006 DB68     		ldr	r3, [r3, #12]
 2225 0008 03F08003 		and	r3, r3, #128
 2226              		.loc 1 1085 5
 2227 000c 802B     		cmp	r3, #128
 2228 000e 04D1     		bne	.L140
1086:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   {
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* RCC Clock Security System interrupt user callback */
1088:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     HAL_RCC_CSSCallback();
 2229              		.loc 1 1088 5
 2230 0010 FFF7FEFF 		bl	HAL_RCC_CSSCallback
1089:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1090:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     /* Clear RCC CSS pending bit */
1091:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****     __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
 2231              		.loc 1 1091 5
 2232 0014 034B     		ldr	r3, .L141+4
 2233 0016 8022     		movs	r2, #128
 2234 0018 1A70     		strb	r2, [r3]
 2235              	.L140:
1092:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   }
1093:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 2236              		.loc 1 1093 1
 2237 001a 00BF     		nop
 2238 001c 80BD     		pop	{r7, pc}
 2239              	.L142:
 2240 001e 00BF     		.align	2
 2241              	.L141:
 2242 0020 00380240 		.word	1073887232
 2243 0024 0E380240 		.word	1073887246
 2244              		.cfi_endproc
 2245              	.LFE247:
 2247              		.section	.text.HAL_RCC_CSSCallback,"ax",%progbits
 2248              		.align	1
 2249              		.weak	HAL_RCC_CSSCallback
 2250              		.syntax unified
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 60


 2251              		.thumb
 2252              		.thumb_func
 2254              	HAL_RCC_CSSCallback:
 2255              	.LFB248:
1094:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 
1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
1096:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @brief  RCC Clock Security System interrupt callback
1097:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   * @retval None
1098:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   */
1099:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
 2256              		.loc 1 1100 1
 2257              		.cfi_startproc
 2258              		@ args = 0, pretend = 0, frame = 0
 2259              		@ frame_needed = 1, uses_anonymous_args = 0
 2260              		@ link register save eliminated.
 2261 0000 80B4     		push	{r7}
 2262              	.LCFI54:
 2263              		.cfi_def_cfa_offset 4
 2264              		.cfi_offset 7, -4
 2265 0002 00AF     		add	r7, sp, #0
 2266              	.LCFI55:
 2267              		.cfi_def_cfa_register 7
1101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****   /* NOTE : This function Should not be modified, when the callback is needed,
1102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****             the HAL_RCC_CSSCallback could be implemented in the user file
1103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****    */
1104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
 2268              		.loc 1 1104 1
 2269 0004 00BF     		nop
 2270 0006 BD46     		mov	sp, r7
 2271              	.LCFI56:
 2272              		.cfi_def_cfa_register 13
 2273              		@ sp needed
 2274 0008 5DF8047B 		ldr	r7, [sp], #4
 2275              	.LCFI57:
 2276              		.cfi_restore 7
 2277              		.cfi_def_cfa_offset 0
 2278 000c 7047     		bx	lr
 2279              		.cfi_endproc
 2280              	.LFE248:
 2282              		.text
 2283              	.Letext0:
 2284              		.file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
 2285              		.file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
 2286              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
 2287              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h"
 2288              		.file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
 2289              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
 2290              		.file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
 2291              		.file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
 2292              		.file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
 2293              		.file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s 			page 61


DEFINED SYMBOLS
                            *ABS*:00000000 stm32f4xx_hal_rcc.c
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:20     .text.HAL_RCC_DeInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:26     .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:58     .text.HAL_RCC_OscConfig:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:64     .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:457    .text.HAL_RCC_OscConfig:00000240 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:462    .text.HAL_RCC_OscConfig:0000024c $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:812    .text.HAL_RCC_OscConfig:00000470 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:817    .text.HAL_RCC_OscConfig:0000047c $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:904    .text.HAL_RCC_OscConfig:000004ec $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:909    .text.HAL_RCC_ClockConfig:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:915    .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1466   .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1217   .text.HAL_RCC_ClockConfig:000001b8 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1226   .text.HAL_RCC_MCOConfig:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1232   .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1364   .text.HAL_RCC_MCOConfig:000000c4 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1371   .text.HAL_RCC_EnableCSS:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1377   .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1410   .text.HAL_RCC_EnableCSS:00000014 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1415   .text.HAL_RCC_DisableCSS:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1421   .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1454   .text.HAL_RCC_DisableCSS:00000014 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1460   .text.HAL_RCC_GetSysClockFreq:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1738   .text.HAL_RCC_GetSysClockFreq:00000200 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1745   .text.HAL_RCC_GetHCLKFreq:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1751   .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1782   .text.HAL_RCC_GetHCLKFreq:00000014 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1787   .text.HAL_RCC_GetPCLK1Freq:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1793   .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1827   .text.HAL_RCC_GetPCLK1Freq:00000020 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1833   .text.HAL_RCC_GetPCLK2Freq:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1839   .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1873   .text.HAL_RCC_GetPCLK2Freq:00000020 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1879   .text.HAL_RCC_GetOscConfig:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:1885   .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2104   .text.HAL_RCC_GetOscConfig:00000124 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2109   .text.HAL_RCC_GetClockConfig:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2115   .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2196   .text.HAL_RCC_GetClockConfig:0000005c $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2202   .text.HAL_RCC_NMI_IRQHandler:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2208   .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2254   .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2242   .text.HAL_RCC_NMI_IRQHandler:00000020 $d
C:\Users\10728\AppData\Local\Temp\ccwf6FJl.s:2248   .text.HAL_RCC_CSSCallback:00000000 $t

UNDEFINED SYMBOLS
HAL_GetTick
HAL_InitTick
AHBPrescTable
SystemCoreClock
uwTickPrio
HAL_GPIO_Init
__aeabi_uldivmod
APBPrescTable