EFTZ_PMU_Bootloader/build/stm32f4xx_hal_msp.lst

ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 1


   1              		.cpu cortex-m4
   2              		.arch armv7e-m
   3              		.fpu fpv4-sp-d16
   4              		.eabi_attribute 27, 1
   5              		.eabi_attribute 28, 1
   6              		.eabi_attribute 20, 1
   7              		.eabi_attribute 21, 1
   8              		.eabi_attribute 23, 3
   9              		.eabi_attribute 24, 1
  10              		.eabi_attribute 25, 1
  11              		.eabi_attribute 26, 1
  12              		.eabi_attribute 30, 6
  13              		.eabi_attribute 34, 1
  14              		.eabi_attribute 18, 4
  15              		.file	"stm32f4xx_hal_msp.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.section	.text.HAL_MspInit,"ax",%progbits
  20              		.align	1
  21              		.global	HAL_MspInit
  22              		.syntax unified
  23              		.thumb
  24              		.thumb_func
  26              	HAL_MspInit:
  27              	.LFB235:
  28              		.file 1 "Core/Src/stm32f4xx_hal_msp.c"
   1:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32f4xx_hal_msp.c **** /**
   3:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
   4:Core/Src/stm32f4xx_hal_msp.c ****   * @file         stm32f4xx_hal_msp.c
   5:Core/Src/stm32f4xx_hal_msp.c ****   * @brief        This file provides code for the MSP Initialization
   6:Core/Src/stm32f4xx_hal_msp.c ****   *               and de-Initialization codes.
   7:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
   8:Core/Src/stm32f4xx_hal_msp.c ****   * @attention
   9:Core/Src/stm32f4xx_hal_msp.c ****   *
  10:Core/Src/stm32f4xx_hal_msp.c ****   * Copyright (c) 2024 STMicroelectronics.
  11:Core/Src/stm32f4xx_hal_msp.c ****   * All rights reserved.
  12:Core/Src/stm32f4xx_hal_msp.c ****   *
  13:Core/Src/stm32f4xx_hal_msp.c ****   * This software is licensed under terms that can be found in the LICENSE file
  14:Core/Src/stm32f4xx_hal_msp.c ****   * in the root directory of this software component.
  15:Core/Src/stm32f4xx_hal_msp.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  16:Core/Src/stm32f4xx_hal_msp.c ****   *
  17:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
  18:Core/Src/stm32f4xx_hal_msp.c ****   */
  19:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */
  20:Core/Src/stm32f4xx_hal_msp.c **** 
  21:Core/Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
  22:Core/Src/stm32f4xx_hal_msp.c **** #include "main.h"
  23:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
  24:Core/Src/stm32f4xx_hal_msp.c **** 
  25:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */
  26:Core/Src/stm32f4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_rx;
  27:Core/Src/stm32f4xx_hal_msp.c **** 
  28:Core/Src/stm32f4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  29:Core/Src/stm32f4xx_hal_msp.c **** 
  30:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 2


  31:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */
  32:Core/Src/stm32f4xx_hal_msp.c **** 
  33:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */
  34:Core/Src/stm32f4xx_hal_msp.c **** 
  35:Core/Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
  36:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */
  37:Core/Src/stm32f4xx_hal_msp.c **** 
  38:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */
  39:Core/Src/stm32f4xx_hal_msp.c **** 
  40:Core/Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
  41:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
  42:Core/Src/stm32f4xx_hal_msp.c **** 
  43:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */
  44:Core/Src/stm32f4xx_hal_msp.c **** 
  45:Core/Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
  46:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */
  47:Core/Src/stm32f4xx_hal_msp.c **** 
  48:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */
  49:Core/Src/stm32f4xx_hal_msp.c **** 
  50:Core/Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
  51:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
  52:Core/Src/stm32f4xx_hal_msp.c **** 
  53:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */
  54:Core/Src/stm32f4xx_hal_msp.c **** 
  55:Core/Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
  56:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
  57:Core/Src/stm32f4xx_hal_msp.c **** 
  58:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
  59:Core/Src/stm32f4xx_hal_msp.c **** 
  60:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
  61:Core/Src/stm32f4xx_hal_msp.c **** 
  62:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */
  63:Core/Src/stm32f4xx_hal_msp.c **** /**
  64:Core/Src/stm32f4xx_hal_msp.c ****   * Initializes the Global MSP.
  65:Core/Src/stm32f4xx_hal_msp.c ****   */
  66:Core/Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void)
  67:Core/Src/stm32f4xx_hal_msp.c **** {
  29              		.loc 1 67 1
  30              		.cfi_startproc
  31              		@ args = 0, pretend = 0, frame = 8
  32              		@ frame_needed = 1, uses_anonymous_args = 0
  33              		@ link register save eliminated.
  34 0000 80B4     		push	{r7}
  35              	.LCFI0:
  36              		.cfi_def_cfa_offset 4
  37              		.cfi_offset 7, -4
  38 0002 83B0     		sub	sp, sp, #12
  39              	.LCFI1:
  40              		.cfi_def_cfa_offset 16
  41 0004 00AF     		add	r7, sp, #0
  42              	.LCFI2:
  43              		.cfi_def_cfa_register 7
  44              	.LBB2:
  68:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
  69:Core/Src/stm32f4xx_hal_msp.c **** 
  70:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 0 */
  71:Core/Src/stm32f4xx_hal_msp.c **** 
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 3


  72:Core/Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
  45              		.loc 1 72 3
  46 0006 0023     		movs	r3, #0
  47 0008 7B60     		str	r3, [r7, #4]
  48 000a 104B     		ldr	r3, .L2
  49 000c 5B6C     		ldr	r3, [r3, #68]
  50 000e 0F4A     		ldr	r2, .L2
  51 0010 43F48043 		orr	r3, r3, #16384
  52 0014 5364     		str	r3, [r2, #68]
  53 0016 0D4B     		ldr	r3, .L2
  54 0018 5B6C     		ldr	r3, [r3, #68]
  55 001a 03F48043 		and	r3, r3, #16384
  56 001e 7B60     		str	r3, [r7, #4]
  57 0020 7B68     		ldr	r3, [r7, #4]
  58              	.LBE2:
  59              	.LBB3:
  73:Core/Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_PWR_CLK_ENABLE();
  60              		.loc 1 73 3
  61 0022 0023     		movs	r3, #0
  62 0024 3B60     		str	r3, [r7]
  63 0026 094B     		ldr	r3, .L2
  64 0028 1B6C     		ldr	r3, [r3, #64]
  65 002a 084A     		ldr	r2, .L2
  66 002c 43F08053 		orr	r3, r3, #268435456
  67 0030 1364     		str	r3, [r2, #64]
  68 0032 064B     		ldr	r3, .L2
  69 0034 1B6C     		ldr	r3, [r3, #64]
  70 0036 03F08053 		and	r3, r3, #268435456
  71 003a 3B60     		str	r3, [r7]
  72 003c 3B68     		ldr	r3, [r7]
  73              	.LBE3:
  74:Core/Src/stm32f4xx_hal_msp.c **** 
  75:Core/Src/stm32f4xx_hal_msp.c ****   /* System interrupt init*/
  76:Core/Src/stm32f4xx_hal_msp.c **** 
  77:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 1 */
  78:Core/Src/stm32f4xx_hal_msp.c **** 
  79:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 1 */
  80:Core/Src/stm32f4xx_hal_msp.c **** }
  74              		.loc 1 80 1
  75 003e 00BF     		nop
  76 0040 0C37     		adds	r7, r7, #12
  77              	.LCFI3:
  78              		.cfi_def_cfa_offset 4
  79 0042 BD46     		mov	sp, r7
  80              	.LCFI4:
  81              		.cfi_def_cfa_register 13
  82              		@ sp needed
  83 0044 5DF8047B 		ldr	r7, [sp], #4
  84              	.LCFI5:
  85              		.cfi_restore 7
  86              		.cfi_def_cfa_offset 0
  87 0048 7047     		bx	lr
  88              	.L3:
  89 004a 00BF     		.align	2
  90              	.L2:
  91 004c 00380240 		.word	1073887232
  92              		.cfi_endproc
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 4


  93              	.LFE235:
  95              		.section	.text.HAL_ADC_MspInit,"ax",%progbits
  96              		.align	1
  97              		.global	HAL_ADC_MspInit
  98              		.syntax unified
  99              		.thumb
 100              		.thumb_func
 102              	HAL_ADC_MspInit:
 103              	.LFB236:
  81:Core/Src/stm32f4xx_hal_msp.c **** 
  82:Core/Src/stm32f4xx_hal_msp.c **** /**
  83:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP Initialization
  84:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example
  85:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer
  86:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
  87:Core/Src/stm32f4xx_hal_msp.c **** */
  88:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  89:Core/Src/stm32f4xx_hal_msp.c **** {
 104              		.loc 1 89 1
 105              		.cfi_startproc
 106              		@ args = 0, pretend = 0, frame = 40
 107              		@ frame_needed = 1, uses_anonymous_args = 0
 108 0000 80B5     		push	{r7, lr}
 109              	.LCFI6:
 110              		.cfi_def_cfa_offset 8
 111              		.cfi_offset 7, -8
 112              		.cfi_offset 14, -4
 113 0002 8AB0     		sub	sp, sp, #40
 114              	.LCFI7:
 115              		.cfi_def_cfa_offset 48
 116 0004 00AF     		add	r7, sp, #0
 117              	.LCFI8:
 118              		.cfi_def_cfa_register 7
 119 0006 7860     		str	r0, [r7, #4]
  90:Core/Src/stm32f4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 120              		.loc 1 90 20
 121 0008 07F11403 		add	r3, r7, #20
 122 000c 0022     		movs	r2, #0
 123 000e 1A60     		str	r2, [r3]
 124 0010 5A60     		str	r2, [r3, #4]
 125 0012 9A60     		str	r2, [r3, #8]
 126 0014 DA60     		str	r2, [r3, #12]
 127 0016 1A61     		str	r2, [r3, #16]
  91:Core/Src/stm32f4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
 128              		.loc 1 91 10
 129 0018 7B68     		ldr	r3, [r7, #4]
 130 001a 1B68     		ldr	r3, [r3]
 131              		.loc 1 91 5
 132 001c 284A     		ldr	r2, .L7
 133 001e 9342     		cmp	r3, r2
 134 0020 49D1     		bne	.L6
 135              	.LBB4:
  92:Core/Src/stm32f4xx_hal_msp.c ****   {
  93:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspInit 0 */
  94:Core/Src/stm32f4xx_hal_msp.c **** 
  95:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END ADC1_MspInit 0 */
  96:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 5


  97:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_ADC1_CLK_ENABLE();
 136              		.loc 1 97 5
 137 0022 0023     		movs	r3, #0
 138 0024 3B61     		str	r3, [r7, #16]
 139 0026 274B     		ldr	r3, .L7+4
 140 0028 5B6C     		ldr	r3, [r3, #68]
 141 002a 264A     		ldr	r2, .L7+4
 142 002c 43F48073 		orr	r3, r3, #256
 143 0030 5364     		str	r3, [r2, #68]
 144 0032 244B     		ldr	r3, .L7+4
 145 0034 5B6C     		ldr	r3, [r3, #68]
 146 0036 03F48073 		and	r3, r3, #256
 147 003a 3B61     		str	r3, [r7, #16]
 148 003c 3B69     		ldr	r3, [r7, #16]
 149              	.LBE4:
 150              	.LBB5:
  98:Core/Src/stm32f4xx_hal_msp.c **** 
  99:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 151              		.loc 1 99 5
 152 003e 0023     		movs	r3, #0
 153 0040 FB60     		str	r3, [r7, #12]
 154 0042 204B     		ldr	r3, .L7+4
 155 0044 1B6B     		ldr	r3, [r3, #48]
 156 0046 1F4A     		ldr	r2, .L7+4
 157 0048 43F00103 		orr	r3, r3, #1
 158 004c 1363     		str	r3, [r2, #48]
 159 004e 1D4B     		ldr	r3, .L7+4
 160 0050 1B6B     		ldr	r3, [r3, #48]
 161 0052 03F00103 		and	r3, r3, #1
 162 0056 FB60     		str	r3, [r7, #12]
 163 0058 FB68     		ldr	r3, [r7, #12]
 164              	.LBE5:
 165              	.LBB6:
 100:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
 166              		.loc 1 100 5
 167 005a 0023     		movs	r3, #0
 168 005c BB60     		str	r3, [r7, #8]
 169 005e 194B     		ldr	r3, .L7+4
 170 0060 1B6B     		ldr	r3, [r3, #48]
 171 0062 184A     		ldr	r2, .L7+4
 172 0064 43F00203 		orr	r3, r3, #2
 173 0068 1363     		str	r3, [r2, #48]
 174 006a 164B     		ldr	r3, .L7+4
 175 006c 1B6B     		ldr	r3, [r3, #48]
 176 006e 03F00203 		and	r3, r3, #2
 177 0072 BB60     		str	r3, [r7, #8]
 178 0074 BB68     		ldr	r3, [r7, #8]
 179              	.LBE6:
 101:Core/Src/stm32f4xx_hal_msp.c ****     /**ADC1 GPIO Configuration
 102:Core/Src/stm32f4xx_hal_msp.c ****     PA4     ------> ADC1_IN4
 103:Core/Src/stm32f4xx_hal_msp.c ****     PB0     ------> ADC1_IN8
 104:Core/Src/stm32f4xx_hal_msp.c ****     PB1     ------> ADC1_IN9
 105:Core/Src/stm32f4xx_hal_msp.c ****     */
 106:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = A4_ADC_12V_Pin;
 180              		.loc 1 106 25
 181 0076 1023     		movs	r3, #16
 182 0078 7B61     		str	r3, [r7, #20]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 6


 107:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 183              		.loc 1 107 26
 184 007a 0323     		movs	r3, #3
 185 007c BB61     		str	r3, [r7, #24]
 108:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 186              		.loc 1 108 26
 187 007e 0023     		movs	r3, #0
 188 0080 FB61     		str	r3, [r7, #28]
 109:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(A4_ADC_12V_GPIO_Port, &GPIO_InitStruct);
 189              		.loc 1 109 5
 190 0082 07F11403 		add	r3, r7, #20
 191 0086 1946     		mov	r1, r3
 192 0088 0F48     		ldr	r0, .L7+8
 193 008a FFF7FEFF 		bl	HAL_GPIO_Init
 110:Core/Src/stm32f4xx_hal_msp.c **** 
 111:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = B0_ADC_FMU_5V_Pin|B1_ADC_BATTER_Pin;
 194              		.loc 1 111 25
 195 008e 0323     		movs	r3, #3
 196 0090 7B61     		str	r3, [r7, #20]
 112:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 197              		.loc 1 112 26
 198 0092 0323     		movs	r3, #3
 199 0094 BB61     		str	r3, [r7, #24]
 113:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 200              		.loc 1 113 26
 201 0096 0023     		movs	r3, #0
 202 0098 FB61     		str	r3, [r7, #28]
 114:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 203              		.loc 1 114 5
 204 009a 07F11403 		add	r3, r7, #20
 205 009e 1946     		mov	r1, r3
 206 00a0 0A48     		ldr	r0, .L7+12
 207 00a2 FFF7FEFF 		bl	HAL_GPIO_Init
 115:Core/Src/stm32f4xx_hal_msp.c **** 
 116:Core/Src/stm32f4xx_hal_msp.c ****     /* ADC1 interrupt Init */
 117:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
 208              		.loc 1 117 5
 209 00a6 0022     		movs	r2, #0
 210 00a8 0021     		movs	r1, #0
 211 00aa 1220     		movs	r0, #18
 212 00ac FFF7FEFF 		bl	HAL_NVIC_SetPriority
 118:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(ADC_IRQn);
 213              		.loc 1 118 5
 214 00b0 1220     		movs	r0, #18
 215 00b2 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 216              	.L6:
 119:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspInit 1 */
 120:Core/Src/stm32f4xx_hal_msp.c **** 
 121:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END ADC1_MspInit 1 */
 122:Core/Src/stm32f4xx_hal_msp.c ****   }
 123:Core/Src/stm32f4xx_hal_msp.c **** 
 124:Core/Src/stm32f4xx_hal_msp.c **** }
 217              		.loc 1 124 1
 218 00b6 00BF     		nop
 219 00b8 2837     		adds	r7, r7, #40
 220              	.LCFI9:
 221              		.cfi_def_cfa_offset 8
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 7


 222 00ba BD46     		mov	sp, r7
 223              	.LCFI10:
 224              		.cfi_def_cfa_register 13
 225              		@ sp needed
 226 00bc 80BD     		pop	{r7, pc}
 227              	.L8:
 228 00be 00BF     		.align	2
 229              	.L7:
 230 00c0 00200140 		.word	1073815552
 231 00c4 00380240 		.word	1073887232
 232 00c8 00000240 		.word	1073872896
 233 00cc 00040240 		.word	1073873920
 234              		.cfi_endproc
 235              	.LFE236:
 237              		.section	.text.HAL_ADC_MspDeInit,"ax",%progbits
 238              		.align	1
 239              		.global	HAL_ADC_MspDeInit
 240              		.syntax unified
 241              		.thumb
 242              		.thumb_func
 244              	HAL_ADC_MspDeInit:
 245              	.LFB237:
 125:Core/Src/stm32f4xx_hal_msp.c **** 
 126:Core/Src/stm32f4xx_hal_msp.c **** /**
 127:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
 128:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 129:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer
 130:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 131:Core/Src/stm32f4xx_hal_msp.c **** */
 132:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
 133:Core/Src/stm32f4xx_hal_msp.c **** {
 246              		.loc 1 133 1
 247              		.cfi_startproc
 248              		@ args = 0, pretend = 0, frame = 8
 249              		@ frame_needed = 1, uses_anonymous_args = 0
 250 0000 80B5     		push	{r7, lr}
 251              	.LCFI11:
 252              		.cfi_def_cfa_offset 8
 253              		.cfi_offset 7, -8
 254              		.cfi_offset 14, -4
 255 0002 82B0     		sub	sp, sp, #8
 256              	.LCFI12:
 257              		.cfi_def_cfa_offset 16
 258 0004 00AF     		add	r7, sp, #0
 259              	.LCFI13:
 260              		.cfi_def_cfa_register 7
 261 0006 7860     		str	r0, [r7, #4]
 134:Core/Src/stm32f4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
 262              		.loc 1 134 10
 263 0008 7B68     		ldr	r3, [r7, #4]
 264 000a 1B68     		ldr	r3, [r3]
 265              		.loc 1 134 5
 266 000c 0B4A     		ldr	r2, .L12
 267 000e 9342     		cmp	r3, r2
 268 0010 10D1     		bne	.L11
 135:Core/Src/stm32f4xx_hal_msp.c ****   {
 136:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 0 */
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 8


 137:Core/Src/stm32f4xx_hal_msp.c **** 
 138:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END ADC1_MspDeInit 0 */
 139:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 140:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_ADC1_CLK_DISABLE();
 269              		.loc 1 140 5
 270 0012 0B4B     		ldr	r3, .L12+4
 271 0014 5B6C     		ldr	r3, [r3, #68]
 272 0016 0A4A     		ldr	r2, .L12+4
 273 0018 23F48073 		bic	r3, r3, #256
 274 001c 5364     		str	r3, [r2, #68]
 141:Core/Src/stm32f4xx_hal_msp.c **** 
 142:Core/Src/stm32f4xx_hal_msp.c ****     /**ADC1 GPIO Configuration
 143:Core/Src/stm32f4xx_hal_msp.c ****     PA4     ------> ADC1_IN4
 144:Core/Src/stm32f4xx_hal_msp.c ****     PB0     ------> ADC1_IN8
 145:Core/Src/stm32f4xx_hal_msp.c ****     PB1     ------> ADC1_IN9
 146:Core/Src/stm32f4xx_hal_msp.c ****     */
 147:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(A4_ADC_12V_GPIO_Port, A4_ADC_12V_Pin);
 275              		.loc 1 147 5
 276 001e 1021     		movs	r1, #16
 277 0020 0848     		ldr	r0, .L12+8
 278 0022 FFF7FEFF 		bl	HAL_GPIO_DeInit
 148:Core/Src/stm32f4xx_hal_msp.c **** 
 149:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, B0_ADC_FMU_5V_Pin|B1_ADC_BATTER_Pin);
 279              		.loc 1 149 5
 280 0026 0321     		movs	r1, #3
 281 0028 0748     		ldr	r0, .L12+12
 282 002a FFF7FEFF 		bl	HAL_GPIO_DeInit
 150:Core/Src/stm32f4xx_hal_msp.c **** 
 151:Core/Src/stm32f4xx_hal_msp.c ****     /* ADC1 interrupt DeInit */
 152:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(ADC_IRQn);
 283              		.loc 1 152 5
 284 002e 1220     		movs	r0, #18
 285 0030 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 286              	.L11:
 153:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 154:Core/Src/stm32f4xx_hal_msp.c **** 
 155:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END ADC1_MspDeInit 1 */
 156:Core/Src/stm32f4xx_hal_msp.c ****   }
 157:Core/Src/stm32f4xx_hal_msp.c **** 
 158:Core/Src/stm32f4xx_hal_msp.c **** }
 287              		.loc 1 158 1
 288 0034 00BF     		nop
 289 0036 0837     		adds	r7, r7, #8
 290              	.LCFI14:
 291              		.cfi_def_cfa_offset 8
 292 0038 BD46     		mov	sp, r7
 293              	.LCFI15:
 294              		.cfi_def_cfa_register 13
 295              		@ sp needed
 296 003a 80BD     		pop	{r7, pc}
 297              	.L13:
 298              		.align	2
 299              	.L12:
 300 003c 00200140 		.word	1073815552
 301 0040 00380240 		.word	1073887232
 302 0044 00000240 		.word	1073872896
 303 0048 00040240 		.word	1073873920
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 9


 304              		.cfi_endproc
 305              	.LFE237:
 307              		.section	.bss.HAL_RCC_CAN1_CLK_ENABLED,"aw",%nobits
 308              		.align	2
 311              	HAL_RCC_CAN1_CLK_ENABLED:
 312 0000 00000000 		.space	4
 313              		.section	.text.HAL_CAN_MspInit,"ax",%progbits
 314              		.align	1
 315              		.global	HAL_CAN_MspInit
 316              		.syntax unified
 317              		.thumb
 318              		.thumb_func
 320              	HAL_CAN_MspInit:
 321              	.LFB238:
 159:Core/Src/stm32f4xx_hal_msp.c **** 
 160:Core/Src/stm32f4xx_hal_msp.c **** static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0;
 161:Core/Src/stm32f4xx_hal_msp.c **** 
 162:Core/Src/stm32f4xx_hal_msp.c **** /**
 163:Core/Src/stm32f4xx_hal_msp.c **** * @brief CAN MSP Initialization
 164:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 165:Core/Src/stm32f4xx_hal_msp.c **** * @param hcan: CAN handle pointer
 166:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 167:Core/Src/stm32f4xx_hal_msp.c **** */
 168:Core/Src/stm32f4xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
 169:Core/Src/stm32f4xx_hal_msp.c **** {
 322              		.loc 1 169 1
 323              		.cfi_startproc
 324              		@ args = 0, pretend = 0, frame = 48
 325              		@ frame_needed = 1, uses_anonymous_args = 0
 326 0000 80B5     		push	{r7, lr}
 327              	.LCFI16:
 328              		.cfi_def_cfa_offset 8
 329              		.cfi_offset 7, -8
 330              		.cfi_offset 14, -4
 331 0002 8CB0     		sub	sp, sp, #48
 332              	.LCFI17:
 333              		.cfi_def_cfa_offset 56
 334 0004 00AF     		add	r7, sp, #0
 335              	.LCFI18:
 336              		.cfi_def_cfa_register 7
 337 0006 7860     		str	r0, [r7, #4]
 170:Core/Src/stm32f4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 338              		.loc 1 170 20
 339 0008 07F11C03 		add	r3, r7, #28
 340 000c 0022     		movs	r2, #0
 341 000e 1A60     		str	r2, [r3]
 342 0010 5A60     		str	r2, [r3, #4]
 343 0012 9A60     		str	r2, [r3, #8]
 344 0014 DA60     		str	r2, [r3, #12]
 345 0016 1A61     		str	r2, [r3, #16]
 171:Core/Src/stm32f4xx_hal_msp.c ****   if(hcan->Instance==CAN1)
 346              		.loc 1 171 10
 347 0018 7B68     		ldr	r3, [r7, #4]
 348 001a 1B68     		ldr	r3, [r3]
 349              		.loc 1 171 5
 350 001c 534A     		ldr	r2, .L20
 351 001e 9342     		cmp	r3, r2
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 10


 352 0020 46D1     		bne	.L15
 172:Core/Src/stm32f4xx_hal_msp.c ****   {
 173:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN1_MspInit 0 */
 174:Core/Src/stm32f4xx_hal_msp.c **** 
 175:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN1_MspInit 0 */
 176:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 177:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED++;
 353              		.loc 1 177 29
 354 0022 534B     		ldr	r3, .L20+4
 355 0024 1B68     		ldr	r3, [r3]
 356 0026 0133     		adds	r3, r3, #1
 357 0028 514A     		ldr	r2, .L20+4
 358 002a 1360     		str	r3, [r2]
 178:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==1){
 359              		.loc 1 178 32
 360 002c 504B     		ldr	r3, .L20+4
 361 002e 1B68     		ldr	r3, [r3]
 362              		.loc 1 178 7
 363 0030 012B     		cmp	r3, #1
 364 0032 0DD1     		bne	.L16
 365              	.LBB7:
 179:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_ENABLE();
 366              		.loc 1 179 7
 367 0034 0023     		movs	r3, #0
 368 0036 BB61     		str	r3, [r7, #24]
 369 0038 4E4B     		ldr	r3, .L20+8
 370 003a 1B6C     		ldr	r3, [r3, #64]
 371 003c 4D4A     		ldr	r2, .L20+8
 372 003e 43F00073 		orr	r3, r3, #33554432
 373 0042 1364     		str	r3, [r2, #64]
 374 0044 4B4B     		ldr	r3, .L20+8
 375 0046 1B6C     		ldr	r3, [r3, #64]
 376 0048 03F00073 		and	r3, r3, #33554432
 377 004c BB61     		str	r3, [r7, #24]
 378 004e BB69     		ldr	r3, [r7, #24]
 379              	.L16:
 380              	.LBE7:
 381              	.LBB8:
 180:Core/Src/stm32f4xx_hal_msp.c ****     }
 181:Core/Src/stm32f4xx_hal_msp.c **** 
 182:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
 382              		.loc 1 182 5
 383 0050 0023     		movs	r3, #0
 384 0052 7B61     		str	r3, [r7, #20]
 385 0054 474B     		ldr	r3, .L20+8
 386 0056 1B6B     		ldr	r3, [r3, #48]
 387 0058 464A     		ldr	r2, .L20+8
 388 005a 43F00203 		orr	r3, r3, #2
 389 005e 1363     		str	r3, [r2, #48]
 390 0060 444B     		ldr	r3, .L20+8
 391 0062 1B6B     		ldr	r3, [r3, #48]
 392 0064 03F00203 		and	r3, r3, #2
 393 0068 7B61     		str	r3, [r7, #20]
 394 006a 7B69     		ldr	r3, [r7, #20]
 395              	.LBE8:
 183:Core/Src/stm32f4xx_hal_msp.c ****     /**CAN1 GPIO Configuration
 184:Core/Src/stm32f4xx_hal_msp.c ****     PB8     ------> CAN1_RX
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 11


 185:Core/Src/stm32f4xx_hal_msp.c ****     PB9     ------> CAN1_TX
 186:Core/Src/stm32f4xx_hal_msp.c ****     */
 187:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = B8_CAN1_Pin|B9_CAN1_Pin;
 396              		.loc 1 187 25
 397 006c 4FF44073 		mov	r3, #768
 398 0070 FB61     		str	r3, [r7, #28]
 188:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 399              		.loc 1 188 26
 400 0072 0223     		movs	r3, #2
 401 0074 3B62     		str	r3, [r7, #32]
 189:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 402              		.loc 1 189 26
 403 0076 0023     		movs	r3, #0
 404 0078 7B62     		str	r3, [r7, #36]
 190:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 405              		.loc 1 190 27
 406 007a 0323     		movs	r3, #3
 407 007c BB62     		str	r3, [r7, #40]
 191:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
 408              		.loc 1 191 31
 409 007e 0923     		movs	r3, #9
 410 0080 FB62     		str	r3, [r7, #44]
 192:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 411              		.loc 1 192 5
 412 0082 07F11C03 		add	r3, r7, #28
 413 0086 1946     		mov	r1, r3
 414 0088 3B48     		ldr	r0, .L20+12
 415 008a FFF7FEFF 		bl	HAL_GPIO_Init
 193:Core/Src/stm32f4xx_hal_msp.c **** 
 194:Core/Src/stm32f4xx_hal_msp.c ****     /* CAN1 interrupt Init */
 195:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0);
 416              		.loc 1 195 5
 417 008e 0022     		movs	r2, #0
 418 0090 0021     		movs	r1, #0
 419 0092 1420     		movs	r0, #20
 420 0094 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 196:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
 421              		.loc 1 196 5
 422 0098 1420     		movs	r0, #20
 423 009a FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 197:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(CAN1_SCE_IRQn, 0, 0);
 424              		.loc 1 197 5
 425 009e 0022     		movs	r2, #0
 426 00a0 0021     		movs	r1, #0
 427 00a2 1620     		movs	r0, #22
 428 00a4 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 198:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN1_SCE_IRQn);
 429              		.loc 1 198 5
 430 00a8 1620     		movs	r0, #22
 431 00aa FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 199:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN1_MspInit 1 */
 200:Core/Src/stm32f4xx_hal_msp.c **** 
 201:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN1_MspInit 1 */
 202:Core/Src/stm32f4xx_hal_msp.c ****   }
 203:Core/Src/stm32f4xx_hal_msp.c ****   else if(hcan->Instance==CAN2)
 204:Core/Src/stm32f4xx_hal_msp.c ****   {
 205:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspInit 0 */
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 12


 206:Core/Src/stm32f4xx_hal_msp.c **** 
 207:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN2_MspInit 0 */
 208:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 209:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_CAN2_CLK_ENABLE();
 210:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED++;
 211:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==1){
 212:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_ENABLE();
 213:Core/Src/stm32f4xx_hal_msp.c ****     }
 214:Core/Src/stm32f4xx_hal_msp.c **** 
 215:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
 216:Core/Src/stm32f4xx_hal_msp.c ****     /**CAN2 GPIO Configuration
 217:Core/Src/stm32f4xx_hal_msp.c ****     PB12     ------> CAN2_RX
 218:Core/Src/stm32f4xx_hal_msp.c ****     PB13     ------> CAN2_TX
 219:Core/Src/stm32f4xx_hal_msp.c ****     */
 220:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
 221:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 222:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 223:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 224:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
 225:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 226:Core/Src/stm32f4xx_hal_msp.c **** 
 227:Core/Src/stm32f4xx_hal_msp.c ****     /* CAN2 interrupt Init */
 228:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 0, 0);
 229:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
 230:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 0, 0);
 231:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn);
 232:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspInit 1 */
 233:Core/Src/stm32f4xx_hal_msp.c **** 
 234:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN2_MspInit 1 */
 235:Core/Src/stm32f4xx_hal_msp.c ****   }
 236:Core/Src/stm32f4xx_hal_msp.c **** 
 237:Core/Src/stm32f4xx_hal_msp.c **** }
 432              		.loc 1 237 1
 433 00ae 58E0     		b	.L19
 434              	.L15:
 203:Core/Src/stm32f4xx_hal_msp.c ****   {
 435              		.loc 1 203 15
 436 00b0 7B68     		ldr	r3, [r7, #4]
 437 00b2 1B68     		ldr	r3, [r3]
 203:Core/Src/stm32f4xx_hal_msp.c ****   {
 438              		.loc 1 203 10
 439 00b4 314A     		ldr	r2, .L20+16
 440 00b6 9342     		cmp	r3, r2
 441 00b8 53D1     		bne	.L19
 442              	.LBB9:
 209:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED++;
 443              		.loc 1 209 5
 444 00ba 0023     		movs	r3, #0
 445 00bc 3B61     		str	r3, [r7, #16]
 446 00be 2D4B     		ldr	r3, .L20+8
 447 00c0 1B6C     		ldr	r3, [r3, #64]
 448 00c2 2C4A     		ldr	r2, .L20+8
 449 00c4 43F08063 		orr	r3, r3, #67108864
 450 00c8 1364     		str	r3, [r2, #64]
 451 00ca 2A4B     		ldr	r3, .L20+8
 452 00cc 1B6C     		ldr	r3, [r3, #64]
 453 00ce 03F08063 		and	r3, r3, #67108864
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 13


 454 00d2 3B61     		str	r3, [r7, #16]
 455 00d4 3B69     		ldr	r3, [r7, #16]
 456              	.LBE9:
 210:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==1){
 457              		.loc 1 210 29
 458 00d6 264B     		ldr	r3, .L20+4
 459 00d8 1B68     		ldr	r3, [r3]
 460 00da 0133     		adds	r3, r3, #1
 461 00dc 244A     		ldr	r2, .L20+4
 462 00de 1360     		str	r3, [r2]
 211:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_ENABLE();
 463              		.loc 1 211 32
 464 00e0 234B     		ldr	r3, .L20+4
 465 00e2 1B68     		ldr	r3, [r3]
 211:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_ENABLE();
 466              		.loc 1 211 7
 467 00e4 012B     		cmp	r3, #1
 468 00e6 0DD1     		bne	.L18
 469              	.LBB10:
 212:Core/Src/stm32f4xx_hal_msp.c ****     }
 470              		.loc 1 212 7
 471 00e8 0023     		movs	r3, #0
 472 00ea FB60     		str	r3, [r7, #12]
 473 00ec 214B     		ldr	r3, .L20+8
 474 00ee 1B6C     		ldr	r3, [r3, #64]
 475 00f0 204A     		ldr	r2, .L20+8
 476 00f2 43F00073 		orr	r3, r3, #33554432
 477 00f6 1364     		str	r3, [r2, #64]
 478 00f8 1E4B     		ldr	r3, .L20+8
 479 00fa 1B6C     		ldr	r3, [r3, #64]
 480 00fc 03F00073 		and	r3, r3, #33554432
 481 0100 FB60     		str	r3, [r7, #12]
 482 0102 FB68     		ldr	r3, [r7, #12]
 483              	.L18:
 484              	.LBE10:
 485              	.LBB11:
 215:Core/Src/stm32f4xx_hal_msp.c ****     /**CAN2 GPIO Configuration
 486              		.loc 1 215 5
 487 0104 0023     		movs	r3, #0
 488 0106 BB60     		str	r3, [r7, #8]
 489 0108 1A4B     		ldr	r3, .L20+8
 490 010a 1B6B     		ldr	r3, [r3, #48]
 491 010c 194A     		ldr	r2, .L20+8
 492 010e 43F00203 		orr	r3, r3, #2
 493 0112 1363     		str	r3, [r2, #48]
 494 0114 174B     		ldr	r3, .L20+8
 495 0116 1B6B     		ldr	r3, [r3, #48]
 496 0118 03F00203 		and	r3, r3, #2
 497 011c BB60     		str	r3, [r7, #8]
 498 011e BB68     		ldr	r3, [r7, #8]
 499              	.LBE11:
 220:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 500              		.loc 1 220 25
 501 0120 4FF44053 		mov	r3, #12288
 502 0124 FB61     		str	r3, [r7, #28]
 221:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 503              		.loc 1 221 26
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 14


 504 0126 0223     		movs	r3, #2
 505 0128 3B62     		str	r3, [r7, #32]
 222:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 506              		.loc 1 222 26
 507 012a 0023     		movs	r3, #0
 508 012c 7B62     		str	r3, [r7, #36]
 223:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
 509              		.loc 1 223 27
 510 012e 0323     		movs	r3, #3
 511 0130 BB62     		str	r3, [r7, #40]
 224:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 512              		.loc 1 224 31
 513 0132 0923     		movs	r3, #9
 514 0134 FB62     		str	r3, [r7, #44]
 225:Core/Src/stm32f4xx_hal_msp.c **** 
 515              		.loc 1 225 5
 516 0136 07F11C03 		add	r3, r7, #28
 517 013a 1946     		mov	r1, r3
 518 013c 0E48     		ldr	r0, .L20+12
 519 013e FFF7FEFF 		bl	HAL_GPIO_Init
 228:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
 520              		.loc 1 228 5
 521 0142 0022     		movs	r2, #0
 522 0144 0021     		movs	r1, #0
 523 0146 4020     		movs	r0, #64
 524 0148 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 229:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 0, 0);
 525              		.loc 1 229 5
 526 014c 4020     		movs	r0, #64
 527 014e FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 230:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn);
 528              		.loc 1 230 5
 529 0152 0022     		movs	r2, #0
 530 0154 0021     		movs	r1, #0
 531 0156 4220     		movs	r0, #66
 532 0158 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 231:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspInit 1 */
 533              		.loc 1 231 5
 534 015c 4220     		movs	r0, #66
 535 015e FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 536              	.L19:
 537              		.loc 1 237 1
 538 0162 00BF     		nop
 539 0164 3037     		adds	r7, r7, #48
 540              	.LCFI19:
 541              		.cfi_def_cfa_offset 8
 542 0166 BD46     		mov	sp, r7
 543              	.LCFI20:
 544              		.cfi_def_cfa_register 13
 545              		@ sp needed
 546 0168 80BD     		pop	{r7, pc}
 547              	.L21:
 548 016a 00BF     		.align	2
 549              	.L20:
 550 016c 00640040 		.word	1073767424
 551 0170 00000000 		.word	HAL_RCC_CAN1_CLK_ENABLED
 552 0174 00380240 		.word	1073887232
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 15


 553 0178 00040240 		.word	1073873920
 554 017c 00680040 		.word	1073768448
 555              		.cfi_endproc
 556              	.LFE238:
 558              		.section	.text.HAL_CAN_MspDeInit,"ax",%progbits
 559              		.align	1
 560              		.global	HAL_CAN_MspDeInit
 561              		.syntax unified
 562              		.thumb
 563              		.thumb_func
 565              	HAL_CAN_MspDeInit:
 566              	.LFB239:
 238:Core/Src/stm32f4xx_hal_msp.c **** 
 239:Core/Src/stm32f4xx_hal_msp.c **** /**
 240:Core/Src/stm32f4xx_hal_msp.c **** * @brief CAN MSP De-Initialization
 241:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 242:Core/Src/stm32f4xx_hal_msp.c **** * @param hcan: CAN handle pointer
 243:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 244:Core/Src/stm32f4xx_hal_msp.c **** */
 245:Core/Src/stm32f4xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
 246:Core/Src/stm32f4xx_hal_msp.c **** {
 567              		.loc 1 246 1
 568              		.cfi_startproc
 569              		@ args = 0, pretend = 0, frame = 8
 570              		@ frame_needed = 1, uses_anonymous_args = 0
 571 0000 80B5     		push	{r7, lr}
 572              	.LCFI21:
 573              		.cfi_def_cfa_offset 8
 574              		.cfi_offset 7, -8
 575              		.cfi_offset 14, -4
 576 0002 82B0     		sub	sp, sp, #8
 577              	.LCFI22:
 578              		.cfi_def_cfa_offset 16
 579 0004 00AF     		add	r7, sp, #0
 580              	.LCFI23:
 581              		.cfi_def_cfa_register 7
 582 0006 7860     		str	r0, [r7, #4]
 247:Core/Src/stm32f4xx_hal_msp.c ****   if(hcan->Instance==CAN1)
 583              		.loc 1 247 10
 584 0008 7B68     		ldr	r3, [r7, #4]
 585 000a 1B68     		ldr	r3, [r3]
 586              		.loc 1 247 5
 587 000c 234A     		ldr	r2, .L28
 588 000e 9342     		cmp	r3, r2
 589 0010 1AD1     		bne	.L23
 248:Core/Src/stm32f4xx_hal_msp.c ****   {
 249:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN1_MspDeInit 0 */
 250:Core/Src/stm32f4xx_hal_msp.c **** 
 251:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN1_MspDeInit 0 */
 252:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 253:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED--;
 590              		.loc 1 253 29
 591 0012 234B     		ldr	r3, .L28+4
 592 0014 1B68     		ldr	r3, [r3]
 593 0016 013B     		subs	r3, r3, #1
 594 0018 214A     		ldr	r2, .L28+4
 595 001a 1360     		str	r3, [r2]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 16


 254:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==0){
 596              		.loc 1 254 32
 597 001c 204B     		ldr	r3, .L28+4
 598 001e 1B68     		ldr	r3, [r3]
 599              		.loc 1 254 7
 600 0020 002B     		cmp	r3, #0
 601 0022 05D1     		bne	.L24
 255:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_DISABLE();
 602              		.loc 1 255 7
 603 0024 1F4B     		ldr	r3, .L28+8
 604 0026 1B6C     		ldr	r3, [r3, #64]
 605 0028 1E4A     		ldr	r2, .L28+8
 606 002a 23F00073 		bic	r3, r3, #33554432
 607 002e 1364     		str	r3, [r2, #64]
 608              	.L24:
 256:Core/Src/stm32f4xx_hal_msp.c ****     }
 257:Core/Src/stm32f4xx_hal_msp.c **** 
 258:Core/Src/stm32f4xx_hal_msp.c ****     /**CAN1 GPIO Configuration
 259:Core/Src/stm32f4xx_hal_msp.c ****     PB8     ------> CAN1_RX
 260:Core/Src/stm32f4xx_hal_msp.c ****     PB9     ------> CAN1_TX
 261:Core/Src/stm32f4xx_hal_msp.c ****     */
 262:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, B8_CAN1_Pin|B9_CAN1_Pin);
 609              		.loc 1 262 5
 610 0030 4FF44071 		mov	r1, #768
 611 0034 1C48     		ldr	r0, .L28+12
 612 0036 FFF7FEFF 		bl	HAL_GPIO_DeInit
 263:Core/Src/stm32f4xx_hal_msp.c **** 
 264:Core/Src/stm32f4xx_hal_msp.c ****     /* CAN1 interrupt DeInit */
 265:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
 613              		.loc 1 265 5
 614 003a 1420     		movs	r0, #20
 615 003c FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 266:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(CAN1_SCE_IRQn);
 616              		.loc 1 266 5
 617 0040 1620     		movs	r0, #22
 618 0042 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 267:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN1_MspDeInit 1 */
 268:Core/Src/stm32f4xx_hal_msp.c **** 
 269:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN1_MspDeInit 1 */
 270:Core/Src/stm32f4xx_hal_msp.c ****   }
 271:Core/Src/stm32f4xx_hal_msp.c ****   else if(hcan->Instance==CAN2)
 272:Core/Src/stm32f4xx_hal_msp.c ****   {
 273:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspDeInit 0 */
 274:Core/Src/stm32f4xx_hal_msp.c **** 
 275:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN2_MspDeInit 0 */
 276:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 277:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_CAN2_CLK_DISABLE();
 278:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED--;
 279:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==0){
 280:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_DISABLE();
 281:Core/Src/stm32f4xx_hal_msp.c ****     }
 282:Core/Src/stm32f4xx_hal_msp.c **** 
 283:Core/Src/stm32f4xx_hal_msp.c ****     /**CAN2 GPIO Configuration
 284:Core/Src/stm32f4xx_hal_msp.c ****     PB12     ------> CAN2_RX
 285:Core/Src/stm32f4xx_hal_msp.c ****     PB13     ------> CAN2_TX
 286:Core/Src/stm32f4xx_hal_msp.c ****     */
 287:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13);
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 17


 288:Core/Src/stm32f4xx_hal_msp.c **** 
 289:Core/Src/stm32f4xx_hal_msp.c ****     /* CAN2 interrupt DeInit */
 290:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
 291:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(CAN2_SCE_IRQn);
 292:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspDeInit 1 */
 293:Core/Src/stm32f4xx_hal_msp.c **** 
 294:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END CAN2_MspDeInit 1 */
 295:Core/Src/stm32f4xx_hal_msp.c ****   }
 296:Core/Src/stm32f4xx_hal_msp.c **** 
 297:Core/Src/stm32f4xx_hal_msp.c **** }
 619              		.loc 1 297 1
 620 0046 24E0     		b	.L27
 621              	.L23:
 271:Core/Src/stm32f4xx_hal_msp.c ****   {
 622              		.loc 1 271 15
 623 0048 7B68     		ldr	r3, [r7, #4]
 624 004a 1B68     		ldr	r3, [r3]
 271:Core/Src/stm32f4xx_hal_msp.c ****   {
 625              		.loc 1 271 10
 626 004c 174A     		ldr	r2, .L28+16
 627 004e 9342     		cmp	r3, r2
 628 0050 1FD1     		bne	.L27
 277:Core/Src/stm32f4xx_hal_msp.c ****     HAL_RCC_CAN1_CLK_ENABLED--;
 629              		.loc 1 277 5
 630 0052 144B     		ldr	r3, .L28+8
 631 0054 1B6C     		ldr	r3, [r3, #64]
 632 0056 134A     		ldr	r2, .L28+8
 633 0058 23F08063 		bic	r3, r3, #67108864
 634 005c 1364     		str	r3, [r2, #64]
 278:Core/Src/stm32f4xx_hal_msp.c ****     if(HAL_RCC_CAN1_CLK_ENABLED==0){
 635              		.loc 1 278 29
 636 005e 104B     		ldr	r3, .L28+4
 637 0060 1B68     		ldr	r3, [r3]
 638 0062 013B     		subs	r3, r3, #1
 639 0064 0E4A     		ldr	r2, .L28+4
 640 0066 1360     		str	r3, [r2]
 279:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_DISABLE();
 641              		.loc 1 279 32
 642 0068 0D4B     		ldr	r3, .L28+4
 643 006a 1B68     		ldr	r3, [r3]
 279:Core/Src/stm32f4xx_hal_msp.c ****       __HAL_RCC_CAN1_CLK_DISABLE();
 644              		.loc 1 279 7
 645 006c 002B     		cmp	r3, #0
 646 006e 05D1     		bne	.L26
 280:Core/Src/stm32f4xx_hal_msp.c ****     }
 647              		.loc 1 280 7
 648 0070 0C4B     		ldr	r3, .L28+8
 649 0072 1B6C     		ldr	r3, [r3, #64]
 650 0074 0B4A     		ldr	r2, .L28+8
 651 0076 23F00073 		bic	r3, r3, #33554432
 652 007a 1364     		str	r3, [r2, #64]
 653              	.L26:
 287:Core/Src/stm32f4xx_hal_msp.c **** 
 654              		.loc 1 287 5
 655 007c 4FF44051 		mov	r1, #12288
 656 0080 0948     		ldr	r0, .L28+12
 657 0082 FFF7FEFF 		bl	HAL_GPIO_DeInit
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 18


 290:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(CAN2_SCE_IRQn);
 658              		.loc 1 290 5
 659 0086 4020     		movs	r0, #64
 660 0088 FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 291:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN CAN2_MspDeInit 1 */
 661              		.loc 1 291 5
 662 008c 4220     		movs	r0, #66
 663 008e FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 664              	.L27:
 665              		.loc 1 297 1
 666 0092 00BF     		nop
 667 0094 0837     		adds	r7, r7, #8
 668              	.LCFI24:
 669              		.cfi_def_cfa_offset 8
 670 0096 BD46     		mov	sp, r7
 671              	.LCFI25:
 672              		.cfi_def_cfa_register 13
 673              		@ sp needed
 674 0098 80BD     		pop	{r7, pc}
 675              	.L29:
 676 009a 00BF     		.align	2
 677              	.L28:
 678 009c 00640040 		.word	1073767424
 679 00a0 00000000 		.word	HAL_RCC_CAN1_CLK_ENABLED
 680 00a4 00380240 		.word	1073887232
 681 00a8 00040240 		.word	1073873920
 682 00ac 00680040 		.word	1073768448
 683              		.cfi_endproc
 684              	.LFE239:
 686              		.section	.text.HAL_TIM_Base_MspInit,"ax",%progbits
 687              		.align	1
 688              		.global	HAL_TIM_Base_MspInit
 689              		.syntax unified
 690              		.thumb
 691              		.thumb_func
 693              	HAL_TIM_Base_MspInit:
 694              	.LFB240:
 298:Core/Src/stm32f4xx_hal_msp.c **** 
 299:Core/Src/stm32f4xx_hal_msp.c **** /**
 300:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
 301:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 302:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 303:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 304:Core/Src/stm32f4xx_hal_msp.c **** */
 305:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 306:Core/Src/stm32f4xx_hal_msp.c **** {
 695              		.loc 1 306 1
 696              		.cfi_startproc
 697              		@ args = 0, pretend = 0, frame = 24
 698              		@ frame_needed = 1, uses_anonymous_args = 0
 699              		@ link register save eliminated.
 700 0000 80B4     		push	{r7}
 701              	.LCFI26:
 702              		.cfi_def_cfa_offset 4
 703              		.cfi_offset 7, -4
 704 0002 87B0     		sub	sp, sp, #28
 705              	.LCFI27:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 19


 706              		.cfi_def_cfa_offset 32
 707 0004 00AF     		add	r7, sp, #0
 708              	.LCFI28:
 709              		.cfi_def_cfa_register 7
 710 0006 7860     		str	r0, [r7, #4]
 307:Core/Src/stm32f4xx_hal_msp.c ****   if(htim_base->Instance==TIM2)
 711              		.loc 1 307 15
 712 0008 7B68     		ldr	r3, [r7, #4]
 713 000a 1B68     		ldr	r3, [r3]
 714              		.loc 1 307 5
 715 000c B3F1804F 		cmp	r3, #1073741824
 716 0010 0ED1     		bne	.L31
 717              	.LBB12:
 308:Core/Src/stm32f4xx_hal_msp.c ****   {
 309:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM2_MspInit 0 */
 310:Core/Src/stm32f4xx_hal_msp.c **** 
 311:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM2_MspInit 0 */
 312:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 313:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM2_CLK_ENABLE();
 718              		.loc 1 313 5
 719 0012 0023     		movs	r3, #0
 720 0014 7B61     		str	r3, [r7, #20]
 721 0016 1D4B     		ldr	r3, .L35
 722 0018 1B6C     		ldr	r3, [r3, #64]
 723 001a 1C4A     		ldr	r2, .L35
 724 001c 43F00103 		orr	r3, r3, #1
 725 0020 1364     		str	r3, [r2, #64]
 726 0022 1A4B     		ldr	r3, .L35
 727 0024 1B6C     		ldr	r3, [r3, #64]
 728 0026 03F00103 		and	r3, r3, #1
 729 002a 7B61     		str	r3, [r7, #20]
 730 002c 7B69     		ldr	r3, [r7, #20]
 731              	.LBE12:
 314:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM2_MspInit 1 */
 315:Core/Src/stm32f4xx_hal_msp.c **** 
 316:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM2_MspInit 1 */
 317:Core/Src/stm32f4xx_hal_msp.c ****   }
 318:Core/Src/stm32f4xx_hal_msp.c ****   else if(htim_base->Instance==TIM3)
 319:Core/Src/stm32f4xx_hal_msp.c ****   {
 320:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspInit 0 */
 321:Core/Src/stm32f4xx_hal_msp.c **** 
 322:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM3_MspInit 0 */
 323:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 324:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM3_CLK_ENABLE();
 325:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspInit 1 */
 326:Core/Src/stm32f4xx_hal_msp.c **** 
 327:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM3_MspInit 1 */
 328:Core/Src/stm32f4xx_hal_msp.c ****   }
 329:Core/Src/stm32f4xx_hal_msp.c ****   else if(htim_base->Instance==TIM4)
 330:Core/Src/stm32f4xx_hal_msp.c ****   {
 331:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 0 */
 332:Core/Src/stm32f4xx_hal_msp.c **** 
 333:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM4_MspInit 0 */
 334:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 335:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM4_CLK_ENABLE();
 336:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 1 */
 337:Core/Src/stm32f4xx_hal_msp.c **** 
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 20


 338:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM4_MspInit 1 */
 339:Core/Src/stm32f4xx_hal_msp.c ****   }
 340:Core/Src/stm32f4xx_hal_msp.c **** 
 341:Core/Src/stm32f4xx_hal_msp.c **** }
 732              		.loc 1 341 1
 733 002e 26E0     		b	.L34
 734              	.L31:
 318:Core/Src/stm32f4xx_hal_msp.c ****   {
 735              		.loc 1 318 20
 736 0030 7B68     		ldr	r3, [r7, #4]
 737 0032 1B68     		ldr	r3, [r3]
 318:Core/Src/stm32f4xx_hal_msp.c ****   {
 738              		.loc 1 318 10
 739 0034 164A     		ldr	r2, .L35+4
 740 0036 9342     		cmp	r3, r2
 741 0038 0ED1     		bne	.L33
 742              	.LBB13:
 324:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspInit 1 */
 743              		.loc 1 324 5
 744 003a 0023     		movs	r3, #0
 745 003c 3B61     		str	r3, [r7, #16]
 746 003e 134B     		ldr	r3, .L35
 747 0040 1B6C     		ldr	r3, [r3, #64]
 748 0042 124A     		ldr	r2, .L35
 749 0044 43F00203 		orr	r3, r3, #2
 750 0048 1364     		str	r3, [r2, #64]
 751 004a 104B     		ldr	r3, .L35
 752 004c 1B6C     		ldr	r3, [r3, #64]
 753 004e 03F00203 		and	r3, r3, #2
 754 0052 3B61     		str	r3, [r7, #16]
 755 0054 3B69     		ldr	r3, [r7, #16]
 756              	.LBE13:
 757              		.loc 1 341 1
 758 0056 12E0     		b	.L34
 759              	.L33:
 329:Core/Src/stm32f4xx_hal_msp.c ****   {
 760              		.loc 1 329 20
 761 0058 7B68     		ldr	r3, [r7, #4]
 762 005a 1B68     		ldr	r3, [r3]
 329:Core/Src/stm32f4xx_hal_msp.c ****   {
 763              		.loc 1 329 10
 764 005c 0D4A     		ldr	r2, .L35+8
 765 005e 9342     		cmp	r3, r2
 766 0060 0DD1     		bne	.L34
 767              	.LBB14:
 335:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 1 */
 768              		.loc 1 335 5
 769 0062 0023     		movs	r3, #0
 770 0064 FB60     		str	r3, [r7, #12]
 771 0066 094B     		ldr	r3, .L35
 772 0068 1B6C     		ldr	r3, [r3, #64]
 773 006a 084A     		ldr	r2, .L35
 774 006c 43F00403 		orr	r3, r3, #4
 775 0070 1364     		str	r3, [r2, #64]
 776 0072 064B     		ldr	r3, .L35
 777 0074 1B6C     		ldr	r3, [r3, #64]
 778 0076 03F00403 		and	r3, r3, #4
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 21


 779 007a FB60     		str	r3, [r7, #12]
 780 007c FB68     		ldr	r3, [r7, #12]
 781              	.L34:
 782              	.LBE14:
 783              		.loc 1 341 1
 784 007e 00BF     		nop
 785 0080 1C37     		adds	r7, r7, #28
 786              	.LCFI29:
 787              		.cfi_def_cfa_offset 4
 788 0082 BD46     		mov	sp, r7
 789              	.LCFI30:
 790              		.cfi_def_cfa_register 13
 791              		@ sp needed
 792 0084 5DF8047B 		ldr	r7, [sp], #4
 793              	.LCFI31:
 794              		.cfi_restore 7
 795              		.cfi_def_cfa_offset 0
 796 0088 7047     		bx	lr
 797              	.L36:
 798 008a 00BF     		.align	2
 799              	.L35:
 800 008c 00380240 		.word	1073887232
 801 0090 00040040 		.word	1073742848
 802 0094 00080040 		.word	1073743872
 803              		.cfi_endproc
 804              	.LFE240:
 806              		.section	.text.HAL_TIM_Base_MspDeInit,"ax",%progbits
 807              		.align	1
 808              		.global	HAL_TIM_Base_MspDeInit
 809              		.syntax unified
 810              		.thumb
 811              		.thumb_func
 813              	HAL_TIM_Base_MspDeInit:
 814              	.LFB241:
 342:Core/Src/stm32f4xx_hal_msp.c **** 
 343:Core/Src/stm32f4xx_hal_msp.c **** /**
 344:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
 345:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 346:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 347:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 348:Core/Src/stm32f4xx_hal_msp.c **** */
 349:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
 350:Core/Src/stm32f4xx_hal_msp.c **** {
 815              		.loc 1 350 1
 816              		.cfi_startproc
 817              		@ args = 0, pretend = 0, frame = 8
 818              		@ frame_needed = 1, uses_anonymous_args = 0
 819              		@ link register save eliminated.
 820 0000 80B4     		push	{r7}
 821              	.LCFI32:
 822              		.cfi_def_cfa_offset 4
 823              		.cfi_offset 7, -4
 824 0002 83B0     		sub	sp, sp, #12
 825              	.LCFI33:
 826              		.cfi_def_cfa_offset 16
 827 0004 00AF     		add	r7, sp, #0
 828              	.LCFI34:
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 22


 829              		.cfi_def_cfa_register 7
 830 0006 7860     		str	r0, [r7, #4]
 351:Core/Src/stm32f4xx_hal_msp.c ****   if(htim_base->Instance==TIM2)
 831              		.loc 1 351 15
 832 0008 7B68     		ldr	r3, [r7, #4]
 833 000a 1B68     		ldr	r3, [r3]
 834              		.loc 1 351 5
 835 000c B3F1804F 		cmp	r3, #1073741824
 836 0010 06D1     		bne	.L38
 352:Core/Src/stm32f4xx_hal_msp.c ****   {
 353:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM2_MspDeInit 0 */
 354:Core/Src/stm32f4xx_hal_msp.c **** 
 355:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM2_MspDeInit 0 */
 356:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 357:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM2_CLK_DISABLE();
 837              		.loc 1 357 5
 838 0012 124B     		ldr	r3, .L42
 839 0014 1B6C     		ldr	r3, [r3, #64]
 840 0016 114A     		ldr	r2, .L42
 841 0018 23F00103 		bic	r3, r3, #1
 842 001c 1364     		str	r3, [r2, #64]
 358:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM2_MspDeInit 1 */
 359:Core/Src/stm32f4xx_hal_msp.c **** 
 360:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM2_MspDeInit 1 */
 361:Core/Src/stm32f4xx_hal_msp.c ****   }
 362:Core/Src/stm32f4xx_hal_msp.c ****   else if(htim_base->Instance==TIM3)
 363:Core/Src/stm32f4xx_hal_msp.c ****   {
 364:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspDeInit 0 */
 365:Core/Src/stm32f4xx_hal_msp.c **** 
 366:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM3_MspDeInit 0 */
 367:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 368:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM3_CLK_DISABLE();
 369:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspDeInit 1 */
 370:Core/Src/stm32f4xx_hal_msp.c **** 
 371:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM3_MspDeInit 1 */
 372:Core/Src/stm32f4xx_hal_msp.c ****   }
 373:Core/Src/stm32f4xx_hal_msp.c ****   else if(htim_base->Instance==TIM4)
 374:Core/Src/stm32f4xx_hal_msp.c ****   {
 375:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspDeInit 0 */
 376:Core/Src/stm32f4xx_hal_msp.c **** 
 377:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM4_MspDeInit 0 */
 378:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 379:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_TIM4_CLK_DISABLE();
 380:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspDeInit 1 */
 381:Core/Src/stm32f4xx_hal_msp.c **** 
 382:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END TIM4_MspDeInit 1 */
 383:Core/Src/stm32f4xx_hal_msp.c ****   }
 384:Core/Src/stm32f4xx_hal_msp.c **** 
 385:Core/Src/stm32f4xx_hal_msp.c **** }
 843              		.loc 1 385 1
 844 001e 16E0     		b	.L41
 845              	.L38:
 362:Core/Src/stm32f4xx_hal_msp.c ****   {
 846              		.loc 1 362 20
 847 0020 7B68     		ldr	r3, [r7, #4]
 848 0022 1B68     		ldr	r3, [r3]
 362:Core/Src/stm32f4xx_hal_msp.c ****   {
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 23


 849              		.loc 1 362 10
 850 0024 0E4A     		ldr	r2, .L42+4
 851 0026 9342     		cmp	r3, r2
 852 0028 06D1     		bne	.L40
 368:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM3_MspDeInit 1 */
 853              		.loc 1 368 5
 854 002a 0C4B     		ldr	r3, .L42
 855 002c 1B6C     		ldr	r3, [r3, #64]
 856 002e 0B4A     		ldr	r2, .L42
 857 0030 23F00203 		bic	r3, r3, #2
 858 0034 1364     		str	r3, [r2, #64]
 859              		.loc 1 385 1
 860 0036 0AE0     		b	.L41
 861              	.L40:
 373:Core/Src/stm32f4xx_hal_msp.c ****   {
 862              		.loc 1 373 20
 863 0038 7B68     		ldr	r3, [r7, #4]
 864 003a 1B68     		ldr	r3, [r3]
 373:Core/Src/stm32f4xx_hal_msp.c ****   {
 865              		.loc 1 373 10
 866 003c 094A     		ldr	r2, .L42+8
 867 003e 9342     		cmp	r3, r2
 868 0040 05D1     		bne	.L41
 379:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspDeInit 1 */
 869              		.loc 1 379 5
 870 0042 064B     		ldr	r3, .L42
 871 0044 1B6C     		ldr	r3, [r3, #64]
 872 0046 054A     		ldr	r2, .L42
 873 0048 23F00403 		bic	r3, r3, #4
 874 004c 1364     		str	r3, [r2, #64]
 875              	.L41:
 876              		.loc 1 385 1
 877 004e 00BF     		nop
 878 0050 0C37     		adds	r7, r7, #12
 879              	.LCFI35:
 880              		.cfi_def_cfa_offset 4
 881 0052 BD46     		mov	sp, r7
 882              	.LCFI36:
 883              		.cfi_def_cfa_register 13
 884              		@ sp needed
 885 0054 5DF8047B 		ldr	r7, [sp], #4
 886              	.LCFI37:
 887              		.cfi_restore 7
 888              		.cfi_def_cfa_offset 0
 889 0058 7047     		bx	lr
 890              	.L43:
 891 005a 00BF     		.align	2
 892              	.L42:
 893 005c 00380240 		.word	1073887232
 894 0060 00040040 		.word	1073742848
 895 0064 00080040 		.word	1073743872
 896              		.cfi_endproc
 897              	.LFE241:
 899              		.section	.text.HAL_UART_MspInit,"ax",%progbits
 900              		.align	1
 901              		.global	HAL_UART_MspInit
 902              		.syntax unified
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 24


 903              		.thumb
 904              		.thumb_func
 906              	HAL_UART_MspInit:
 907              	.LFB242:
 386:Core/Src/stm32f4xx_hal_msp.c **** 
 387:Core/Src/stm32f4xx_hal_msp.c **** /**
 388:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP Initialization
 389:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 390:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer
 391:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 392:Core/Src/stm32f4xx_hal_msp.c **** */
 393:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 394:Core/Src/stm32f4xx_hal_msp.c **** {
 908              		.loc 1 394 1
 909              		.cfi_startproc
 910              		@ args = 0, pretend = 0, frame = 40
 911              		@ frame_needed = 1, uses_anonymous_args = 0
 912 0000 80B5     		push	{r7, lr}
 913              	.LCFI38:
 914              		.cfi_def_cfa_offset 8
 915              		.cfi_offset 7, -8
 916              		.cfi_offset 14, -4
 917 0002 8AB0     		sub	sp, sp, #40
 918              	.LCFI39:
 919              		.cfi_def_cfa_offset 48
 920 0004 00AF     		add	r7, sp, #0
 921              	.LCFI40:
 922              		.cfi_def_cfa_register 7
 923 0006 7860     		str	r0, [r7, #4]
 395:Core/Src/stm32f4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 924              		.loc 1 395 20
 925 0008 07F11403 		add	r3, r7, #20
 926 000c 0022     		movs	r2, #0
 927 000e 1A60     		str	r2, [r3]
 928 0010 5A60     		str	r2, [r3, #4]
 929 0012 9A60     		str	r2, [r3, #8]
 930 0014 DA60     		str	r2, [r3, #12]
 931 0016 1A61     		str	r2, [r3, #16]
 396:Core/Src/stm32f4xx_hal_msp.c ****   if(huart->Instance==USART1)
 932              		.loc 1 396 11
 933 0018 7B68     		ldr	r3, [r7, #4]
 934 001a 1B68     		ldr	r3, [r3]
 935              		.loc 1 396 5
 936 001c 4C4A     		ldr	r2, .L49
 937 001e 9342     		cmp	r3, r2
 938 0020 40F09280 		bne	.L48
 939              	.LBB15:
 397:Core/Src/stm32f4xx_hal_msp.c ****   {
 398:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 0 */
 399:Core/Src/stm32f4xx_hal_msp.c **** 
 400:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 0 */
 401:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
 402:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_ENABLE();
 940              		.loc 1 402 5
 941 0024 0023     		movs	r3, #0
 942 0026 3B61     		str	r3, [r7, #16]
 943 0028 4A4B     		ldr	r3, .L49+4
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 25


 944 002a 5B6C     		ldr	r3, [r3, #68]
 945 002c 494A     		ldr	r2, .L49+4
 946 002e 43F01003 		orr	r3, r3, #16
 947 0032 5364     		str	r3, [r2, #68]
 948 0034 474B     		ldr	r3, .L49+4
 949 0036 5B6C     		ldr	r3, [r3, #68]
 950 0038 03F01003 		and	r3, r3, #16
 951 003c 3B61     		str	r3, [r7, #16]
 952 003e 3B69     		ldr	r3, [r7, #16]
 953              	.LBE15:
 954              	.LBB16:
 403:Core/Src/stm32f4xx_hal_msp.c **** 
 404:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 955              		.loc 1 404 5
 956 0040 0023     		movs	r3, #0
 957 0042 FB60     		str	r3, [r7, #12]
 958 0044 434B     		ldr	r3, .L49+4
 959 0046 1B6B     		ldr	r3, [r3, #48]
 960 0048 424A     		ldr	r2, .L49+4
 961 004a 43F00103 		orr	r3, r3, #1
 962 004e 1363     		str	r3, [r2, #48]
 963 0050 404B     		ldr	r3, .L49+4
 964 0052 1B6B     		ldr	r3, [r3, #48]
 965 0054 03F00103 		and	r3, r3, #1
 966 0058 FB60     		str	r3, [r7, #12]
 967 005a FB68     		ldr	r3, [r7, #12]
 968              	.LBE16:
 405:Core/Src/stm32f4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 406:Core/Src/stm32f4xx_hal_msp.c ****     PA9     ------> USART1_TX
 407:Core/Src/stm32f4xx_hal_msp.c ****     PA10     ------> USART1_RX
 408:Core/Src/stm32f4xx_hal_msp.c ****     */
 409:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = A9_FMU_USART_Pin|A10_FMU_USART_Pin;
 969              		.loc 1 409 25
 970 005c 4FF4C063 		mov	r3, #1536
 971 0060 7B61     		str	r3, [r7, #20]
 410:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 972              		.loc 1 410 26
 973 0062 0223     		movs	r3, #2
 974 0064 BB61     		str	r3, [r7, #24]
 411:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 975              		.loc 1 411 26
 976 0066 0023     		movs	r3, #0
 977 0068 FB61     		str	r3, [r7, #28]
 412:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 978              		.loc 1 412 27
 979 006a 0323     		movs	r3, #3
 980 006c 3B62     		str	r3, [r7, #32]
 413:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
 981              		.loc 1 413 31
 982 006e 0723     		movs	r3, #7
 983 0070 7B62     		str	r3, [r7, #36]
 414:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 984              		.loc 1 414 5
 985 0072 07F11403 		add	r3, r7, #20
 986 0076 1946     		mov	r1, r3
 987 0078 3748     		ldr	r0, .L49+8
 988 007a FFF7FEFF 		bl	HAL_GPIO_Init
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 26


 415:Core/Src/stm32f4xx_hal_msp.c **** 
 416:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1 DMA Init */
 417:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1_RX Init */
 418:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Instance = DMA2_Stream2;
 989              		.loc 1 418 29
 990 007e 374B     		ldr	r3, .L49+12
 991 0080 374A     		ldr	r2, .L49+16
 992 0082 1A60     		str	r2, [r3]
 419:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
 993              		.loc 1 419 33
 994 0084 354B     		ldr	r3, .L49+12
 995 0086 4FF00062 		mov	r2, #134217728
 996 008a 5A60     		str	r2, [r3, #4]
 420:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 997              		.loc 1 420 35
 998 008c 334B     		ldr	r3, .L49+12
 999 008e 0022     		movs	r2, #0
 1000 0090 9A60     		str	r2, [r3, #8]
 421:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 1001              		.loc 1 421 35
 1002 0092 324B     		ldr	r3, .L49+12
 1003 0094 0022     		movs	r2, #0
 1004 0096 DA60     		str	r2, [r3, #12]
 422:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
 1005              		.loc 1 422 32
 1006 0098 304B     		ldr	r3, .L49+12
 1007 009a 4FF48062 		mov	r2, #1024
 1008 009e 1A61     		str	r2, [r3, #16]
 423:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 1009              		.loc 1 423 45
 1010 00a0 2E4B     		ldr	r3, .L49+12
 1011 00a2 0022     		movs	r2, #0
 1012 00a4 5A61     		str	r2, [r3, #20]
 424:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 1013              		.loc 1 424 42
 1014 00a6 2D4B     		ldr	r3, .L49+12
 1015 00a8 0022     		movs	r2, #0
 1016 00aa 9A61     		str	r2, [r3, #24]
 425:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.Mode = DMA_CIRCULAR;
 1017              		.loc 1 425 30
 1018 00ac 2B4B     		ldr	r3, .L49+12
 1019 00ae 4FF48072 		mov	r2, #256
 1020 00b2 DA61     		str	r2, [r3, #28]
 426:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
 1021              		.loc 1 426 34
 1022 00b4 294B     		ldr	r3, .L49+12
 1023 00b6 0022     		movs	r2, #0
 1024 00b8 1A62     		str	r2, [r3, #32]
 427:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 1025              		.loc 1 427 34
 1026 00ba 284B     		ldr	r3, .L49+12
 1027 00bc 0022     		movs	r2, #0
 1028 00be 5A62     		str	r2, [r3, #36]
 428:Core/Src/stm32f4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
 1029              		.loc 1 428 9
 1030 00c0 2648     		ldr	r0, .L49+12
 1031 00c2 FFF7FEFF 		bl	HAL_DMA_Init
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 27


 1032 00c6 0346     		mov	r3, r0
 1033              		.loc 1 428 8
 1034 00c8 002B     		cmp	r3, #0
 1035 00ca 01D0     		beq	.L46
 429:Core/Src/stm32f4xx_hal_msp.c ****     {
 430:Core/Src/stm32f4xx_hal_msp.c ****       Error_Handler();
 1036              		.loc 1 430 7
 1037 00cc FFF7FEFF 		bl	Error_Handler
 1038              	.L46:
 431:Core/Src/stm32f4xx_hal_msp.c ****     }
 432:Core/Src/stm32f4xx_hal_msp.c **** 
 433:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
 1039              		.loc 1 433 5
 1040 00d0 7B68     		ldr	r3, [r7, #4]
 1041 00d2 224A     		ldr	r2, .L49+12
 1042 00d4 9A63     		str	r2, [r3, #56]
 1043 00d6 214A     		ldr	r2, .L49+12
 1044 00d8 7B68     		ldr	r3, [r7, #4]
 1045 00da 9363     		str	r3, [r2, #56]
 434:Core/Src/stm32f4xx_hal_msp.c **** 
 435:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1_TX Init */
 436:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Instance = DMA2_Stream7;
 1046              		.loc 1 436 29
 1047 00dc 214B     		ldr	r3, .L49+20
 1048 00de 224A     		ldr	r2, .L49+24
 1049 00e0 1A60     		str	r2, [r3]
 437:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
 1050              		.loc 1 437 33
 1051 00e2 204B     		ldr	r3, .L49+20
 1052 00e4 4FF00062 		mov	r2, #134217728
 1053 00e8 5A60     		str	r2, [r3, #4]
 438:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 1054              		.loc 1 438 35
 1055 00ea 1E4B     		ldr	r3, .L49+20
 1056 00ec 4022     		movs	r2, #64
 1057 00ee 9A60     		str	r2, [r3, #8]
 439:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 1058              		.loc 1 439 35
 1059 00f0 1C4B     		ldr	r3, .L49+20
 1060 00f2 0022     		movs	r2, #0
 1061 00f4 DA60     		str	r2, [r3, #12]
 440:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 1062              		.loc 1 440 32
 1063 00f6 1B4B     		ldr	r3, .L49+20
 1064 00f8 4FF48062 		mov	r2, #1024
 1065 00fc 1A61     		str	r2, [r3, #16]
 441:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 1066              		.loc 1 441 45
 1067 00fe 194B     		ldr	r3, .L49+20
 1068 0100 0022     		movs	r2, #0
 1069 0102 5A61     		str	r2, [r3, #20]
 442:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 1070              		.loc 1 442 42
 1071 0104 174B     		ldr	r3, .L49+20
 1072 0106 0022     		movs	r2, #0
 1073 0108 9A61     		str	r2, [r3, #24]
 443:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 28


 1074              		.loc 1 443 30
 1075 010a 164B     		ldr	r3, .L49+20
 1076 010c 0022     		movs	r2, #0
 1077 010e DA61     		str	r2, [r3, #28]
 444:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 1078              		.loc 1 444 34
 1079 0110 144B     		ldr	r3, .L49+20
 1080 0112 0022     		movs	r2, #0
 1081 0114 1A62     		str	r2, [r3, #32]
 445:Core/Src/stm32f4xx_hal_msp.c ****     hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 1082              		.loc 1 445 34
 1083 0116 134B     		ldr	r3, .L49+20
 1084 0118 0022     		movs	r2, #0
 1085 011a 5A62     		str	r2, [r3, #36]
 446:Core/Src/stm32f4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 1086              		.loc 1 446 9
 1087 011c 1148     		ldr	r0, .L49+20
 1088 011e FFF7FEFF 		bl	HAL_DMA_Init
 1089 0122 0346     		mov	r3, r0
 1090              		.loc 1 446 8
 1091 0124 002B     		cmp	r3, #0
 1092 0126 01D0     		beq	.L47
 447:Core/Src/stm32f4xx_hal_msp.c ****     {
 448:Core/Src/stm32f4xx_hal_msp.c ****       Error_Handler();
 1093              		.loc 1 448 7
 1094 0128 FFF7FEFF 		bl	Error_Handler
 1095              	.L47:
 449:Core/Src/stm32f4xx_hal_msp.c ****     }
 450:Core/Src/stm32f4xx_hal_msp.c **** 
 451:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
 1096              		.loc 1 451 5
 1097 012c 7B68     		ldr	r3, [r7, #4]
 1098 012e 0D4A     		ldr	r2, .L49+20
 1099 0130 5A63     		str	r2, [r3, #52]
 1100 0132 0C4A     		ldr	r2, .L49+20
 1101 0134 7B68     		ldr	r3, [r7, #4]
 1102 0136 9363     		str	r3, [r2, #56]
 452:Core/Src/stm32f4xx_hal_msp.c **** 
 453:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1 interrupt Init */
 454:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 1103              		.loc 1 454 5
 1104 0138 0022     		movs	r2, #0
 1105 013a 0021     		movs	r1, #0
 1106 013c 2520     		movs	r0, #37
 1107 013e FFF7FEFF 		bl	HAL_NVIC_SetPriority
 455:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 1108              		.loc 1 455 5
 1109 0142 2520     		movs	r0, #37
 1110 0144 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 1111              	.L48:
 456:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 1 */
 457:Core/Src/stm32f4xx_hal_msp.c **** 
 458:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 1 */
 459:Core/Src/stm32f4xx_hal_msp.c ****   }
 460:Core/Src/stm32f4xx_hal_msp.c **** 
 461:Core/Src/stm32f4xx_hal_msp.c **** }
 1112              		.loc 1 461 1
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 29


 1113 0148 00BF     		nop
 1114 014a 2837     		adds	r7, r7, #40
 1115              	.LCFI41:
 1116              		.cfi_def_cfa_offset 8
 1117 014c BD46     		mov	sp, r7
 1118              	.LCFI42:
 1119              		.cfi_def_cfa_register 13
 1120              		@ sp needed
 1121 014e 80BD     		pop	{r7, pc}
 1122              	.L50:
 1123              		.align	2
 1124              	.L49:
 1125 0150 00100140 		.word	1073811456
 1126 0154 00380240 		.word	1073887232
 1127 0158 00000240 		.word	1073872896
 1128 015c 00000000 		.word	hdma_usart1_rx
 1129 0160 40640240 		.word	1073898560
 1130 0164 00000000 		.word	hdma_usart1_tx
 1131 0168 B8640240 		.word	1073898680
 1132              		.cfi_endproc
 1133              	.LFE242:
 1135              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
 1136              		.align	1
 1137              		.global	HAL_UART_MspDeInit
 1138              		.syntax unified
 1139              		.thumb
 1140              		.thumb_func
 1142              	HAL_UART_MspDeInit:
 1143              	.LFB243:
 462:Core/Src/stm32f4xx_hal_msp.c **** 
 463:Core/Src/stm32f4xx_hal_msp.c **** /**
 464:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP De-Initialization
 465:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 466:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer
 467:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
 468:Core/Src/stm32f4xx_hal_msp.c **** */
 469:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 470:Core/Src/stm32f4xx_hal_msp.c **** {
 1144              		.loc 1 470 1
 1145              		.cfi_startproc
 1146              		@ args = 0, pretend = 0, frame = 8
 1147              		@ frame_needed = 1, uses_anonymous_args = 0
 1148 0000 80B5     		push	{r7, lr}
 1149              	.LCFI43:
 1150              		.cfi_def_cfa_offset 8
 1151              		.cfi_offset 7, -8
 1152              		.cfi_offset 14, -4
 1153 0002 82B0     		sub	sp, sp, #8
 1154              	.LCFI44:
 1155              		.cfi_def_cfa_offset 16
 1156 0004 00AF     		add	r7, sp, #0
 1157              	.LCFI45:
 1158              		.cfi_def_cfa_register 7
 1159 0006 7860     		str	r0, [r7, #4]
 471:Core/Src/stm32f4xx_hal_msp.c ****   if(huart->Instance==USART1)
 1160              		.loc 1 471 11
 1161 0008 7B68     		ldr	r3, [r7, #4]
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 30


 1162 000a 1B68     		ldr	r3, [r3]
 1163              		.loc 1 471 5
 1164 000c 0F4A     		ldr	r2, .L54
 1165 000e 9342     		cmp	r3, r2
 1166 0010 17D1     		bne	.L53
 472:Core/Src/stm32f4xx_hal_msp.c ****   {
 473:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 0 */
 474:Core/Src/stm32f4xx_hal_msp.c **** 
 475:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 0 */
 476:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
 477:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_DISABLE();
 1167              		.loc 1 477 5
 1168 0012 0F4B     		ldr	r3, .L54+4
 1169 0014 5B6C     		ldr	r3, [r3, #68]
 1170 0016 0E4A     		ldr	r2, .L54+4
 1171 0018 23F01003 		bic	r3, r3, #16
 1172 001c 5364     		str	r3, [r2, #68]
 478:Core/Src/stm32f4xx_hal_msp.c **** 
 479:Core/Src/stm32f4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 480:Core/Src/stm32f4xx_hal_msp.c ****     PA9     ------> USART1_TX
 481:Core/Src/stm32f4xx_hal_msp.c ****     PA10     ------> USART1_RX
 482:Core/Src/stm32f4xx_hal_msp.c ****     */
 483:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, A9_FMU_USART_Pin|A10_FMU_USART_Pin);
 1173              		.loc 1 483 5
 1174 001e 4FF4C061 		mov	r1, #1536
 1175 0022 0C48     		ldr	r0, .L54+8
 1176 0024 FFF7FEFF 		bl	HAL_GPIO_DeInit
 484:Core/Src/stm32f4xx_hal_msp.c **** 
 485:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1 DMA DeInit */
 486:Core/Src/stm32f4xx_hal_msp.c ****     HAL_DMA_DeInit(huart->hdmarx);
 1177              		.loc 1 486 5
 1178 0028 7B68     		ldr	r3, [r7, #4]
 1179 002a 9B6B     		ldr	r3, [r3, #56]
 1180 002c 1846     		mov	r0, r3
 1181 002e FFF7FEFF 		bl	HAL_DMA_DeInit
 487:Core/Src/stm32f4xx_hal_msp.c ****     HAL_DMA_DeInit(huart->hdmatx);
 1182              		.loc 1 487 5
 1183 0032 7B68     		ldr	r3, [r7, #4]
 1184 0034 5B6B     		ldr	r3, [r3, #52]
 1185 0036 1846     		mov	r0, r3
 1186 0038 FFF7FEFF 		bl	HAL_DMA_DeInit
 488:Core/Src/stm32f4xx_hal_msp.c **** 
 489:Core/Src/stm32f4xx_hal_msp.c ****     /* USART1 interrupt DeInit */
 490:Core/Src/stm32f4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART1_IRQn);
 1187              		.loc 1 490 5
 1188 003c 2520     		movs	r0, #37
 1189 003e FFF7FEFF 		bl	HAL_NVIC_DisableIRQ
 1190              	.L53:
 491:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
 492:Core/Src/stm32f4xx_hal_msp.c **** 
 493:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 1 */
 494:Core/Src/stm32f4xx_hal_msp.c ****   }
 495:Core/Src/stm32f4xx_hal_msp.c **** 
 496:Core/Src/stm32f4xx_hal_msp.c **** }
 1191              		.loc 1 496 1
 1192 0042 00BF     		nop
 1193 0044 0837     		adds	r7, r7, #8
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 31


 1194              	.LCFI46:
 1195              		.cfi_def_cfa_offset 8
 1196 0046 BD46     		mov	sp, r7
 1197              	.LCFI47:
 1198              		.cfi_def_cfa_register 13
 1199              		@ sp needed
 1200 0048 80BD     		pop	{r7, pc}
 1201              	.L55:
 1202 004a 00BF     		.align	2
 1203              	.L54:
 1204 004c 00100140 		.word	1073811456
 1205 0050 00380240 		.word	1073887232
 1206 0054 00000240 		.word	1073872896
 1207              		.cfi_endproc
 1208              	.LFE243:
 1210              		.text
 1211              	.Letext0:
 1212              		.file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
 1213              		.file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
 1214              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h"
 1215              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
 1216              		.file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
 1217              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
 1218              		.file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
 1219              		.file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
 1220              		.file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h"
 1221              		.file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h"
 1222              		.file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
ARM GAS  C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s 			page 32


DEFINED SYMBOLS
                            *ABS*:00000000 stm32f4xx_hal_msp.c
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:20     .text.HAL_MspInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:26     .text.HAL_MspInit:00000000 HAL_MspInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:91     .text.HAL_MspInit:0000004c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:96     .text.HAL_ADC_MspInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:102    .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:230    .text.HAL_ADC_MspInit:000000c0 $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:238    .text.HAL_ADC_MspDeInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:244    .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:300    .text.HAL_ADC_MspDeInit:0000003c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:308    .bss.HAL_RCC_CAN1_CLK_ENABLED:00000000 $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:311    .bss.HAL_RCC_CAN1_CLK_ENABLED:00000000 HAL_RCC_CAN1_CLK_ENABLED
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:314    .text.HAL_CAN_MspInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:320    .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:550    .text.HAL_CAN_MspInit:0000016c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:559    .text.HAL_CAN_MspDeInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:565    .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:678    .text.HAL_CAN_MspDeInit:0000009c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:687    .text.HAL_TIM_Base_MspInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:693    .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:800    .text.HAL_TIM_Base_MspInit:0000008c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:807    .text.HAL_TIM_Base_MspDeInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:813    .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:893    .text.HAL_TIM_Base_MspDeInit:0000005c $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:900    .text.HAL_UART_MspInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:906    .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:1125   .text.HAL_UART_MspInit:00000150 $d
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:1136   .text.HAL_UART_MspDeInit:00000000 $t
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:1142   .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
C:\Users\10728\AppData\Local\Temp\ccQdSeJK.s:1204   .text.HAL_UART_MspDeInit:0000004c $d

UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_GPIO_DeInit
HAL_NVIC_DisableIRQ
HAL_DMA_Init
Error_Handler
hdma_usart1_rx
hdma_usart1_tx
HAL_DMA_DeInit