main.lst 121 KB

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  1. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 6
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "main.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .global hadc1
  21. 20 .section .bss.hadc1,"aw",%nobits
  22. 21 .align 2
  23. 24 hadc1:
  24. 25 0000 00000000 .space 72
  25. 25 00000000
  26. 25 00000000
  27. 25 00000000
  28. 25 00000000
  29. 26 .global hcan1
  30. 27 .section .bss.hcan1,"aw",%nobits
  31. 28 .align 2
  32. 31 hcan1:
  33. 32 0000 00000000 .space 40
  34. 32 00000000
  35. 32 00000000
  36. 32 00000000
  37. 32 00000000
  38. 33 .global hcan2
  39. 34 .section .bss.hcan2,"aw",%nobits
  40. 35 .align 2
  41. 38 hcan2:
  42. 39 0000 00000000 .space 40
  43. 39 00000000
  44. 39 00000000
  45. 39 00000000
  46. 39 00000000
  47. 40 .global htim2
  48. 41 .section .bss.htim2,"aw",%nobits
  49. 42 .align 2
  50. 45 htim2:
  51. 46 0000 00000000 .space 72
  52. 46 00000000
  53. 46 00000000
  54. 46 00000000
  55. 46 00000000
  56. 47 .global htim3
  57. 48 .section .bss.htim3,"aw",%nobits
  58. 49 .align 2
  59. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 2
  60. 52 htim3:
  61. 53 0000 00000000 .space 72
  62. 53 00000000
  63. 53 00000000
  64. 53 00000000
  65. 53 00000000
  66. 54 .global htim4
  67. 55 .section .bss.htim4,"aw",%nobits
  68. 56 .align 2
  69. 59 htim4:
  70. 60 0000 00000000 .space 72
  71. 60 00000000
  72. 60 00000000
  73. 60 00000000
  74. 60 00000000
  75. 61 .global huart1
  76. 62 .section .bss.huart1,"aw",%nobits
  77. 63 .align 2
  78. 66 huart1:
  79. 67 0000 00000000 .space 68
  80. 67 00000000
  81. 67 00000000
  82. 67 00000000
  83. 67 00000000
  84. 68 .global hdma_usart1_rx
  85. 69 .section .bss.hdma_usart1_rx,"aw",%nobits
  86. 70 .align 2
  87. 73 hdma_usart1_rx:
  88. 74 0000 00000000 .space 96
  89. 74 00000000
  90. 74 00000000
  91. 74 00000000
  92. 74 00000000
  93. 75 .global hdma_usart1_tx
  94. 76 .section .bss.hdma_usart1_tx,"aw",%nobits
  95. 77 .align 2
  96. 80 hdma_usart1_tx:
  97. 81 0000 00000000 .space 96
  98. 81 00000000
  99. 81 00000000
  100. 81 00000000
  101. 81 00000000
  102. 82 .global update_flag
  103. 83 .section .bss.update_flag,"aw",%nobits
  104. 84 .align 1
  105. 87 update_flag:
  106. 88 0000 0000 .space 2
  107. 89 .global led_time
  108. 90 .section .bss.led_time,"aw",%nobits
  109. 91 .align 2
  110. 94 led_time:
  111. 95 0000 00000000 .space 4
  112. 96 .section .text.main,"ax",%progbits
  113. 97 .align 1
  114. 98 .global main
  115. 99 .syntax unified
  116. 100 .thumb
  117. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 3
  118. 101 .thumb_func
  119. 103 main:
  120. 104 .LFB238:
  121. 105 .file 1 "Core/Src/main.c"
  122. 1:Core/Src/main.c **** /* USER CODE BEGIN Header */
  123. 2:Core/Src/main.c **** /**
  124. 3:Core/Src/main.c **** ******************************************************************************
  125. 4:Core/Src/main.c **** * @file : main.c
  126. 5:Core/Src/main.c **** * @brief : Main program body
  127. 6:Core/Src/main.c **** ******************************************************************************
  128. 7:Core/Src/main.c **** * @attention
  129. 8:Core/Src/main.c **** *
  130. 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics.
  131. 10:Core/Src/main.c **** * All rights reserved.
  132. 11:Core/Src/main.c **** *
  133. 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file
  134. 13:Core/Src/main.c **** * in the root directory of this software component.
  135. 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
  136. 15:Core/Src/main.c **** *
  137. 16:Core/Src/main.c **** ******************************************************************************
  138. 17:Core/Src/main.c **** */
  139. 18:Core/Src/main.c **** /* USER CODE END Header */
  140. 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
  141. 20:Core/Src/main.c **** #include "main.h"
  142. 21:Core/Src/main.c ****
  143. 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
  144. 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */
  145. 24:Core/Src/main.c **** #include "soft_uart.h"
  146. 25:Core/Src/main.c **** #include "soft_flash.h"
  147. 26:Core/Src/main.c **** /* USER CODE END Includes */
  148. 27:Core/Src/main.c ****
  149. 28:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
  150. 29:Core/Src/main.c **** /* USER CODE BEGIN PTD */
  151. 30:Core/Src/main.c ****
  152. 31:Core/Src/main.c **** /* USER CODE END PTD */
  153. 32:Core/Src/main.c ****
  154. 33:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
  155. 34:Core/Src/main.c **** /* USER CODE BEGIN PD */
  156. 35:Core/Src/main.c ****
  157. 36:Core/Src/main.c **** /* USER CODE END PD */
  158. 37:Core/Src/main.c ****
  159. 38:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
  160. 39:Core/Src/main.c **** /* USER CODE BEGIN PM */
  161. 40:Core/Src/main.c ****
  162. 41:Core/Src/main.c **** /* USER CODE END PM */
  163. 42:Core/Src/main.c ****
  164. 43:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
  165. 44:Core/Src/main.c **** ADC_HandleTypeDef hadc1;
  166. 45:Core/Src/main.c ****
  167. 46:Core/Src/main.c **** CAN_HandleTypeDef hcan1;
  168. 47:Core/Src/main.c **** CAN_HandleTypeDef hcan2;
  169. 48:Core/Src/main.c ****
  170. 49:Core/Src/main.c **** TIM_HandleTypeDef htim2;
  171. 50:Core/Src/main.c **** TIM_HandleTypeDef htim3;
  172. 51:Core/Src/main.c **** TIM_HandleTypeDef htim4;
  173. 52:Core/Src/main.c ****
  174. 53:Core/Src/main.c **** UART_HandleTypeDef huart1;
  175. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 4
  176. 54:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_rx;
  177. 55:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_tx;
  178. 56:Core/Src/main.c ****
  179. 57:Core/Src/main.c **** /* USER CODE BEGIN PV */
  180. 58:Core/Src/main.c ****
  181. 59:Core/Src/main.c **** /* USER CODE END PV */
  182. 60:Core/Src/main.c ****
  183. 61:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
  184. 62:Core/Src/main.c **** void SystemClock_Config(void);
  185. 63:Core/Src/main.c **** static void MX_GPIO_Init(void);
  186. 64:Core/Src/main.c **** static void MX_DMA_Init(void);
  187. 65:Core/Src/main.c **** static void MX_ADC1_Init(void);
  188. 66:Core/Src/main.c **** static void MX_CAN1_Init(void);
  189. 67:Core/Src/main.c **** static void MX_TIM2_Init(void);
  190. 68:Core/Src/main.c **** static void MX_CAN2_Init(void);
  191. 69:Core/Src/main.c **** static void MX_TIM3_Init(void);
  192. 70:Core/Src/main.c **** static void MX_TIM4_Init(void);
  193. 71:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
  194. 72:Core/Src/main.c **** /* USER CODE BEGIN PFP */
  195. 73:Core/Src/main.c ****
  196. 74:Core/Src/main.c **** /* USER CODE END PFP */
  197. 75:Core/Src/main.c ****
  198. 76:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
  199. 77:Core/Src/main.c **** /* USER CODE BEGIN 0 */
  200. 78:Core/Src/main.c **** uint16_t update_flag = 0;
  201. 79:Core/Src/main.c **** uint32_t led_time = 0;
  202. 80:Core/Src/main.c **** /* USER CODE END 0 */
  203. 81:Core/Src/main.c ****
  204. 82:Core/Src/main.c **** /**
  205. 83:Core/Src/main.c **** * @brief The application entry point.
  206. 84:Core/Src/main.c **** * @retval int
  207. 85:Core/Src/main.c **** */
  208. 86:Core/Src/main.c **** int main(void)
  209. 87:Core/Src/main.c **** {
  210. 106 .loc 1 87 1
  211. 107 .cfi_startproc
  212. 108 @ args = 0, pretend = 0, frame = 16
  213. 109 @ frame_needed = 1, uses_anonymous_args = 0
  214. 110 0000 80B5 push {r7, lr}
  215. 111 .LCFI0:
  216. 112 .cfi_def_cfa_offset 8
  217. 113 .cfi_offset 7, -8
  218. 114 .cfi_offset 14, -4
  219. 115 0002 84B0 sub sp, sp, #16
  220. 116 .LCFI1:
  221. 117 .cfi_def_cfa_offset 24
  222. 118 0004 00AF add r7, sp, #0
  223. 119 .LCFI2:
  224. 120 .cfi_def_cfa_register 7
  225. 88:Core/Src/main.c **** /* USER CODE BEGIN 1 */
  226. 89:Core/Src/main.c ****
  227. 90:Core/Src/main.c **** /* USER CODE END 1 */
  228. 91:Core/Src/main.c ****
  229. 92:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
  230. 93:Core/Src/main.c ****
  231. 94:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  232. 95:Core/Src/main.c **** HAL_Init();
  233. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 5
  234. 121 .loc 1 95 3
  235. 122 0006 FFF7FEFF bl HAL_Init
  236. 96:Core/Src/main.c ****
  237. 97:Core/Src/main.c **** /* USER CODE BEGIN Init */
  238. 98:Core/Src/main.c ****
  239. 99:Core/Src/main.c **** /* USER CODE END Init */
  240. 100:Core/Src/main.c ****
  241. 101:Core/Src/main.c **** /* Configure the system clock */
  242. 102:Core/Src/main.c **** SystemClock_Config();
  243. 123 .loc 1 102 3
  244. 124 000a FFF7FEFF bl SystemClock_Config
  245. 103:Core/Src/main.c ****
  246. 104:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
  247. 105:Core/Src/main.c ****
  248. 106:Core/Src/main.c **** /* USER CODE END SysInit */
  249. 107:Core/Src/main.c ****
  250. 108:Core/Src/main.c **** /* Initialize all configured peripherals */
  251. 109:Core/Src/main.c **** MX_GPIO_Init();
  252. 125 .loc 1 109 3
  253. 126 000e FFF7FEFF bl MX_GPIO_Init
  254. 110:Core/Src/main.c **** MX_DMA_Init();
  255. 127 .loc 1 110 3
  256. 128 0012 FFF7FEFF bl MX_DMA_Init
  257. 111:Core/Src/main.c **** MX_ADC1_Init();
  258. 129 .loc 1 111 3
  259. 130 0016 FFF7FEFF bl MX_ADC1_Init
  260. 112:Core/Src/main.c **** MX_CAN1_Init();
  261. 131 .loc 1 112 3
  262. 132 001a FFF7FEFF bl MX_CAN1_Init
  263. 113:Core/Src/main.c **** MX_TIM2_Init();
  264. 133 .loc 1 113 3
  265. 134 001e FFF7FEFF bl MX_TIM2_Init
  266. 114:Core/Src/main.c **** MX_CAN2_Init();
  267. 135 .loc 1 114 3
  268. 136 0022 FFF7FEFF bl MX_CAN2_Init
  269. 115:Core/Src/main.c **** MX_TIM3_Init();
  270. 137 .loc 1 115 3
  271. 138 0026 FFF7FEFF bl MX_TIM3_Init
  272. 116:Core/Src/main.c **** MX_TIM4_Init();
  273. 139 .loc 1 116 3
  274. 140 002a FFF7FEFF bl MX_TIM4_Init
  275. 117:Core/Src/main.c **** MX_USART1_UART_Init();
  276. 141 .loc 1 117 3
  277. 142 002e FFF7FEFF bl MX_USART1_UART_Init
  278. 118:Core/Src/main.c **** /* USER CODE BEGIN 2 */
  279. 119:Core/Src/main.c **** SCB->VTOR = FLASH_BASE | 0x0000;
  280. 143 .loc 1 119 6
  281. 144 0032 334B ldr r3, .L8
  282. 145 .loc 1 119 13
  283. 146 0034 4FF00062 mov r2, #134217728
  284. 147 0038 9A60 str r2, [r3, #8]
  285. 120:Core/Src/main.c **** typedef void (*pFunction)(void);
  286. 121:Core/Src/main.c **** pFunction Jump_To_Application;
  287. 122:Core/Src/main.c **** uint32_t JumpAddress;
  288. 123:Core/Src/main.c ****
  289. 124:Core/Src/main.c **** //初始化串口
  290. 125:Core/Src/main.c **** __HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE);
  291. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 6
  292. 148 .loc 1 125 3
  293. 149 003a 324B ldr r3, .L8+4
  294. 150 003c 1B68 ldr r3, [r3]
  295. 151 003e DA68 ldr r2, [r3, #12]
  296. 152 0040 304B ldr r3, .L8+4
  297. 153 0042 1B68 ldr r3, [r3]
  298. 154 0044 42F01002 orr r2, r2, #16
  299. 155 0048 DA60 str r2, [r3, #12]
  300. 126:Core/Src/main.c **** HAL_UART_Receive_DMA(&huart1, (uint8_t *)FMU_uart_buf, MAX_UART_BUF);
  301. 156 .loc 1 126 2
  302. 157 004a 4FF48072 mov r2, #256
  303. 158 004e 2E49 ldr r1, .L8+8
  304. 159 0050 2C48 ldr r0, .L8+4
  305. 160 0052 FFF7FEFF bl HAL_UART_Receive_DMA
  306. 127:Core/Src/main.c **** __HAL_UART_ENABLE_IT(&huart1, UART_IT_ERR);
  307. 161 .loc 1 127 2
  308. 162 0056 2B4B ldr r3, .L8+4
  309. 163 0058 1B68 ldr r3, [r3]
  310. 164 005a 5A69 ldr r2, [r3, #20]
  311. 165 005c 294B ldr r3, .L8+4
  312. 166 005e 1B68 ldr r3, [r3]
  313. 167 0060 42F00102 orr r2, r2, #1
  314. 168 0064 5A61 str r2, [r3, #20]
  315. 128:Core/Src/main.c **** //读取标志位
  316. 129:Core/Src/main.c **** update_flag = flash_read_updata_flag();
  317. 169 .loc 1 129 17
  318. 170 0066 FFF7FEFF bl flash_read_updata_flag
  319. 171 006a 0346 mov r3, r0
  320. 172 .loc 1 129 15
  321. 173 006c 9AB2 uxth r2, r3
  322. 174 006e 274B ldr r3, .L8+12
  323. 175 0070 1A80 strh r2, [r3] @ movhi
  324. 176 .L7:
  325. 130:Core/Src/main.c **** /* USER CODE END 2 */
  326. 131:Core/Src/main.c **** /* Infinite loop */
  327. 132:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
  328. 133:Core/Src/main.c **** //update_flag = IAP_FLAG; //test
  329. 134:Core/Src/main.c **** while (1)
  330. 135:Core/Src/main.c **** {
  331. 136:Core/Src/main.c **** /* USER CODE END WHILE */
  332. 137:Core/Src/main.c **** if(update_flag == IAP_FLAG)
  333. 177 .loc 1 137 20
  334. 178 0072 264B ldr r3, .L8+12
  335. 179 0074 1B88 ldrh r3, [r3]
  336. 180 .loc 1 137 7
  337. 181 0076 4AF6CD32 movw r2, #43981
  338. 182 007a 9342 cmp r3, r2
  339. 183 007c 01D1 bne .L2
  340. 138:Core/Src/main.c **** {
  341. 139:Core/Src/main.c **** update_function();
  342. 184 .loc 1 139 7
  343. 185 007e FFF7FEFF bl update_function
  344. 186 .L2:
  345. 140:Core/Src/main.c **** }
  346. 141:Core/Src/main.c ****
  347. 142:Core/Src/main.c **** if(update_complete == true || update_flag != IAP_FLAG)
  348. 187 .loc 1 142 24
  349. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 7
  350. 188 0082 234B ldr r3, .L8+16
  351. 189 0084 1B78 ldrb r3, [r3] @ zero_extendqisi2
  352. 190 .loc 1 142 7
  353. 191 0086 002B cmp r3, #0
  354. 192 0088 05D1 bne .L3
  355. 193 .loc 1 142 47 discriminator 1
  356. 194 008a 204B ldr r3, .L8+12
  357. 195 008c 1B88 ldrh r3, [r3]
  358. 196 .loc 1 142 32 discriminator 1
  359. 197 008e 4AF6CD32 movw r2, #43981
  360. 198 0092 9342 cmp r3, r2
  361. 199 0094 1FD0 beq .L4
  362. 200 .L3:
  363. 201 .LBB10:
  364. 202 .LBB11:
  365. 203 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
  366. 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
  367. 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
  368. 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
  369. 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
  370. 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
  371. 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
  372. 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
  373. 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  374. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
  375. 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
  376. 11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
  377. 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
  378. 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
  379. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
  380. 15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
  381. 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
  382. 17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
  383. 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
  384. 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  385. 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  386. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
  387. 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
  388. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  389. 24:Drivers/CMSIS/Include/cmsis_gcc.h ****
  390. 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  391. 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  392. 27:Drivers/CMSIS/Include/cmsis_gcc.h ****
  393. 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  394. 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  395. 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  396. 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  397. 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  398. 33:Drivers/CMSIS/Include/cmsis_gcc.h ****
  399. 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  400. 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  401. 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
  402. 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  403. 38:Drivers/CMSIS/Include/cmsis_gcc.h ****
  404. 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  405. 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
  406. 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
  407. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 8
  408. 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  409. 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
  410. 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
  411. 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  412. 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
  413. 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
  414. 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  415. 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
  416. 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
  417. 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  418. 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
  419. 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
  420. 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  421. 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
  422. 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
  423. 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  424. 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
  425. 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
  426. 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  427. 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
  428. 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
  429. 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  430. 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
  431. 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
  432. 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  433. 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
  434. 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
  435. 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  436. 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
  437. 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  438. 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
  439. 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
  440. 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  441. 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
  442. 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
  443. 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  444. 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
  445. 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  446. 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
  447. 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
  448. 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  449. 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
  450. 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  451. 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  452. 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
  453. 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  454. 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
  455. 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
  456. 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  457. 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
  458. 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
  459. 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  460. 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
  461. 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  462. 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
  463. 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
  464. 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  465. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 9
  466. 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
  467. 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
  468. 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  469. 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
  470. 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  471. 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
  472. 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
  473. 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
  474. 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
  475. 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
  476. 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  477. 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
  478. 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
  479. 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  480. 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
  481. 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
  482. 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  483. 116:Drivers/CMSIS/Include/cmsis_gcc.h ****
  484. 117:Drivers/CMSIS/Include/cmsis_gcc.h ****
  485. 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
  486. 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
  487. 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
  488. 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
  489. 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  490. 123:Drivers/CMSIS/Include/cmsis_gcc.h ****
  491. 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  492. 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
  493. 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
  494. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
  495. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  496. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
  497. 130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  498. 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
  499. 132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  500. 133:Drivers/CMSIS/Include/cmsis_gcc.h ****
  501. 134:Drivers/CMSIS/Include/cmsis_gcc.h ****
  502. 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  503. 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
  504. 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
  505. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
  506. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  507. 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
  508. 141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  509. 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
  510. 204 .loc 2 142 3
  511. 205 .syntax unified
  512. 206 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
  513. 207 0096 72B6 cpsid i
  514. 208 @ 0 "" 2
  515. 143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  516. 209 .loc 2 143 1
  517. 210 .thumb
  518. 211 .syntax unified
  519. 212 0098 00BF nop
  520. 213 .LBE11:
  521. 214 .LBE10:
  522. 143:Core/Src/main.c **** {
  523. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 10
  524. 144:Core/Src/main.c **** __disable_irq();
  525. 145:Core/Src/main.c **** if ((*(__IO uint32_t *)FLASH_APP_ADDR) <= 0x20020000 &&
  526. 215 .loc 1 145 12
  527. 216 009a 1E4B ldr r3, .L8+20
  528. 217 009c 1B68 ldr r3, [r3]
  529. 218 .loc 1 145 10
  530. 219 009e 1E4A ldr r2, .L8+24
  531. 220 00a0 9342 cmp r3, r2
  532. 221 00a2 16D8 bhi .L5
  533. 146:Core/Src/main.c **** (*(__IO uint32_t *)FLASH_APP_ADDR) >= 0x20000000)
  534. 222 .loc 1 146 12 discriminator 1
  535. 223 00a4 1B4B ldr r3, .L8+20
  536. 224 00a6 1B68 ldr r3, [r3]
  537. 145:Core/Src/main.c **** (*(__IO uint32_t *)FLASH_APP_ADDR) >= 0x20000000)
  538. 225 .loc 1 145 60 discriminator 1
  539. 226 00a8 B3F1005F cmp r3, #536870912
  540. 227 00ac 11D3 bcc .L5
  541. 147:Core/Src/main.c **** {
  542. 148:Core/Src/main.c **** HAL_DeInit();
  543. 228 .loc 1 148 9
  544. 229 00ae FFF7FEFF bl HAL_DeInit
  545. 149:Core/Src/main.c **** HAL_RCC_DeInit();
  546. 230 .loc 1 149 9
  547. 231 00b2 FFF7FEFF bl HAL_RCC_DeInit
  548. 150:Core/Src/main.c ****
  549. 151:Core/Src/main.c **** JumpAddress = *(__IO uint32_t *)(FLASH_APP_ADDR + 4);
  550. 232 .loc 1 151 23
  551. 233 00b6 194B ldr r3, .L8+28
  552. 234 .loc 1 151 21
  553. 235 00b8 1B68 ldr r3, [r3]
  554. 236 00ba FB60 str r3, [r7, #12]
  555. 152:Core/Src/main.c ****
  556. 153:Core/Src/main.c **** Jump_To_Application = (pFunction)JumpAddress;
  557. 237 .loc 1 153 29
  558. 238 00bc FB68 ldr r3, [r7, #12]
  559. 239 00be BB60 str r3, [r7, #8]
  560. 154:Core/Src/main.c ****
  561. 155:Core/Src/main.c **** __set_MSP(*(__IO uint32_t *)FLASH_APP_ADDR);
  562. 240 .loc 1 155 9
  563. 241 00c0 144B ldr r3, .L8+20
  564. 242 00c2 1B68 ldr r3, [r3]
  565. 243 00c4 7B60 str r3, [r7, #4]
  566. 244 .LBB12:
  567. 245 .LBB13:
  568. 144:Drivers/CMSIS/Include/cmsis_gcc.h ****
  569. 145:Drivers/CMSIS/Include/cmsis_gcc.h ****
  570. 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  571. 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
  572. 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
  573. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
  574. 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  575. 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
  576. 152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  577. 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  578. 154:Drivers/CMSIS/Include/cmsis_gcc.h ****
  579. 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
  580. 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  581. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 11
  582. 157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  583. 158:Drivers/CMSIS/Include/cmsis_gcc.h ****
  584. 159:Drivers/CMSIS/Include/cmsis_gcc.h ****
  585. 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  586. 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  587. 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
  588. 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
  589. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
  590. 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  591. 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
  592. 167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  593. 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  594. 169:Drivers/CMSIS/Include/cmsis_gcc.h ****
  595. 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
  596. 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  597. 172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  598. 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  599. 174:Drivers/CMSIS/Include/cmsis_gcc.h ****
  600. 175:Drivers/CMSIS/Include/cmsis_gcc.h ****
  601. 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  602. 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
  603. 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
  604. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
  605. 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  606. 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
  607. 182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  608. 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
  609. 184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  610. 185:Drivers/CMSIS/Include/cmsis_gcc.h ****
  611. 186:Drivers/CMSIS/Include/cmsis_gcc.h ****
  612. 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  613. 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  614. 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
  615. 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
  616. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
  617. 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  618. 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
  619. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  620. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
  621. 196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  622. 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  623. 198:Drivers/CMSIS/Include/cmsis_gcc.h ****
  624. 199:Drivers/CMSIS/Include/cmsis_gcc.h ****
  625. 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  626. 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
  627. 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
  628. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
  629. 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  630. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
  631. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  632. 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  633. 208:Drivers/CMSIS/Include/cmsis_gcc.h ****
  634. 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
  635. 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  636. 211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  637. 212:Drivers/CMSIS/Include/cmsis_gcc.h ****
  638. 213:Drivers/CMSIS/Include/cmsis_gcc.h ****
  639. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 12
  640. 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  641. 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
  642. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
  643. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
  644. 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  645. 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
  646. 220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  647. 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  648. 222:Drivers/CMSIS/Include/cmsis_gcc.h ****
  649. 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
  650. 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  651. 225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  652. 226:Drivers/CMSIS/Include/cmsis_gcc.h ****
  653. 227:Drivers/CMSIS/Include/cmsis_gcc.h ****
  654. 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  655. 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
  656. 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
  657. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
  658. 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  659. 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
  660. 234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  661. 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  662. 236:Drivers/CMSIS/Include/cmsis_gcc.h ****
  663. 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
  664. 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  665. 239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  666. 240:Drivers/CMSIS/Include/cmsis_gcc.h ****
  667. 241:Drivers/CMSIS/Include/cmsis_gcc.h ****
  668. 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  669. 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
  670. 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
  671. 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
  672. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  673. 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
  674. 248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  675. 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  676. 250:Drivers/CMSIS/Include/cmsis_gcc.h ****
  677. 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
  678. 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  679. 253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  680. 254:Drivers/CMSIS/Include/cmsis_gcc.h ****
  681. 255:Drivers/CMSIS/Include/cmsis_gcc.h ****
  682. 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  683. 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  684. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
  685. 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
  686. 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
  687. 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  688. 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
  689. 263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  690. 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  691. 265:Drivers/CMSIS/Include/cmsis_gcc.h ****
  692. 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
  693. 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  694. 268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  695. 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  696. 270:Drivers/CMSIS/Include/cmsis_gcc.h ****
  697. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 13
  698. 271:Drivers/CMSIS/Include/cmsis_gcc.h ****
  699. 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  700. 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
  701. 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
  702. 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
  703. 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  704. 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
  705. 278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  706. 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
  707. 280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  708. 281:Drivers/CMSIS/Include/cmsis_gcc.h ****
  709. 282:Drivers/CMSIS/Include/cmsis_gcc.h ****
  710. 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  711. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  712. 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
  713. 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
  714. 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
  715. 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  716. 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
  717. 290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  718. 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
  719. 292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  720. 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  721. 294:Drivers/CMSIS/Include/cmsis_gcc.h ****
  722. 295:Drivers/CMSIS/Include/cmsis_gcc.h ****
  723. 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  724. 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
  725. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
  726. 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
  727. 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  728. 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
  729. 302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  730. 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  731. 304:Drivers/CMSIS/Include/cmsis_gcc.h ****
  732. 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
  733. 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  734. 307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  735. 308:Drivers/CMSIS/Include/cmsis_gcc.h ****
  736. 309:Drivers/CMSIS/Include/cmsis_gcc.h ****
  737. 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
  738. 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  739. 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
  740. 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
  741. 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
  742. 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  743. 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
  744. 317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  745. 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
  746. 319:Drivers/CMSIS/Include/cmsis_gcc.h ****
  747. 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
  748. 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
  749. 322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  750. 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  751. 324:Drivers/CMSIS/Include/cmsis_gcc.h ****
  752. 325:Drivers/CMSIS/Include/cmsis_gcc.h ****
  753. 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
  754. 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
  755. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 14
  756. 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
  757. 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
  758. 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
  759. 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
  760. 332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
  761. 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
  762. 246 .loc 2 333 3
  763. 247 00c6 7B68 ldr r3, [r7, #4]
  764. 248 .syntax unified
  765. 249 @ 333 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
  766. 250 00c8 83F30888 MSR msp, r3
  767. 251 @ 0 "" 2
  768. 334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  769. 252 .loc 2 334 1
  770. 253 .thumb
  771. 254 .syntax unified
  772. 255 00cc 00BF nop
  773. 256 .LBE13:
  774. 257 .LBE12:
  775. 156:Core/Src/main.c **** //__set_CONTROL(0);
  776. 157:Core/Src/main.c **** Jump_To_Application();
  777. 258 .loc 1 157 9
  778. 259 00ce BB68 ldr r3, [r7, #8]
  779. 260 00d0 9847 blx r3
  780. 261 .LVL0:
  781. 262 .L5:
  782. 263 .LBB14:
  783. 264 .LBB15:
  784. 131:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  785. 265 .loc 2 131 3
  786. 266 .syntax unified
  787. 267 @ 131 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
  788. 268 00d2 62B6 cpsie i
  789. 269 @ 0 "" 2
  790. 132:Drivers/CMSIS/Include/cmsis_gcc.h ****
  791. 270 .loc 2 132 1
  792. 271 .thumb
  793. 272 .syntax unified
  794. 273 00d4 00BF nop
  795. 274 .L4:
  796. 275 .LBE15:
  797. 276 .LBE14:
  798. 158:Core/Src/main.c **** }
  799. 159:Core/Src/main.c **** __enable_irq();
  800. 160:Core/Src/main.c ****
  801. 161:Core/Src/main.c **** /* USER CODE BEGIN 3 */
  802. 162:Core/Src/main.c **** }
  803. 163:Core/Src/main.c ****
  804. 164:Core/Src/main.c **** if(HAL_GetTick() - led_time > 1000)
  805. 277 .loc 1 164 8
  806. 278 00d6 FFF7FEFF bl HAL_GetTick
  807. 279 00da 0246 mov r2, r0
  808. 280 .loc 1 164 22
  809. 281 00dc 104B ldr r3, .L8+32
  810. 282 00de 1B68 ldr r3, [r3]
  811. 283 00e0 D31A subs r3, r2, r3
  812. 284 .loc 1 164 7
  813. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 15
  814. 285 00e2 B3F57A7F cmp r3, #1000
  815. 286 00e6 C4D9 bls .L7
  816. 165:Core/Src/main.c **** {
  817. 166:Core/Src/main.c **** HAL_GPIO_TogglePin(GPIOC,C10_LED_B_Pin|C10_LED_G_Pin);
  818. 287 .loc 1 166 7
  819. 288 00e8 4FF4A051 mov r1, #5120
  820. 289 00ec 0D48 ldr r0, .L8+36
  821. 290 00ee FFF7FEFF bl HAL_GPIO_TogglePin
  822. 167:Core/Src/main.c **** //HAL_GPIO_TogglePin(GPIOC,C10_LED_B_Pin);
  823. 168:Core/Src/main.c **** //HAL_GPIO_TogglePin(GPIOC,C10_LED_G_Pin);
  824. 169:Core/Src/main.c **** led_time = HAL_GetTick();
  825. 291 .loc 1 169 18
  826. 292 00f2 FFF7FEFF bl HAL_GetTick
  827. 293 00f6 0346 mov r3, r0
  828. 294 .loc 1 169 16
  829. 295 00f8 094A ldr r2, .L8+32
  830. 296 00fa 1360 str r3, [r2]
  831. 137:Core/Src/main.c **** {
  832. 297 .loc 1 137 7
  833. 298 00fc B9E7 b .L7
  834. 299 .L9:
  835. 300 00fe 00BF .align 2
  836. 301 .L8:
  837. 302 0100 00ED00E0 .word -536810240
  838. 303 0104 00000000 .word huart1
  839. 304 0108 00000000 .word FMU_uart_buf
  840. 305 010c 00000000 .word update_flag
  841. 306 0110 00000000 .word update_complete
  842. 307 0114 00000208 .word 134348800
  843. 308 0118 00000220 .word 537001984
  844. 309 011c 04000208 .word 134348804
  845. 310 0120 00000000 .word led_time
  846. 311 0124 00080240 .word 1073874944
  847. 312 .cfi_endproc
  848. 313 .LFE238:
  849. 315 .section .text.SystemClock_Config,"ax",%progbits
  850. 316 .align 1
  851. 317 .global SystemClock_Config
  852. 318 .syntax unified
  853. 319 .thumb
  854. 320 .thumb_func
  855. 322 SystemClock_Config:
  856. 323 .LFB239:
  857. 170:Core/Src/main.c **** }
  858. 171:Core/Src/main.c ****
  859. 172:Core/Src/main.c ****
  860. 173:Core/Src/main.c ****
  861. 174:Core/Src/main.c **** /* USER CODE END 3 */
  862. 175:Core/Src/main.c **** }
  863. 176:Core/Src/main.c **** }
  864. 177:Core/Src/main.c ****
  865. 178:Core/Src/main.c **** /**
  866. 179:Core/Src/main.c **** * @brief System Clock Configuration
  867. 180:Core/Src/main.c **** * @retval None
  868. 181:Core/Src/main.c **** */
  869. 182:Core/Src/main.c **** void SystemClock_Config(void)
  870. 183:Core/Src/main.c **** {
  871. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 16
  872. 324 .loc 1 183 1
  873. 325 .cfi_startproc
  874. 326 @ args = 0, pretend = 0, frame = 80
  875. 327 @ frame_needed = 1, uses_anonymous_args = 0
  876. 328 0000 80B5 push {r7, lr}
  877. 329 .LCFI3:
  878. 330 .cfi_def_cfa_offset 8
  879. 331 .cfi_offset 7, -8
  880. 332 .cfi_offset 14, -4
  881. 333 0002 94B0 sub sp, sp, #80
  882. 334 .LCFI4:
  883. 335 .cfi_def_cfa_offset 88
  884. 336 0004 00AF add r7, sp, #0
  885. 337 .LCFI5:
  886. 338 .cfi_def_cfa_register 7
  887. 184:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  888. 339 .loc 1 184 22
  889. 340 0006 07F12003 add r3, r7, #32
  890. 341 000a 3022 movs r2, #48
  891. 342 000c 0021 movs r1, #0
  892. 343 000e 1846 mov r0, r3
  893. 344 0010 FFF7FEFF bl memset
  894. 185:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  895. 345 .loc 1 185 22
  896. 346 0014 07F10C03 add r3, r7, #12
  897. 347 0018 0022 movs r2, #0
  898. 348 001a 1A60 str r2, [r3]
  899. 349 001c 5A60 str r2, [r3, #4]
  900. 350 001e 9A60 str r2, [r3, #8]
  901. 351 0020 DA60 str r2, [r3, #12]
  902. 352 0022 1A61 str r2, [r3, #16]
  903. 353 .LBB16:
  904. 186:Core/Src/main.c ****
  905. 187:Core/Src/main.c **** /** Configure the main internal regulator output voltage
  906. 188:Core/Src/main.c **** */
  907. 189:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE();
  908. 354 .loc 1 189 3
  909. 355 0024 0023 movs r3, #0
  910. 356 0026 BB60 str r3, [r7, #8]
  911. 357 0028 284B ldr r3, .L14
  912. 358 002a 1B6C ldr r3, [r3, #64]
  913. 359 002c 274A ldr r2, .L14
  914. 360 002e 43F08053 orr r3, r3, #268435456
  915. 361 0032 1364 str r3, [r2, #64]
  916. 362 0034 254B ldr r3, .L14
  917. 363 0036 1B6C ldr r3, [r3, #64]
  918. 364 0038 03F08053 and r3, r3, #268435456
  919. 365 003c BB60 str r3, [r7, #8]
  920. 366 003e BB68 ldr r3, [r7, #8]
  921. 367 .LBE16:
  922. 368 .LBB17:
  923. 190:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  924. 369 .loc 1 190 3
  925. 370 0040 0023 movs r3, #0
  926. 371 0042 7B60 str r3, [r7, #4]
  927. 372 0044 224B ldr r3, .L14+4
  928. 373 0046 1B68 ldr r3, [r3]
  929. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 17
  930. 374 0048 214A ldr r2, .L14+4
  931. 375 004a 43F48043 orr r3, r3, #16384
  932. 376 004e 1360 str r3, [r2]
  933. 377 0050 1F4B ldr r3, .L14+4
  934. 378 0052 1B68 ldr r3, [r3]
  935. 379 0054 03F48043 and r3, r3, #16384
  936. 380 0058 7B60 str r3, [r7, #4]
  937. 381 005a 7B68 ldr r3, [r7, #4]
  938. 382 .LBE17:
  939. 191:Core/Src/main.c ****
  940. 192:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
  941. 193:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
  942. 194:Core/Src/main.c **** */
  943. 195:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  944. 383 .loc 1 195 36
  945. 384 005c 0123 movs r3, #1
  946. 385 005e 3B62 str r3, [r7, #32]
  947. 196:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  948. 386 .loc 1 196 30
  949. 387 0060 4FF48033 mov r3, #65536
  950. 388 0064 7B62 str r3, [r7, #36]
  951. 197:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  952. 389 .loc 1 197 34
  953. 390 0066 0223 movs r3, #2
  954. 391 0068 BB63 str r3, [r7, #56]
  955. 198:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  956. 392 .loc 1 198 35
  957. 393 006a 4FF48003 mov r3, #4194304
  958. 394 006e FB63 str r3, [r7, #60]
  959. 199:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 4;
  960. 395 .loc 1 199 30
  961. 396 0070 0423 movs r3, #4
  962. 397 0072 3B64 str r3, [r7, #64]
  963. 200:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 144;
  964. 398 .loc 1 200 30
  965. 399 0074 9023 movs r3, #144
  966. 400 0076 7B64 str r3, [r7, #68]
  967. 201:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  968. 401 .loc 1 201 30
  969. 402 0078 0223 movs r3, #2
  970. 403 007a BB64 str r3, [r7, #72]
  971. 202:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 4;
  972. 404 .loc 1 202 30
  973. 405 007c 0423 movs r3, #4
  974. 406 007e FB64 str r3, [r7, #76]
  975. 203:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  976. 407 .loc 1 203 7
  977. 408 0080 07F12003 add r3, r7, #32
  978. 409 0084 1846 mov r0, r3
  979. 410 0086 FFF7FEFF bl HAL_RCC_OscConfig
  980. 411 008a 0346 mov r3, r0
  981. 412 .loc 1 203 6
  982. 413 008c 002B cmp r3, #0
  983. 414 008e 01D0 beq .L11
  984. 204:Core/Src/main.c **** {
  985. 205:Core/Src/main.c **** Error_Handler();
  986. 415 .loc 1 205 5
  987. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 18
  988. 416 0090 FFF7FEFF bl Error_Handler
  989. 417 .L11:
  990. 206:Core/Src/main.c **** }
  991. 207:Core/Src/main.c ****
  992. 208:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
  993. 209:Core/Src/main.c **** */
  994. 210:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  995. 418 .loc 1 210 31
  996. 419 0094 0F23 movs r3, #15
  997. 420 0096 FB60 str r3, [r7, #12]
  998. 211:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  999. 212:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  1000. 421 .loc 1 212 34
  1001. 422 0098 0223 movs r3, #2
  1002. 423 009a 3B61 str r3, [r7, #16]
  1003. 213:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  1004. 424 .loc 1 213 35
  1005. 425 009c 0023 movs r3, #0
  1006. 426 009e 7B61 str r3, [r7, #20]
  1007. 214:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  1008. 427 .loc 1 214 36
  1009. 428 00a0 4FF4A053 mov r3, #5120
  1010. 429 00a4 BB61 str r3, [r7, #24]
  1011. 215:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  1012. 430 .loc 1 215 36
  1013. 431 00a6 4FF48053 mov r3, #4096
  1014. 432 00aa FB61 str r3, [r7, #28]
  1015. 216:Core/Src/main.c ****
  1016. 217:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
  1017. 433 .loc 1 217 7
  1018. 434 00ac 07F10C03 add r3, r7, #12
  1019. 435 00b0 0421 movs r1, #4
  1020. 436 00b2 1846 mov r0, r3
  1021. 437 00b4 FFF7FEFF bl HAL_RCC_ClockConfig
  1022. 438 00b8 0346 mov r3, r0
  1023. 439 .loc 1 217 6
  1024. 440 00ba 002B cmp r3, #0
  1025. 441 00bc 01D0 beq .L13
  1026. 218:Core/Src/main.c **** {
  1027. 219:Core/Src/main.c **** Error_Handler();
  1028. 442 .loc 1 219 5
  1029. 443 00be FFF7FEFF bl Error_Handler
  1030. 444 .L13:
  1031. 220:Core/Src/main.c **** }
  1032. 221:Core/Src/main.c **** }
  1033. 445 .loc 1 221 1
  1034. 446 00c2 00BF nop
  1035. 447 00c4 5037 adds r7, r7, #80
  1036. 448 .LCFI6:
  1037. 449 .cfi_def_cfa_offset 8
  1038. 450 00c6 BD46 mov sp, r7
  1039. 451 .LCFI7:
  1040. 452 .cfi_def_cfa_register 13
  1041. 453 @ sp needed
  1042. 454 00c8 80BD pop {r7, pc}
  1043. 455 .L15:
  1044. 456 00ca 00BF .align 2
  1045. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 19
  1046. 457 .L14:
  1047. 458 00cc 00380240 .word 1073887232
  1048. 459 00d0 00700040 .word 1073770496
  1049. 460 .cfi_endproc
  1050. 461 .LFE239:
  1051. 463 .section .text.MX_ADC1_Init,"ax",%progbits
  1052. 464 .align 1
  1053. 465 .syntax unified
  1054. 466 .thumb
  1055. 467 .thumb_func
  1056. 469 MX_ADC1_Init:
  1057. 470 .LFB240:
  1058. 222:Core/Src/main.c ****
  1059. 223:Core/Src/main.c **** /**
  1060. 224:Core/Src/main.c **** * @brief ADC1 Initialization Function
  1061. 225:Core/Src/main.c **** * @param None
  1062. 226:Core/Src/main.c **** * @retval None
  1063. 227:Core/Src/main.c **** */
  1064. 228:Core/Src/main.c **** static void MX_ADC1_Init(void)
  1065. 229:Core/Src/main.c **** {
  1066. 471 .loc 1 229 1
  1067. 472 .cfi_startproc
  1068. 473 @ args = 0, pretend = 0, frame = 16
  1069. 474 @ frame_needed = 1, uses_anonymous_args = 0
  1070. 475 0000 80B5 push {r7, lr}
  1071. 476 .LCFI8:
  1072. 477 .cfi_def_cfa_offset 8
  1073. 478 .cfi_offset 7, -8
  1074. 479 .cfi_offset 14, -4
  1075. 480 0002 84B0 sub sp, sp, #16
  1076. 481 .LCFI9:
  1077. 482 .cfi_def_cfa_offset 24
  1078. 483 0004 00AF add r7, sp, #0
  1079. 484 .LCFI10:
  1080. 485 .cfi_def_cfa_register 7
  1081. 230:Core/Src/main.c ****
  1082. 231:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
  1083. 232:Core/Src/main.c ****
  1084. 233:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */
  1085. 234:Core/Src/main.c ****
  1086. 235:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
  1087. 486 .loc 1 235 26
  1088. 487 0006 3B46 mov r3, r7
  1089. 488 0008 0022 movs r2, #0
  1090. 489 000a 1A60 str r2, [r3]
  1091. 490 000c 5A60 str r2, [r3, #4]
  1092. 491 000e 9A60 str r2, [r3, #8]
  1093. 492 0010 DA60 str r2, [r3, #12]
  1094. 236:Core/Src/main.c ****
  1095. 237:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
  1096. 238:Core/Src/main.c ****
  1097. 239:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */
  1098. 240:Core/Src/main.c ****
  1099. 241:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
  1100. 242:Core/Src/main.c **** */
  1101. 243:Core/Src/main.c **** hadc1.Instance = ADC1;
  1102. 493 .loc 1 243 18
  1103. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 20
  1104. 494 0012 214B ldr r3, .L20
  1105. 495 0014 214A ldr r2, .L20+4
  1106. 496 0016 1A60 str r2, [r3]
  1107. 244:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
  1108. 497 .loc 1 244 29
  1109. 498 0018 1F4B ldr r3, .L20
  1110. 499 001a 0022 movs r2, #0
  1111. 500 001c 5A60 str r2, [r3, #4]
  1112. 245:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
  1113. 501 .loc 1 245 25
  1114. 502 001e 1E4B ldr r3, .L20
  1115. 503 0020 0022 movs r2, #0
  1116. 504 0022 9A60 str r2, [r3, #8]
  1117. 246:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE;
  1118. 505 .loc 1 246 27
  1119. 506 0024 1C4B ldr r3, .L20
  1120. 507 0026 0022 movs r2, #0
  1121. 508 0028 1A61 str r2, [r3, #16]
  1122. 247:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
  1123. 509 .loc 1 247 33
  1124. 510 002a 1B4B ldr r3, .L20
  1125. 511 002c 0022 movs r2, #0
  1126. 512 002e 1A76 strb r2, [r3, #24]
  1127. 248:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
  1128. 513 .loc 1 248 36
  1129. 514 0030 194B ldr r3, .L20
  1130. 515 0032 0022 movs r2, #0
  1131. 516 0034 83F82020 strb r2, [r3, #32]
  1132. 249:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
  1133. 517 .loc 1 249 35
  1134. 518 0038 174B ldr r3, .L20
  1135. 519 003a 0022 movs r2, #0
  1136. 520 003c DA62 str r2, [r3, #44]
  1137. 250:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
  1138. 521 .loc 1 250 31
  1139. 522 003e 164B ldr r3, .L20
  1140. 523 0040 174A ldr r2, .L20+8
  1141. 524 0042 9A62 str r2, [r3, #40]
  1142. 251:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
  1143. 525 .loc 1 251 24
  1144. 526 0044 144B ldr r3, .L20
  1145. 527 0046 0022 movs r2, #0
  1146. 528 0048 DA60 str r2, [r3, #12]
  1147. 252:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
  1148. 529 .loc 1 252 30
  1149. 530 004a 134B ldr r3, .L20
  1150. 531 004c 0122 movs r2, #1
  1151. 532 004e DA61 str r2, [r3, #28]
  1152. 253:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
  1153. 533 .loc 1 253 36
  1154. 534 0050 114B ldr r3, .L20
  1155. 535 0052 0022 movs r2, #0
  1156. 536 0054 83F83020 strb r2, [r3, #48]
  1157. 254:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
  1158. 537 .loc 1 254 27
  1159. 538 0058 0F4B ldr r3, .L20
  1160. 539 005a 0122 movs r2, #1
  1161. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 21
  1162. 540 005c 5A61 str r2, [r3, #20]
  1163. 255:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
  1164. 541 .loc 1 255 7
  1165. 542 005e 0E48 ldr r0, .L20
  1166. 543 0060 FFF7FEFF bl HAL_ADC_Init
  1167. 544 0064 0346 mov r3, r0
  1168. 545 .loc 1 255 6
  1169. 546 0066 002B cmp r3, #0
  1170. 547 0068 01D0 beq .L17
  1171. 256:Core/Src/main.c **** {
  1172. 257:Core/Src/main.c **** Error_Handler();
  1173. 548 .loc 1 257 5
  1174. 549 006a FFF7FEFF bl Error_Handler
  1175. 550 .L17:
  1176. 258:Core/Src/main.c **** }
  1177. 259:Core/Src/main.c ****
  1178. 260:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
  1179. 261:Core/Src/main.c **** */
  1180. 262:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_4;
  1181. 551 .loc 1 262 19
  1182. 552 006e 0423 movs r3, #4
  1183. 553 0070 3B60 str r3, [r7]
  1184. 263:Core/Src/main.c **** sConfig.Rank = 1;
  1185. 554 .loc 1 263 16
  1186. 555 0072 0123 movs r3, #1
  1187. 556 0074 7B60 str r3, [r7, #4]
  1188. 264:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
  1189. 557 .loc 1 264 24
  1190. 558 0076 0023 movs r3, #0
  1191. 559 0078 BB60 str r3, [r7, #8]
  1192. 265:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
  1193. 560 .loc 1 265 7
  1194. 561 007a 3B46 mov r3, r7
  1195. 562 007c 1946 mov r1, r3
  1196. 563 007e 0648 ldr r0, .L20
  1197. 564 0080 FFF7FEFF bl HAL_ADC_ConfigChannel
  1198. 565 0084 0346 mov r3, r0
  1199. 566 .loc 1 265 6
  1200. 567 0086 002B cmp r3, #0
  1201. 568 0088 01D0 beq .L19
  1202. 266:Core/Src/main.c **** {
  1203. 267:Core/Src/main.c **** Error_Handler();
  1204. 569 .loc 1 267 5
  1205. 570 008a FFF7FEFF bl Error_Handler
  1206. 571 .L19:
  1207. 268:Core/Src/main.c **** }
  1208. 269:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
  1209. 270:Core/Src/main.c ****
  1210. 271:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */
  1211. 272:Core/Src/main.c ****
  1212. 273:Core/Src/main.c **** }
  1213. 572 .loc 1 273 1
  1214. 573 008e 00BF nop
  1215. 574 0090 1037 adds r7, r7, #16
  1216. 575 .LCFI11:
  1217. 576 .cfi_def_cfa_offset 8
  1218. 577 0092 BD46 mov sp, r7
  1219. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 22
  1220. 578 .LCFI12:
  1221. 579 .cfi_def_cfa_register 13
  1222. 580 @ sp needed
  1223. 581 0094 80BD pop {r7, pc}
  1224. 582 .L21:
  1225. 583 0096 00BF .align 2
  1226. 584 .L20:
  1227. 585 0098 00000000 .word hadc1
  1228. 586 009c 00200140 .word 1073815552
  1229. 587 00a0 0100000F .word 251658241
  1230. 588 .cfi_endproc
  1231. 589 .LFE240:
  1232. 591 .section .text.MX_CAN1_Init,"ax",%progbits
  1233. 592 .align 1
  1234. 593 .syntax unified
  1235. 594 .thumb
  1236. 595 .thumb_func
  1237. 597 MX_CAN1_Init:
  1238. 598 .LFB241:
  1239. 274:Core/Src/main.c ****
  1240. 275:Core/Src/main.c **** /**
  1241. 276:Core/Src/main.c **** * @brief CAN1 Initialization Function
  1242. 277:Core/Src/main.c **** * @param None
  1243. 278:Core/Src/main.c **** * @retval None
  1244. 279:Core/Src/main.c **** */
  1245. 280:Core/Src/main.c **** static void MX_CAN1_Init(void)
  1246. 281:Core/Src/main.c **** {
  1247. 599 .loc 1 281 1
  1248. 600 .cfi_startproc
  1249. 601 @ args = 0, pretend = 0, frame = 0
  1250. 602 @ frame_needed = 1, uses_anonymous_args = 0
  1251. 603 0000 80B5 push {r7, lr}
  1252. 604 .LCFI13:
  1253. 605 .cfi_def_cfa_offset 8
  1254. 606 .cfi_offset 7, -8
  1255. 607 .cfi_offset 14, -4
  1256. 608 0002 00AF add r7, sp, #0
  1257. 609 .LCFI14:
  1258. 610 .cfi_def_cfa_register 7
  1259. 282:Core/Src/main.c ****
  1260. 283:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 0 */
  1261. 284:Core/Src/main.c ****
  1262. 285:Core/Src/main.c **** /* USER CODE END CAN1_Init 0 */
  1263. 286:Core/Src/main.c ****
  1264. 287:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 1 */
  1265. 288:Core/Src/main.c ****
  1266. 289:Core/Src/main.c **** /* USER CODE END CAN1_Init 1 */
  1267. 290:Core/Src/main.c **** hcan1.Instance = CAN1;
  1268. 611 .loc 1 290 18
  1269. 612 0004 174B ldr r3, .L25
  1270. 613 0006 184A ldr r2, .L25+4
  1271. 614 0008 1A60 str r2, [r3]
  1272. 291:Core/Src/main.c **** hcan1.Init.Prescaler = 3;
  1273. 615 .loc 1 291 24
  1274. 616 000a 164B ldr r3, .L25
  1275. 617 000c 0322 movs r2, #3
  1276. 618 000e 5A60 str r2, [r3, #4]
  1277. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 23
  1278. 292:Core/Src/main.c **** hcan1.Init.Mode = CAN_MODE_NORMAL;
  1279. 619 .loc 1 292 19
  1280. 620 0010 144B ldr r3, .L25
  1281. 621 0012 0022 movs r2, #0
  1282. 622 0014 9A60 str r2, [r3, #8]
  1283. 293:Core/Src/main.c **** hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ;
  1284. 623 .loc 1 293 28
  1285. 624 0016 134B ldr r3, .L25
  1286. 625 0018 0022 movs r2, #0
  1287. 626 001a DA60 str r2, [r3, #12]
  1288. 294:Core/Src/main.c **** hcan1.Init.TimeSeg1 = CAN_BS1_9TQ;
  1289. 627 .loc 1 294 23
  1290. 628 001c 114B ldr r3, .L25
  1291. 629 001e 4FF40022 mov r2, #524288
  1292. 630 0022 1A61 str r2, [r3, #16]
  1293. 295:Core/Src/main.c **** hcan1.Init.TimeSeg2 = CAN_BS2_2TQ;
  1294. 631 .loc 1 295 23
  1295. 632 0024 0F4B ldr r3, .L25
  1296. 633 0026 4FF48012 mov r2, #1048576
  1297. 634 002a 5A61 str r2, [r3, #20]
  1298. 296:Core/Src/main.c **** hcan1.Init.TimeTriggeredMode = DISABLE;
  1299. 635 .loc 1 296 32
  1300. 636 002c 0D4B ldr r3, .L25
  1301. 637 002e 0022 movs r2, #0
  1302. 638 0030 1A76 strb r2, [r3, #24]
  1303. 297:Core/Src/main.c **** hcan1.Init.AutoBusOff = ENABLE;
  1304. 639 .loc 1 297 25
  1305. 640 0032 0C4B ldr r3, .L25
  1306. 641 0034 0122 movs r2, #1
  1307. 642 0036 5A76 strb r2, [r3, #25]
  1308. 298:Core/Src/main.c **** hcan1.Init.AutoWakeUp = DISABLE;
  1309. 643 .loc 1 298 25
  1310. 644 0038 0A4B ldr r3, .L25
  1311. 645 003a 0022 movs r2, #0
  1312. 646 003c 9A76 strb r2, [r3, #26]
  1313. 299:Core/Src/main.c **** hcan1.Init.AutoRetransmission = DISABLE;
  1314. 647 .loc 1 299 33
  1315. 648 003e 094B ldr r3, .L25
  1316. 649 0040 0022 movs r2, #0
  1317. 650 0042 DA76 strb r2, [r3, #27]
  1318. 300:Core/Src/main.c **** hcan1.Init.ReceiveFifoLocked = DISABLE;
  1319. 651 .loc 1 300 32
  1320. 652 0044 074B ldr r3, .L25
  1321. 653 0046 0022 movs r2, #0
  1322. 654 0048 1A77 strb r2, [r3, #28]
  1323. 301:Core/Src/main.c **** hcan1.Init.TransmitFifoPriority = ENABLE;
  1324. 655 .loc 1 301 35
  1325. 656 004a 064B ldr r3, .L25
  1326. 657 004c 0122 movs r2, #1
  1327. 658 004e 5A77 strb r2, [r3, #29]
  1328. 302:Core/Src/main.c **** if (HAL_CAN_Init(&hcan1) != HAL_OK)
  1329. 659 .loc 1 302 7
  1330. 660 0050 0448 ldr r0, .L25
  1331. 661 0052 FFF7FEFF bl HAL_CAN_Init
  1332. 662 0056 0346 mov r3, r0
  1333. 663 .loc 1 302 6
  1334. 664 0058 002B cmp r3, #0
  1335. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 24
  1336. 665 005a 01D0 beq .L24
  1337. 303:Core/Src/main.c **** {
  1338. 304:Core/Src/main.c **** Error_Handler();
  1339. 666 .loc 1 304 5
  1340. 667 005c FFF7FEFF bl Error_Handler
  1341. 668 .L24:
  1342. 305:Core/Src/main.c **** }
  1343. 306:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 2 */
  1344. 307:Core/Src/main.c ****
  1345. 308:Core/Src/main.c **** /* USER CODE END CAN1_Init 2 */
  1346. 309:Core/Src/main.c ****
  1347. 310:Core/Src/main.c **** }
  1348. 669 .loc 1 310 1
  1349. 670 0060 00BF nop
  1350. 671 0062 80BD pop {r7, pc}
  1351. 672 .L26:
  1352. 673 .align 2
  1353. 674 .L25:
  1354. 675 0064 00000000 .word hcan1
  1355. 676 0068 00640040 .word 1073767424
  1356. 677 .cfi_endproc
  1357. 678 .LFE241:
  1358. 680 .section .text.MX_CAN2_Init,"ax",%progbits
  1359. 681 .align 1
  1360. 682 .syntax unified
  1361. 683 .thumb
  1362. 684 .thumb_func
  1363. 686 MX_CAN2_Init:
  1364. 687 .LFB242:
  1365. 311:Core/Src/main.c ****
  1366. 312:Core/Src/main.c **** /**
  1367. 313:Core/Src/main.c **** * @brief CAN2 Initialization Function
  1368. 314:Core/Src/main.c **** * @param None
  1369. 315:Core/Src/main.c **** * @retval None
  1370. 316:Core/Src/main.c **** */
  1371. 317:Core/Src/main.c **** static void MX_CAN2_Init(void)
  1372. 318:Core/Src/main.c **** {
  1373. 688 .loc 1 318 1
  1374. 689 .cfi_startproc
  1375. 690 @ args = 0, pretend = 0, frame = 0
  1376. 691 @ frame_needed = 1, uses_anonymous_args = 0
  1377. 692 0000 80B5 push {r7, lr}
  1378. 693 .LCFI15:
  1379. 694 .cfi_def_cfa_offset 8
  1380. 695 .cfi_offset 7, -8
  1381. 696 .cfi_offset 14, -4
  1382. 697 0002 00AF add r7, sp, #0
  1383. 698 .LCFI16:
  1384. 699 .cfi_def_cfa_register 7
  1385. 319:Core/Src/main.c ****
  1386. 320:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 0 */
  1387. 321:Core/Src/main.c ****
  1388. 322:Core/Src/main.c **** /* USER CODE END CAN2_Init 0 */
  1389. 323:Core/Src/main.c ****
  1390. 324:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 1 */
  1391. 325:Core/Src/main.c ****
  1392. 326:Core/Src/main.c **** /* USER CODE END CAN2_Init 1 */
  1393. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 25
  1394. 327:Core/Src/main.c **** hcan2.Instance = CAN2;
  1395. 700 .loc 1 327 18
  1396. 701 0004 174B ldr r3, .L30
  1397. 702 0006 184A ldr r2, .L30+4
  1398. 703 0008 1A60 str r2, [r3]
  1399. 328:Core/Src/main.c **** hcan2.Init.Prescaler = 3;
  1400. 704 .loc 1 328 24
  1401. 705 000a 164B ldr r3, .L30
  1402. 706 000c 0322 movs r2, #3
  1403. 707 000e 5A60 str r2, [r3, #4]
  1404. 329:Core/Src/main.c **** hcan2.Init.Mode = CAN_MODE_NORMAL;
  1405. 708 .loc 1 329 19
  1406. 709 0010 144B ldr r3, .L30
  1407. 710 0012 0022 movs r2, #0
  1408. 711 0014 9A60 str r2, [r3, #8]
  1409. 330:Core/Src/main.c **** hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ;
  1410. 712 .loc 1 330 28
  1411. 713 0016 134B ldr r3, .L30
  1412. 714 0018 0022 movs r2, #0
  1413. 715 001a DA60 str r2, [r3, #12]
  1414. 331:Core/Src/main.c **** hcan2.Init.TimeSeg1 = CAN_BS1_9TQ;
  1415. 716 .loc 1 331 23
  1416. 717 001c 114B ldr r3, .L30
  1417. 718 001e 4FF40022 mov r2, #524288
  1418. 719 0022 1A61 str r2, [r3, #16]
  1419. 332:Core/Src/main.c **** hcan2.Init.TimeSeg2 = CAN_BS2_2TQ;
  1420. 720 .loc 1 332 23
  1421. 721 0024 0F4B ldr r3, .L30
  1422. 722 0026 4FF48012 mov r2, #1048576
  1423. 723 002a 5A61 str r2, [r3, #20]
  1424. 333:Core/Src/main.c **** hcan2.Init.TimeTriggeredMode = DISABLE;
  1425. 724 .loc 1 333 32
  1426. 725 002c 0D4B ldr r3, .L30
  1427. 726 002e 0022 movs r2, #0
  1428. 727 0030 1A76 strb r2, [r3, #24]
  1429. 334:Core/Src/main.c **** hcan2.Init.AutoBusOff = ENABLE;
  1430. 728 .loc 1 334 25
  1431. 729 0032 0C4B ldr r3, .L30
  1432. 730 0034 0122 movs r2, #1
  1433. 731 0036 5A76 strb r2, [r3, #25]
  1434. 335:Core/Src/main.c **** hcan2.Init.AutoWakeUp = DISABLE;
  1435. 732 .loc 1 335 25
  1436. 733 0038 0A4B ldr r3, .L30
  1437. 734 003a 0022 movs r2, #0
  1438. 735 003c 9A76 strb r2, [r3, #26]
  1439. 336:Core/Src/main.c **** hcan2.Init.AutoRetransmission = DISABLE;
  1440. 736 .loc 1 336 33
  1441. 737 003e 094B ldr r3, .L30
  1442. 738 0040 0022 movs r2, #0
  1443. 739 0042 DA76 strb r2, [r3, #27]
  1444. 337:Core/Src/main.c **** hcan2.Init.ReceiveFifoLocked = DISABLE;
  1445. 740 .loc 1 337 32
  1446. 741 0044 074B ldr r3, .L30
  1447. 742 0046 0022 movs r2, #0
  1448. 743 0048 1A77 strb r2, [r3, #28]
  1449. 338:Core/Src/main.c **** hcan2.Init.TransmitFifoPriority = ENABLE;
  1450. 744 .loc 1 338 35
  1451. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 26
  1452. 745 004a 064B ldr r3, .L30
  1453. 746 004c 0122 movs r2, #1
  1454. 747 004e 5A77 strb r2, [r3, #29]
  1455. 339:Core/Src/main.c **** if (HAL_CAN_Init(&hcan2) != HAL_OK)
  1456. 748 .loc 1 339 7
  1457. 749 0050 0448 ldr r0, .L30
  1458. 750 0052 FFF7FEFF bl HAL_CAN_Init
  1459. 751 0056 0346 mov r3, r0
  1460. 752 .loc 1 339 6
  1461. 753 0058 002B cmp r3, #0
  1462. 754 005a 01D0 beq .L29
  1463. 340:Core/Src/main.c **** {
  1464. 341:Core/Src/main.c **** Error_Handler();
  1465. 755 .loc 1 341 5
  1466. 756 005c FFF7FEFF bl Error_Handler
  1467. 757 .L29:
  1468. 342:Core/Src/main.c **** }
  1469. 343:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 2 */
  1470. 344:Core/Src/main.c ****
  1471. 345:Core/Src/main.c **** /* USER CODE END CAN2_Init 2 */
  1472. 346:Core/Src/main.c ****
  1473. 347:Core/Src/main.c **** }
  1474. 758 .loc 1 347 1
  1475. 759 0060 00BF nop
  1476. 760 0062 80BD pop {r7, pc}
  1477. 761 .L31:
  1478. 762 .align 2
  1479. 763 .L30:
  1480. 764 0064 00000000 .word hcan2
  1481. 765 0068 00680040 .word 1073768448
  1482. 766 .cfi_endproc
  1483. 767 .LFE242:
  1484. 769 .section .text.MX_TIM2_Init,"ax",%progbits
  1485. 770 .align 1
  1486. 771 .syntax unified
  1487. 772 .thumb
  1488. 773 .thumb_func
  1489. 775 MX_TIM2_Init:
  1490. 776 .LFB243:
  1491. 348:Core/Src/main.c ****
  1492. 349:Core/Src/main.c **** /**
  1493. 350:Core/Src/main.c **** * @brief TIM2 Initialization Function
  1494. 351:Core/Src/main.c **** * @param None
  1495. 352:Core/Src/main.c **** * @retval None
  1496. 353:Core/Src/main.c **** */
  1497. 354:Core/Src/main.c **** static void MX_TIM2_Init(void)
  1498. 355:Core/Src/main.c **** {
  1499. 777 .loc 1 355 1
  1500. 778 .cfi_startproc
  1501. 779 @ args = 0, pretend = 0, frame = 24
  1502. 780 @ frame_needed = 1, uses_anonymous_args = 0
  1503. 781 0000 80B5 push {r7, lr}
  1504. 782 .LCFI17:
  1505. 783 .cfi_def_cfa_offset 8
  1506. 784 .cfi_offset 7, -8
  1507. 785 .cfi_offset 14, -4
  1508. 786 0002 86B0 sub sp, sp, #24
  1509. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 27
  1510. 787 .LCFI18:
  1511. 788 .cfi_def_cfa_offset 32
  1512. 789 0004 00AF add r7, sp, #0
  1513. 790 .LCFI19:
  1514. 791 .cfi_def_cfa_register 7
  1515. 356:Core/Src/main.c ****
  1516. 357:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */
  1517. 358:Core/Src/main.c ****
  1518. 359:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */
  1519. 360:Core/Src/main.c ****
  1520. 361:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
  1521. 792 .loc 1 361 26
  1522. 793 0006 07F10803 add r3, r7, #8
  1523. 794 000a 0022 movs r2, #0
  1524. 795 000c 1A60 str r2, [r3]
  1525. 796 000e 5A60 str r2, [r3, #4]
  1526. 797 0010 9A60 str r2, [r3, #8]
  1527. 798 0012 DA60 str r2, [r3, #12]
  1528. 362:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  1529. 799 .loc 1 362 27
  1530. 800 0014 3B46 mov r3, r7
  1531. 801 0016 0022 movs r2, #0
  1532. 802 0018 1A60 str r2, [r3]
  1533. 803 001a 5A60 str r2, [r3, #4]
  1534. 363:Core/Src/main.c ****
  1535. 364:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */
  1536. 365:Core/Src/main.c ****
  1537. 366:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */
  1538. 367:Core/Src/main.c **** htim2.Instance = TIM2;
  1539. 804 .loc 1 367 18
  1540. 805 001c 1D4B ldr r3, .L37
  1541. 806 001e 4FF08042 mov r2, #1073741824
  1542. 807 0022 1A60 str r2, [r3]
  1543. 368:Core/Src/main.c **** htim2.Init.Prescaler = 72-1;
  1544. 808 .loc 1 368 24
  1545. 809 0024 1B4B ldr r3, .L37
  1546. 810 0026 4722 movs r2, #71
  1547. 811 0028 5A60 str r2, [r3, #4]
  1548. 369:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
  1549. 812 .loc 1 369 26
  1550. 813 002a 1A4B ldr r3, .L37
  1551. 814 002c 0022 movs r2, #0
  1552. 815 002e 9A60 str r2, [r3, #8]
  1553. 370:Core/Src/main.c **** htim2.Init.Period = 20000 -1 ;
  1554. 816 .loc 1 370 21
  1555. 817 0030 184B ldr r3, .L37
  1556. 818 0032 44F61F62 movw r2, #19999
  1557. 819 0036 DA60 str r2, [r3, #12]
  1558. 371:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  1559. 820 .loc 1 371 28
  1560. 821 0038 164B ldr r3, .L37
  1561. 822 003a 0022 movs r2, #0
  1562. 823 003c 1A61 str r2, [r3, #16]
  1563. 372:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  1564. 824 .loc 1 372 32
  1565. 825 003e 154B ldr r3, .L37
  1566. 826 0040 0022 movs r2, #0
  1567. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 28
  1568. 827 0042 9A61 str r2, [r3, #24]
  1569. 373:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
  1570. 828 .loc 1 373 7
  1571. 829 0044 1348 ldr r0, .L37
  1572. 830 0046 FFF7FEFF bl HAL_TIM_Base_Init
  1573. 831 004a 0346 mov r3, r0
  1574. 832 .loc 1 373 6
  1575. 833 004c 002B cmp r3, #0
  1576. 834 004e 01D0 beq .L33
  1577. 374:Core/Src/main.c **** {
  1578. 375:Core/Src/main.c **** Error_Handler();
  1579. 835 .loc 1 375 5
  1580. 836 0050 FFF7FEFF bl Error_Handler
  1581. 837 .L33:
  1582. 376:Core/Src/main.c **** }
  1583. 377:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  1584. 838 .loc 1 377 34
  1585. 839 0054 4FF48053 mov r3, #4096
  1586. 840 0058 BB60 str r3, [r7, #8]
  1587. 378:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
  1588. 841 .loc 1 378 7
  1589. 842 005a 07F10803 add r3, r7, #8
  1590. 843 005e 1946 mov r1, r3
  1591. 844 0060 0C48 ldr r0, .L37
  1592. 845 0062 FFF7FEFF bl HAL_TIM_ConfigClockSource
  1593. 846 0066 0346 mov r3, r0
  1594. 847 .loc 1 378 6
  1595. 848 0068 002B cmp r3, #0
  1596. 849 006a 01D0 beq .L34
  1597. 379:Core/Src/main.c **** {
  1598. 380:Core/Src/main.c **** Error_Handler();
  1599. 850 .loc 1 380 5
  1600. 851 006c FFF7FEFF bl Error_Handler
  1601. 852 .L34:
  1602. 381:Core/Src/main.c **** }
  1603. 382:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  1604. 853 .loc 1 382 37
  1605. 854 0070 0023 movs r3, #0
  1606. 855 0072 3B60 str r3, [r7]
  1607. 383:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  1608. 856 .loc 1 383 33
  1609. 857 0074 0023 movs r3, #0
  1610. 858 0076 7B60 str r3, [r7, #4]
  1611. 384:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
  1612. 859 .loc 1 384 7
  1613. 860 0078 3B46 mov r3, r7
  1614. 861 007a 1946 mov r1, r3
  1615. 862 007c 0548 ldr r0, .L37
  1616. 863 007e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  1617. 864 0082 0346 mov r3, r0
  1618. 865 .loc 1 384 6
  1619. 866 0084 002B cmp r3, #0
  1620. 867 0086 01D0 beq .L36
  1621. 385:Core/Src/main.c **** {
  1622. 386:Core/Src/main.c **** Error_Handler();
  1623. 868 .loc 1 386 5
  1624. 869 0088 FFF7FEFF bl Error_Handler
  1625. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 29
  1626. 870 .L36:
  1627. 387:Core/Src/main.c **** }
  1628. 388:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
  1629. 389:Core/Src/main.c ****
  1630. 390:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */
  1631. 391:Core/Src/main.c ****
  1632. 392:Core/Src/main.c **** }
  1633. 871 .loc 1 392 1
  1634. 872 008c 00BF nop
  1635. 873 008e 1837 adds r7, r7, #24
  1636. 874 .LCFI20:
  1637. 875 .cfi_def_cfa_offset 8
  1638. 876 0090 BD46 mov sp, r7
  1639. 877 .LCFI21:
  1640. 878 .cfi_def_cfa_register 13
  1641. 879 @ sp needed
  1642. 880 0092 80BD pop {r7, pc}
  1643. 881 .L38:
  1644. 882 .align 2
  1645. 883 .L37:
  1646. 884 0094 00000000 .word htim2
  1647. 885 .cfi_endproc
  1648. 886 .LFE243:
  1649. 888 .section .text.MX_TIM3_Init,"ax",%progbits
  1650. 889 .align 1
  1651. 890 .syntax unified
  1652. 891 .thumb
  1653. 892 .thumb_func
  1654. 894 MX_TIM3_Init:
  1655. 895 .LFB244:
  1656. 393:Core/Src/main.c ****
  1657. 394:Core/Src/main.c **** /**
  1658. 395:Core/Src/main.c **** * @brief TIM3 Initialization Function
  1659. 396:Core/Src/main.c **** * @param None
  1660. 397:Core/Src/main.c **** * @retval None
  1661. 398:Core/Src/main.c **** */
  1662. 399:Core/Src/main.c **** static void MX_TIM3_Init(void)
  1663. 400:Core/Src/main.c **** {
  1664. 896 .loc 1 400 1
  1665. 897 .cfi_startproc
  1666. 898 @ args = 0, pretend = 0, frame = 24
  1667. 899 @ frame_needed = 1, uses_anonymous_args = 0
  1668. 900 0000 80B5 push {r7, lr}
  1669. 901 .LCFI22:
  1670. 902 .cfi_def_cfa_offset 8
  1671. 903 .cfi_offset 7, -8
  1672. 904 .cfi_offset 14, -4
  1673. 905 0002 86B0 sub sp, sp, #24
  1674. 906 .LCFI23:
  1675. 907 .cfi_def_cfa_offset 32
  1676. 908 0004 00AF add r7, sp, #0
  1677. 909 .LCFI24:
  1678. 910 .cfi_def_cfa_register 7
  1679. 401:Core/Src/main.c ****
  1680. 402:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */
  1681. 403:Core/Src/main.c ****
  1682. 404:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */
  1683. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 30
  1684. 405:Core/Src/main.c ****
  1685. 406:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
  1686. 911 .loc 1 406 26
  1687. 912 0006 07F10803 add r3, r7, #8
  1688. 913 000a 0022 movs r2, #0
  1689. 914 000c 1A60 str r2, [r3]
  1690. 915 000e 5A60 str r2, [r3, #4]
  1691. 916 0010 9A60 str r2, [r3, #8]
  1692. 917 0012 DA60 str r2, [r3, #12]
  1693. 407:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  1694. 918 .loc 1 407 27
  1695. 919 0014 3B46 mov r3, r7
  1696. 920 0016 0022 movs r2, #0
  1697. 921 0018 1A60 str r2, [r3]
  1698. 922 001a 5A60 str r2, [r3, #4]
  1699. 408:Core/Src/main.c ****
  1700. 409:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */
  1701. 410:Core/Src/main.c ****
  1702. 411:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */
  1703. 412:Core/Src/main.c **** htim3.Instance = TIM3;
  1704. 923 .loc 1 412 18
  1705. 924 001c 1D4B ldr r3, .L44
  1706. 925 001e 1E4A ldr r2, .L44+4
  1707. 926 0020 1A60 str r2, [r3]
  1708. 413:Core/Src/main.c **** htim3.Init.Prescaler = 72-1;
  1709. 927 .loc 1 413 24
  1710. 928 0022 1C4B ldr r3, .L44
  1711. 929 0024 4722 movs r2, #71
  1712. 930 0026 5A60 str r2, [r3, #4]
  1713. 414:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
  1714. 931 .loc 1 414 26
  1715. 932 0028 1A4B ldr r3, .L44
  1716. 933 002a 0022 movs r2, #0
  1717. 934 002c 9A60 str r2, [r3, #8]
  1718. 415:Core/Src/main.c **** htim3.Init.Period = 7200-1;
  1719. 935 .loc 1 415 21
  1720. 936 002e 194B ldr r3, .L44
  1721. 937 0030 41F61F42 movw r2, #7199
  1722. 938 0034 DA60 str r2, [r3, #12]
  1723. 416:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  1724. 939 .loc 1 416 28
  1725. 940 0036 174B ldr r3, .L44
  1726. 941 0038 0022 movs r2, #0
  1727. 942 003a 1A61 str r2, [r3, #16]
  1728. 417:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  1729. 943 .loc 1 417 32
  1730. 944 003c 154B ldr r3, .L44
  1731. 945 003e 0022 movs r2, #0
  1732. 946 0040 9A61 str r2, [r3, #24]
  1733. 418:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
  1734. 947 .loc 1 418 7
  1735. 948 0042 1448 ldr r0, .L44
  1736. 949 0044 FFF7FEFF bl HAL_TIM_Base_Init
  1737. 950 0048 0346 mov r3, r0
  1738. 951 .loc 1 418 6
  1739. 952 004a 002B cmp r3, #0
  1740. 953 004c 01D0 beq .L40
  1741. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 31
  1742. 419:Core/Src/main.c **** {
  1743. 420:Core/Src/main.c **** Error_Handler();
  1744. 954 .loc 1 420 5
  1745. 955 004e FFF7FEFF bl Error_Handler
  1746. 956 .L40:
  1747. 421:Core/Src/main.c **** }
  1748. 422:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  1749. 957 .loc 1 422 34
  1750. 958 0052 4FF48053 mov r3, #4096
  1751. 959 0056 BB60 str r3, [r7, #8]
  1752. 423:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
  1753. 960 .loc 1 423 7
  1754. 961 0058 07F10803 add r3, r7, #8
  1755. 962 005c 1946 mov r1, r3
  1756. 963 005e 0D48 ldr r0, .L44
  1757. 964 0060 FFF7FEFF bl HAL_TIM_ConfigClockSource
  1758. 965 0064 0346 mov r3, r0
  1759. 966 .loc 1 423 6
  1760. 967 0066 002B cmp r3, #0
  1761. 968 0068 01D0 beq .L41
  1762. 424:Core/Src/main.c **** {
  1763. 425:Core/Src/main.c **** Error_Handler();
  1764. 969 .loc 1 425 5
  1765. 970 006a FFF7FEFF bl Error_Handler
  1766. 971 .L41:
  1767. 426:Core/Src/main.c **** }
  1768. 427:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  1769. 972 .loc 1 427 37
  1770. 973 006e 0023 movs r3, #0
  1771. 974 0070 3B60 str r3, [r7]
  1772. 428:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  1773. 975 .loc 1 428 33
  1774. 976 0072 0023 movs r3, #0
  1775. 977 0074 7B60 str r3, [r7, #4]
  1776. 429:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
  1777. 978 .loc 1 429 7
  1778. 979 0076 3B46 mov r3, r7
  1779. 980 0078 1946 mov r1, r3
  1780. 981 007a 0648 ldr r0, .L44
  1781. 982 007c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  1782. 983 0080 0346 mov r3, r0
  1783. 984 .loc 1 429 6
  1784. 985 0082 002B cmp r3, #0
  1785. 986 0084 01D0 beq .L43
  1786. 430:Core/Src/main.c **** {
  1787. 431:Core/Src/main.c **** Error_Handler();
  1788. 987 .loc 1 431 5
  1789. 988 0086 FFF7FEFF bl Error_Handler
  1790. 989 .L43:
  1791. 432:Core/Src/main.c **** }
  1792. 433:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */
  1793. 434:Core/Src/main.c ****
  1794. 435:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */
  1795. 436:Core/Src/main.c ****
  1796. 437:Core/Src/main.c **** }
  1797. 990 .loc 1 437 1
  1798. 991 008a 00BF nop
  1799. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 32
  1800. 992 008c 1837 adds r7, r7, #24
  1801. 993 .LCFI25:
  1802. 994 .cfi_def_cfa_offset 8
  1803. 995 008e BD46 mov sp, r7
  1804. 996 .LCFI26:
  1805. 997 .cfi_def_cfa_register 13
  1806. 998 @ sp needed
  1807. 999 0090 80BD pop {r7, pc}
  1808. 1000 .L45:
  1809. 1001 0092 00BF .align 2
  1810. 1002 .L44:
  1811. 1003 0094 00000000 .word htim3
  1812. 1004 0098 00040040 .word 1073742848
  1813. 1005 .cfi_endproc
  1814. 1006 .LFE244:
  1815. 1008 .section .text.MX_TIM4_Init,"ax",%progbits
  1816. 1009 .align 1
  1817. 1010 .syntax unified
  1818. 1011 .thumb
  1819. 1012 .thumb_func
  1820. 1014 MX_TIM4_Init:
  1821. 1015 .LFB245:
  1822. 438:Core/Src/main.c ****
  1823. 439:Core/Src/main.c **** /**
  1824. 440:Core/Src/main.c **** * @brief TIM4 Initialization Function
  1825. 441:Core/Src/main.c **** * @param None
  1826. 442:Core/Src/main.c **** * @retval None
  1827. 443:Core/Src/main.c **** */
  1828. 444:Core/Src/main.c **** static void MX_TIM4_Init(void)
  1829. 445:Core/Src/main.c **** {
  1830. 1016 .loc 1 445 1
  1831. 1017 .cfi_startproc
  1832. 1018 @ args = 0, pretend = 0, frame = 24
  1833. 1019 @ frame_needed = 1, uses_anonymous_args = 0
  1834. 1020 0000 80B5 push {r7, lr}
  1835. 1021 .LCFI27:
  1836. 1022 .cfi_def_cfa_offset 8
  1837. 1023 .cfi_offset 7, -8
  1838. 1024 .cfi_offset 14, -4
  1839. 1025 0002 86B0 sub sp, sp, #24
  1840. 1026 .LCFI28:
  1841. 1027 .cfi_def_cfa_offset 32
  1842. 1028 0004 00AF add r7, sp, #0
  1843. 1029 .LCFI29:
  1844. 1030 .cfi_def_cfa_register 7
  1845. 446:Core/Src/main.c ****
  1846. 447:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */
  1847. 448:Core/Src/main.c ****
  1848. 449:Core/Src/main.c **** /* USER CODE END TIM4_Init 0 */
  1849. 450:Core/Src/main.c ****
  1850. 451:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
  1851. 1031 .loc 1 451 26
  1852. 1032 0006 07F10803 add r3, r7, #8
  1853. 1033 000a 0022 movs r2, #0
  1854. 1034 000c 1A60 str r2, [r3]
  1855. 1035 000e 5A60 str r2, [r3, #4]
  1856. 1036 0010 9A60 str r2, [r3, #8]
  1857. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 33
  1858. 1037 0012 DA60 str r2, [r3, #12]
  1859. 452:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  1860. 1038 .loc 1 452 27
  1861. 1039 0014 3B46 mov r3, r7
  1862. 1040 0016 0022 movs r2, #0
  1863. 1041 0018 1A60 str r2, [r3]
  1864. 1042 001a 5A60 str r2, [r3, #4]
  1865. 453:Core/Src/main.c ****
  1866. 454:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */
  1867. 455:Core/Src/main.c ****
  1868. 456:Core/Src/main.c **** /* USER CODE END TIM4_Init 1 */
  1869. 457:Core/Src/main.c **** htim4.Instance = TIM4;
  1870. 1043 .loc 1 457 18
  1871. 1044 001c 1D4B ldr r3, .L51
  1872. 1045 001e 1E4A ldr r2, .L51+4
  1873. 1046 0020 1A60 str r2, [r3]
  1874. 458:Core/Src/main.c **** htim4.Init.Prescaler = 72-1;
  1875. 1047 .loc 1 458 24
  1876. 1048 0022 1C4B ldr r3, .L51
  1877. 1049 0024 4722 movs r2, #71
  1878. 1050 0026 5A60 str r2, [r3, #4]
  1879. 459:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
  1880. 1051 .loc 1 459 26
  1881. 1052 0028 1A4B ldr r3, .L51
  1882. 1053 002a 0022 movs r2, #0
  1883. 1054 002c 9A60 str r2, [r3, #8]
  1884. 460:Core/Src/main.c **** htim4.Init.Period = 7200-1;
  1885. 1055 .loc 1 460 21
  1886. 1056 002e 194B ldr r3, .L51
  1887. 1057 0030 41F61F42 movw r2, #7199
  1888. 1058 0034 DA60 str r2, [r3, #12]
  1889. 461:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  1890. 1059 .loc 1 461 28
  1891. 1060 0036 174B ldr r3, .L51
  1892. 1061 0038 0022 movs r2, #0
  1893. 1062 003a 1A61 str r2, [r3, #16]
  1894. 462:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  1895. 1063 .loc 1 462 32
  1896. 1064 003c 154B ldr r3, .L51
  1897. 1065 003e 0022 movs r2, #0
  1898. 1066 0040 9A61 str r2, [r3, #24]
  1899. 463:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
  1900. 1067 .loc 1 463 7
  1901. 1068 0042 1448 ldr r0, .L51
  1902. 1069 0044 FFF7FEFF bl HAL_TIM_Base_Init
  1903. 1070 0048 0346 mov r3, r0
  1904. 1071 .loc 1 463 6
  1905. 1072 004a 002B cmp r3, #0
  1906. 1073 004c 01D0 beq .L47
  1907. 464:Core/Src/main.c **** {
  1908. 465:Core/Src/main.c **** Error_Handler();
  1909. 1074 .loc 1 465 5
  1910. 1075 004e FFF7FEFF bl Error_Handler
  1911. 1076 .L47:
  1912. 466:Core/Src/main.c **** }
  1913. 467:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  1914. 1077 .loc 1 467 34
  1915. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 34
  1916. 1078 0052 4FF48053 mov r3, #4096
  1917. 1079 0056 BB60 str r3, [r7, #8]
  1918. 468:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
  1919. 1080 .loc 1 468 7
  1920. 1081 0058 07F10803 add r3, r7, #8
  1921. 1082 005c 1946 mov r1, r3
  1922. 1083 005e 0D48 ldr r0, .L51
  1923. 1084 0060 FFF7FEFF bl HAL_TIM_ConfigClockSource
  1924. 1085 0064 0346 mov r3, r0
  1925. 1086 .loc 1 468 6
  1926. 1087 0066 002B cmp r3, #0
  1927. 1088 0068 01D0 beq .L48
  1928. 469:Core/Src/main.c **** {
  1929. 470:Core/Src/main.c **** Error_Handler();
  1930. 1089 .loc 1 470 5
  1931. 1090 006a FFF7FEFF bl Error_Handler
  1932. 1091 .L48:
  1933. 471:Core/Src/main.c **** }
  1934. 472:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  1935. 1092 .loc 1 472 37
  1936. 1093 006e 0023 movs r3, #0
  1937. 1094 0070 3B60 str r3, [r7]
  1938. 473:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  1939. 1095 .loc 1 473 33
  1940. 1096 0072 0023 movs r3, #0
  1941. 1097 0074 7B60 str r3, [r7, #4]
  1942. 474:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
  1943. 1098 .loc 1 474 7
  1944. 1099 0076 3B46 mov r3, r7
  1945. 1100 0078 1946 mov r1, r3
  1946. 1101 007a 0648 ldr r0, .L51
  1947. 1102 007c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  1948. 1103 0080 0346 mov r3, r0
  1949. 1104 .loc 1 474 6
  1950. 1105 0082 002B cmp r3, #0
  1951. 1106 0084 01D0 beq .L50
  1952. 475:Core/Src/main.c **** {
  1953. 476:Core/Src/main.c **** Error_Handler();
  1954. 1107 .loc 1 476 5
  1955. 1108 0086 FFF7FEFF bl Error_Handler
  1956. 1109 .L50:
  1957. 477:Core/Src/main.c **** }
  1958. 478:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */
  1959. 479:Core/Src/main.c ****
  1960. 480:Core/Src/main.c **** /* USER CODE END TIM4_Init 2 */
  1961. 481:Core/Src/main.c ****
  1962. 482:Core/Src/main.c **** }
  1963. 1110 .loc 1 482 1
  1964. 1111 008a 00BF nop
  1965. 1112 008c 1837 adds r7, r7, #24
  1966. 1113 .LCFI30:
  1967. 1114 .cfi_def_cfa_offset 8
  1968. 1115 008e BD46 mov sp, r7
  1969. 1116 .LCFI31:
  1970. 1117 .cfi_def_cfa_register 13
  1971. 1118 @ sp needed
  1972. 1119 0090 80BD pop {r7, pc}
  1973. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 35
  1974. 1120 .L52:
  1975. 1121 0092 00BF .align 2
  1976. 1122 .L51:
  1977. 1123 0094 00000000 .word htim4
  1978. 1124 0098 00080040 .word 1073743872
  1979. 1125 .cfi_endproc
  1980. 1126 .LFE245:
  1981. 1128 .section .text.MX_USART1_UART_Init,"ax",%progbits
  1982. 1129 .align 1
  1983. 1130 .syntax unified
  1984. 1131 .thumb
  1985. 1132 .thumb_func
  1986. 1134 MX_USART1_UART_Init:
  1987. 1135 .LFB246:
  1988. 483:Core/Src/main.c ****
  1989. 484:Core/Src/main.c **** /**
  1990. 485:Core/Src/main.c **** * @brief USART1 Initialization Function
  1991. 486:Core/Src/main.c **** * @param None
  1992. 487:Core/Src/main.c **** * @retval None
  1993. 488:Core/Src/main.c **** */
  1994. 489:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
  1995. 490:Core/Src/main.c **** {
  1996. 1136 .loc 1 490 1
  1997. 1137 .cfi_startproc
  1998. 1138 @ args = 0, pretend = 0, frame = 0
  1999. 1139 @ frame_needed = 1, uses_anonymous_args = 0
  2000. 1140 0000 80B5 push {r7, lr}
  2001. 1141 .LCFI32:
  2002. 1142 .cfi_def_cfa_offset 8
  2003. 1143 .cfi_offset 7, -8
  2004. 1144 .cfi_offset 14, -4
  2005. 1145 0002 00AF add r7, sp, #0
  2006. 1146 .LCFI33:
  2007. 1147 .cfi_def_cfa_register 7
  2008. 491:Core/Src/main.c ****
  2009. 492:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
  2010. 493:Core/Src/main.c ****
  2011. 494:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
  2012. 495:Core/Src/main.c ****
  2013. 496:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
  2014. 497:Core/Src/main.c ****
  2015. 498:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
  2016. 499:Core/Src/main.c **** huart1.Instance = USART1;
  2017. 1148 .loc 1 499 19
  2018. 1149 0004 114B ldr r3, .L56
  2019. 1150 0006 124A ldr r2, .L56+4
  2020. 1151 0008 1A60 str r2, [r3]
  2021. 500:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
  2022. 1152 .loc 1 500 24
  2023. 1153 000a 104B ldr r3, .L56
  2024. 1154 000c 4FF4E132 mov r2, #115200
  2025. 1155 0010 5A60 str r2, [r3, #4]
  2026. 501:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
  2027. 1156 .loc 1 501 26
  2028. 1157 0012 0E4B ldr r3, .L56
  2029. 1158 0014 0022 movs r2, #0
  2030. 1159 0016 9A60 str r2, [r3, #8]
  2031. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 36
  2032. 502:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
  2033. 1160 .loc 1 502 24
  2034. 1161 0018 0C4B ldr r3, .L56
  2035. 1162 001a 0022 movs r2, #0
  2036. 1163 001c DA60 str r2, [r3, #12]
  2037. 503:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
  2038. 1164 .loc 1 503 22
  2039. 1165 001e 0B4B ldr r3, .L56
  2040. 1166 0020 0022 movs r2, #0
  2041. 1167 0022 1A61 str r2, [r3, #16]
  2042. 504:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
  2043. 1168 .loc 1 504 20
  2044. 1169 0024 094B ldr r3, .L56
  2045. 1170 0026 0C22 movs r2, #12
  2046. 1171 0028 5A61 str r2, [r3, #20]
  2047. 505:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  2048. 1172 .loc 1 505 25
  2049. 1173 002a 084B ldr r3, .L56
  2050. 1174 002c 0022 movs r2, #0
  2051. 1175 002e 9A61 str r2, [r3, #24]
  2052. 506:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
  2053. 1176 .loc 1 506 28
  2054. 1177 0030 064B ldr r3, .L56
  2055. 1178 0032 0022 movs r2, #0
  2056. 1179 0034 DA61 str r2, [r3, #28]
  2057. 507:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
  2058. 1180 .loc 1 507 7
  2059. 1181 0036 0548 ldr r0, .L56
  2060. 1182 0038 FFF7FEFF bl HAL_UART_Init
  2061. 1183 003c 0346 mov r3, r0
  2062. 1184 .loc 1 507 6
  2063. 1185 003e 002B cmp r3, #0
  2064. 1186 0040 01D0 beq .L55
  2065. 508:Core/Src/main.c **** {
  2066. 509:Core/Src/main.c **** Error_Handler();
  2067. 1187 .loc 1 509 5
  2068. 1188 0042 FFF7FEFF bl Error_Handler
  2069. 1189 .L55:
  2070. 510:Core/Src/main.c **** }
  2071. 511:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
  2072. 512:Core/Src/main.c ****
  2073. 513:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
  2074. 514:Core/Src/main.c ****
  2075. 515:Core/Src/main.c **** }
  2076. 1190 .loc 1 515 1
  2077. 1191 0046 00BF nop
  2078. 1192 0048 80BD pop {r7, pc}
  2079. 1193 .L57:
  2080. 1194 004a 00BF .align 2
  2081. 1195 .L56:
  2082. 1196 004c 00000000 .word huart1
  2083. 1197 0050 00100140 .word 1073811456
  2084. 1198 .cfi_endproc
  2085. 1199 .LFE246:
  2086. 1201 .section .text.MX_DMA_Init,"ax",%progbits
  2087. 1202 .align 1
  2088. 1203 .syntax unified
  2089. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 37
  2090. 1204 .thumb
  2091. 1205 .thumb_func
  2092. 1207 MX_DMA_Init:
  2093. 1208 .LFB247:
  2094. 516:Core/Src/main.c ****
  2095. 517:Core/Src/main.c **** /**
  2096. 518:Core/Src/main.c **** * Enable DMA controller clock
  2097. 519:Core/Src/main.c **** */
  2098. 520:Core/Src/main.c **** static void MX_DMA_Init(void)
  2099. 521:Core/Src/main.c **** {
  2100. 1209 .loc 1 521 1
  2101. 1210 .cfi_startproc
  2102. 1211 @ args = 0, pretend = 0, frame = 8
  2103. 1212 @ frame_needed = 1, uses_anonymous_args = 0
  2104. 1213 0000 80B5 push {r7, lr}
  2105. 1214 .LCFI34:
  2106. 1215 .cfi_def_cfa_offset 8
  2107. 1216 .cfi_offset 7, -8
  2108. 1217 .cfi_offset 14, -4
  2109. 1218 0002 82B0 sub sp, sp, #8
  2110. 1219 .LCFI35:
  2111. 1220 .cfi_def_cfa_offset 16
  2112. 1221 0004 00AF add r7, sp, #0
  2113. 1222 .LCFI36:
  2114. 1223 .cfi_def_cfa_register 7
  2115. 1224 .LBB18:
  2116. 522:Core/Src/main.c ****
  2117. 523:Core/Src/main.c **** /* DMA controller clock enable */
  2118. 524:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE();
  2119. 1225 .loc 1 524 3
  2120. 1226 0006 0023 movs r3, #0
  2121. 1227 0008 7B60 str r3, [r7, #4]
  2122. 1228 000a 104B ldr r3, .L59
  2123. 1229 000c 1B6B ldr r3, [r3, #48]
  2124. 1230 000e 0F4A ldr r2, .L59
  2125. 1231 0010 43F48003 orr r3, r3, #4194304
  2126. 1232 0014 1363 str r3, [r2, #48]
  2127. 1233 0016 0D4B ldr r3, .L59
  2128. 1234 0018 1B6B ldr r3, [r3, #48]
  2129. 1235 001a 03F48003 and r3, r3, #4194304
  2130. 1236 001e 7B60 str r3, [r7, #4]
  2131. 1237 0020 7B68 ldr r3, [r7, #4]
  2132. 1238 .LBE18:
  2133. 525:Core/Src/main.c ****
  2134. 526:Core/Src/main.c **** /* DMA interrupt init */
  2135. 527:Core/Src/main.c **** /* DMA2_Stream2_IRQn interrupt configuration */
  2136. 528:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
  2137. 1239 .loc 1 528 3
  2138. 1240 0022 0022 movs r2, #0
  2139. 1241 0024 0021 movs r1, #0
  2140. 1242 0026 3A20 movs r0, #58
  2141. 1243 0028 FFF7FEFF bl HAL_NVIC_SetPriority
  2142. 529:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
  2143. 1244 .loc 1 529 3
  2144. 1245 002c 3A20 movs r0, #58
  2145. 1246 002e FFF7FEFF bl HAL_NVIC_EnableIRQ
  2146. 530:Core/Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */
  2147. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 38
  2148. 531:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
  2149. 1247 .loc 1 531 3
  2150. 1248 0032 0022 movs r2, #0
  2151. 1249 0034 0021 movs r1, #0
  2152. 1250 0036 4620 movs r0, #70
  2153. 1251 0038 FFF7FEFF bl HAL_NVIC_SetPriority
  2154. 532:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
  2155. 1252 .loc 1 532 3
  2156. 1253 003c 4620 movs r0, #70
  2157. 1254 003e FFF7FEFF bl HAL_NVIC_EnableIRQ
  2158. 533:Core/Src/main.c ****
  2159. 534:Core/Src/main.c **** }
  2160. 1255 .loc 1 534 1
  2161. 1256 0042 00BF nop
  2162. 1257 0044 0837 adds r7, r7, #8
  2163. 1258 .LCFI37:
  2164. 1259 .cfi_def_cfa_offset 8
  2165. 1260 0046 BD46 mov sp, r7
  2166. 1261 .LCFI38:
  2167. 1262 .cfi_def_cfa_register 13
  2168. 1263 @ sp needed
  2169. 1264 0048 80BD pop {r7, pc}
  2170. 1265 .L60:
  2171. 1266 004a 00BF .align 2
  2172. 1267 .L59:
  2173. 1268 004c 00380240 .word 1073887232
  2174. 1269 .cfi_endproc
  2175. 1270 .LFE247:
  2176. 1272 .section .text.MX_GPIO_Init,"ax",%progbits
  2177. 1273 .align 1
  2178. 1274 .syntax unified
  2179. 1275 .thumb
  2180. 1276 .thumb_func
  2181. 1278 MX_GPIO_Init:
  2182. 1279 .LFB248:
  2183. 535:Core/Src/main.c ****
  2184. 536:Core/Src/main.c **** /**
  2185. 537:Core/Src/main.c **** * @brief GPIO Initialization Function
  2186. 538:Core/Src/main.c **** * @param None
  2187. 539:Core/Src/main.c **** * @retval None
  2188. 540:Core/Src/main.c **** */
  2189. 541:Core/Src/main.c **** static void MX_GPIO_Init(void)
  2190. 542:Core/Src/main.c **** {
  2191. 1280 .loc 1 542 1
  2192. 1281 .cfi_startproc
  2193. 1282 @ args = 0, pretend = 0, frame = 40
  2194. 1283 @ frame_needed = 1, uses_anonymous_args = 0
  2195. 1284 0000 80B5 push {r7, lr}
  2196. 1285 .LCFI39:
  2197. 1286 .cfi_def_cfa_offset 8
  2198. 1287 .cfi_offset 7, -8
  2199. 1288 .cfi_offset 14, -4
  2200. 1289 0002 8AB0 sub sp, sp, #40
  2201. 1290 .LCFI40:
  2202. 1291 .cfi_def_cfa_offset 48
  2203. 1292 0004 00AF add r7, sp, #0
  2204. 1293 .LCFI41:
  2205. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 39
  2206. 1294 .cfi_def_cfa_register 7
  2207. 543:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
  2208. 1295 .loc 1 543 20
  2209. 1296 0006 07F11403 add r3, r7, #20
  2210. 1297 000a 0022 movs r2, #0
  2211. 1298 000c 1A60 str r2, [r3]
  2212. 1299 000e 5A60 str r2, [r3, #4]
  2213. 1300 0010 9A60 str r2, [r3, #8]
  2214. 1301 0012 DA60 str r2, [r3, #12]
  2215. 1302 0014 1A61 str r2, [r3, #16]
  2216. 1303 .LBB19:
  2217. 544:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */
  2218. 545:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */
  2219. 546:Core/Src/main.c ****
  2220. 547:Core/Src/main.c **** /* GPIO Ports Clock Enable */
  2221. 548:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE();
  2222. 1304 .loc 1 548 3
  2223. 1305 0016 0023 movs r3, #0
  2224. 1306 0018 3B61 str r3, [r7, #16]
  2225. 1307 001a 4B4B ldr r3, .L62
  2226. 1308 001c 1B6B ldr r3, [r3, #48]
  2227. 1309 001e 4A4A ldr r2, .L62
  2228. 1310 0020 43F08003 orr r3, r3, #128
  2229. 1311 0024 1363 str r3, [r2, #48]
  2230. 1312 0026 484B ldr r3, .L62
  2231. 1313 0028 1B6B ldr r3, [r3, #48]
  2232. 1314 002a 03F08003 and r3, r3, #128
  2233. 1315 002e 3B61 str r3, [r7, #16]
  2234. 1316 0030 3B69 ldr r3, [r7, #16]
  2235. 1317 .LBE19:
  2236. 1318 .LBB20:
  2237. 549:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
  2238. 1319 .loc 1 549 3
  2239. 1320 0032 0023 movs r3, #0
  2240. 1321 0034 FB60 str r3, [r7, #12]
  2241. 1322 0036 444B ldr r3, .L62
  2242. 1323 0038 1B6B ldr r3, [r3, #48]
  2243. 1324 003a 434A ldr r2, .L62
  2244. 1325 003c 43F00403 orr r3, r3, #4
  2245. 1326 0040 1363 str r3, [r2, #48]
  2246. 1327 0042 414B ldr r3, .L62
  2247. 1328 0044 1B6B ldr r3, [r3, #48]
  2248. 1329 0046 03F00403 and r3, r3, #4
  2249. 1330 004a FB60 str r3, [r7, #12]
  2250. 1331 004c FB68 ldr r3, [r7, #12]
  2251. 1332 .LBE20:
  2252. 1333 .LBB21:
  2253. 550:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
  2254. 1334 .loc 1 550 3
  2255. 1335 004e 0023 movs r3, #0
  2256. 1336 0050 BB60 str r3, [r7, #8]
  2257. 1337 0052 3D4B ldr r3, .L62
  2258. 1338 0054 1B6B ldr r3, [r3, #48]
  2259. 1339 0056 3C4A ldr r2, .L62
  2260. 1340 0058 43F00103 orr r3, r3, #1
  2261. 1341 005c 1363 str r3, [r2, #48]
  2262. 1342 005e 3A4B ldr r3, .L62
  2263. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 40
  2264. 1343 0060 1B6B ldr r3, [r3, #48]
  2265. 1344 0062 03F00103 and r3, r3, #1
  2266. 1345 0066 BB60 str r3, [r7, #8]
  2267. 1346 0068 BB68 ldr r3, [r7, #8]
  2268. 1347 .LBE21:
  2269. 1348 .LBB22:
  2270. 551:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
  2271. 1349 .loc 1 551 3
  2272. 1350 006a 0023 movs r3, #0
  2273. 1351 006c 7B60 str r3, [r7, #4]
  2274. 1352 006e 364B ldr r3, .L62
  2275. 1353 0070 1B6B ldr r3, [r3, #48]
  2276. 1354 0072 354A ldr r2, .L62
  2277. 1355 0074 43F00203 orr r3, r3, #2
  2278. 1356 0078 1363 str r3, [r2, #48]
  2279. 1357 007a 334B ldr r3, .L62
  2280. 1358 007c 1B6B ldr r3, [r3, #48]
  2281. 1359 007e 03F00203 and r3, r3, #2
  2282. 1360 0082 7B60 str r3, [r7, #4]
  2283. 1361 0084 7B68 ldr r3, [r7, #4]
  2284. 1362 .LBE22:
  2285. 552:Core/Src/main.c ****
  2286. 553:Core/Src/main.c **** /*Configure GPIO pin Output Level */
  2287. 554:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, C0_CAN1_ENABLE_Pin|C9_CAN2_ENABLE_Pin, GPIO_PIN_RESET);
  2288. 1363 .loc 1 554 3
  2289. 1364 0086 0022 movs r2, #0
  2290. 1365 0088 40F20121 movw r1, #513
  2291. 1366 008c 2F48 ldr r0, .L62+4
  2292. 1367 008e FFF7FEFF bl HAL_GPIO_WritePin
  2293. 555:Core/Src/main.c ****
  2294. 556:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, C10_LED_B_Pin|C11_LED_R_Pin|C10_LED_G_Pin, GPIO_PIN_SET);
  2295. 1368 .loc 1 556 3
  2296. 1369 0092 0122 movs r2, #1
  2297. 1370 0094 4FF4E051 mov r1, #7168
  2298. 1371 0098 2C48 ldr r0, .L62+4
  2299. 1372 009a FFF7FEFF bl HAL_GPIO_WritePin
  2300. 557:Core/Src/main.c **** /*Configure GPIO pin Output Level */
  2301. 558:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_6
  2302. 1373 .loc 1 558 3
  2303. 1374 009e 0022 movs r2, #0
  2304. 1375 00a0 C721 movs r1, #199
  2305. 1376 00a2 2B48 ldr r0, .L62+8
  2306. 1377 00a4 FFF7FEFF bl HAL_GPIO_WritePin
  2307. 559:Core/Src/main.c **** |GPIO_PIN_7, GPIO_PIN_RESET);
  2308. 560:Core/Src/main.c ****
  2309. 561:Core/Src/main.c **** /*Configure GPIO pin Output Level */
  2310. 562:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET);
  2311. 1378 .loc 1 562 3
  2312. 1379 00a8 0022 movs r2, #0
  2313. 1380 00aa C021 movs r1, #192
  2314. 1381 00ac 2948 ldr r0, .L62+12
  2315. 1382 00ae FFF7FEFF bl HAL_GPIO_WritePin
  2316. 563:Core/Src/main.c ****
  2317. 564:Core/Src/main.c **** /*Configure GPIO pins : C0_CAN1_ENABLE_Pin C9_CAN2_ENABLE_Pin C10_LED_B_Pin C11_LED_R_Pin
  2318. 565:Core/Src/main.c **** C10_LED_G_Pin */
  2319. 566:Core/Src/main.c **** GPIO_InitStruct.Pin = C0_CAN1_ENABLE_Pin|C9_CAN2_ENABLE_Pin|C10_LED_B_Pin|C11_LED_R_Pin
  2320. 1383 .loc 1 566 23
  2321. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 41
  2322. 1384 00b2 41F60163 movw r3, #7681
  2323. 1385 00b6 7B61 str r3, [r7, #20]
  2324. 567:Core/Src/main.c **** |C10_LED_G_Pin;
  2325. 568:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  2326. 1386 .loc 1 568 24
  2327. 1387 00b8 0123 movs r3, #1
  2328. 1388 00ba BB61 str r3, [r7, #24]
  2329. 569:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  2330. 1389 .loc 1 569 24
  2331. 1390 00bc 0023 movs r3, #0
  2332. 1391 00be FB61 str r3, [r7, #28]
  2333. 570:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  2334. 1392 .loc 1 570 25
  2335. 1393 00c0 0023 movs r3, #0
  2336. 1394 00c2 3B62 str r3, [r7, #32]
  2337. 571:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  2338. 1395 .loc 1 571 3
  2339. 1396 00c4 07F11403 add r3, r7, #20
  2340. 1397 00c8 1946 mov r1, r3
  2341. 1398 00ca 2048 ldr r0, .L62+4
  2342. 1399 00cc FFF7FEFF bl HAL_GPIO_Init
  2343. 572:Core/Src/main.c ****
  2344. 573:Core/Src/main.c **** /*Configure GPIO pins : PA0 PA1 PA2 PA6
  2345. 574:Core/Src/main.c **** PA7 */
  2346. 575:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_6
  2347. 1400 .loc 1 575 23
  2348. 1401 00d0 C723 movs r3, #199
  2349. 1402 00d2 7B61 str r3, [r7, #20]
  2350. 576:Core/Src/main.c **** |GPIO_PIN_7;
  2351. 577:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  2352. 1403 .loc 1 577 24
  2353. 1404 00d4 0123 movs r3, #1
  2354. 1405 00d6 BB61 str r3, [r7, #24]
  2355. 578:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  2356. 1406 .loc 1 578 24
  2357. 1407 00d8 0023 movs r3, #0
  2358. 1408 00da FB61 str r3, [r7, #28]
  2359. 579:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  2360. 1409 .loc 1 579 25
  2361. 1410 00dc 0023 movs r3, #0
  2362. 1411 00de 3B62 str r3, [r7, #32]
  2363. 580:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  2364. 1412 .loc 1 580 3
  2365. 1413 00e0 07F11403 add r3, r7, #20
  2366. 1414 00e4 1946 mov r1, r3
  2367. 1415 00e6 1A48 ldr r0, .L62+8
  2368. 1416 00e8 FFF7FEFF bl HAL_GPIO_Init
  2369. 581:Core/Src/main.c ****
  2370. 582:Core/Src/main.c **** /*Configure GPIO pin : A8_LIQUID_Pin */
  2371. 583:Core/Src/main.c **** GPIO_InitStruct.Pin = A8_LIQUID_Pin;
  2372. 1417 .loc 1 583 23
  2373. 1418 00ec 4FF48073 mov r3, #256
  2374. 1419 00f0 7B61 str r3, [r7, #20]
  2375. 584:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  2376. 1420 .loc 1 584 24
  2377. 1421 00f2 0023 movs r3, #0
  2378. 1422 00f4 BB61 str r3, [r7, #24]
  2379. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 42
  2380. 585:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  2381. 1423 .loc 1 585 24
  2382. 1424 00f6 0023 movs r3, #0
  2383. 1425 00f8 FB61 str r3, [r7, #28]
  2384. 586:Core/Src/main.c **** HAL_GPIO_Init(A8_LIQUID_GPIO_Port, &GPIO_InitStruct);
  2385. 1426 .loc 1 586 3
  2386. 1427 00fa 07F11403 add r3, r7, #20
  2387. 1428 00fe 1946 mov r1, r3
  2388. 1429 0100 1348 ldr r0, .L62+8
  2389. 1430 0102 FFF7FEFF bl HAL_GPIO_Init
  2390. 587:Core/Src/main.c ****
  2391. 588:Core/Src/main.c **** /*Configure GPIO pins : PB6 PB7 */
  2392. 589:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
  2393. 1431 .loc 1 589 23
  2394. 1432 0106 C023 movs r3, #192
  2395. 1433 0108 7B61 str r3, [r7, #20]
  2396. 590:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  2397. 1434 .loc 1 590 24
  2398. 1435 010a 0123 movs r3, #1
  2399. 1436 010c BB61 str r3, [r7, #24]
  2400. 591:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  2401. 1437 .loc 1 591 24
  2402. 1438 010e 0023 movs r3, #0
  2403. 1439 0110 FB61 str r3, [r7, #28]
  2404. 592:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  2405. 1440 .loc 1 592 25
  2406. 1441 0112 0023 movs r3, #0
  2407. 1442 0114 3B62 str r3, [r7, #32]
  2408. 593:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  2409. 1443 .loc 1 593 3
  2410. 1444 0116 07F11403 add r3, r7, #20
  2411. 1445 011a 1946 mov r1, r3
  2412. 1446 011c 0D48 ldr r0, .L62+12
  2413. 1447 011e FFF7FEFF bl HAL_GPIO_Init
  2414. 594:Core/Src/main.c ****
  2415. 595:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1, GPIO_PIN_RESET); //离心
  2416. 1448 .loc 1 595 3
  2417. 1449 0122 0022 movs r2, #0
  2418. 1450 0124 0321 movs r1, #3
  2419. 1451 0126 0A48 ldr r0, .L62+8
  2420. 1452 0128 FFF7FEFF bl HAL_GPIO_WritePin
  2421. 596:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET); //离心
  2422. 1453 .loc 1 596 3
  2423. 1454 012c 0022 movs r2, #0
  2424. 1455 012e C021 movs r1, #192
  2425. 1456 0130 0748 ldr r0, .L62+8
  2426. 1457 0132 FFF7FEFF bl HAL_GPIO_WritePin
  2427. 597:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET); //离心
  2428. 1458 .loc 1 597 3
  2429. 1459 0136 0022 movs r2, #0
  2430. 1460 0138 C021 movs r1, #192
  2431. 1461 013a 0648 ldr r0, .L62+12
  2432. 1462 013c FFF7FEFF bl HAL_GPIO_WritePin
  2433. 598:Core/Src/main.c ****
  2434. 599:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */
  2435. 600:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */
  2436. 601:Core/Src/main.c **** }
  2437. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 43
  2438. 1463 .loc 1 601 1
  2439. 1464 0140 00BF nop
  2440. 1465 0142 2837 adds r7, r7, #40
  2441. 1466 .LCFI42:
  2442. 1467 .cfi_def_cfa_offset 8
  2443. 1468 0144 BD46 mov sp, r7
  2444. 1469 .LCFI43:
  2445. 1470 .cfi_def_cfa_register 13
  2446. 1471 @ sp needed
  2447. 1472 0146 80BD pop {r7, pc}
  2448. 1473 .L63:
  2449. 1474 .align 2
  2450. 1475 .L62:
  2451. 1476 0148 00380240 .word 1073887232
  2452. 1477 014c 00080240 .word 1073874944
  2453. 1478 0150 00000240 .word 1073872896
  2454. 1479 0154 00040240 .word 1073873920
  2455. 1480 .cfi_endproc
  2456. 1481 .LFE248:
  2457. 1483 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits
  2458. 1484 .align 1
  2459. 1485 .global HAL_TIM_PeriodElapsedCallback
  2460. 1486 .syntax unified
  2461. 1487 .thumb
  2462. 1488 .thumb_func
  2463. 1490 HAL_TIM_PeriodElapsedCallback:
  2464. 1491 .LFB249:
  2465. 602:Core/Src/main.c ****
  2466. 603:Core/Src/main.c **** /* USER CODE BEGIN 4 */
  2467. 604:Core/Src/main.c ****
  2468. 605:Core/Src/main.c **** /* USER CODE END 4 */
  2469. 606:Core/Src/main.c ****
  2470. 607:Core/Src/main.c **** /**
  2471. 608:Core/Src/main.c **** * @brief Period elapsed callback in non blocking mode
  2472. 609:Core/Src/main.c **** * @note This function is called when TIM9 interrupt took place, inside
  2473. 610:Core/Src/main.c **** * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
  2474. 611:Core/Src/main.c **** * a global variable "uwTick" used as application time base.
  2475. 612:Core/Src/main.c **** * @param htim : TIM handle
  2476. 613:Core/Src/main.c **** * @retval None
  2477. 614:Core/Src/main.c **** */
  2478. 615:Core/Src/main.c **** void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  2479. 616:Core/Src/main.c **** {
  2480. 1492 .loc 1 616 1
  2481. 1493 .cfi_startproc
  2482. 1494 @ args = 0, pretend = 0, frame = 8
  2483. 1495 @ frame_needed = 1, uses_anonymous_args = 0
  2484. 1496 0000 80B5 push {r7, lr}
  2485. 1497 .LCFI44:
  2486. 1498 .cfi_def_cfa_offset 8
  2487. 1499 .cfi_offset 7, -8
  2488. 1500 .cfi_offset 14, -4
  2489. 1501 0002 82B0 sub sp, sp, #8
  2490. 1502 .LCFI45:
  2491. 1503 .cfi_def_cfa_offset 16
  2492. 1504 0004 00AF add r7, sp, #0
  2493. 1505 .LCFI46:
  2494. 1506 .cfi_def_cfa_register 7
  2495. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 44
  2496. 1507 0006 7860 str r0, [r7, #4]
  2497. 617:Core/Src/main.c **** /* USER CODE BEGIN Callback 0 */
  2498. 618:Core/Src/main.c ****
  2499. 619:Core/Src/main.c **** /* USER CODE END Callback 0 */
  2500. 620:Core/Src/main.c **** if (htim->Instance == TIM9) {
  2501. 1508 .loc 1 620 11
  2502. 1509 0008 7B68 ldr r3, [r7, #4]
  2503. 1510 000a 1B68 ldr r3, [r3]
  2504. 1511 .loc 1 620 6
  2505. 1512 000c 044A ldr r2, .L67
  2506. 1513 000e 9342 cmp r3, r2
  2507. 1514 0010 01D1 bne .L66
  2508. 621:Core/Src/main.c **** HAL_IncTick();
  2509. 1515 .loc 1 621 5
  2510. 1516 0012 FFF7FEFF bl HAL_IncTick
  2511. 1517 .L66:
  2512. 622:Core/Src/main.c **** }
  2513. 623:Core/Src/main.c **** /* USER CODE BEGIN Callback 1 */
  2514. 624:Core/Src/main.c ****
  2515. 625:Core/Src/main.c **** /* USER CODE END Callback 1 */
  2516. 626:Core/Src/main.c **** }
  2517. 1518 .loc 1 626 1
  2518. 1519 0016 00BF nop
  2519. 1520 0018 0837 adds r7, r7, #8
  2520. 1521 .LCFI47:
  2521. 1522 .cfi_def_cfa_offset 8
  2522. 1523 001a BD46 mov sp, r7
  2523. 1524 .LCFI48:
  2524. 1525 .cfi_def_cfa_register 13
  2525. 1526 @ sp needed
  2526. 1527 001c 80BD pop {r7, pc}
  2527. 1528 .L68:
  2528. 1529 001e 00BF .align 2
  2529. 1530 .L67:
  2530. 1531 0020 00400140 .word 1073823744
  2531. 1532 .cfi_endproc
  2532. 1533 .LFE249:
  2533. 1535 .section .text.Error_Handler,"ax",%progbits
  2534. 1536 .align 1
  2535. 1537 .global Error_Handler
  2536. 1538 .syntax unified
  2537. 1539 .thumb
  2538. 1540 .thumb_func
  2539. 1542 Error_Handler:
  2540. 1543 .LFB250:
  2541. 627:Core/Src/main.c ****
  2542. 628:Core/Src/main.c **** /**
  2543. 629:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
  2544. 630:Core/Src/main.c **** * @retval None
  2545. 631:Core/Src/main.c **** */
  2546. 632:Core/Src/main.c **** void Error_Handler(void)
  2547. 633:Core/Src/main.c **** {
  2548. 1544 .loc 1 633 1
  2549. 1545 .cfi_startproc
  2550. 1546 @ args = 0, pretend = 0, frame = 0
  2551. 1547 @ frame_needed = 1, uses_anonymous_args = 0
  2552. 1548 @ link register save eliminated.
  2553. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 45
  2554. 1549 0000 80B4 push {r7}
  2555. 1550 .LCFI49:
  2556. 1551 .cfi_def_cfa_offset 4
  2557. 1552 .cfi_offset 7, -4
  2558. 1553 0002 00AF add r7, sp, #0
  2559. 1554 .LCFI50:
  2560. 1555 .cfi_def_cfa_register 7
  2561. 1556 .LBB23:
  2562. 1557 .LBB24:
  2563. 142:Drivers/CMSIS/Include/cmsis_gcc.h **** }
  2564. 1558 .loc 2 142 3
  2565. 1559 .syntax unified
  2566. 1560 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
  2567. 1561 0004 72B6 cpsid i
  2568. 1562 @ 0 "" 2
  2569. 143:Drivers/CMSIS/Include/cmsis_gcc.h ****
  2570. 1563 .loc 2 143 1
  2571. 1564 .thumb
  2572. 1565 .syntax unified
  2573. 1566 0006 00BF nop
  2574. 1567 .L70:
  2575. 1568 .LBE24:
  2576. 1569 .LBE23:
  2577. 634:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
  2578. 635:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */
  2579. 636:Core/Src/main.c **** __disable_irq();
  2580. 637:Core/Src/main.c **** while (1)
  2581. 1570 .loc 1 637 9 discriminator 1
  2582. 1571 0008 FEE7 b .L70
  2583. 1572 .cfi_endproc
  2584. 1573 .LFE250:
  2585. 1575 .text
  2586. 1576 .Letext0:
  2587. 1577 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
  2588. 1578 .file 4 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
  2589. 1579 .file 5 "Drivers/CMSIS/Include/core_cm4.h"
  2590. 1580 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h"
  2591. 1581 .file 7 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
  2592. 1582 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
  2593. 1583 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h"
  2594. 1584 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
  2595. 1585 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
  2596. 1586 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
  2597. 1587 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
  2598. 1588 .file 14 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h"
  2599. 1589 .file 15 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h"
  2600. 1590 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
  2601. 1591 .file 17 "Core/Inc/soft_uart.h"
  2602. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 46
  2603. DEFINED SYMBOLS
  2604. *ABS*:00000000 main.c
  2605. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:24 .bss.hadc1:00000000 hadc1
  2606. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:21 .bss.hadc1:00000000 $d
  2607. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:31 .bss.hcan1:00000000 hcan1
  2608. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:28 .bss.hcan1:00000000 $d
  2609. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:38 .bss.hcan2:00000000 hcan2
  2610. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:35 .bss.hcan2:00000000 $d
  2611. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:45 .bss.htim2:00000000 htim2
  2612. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:42 .bss.htim2:00000000 $d
  2613. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:52 .bss.htim3:00000000 htim3
  2614. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:49 .bss.htim3:00000000 $d
  2615. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:59 .bss.htim4:00000000 htim4
  2616. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:56 .bss.htim4:00000000 $d
  2617. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:66 .bss.huart1:00000000 huart1
  2618. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:63 .bss.huart1:00000000 $d
  2619. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:73 .bss.hdma_usart1_rx:00000000 hdma_usart1_rx
  2620. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:70 .bss.hdma_usart1_rx:00000000 $d
  2621. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:80 .bss.hdma_usart1_tx:00000000 hdma_usart1_tx
  2622. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:77 .bss.hdma_usart1_tx:00000000 $d
  2623. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:87 .bss.update_flag:00000000 update_flag
  2624. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:84 .bss.update_flag:00000000 $d
  2625. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:94 .bss.led_time:00000000 led_time
  2626. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:91 .bss.led_time:00000000 $d
  2627. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:97 .text.main:00000000 $t
  2628. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:103 .text.main:00000000 main
  2629. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:322 .text.SystemClock_Config:00000000 SystemClock_Config
  2630. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1278 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
  2631. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1207 .text.MX_DMA_Init:00000000 MX_DMA_Init
  2632. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:469 .text.MX_ADC1_Init:00000000 MX_ADC1_Init
  2633. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:597 .text.MX_CAN1_Init:00000000 MX_CAN1_Init
  2634. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:775 .text.MX_TIM2_Init:00000000 MX_TIM2_Init
  2635. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:686 .text.MX_CAN2_Init:00000000 MX_CAN2_Init
  2636. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:894 .text.MX_TIM3_Init:00000000 MX_TIM3_Init
  2637. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1014 .text.MX_TIM4_Init:00000000 MX_TIM4_Init
  2638. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1134 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
  2639. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:302 .text.main:00000100 $d
  2640. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:316 .text.SystemClock_Config:00000000 $t
  2641. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1542 .text.Error_Handler:00000000 Error_Handler
  2642. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:458 .text.SystemClock_Config:000000cc $d
  2643. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:464 .text.MX_ADC1_Init:00000000 $t
  2644. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:585 .text.MX_ADC1_Init:00000098 $d
  2645. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:592 .text.MX_CAN1_Init:00000000 $t
  2646. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:675 .text.MX_CAN1_Init:00000064 $d
  2647. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:681 .text.MX_CAN2_Init:00000000 $t
  2648. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:764 .text.MX_CAN2_Init:00000064 $d
  2649. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:770 .text.MX_TIM2_Init:00000000 $t
  2650. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:884 .text.MX_TIM2_Init:00000094 $d
  2651. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:889 .text.MX_TIM3_Init:00000000 $t
  2652. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1003 .text.MX_TIM3_Init:00000094 $d
  2653. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1009 .text.MX_TIM4_Init:00000000 $t
  2654. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1123 .text.MX_TIM4_Init:00000094 $d
  2655. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1129 .text.MX_USART1_UART_Init:00000000 $t
  2656. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1196 .text.MX_USART1_UART_Init:0000004c $d
  2657. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1202 .text.MX_DMA_Init:00000000 $t
  2658. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1268 .text.MX_DMA_Init:0000004c $d
  2659. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1273 .text.MX_GPIO_Init:00000000 $t
  2660. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 47
  2661. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1476 .text.MX_GPIO_Init:00000148 $d
  2662. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1484 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t
  2663. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1490 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback
  2664. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1531 .text.HAL_TIM_PeriodElapsedCallback:00000020 $d
  2665. C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1536 .text.Error_Handler:00000000 $t
  2666. UNDEFINED SYMBOLS
  2667. HAL_Init
  2668. HAL_UART_Receive_DMA
  2669. flash_read_updata_flag
  2670. update_function
  2671. HAL_DeInit
  2672. HAL_RCC_DeInit
  2673. HAL_GetTick
  2674. HAL_GPIO_TogglePin
  2675. FMU_uart_buf
  2676. update_complete
  2677. memset
  2678. HAL_RCC_OscConfig
  2679. HAL_RCC_ClockConfig
  2680. HAL_ADC_Init
  2681. HAL_ADC_ConfigChannel
  2682. HAL_CAN_Init
  2683. HAL_TIM_Base_Init
  2684. HAL_TIM_ConfigClockSource
  2685. HAL_TIMEx_MasterConfigSynchronization
  2686. HAL_UART_Init
  2687. HAL_NVIC_SetPriority
  2688. HAL_NVIC_EnableIRQ
  2689. HAL_GPIO_WritePin
  2690. HAL_GPIO_Init
  2691. HAL_IncTick