ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "main.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .global hadc1 20 .section .bss.hadc1,"aw",%nobits 21 .align 2 24 hadc1: 25 0000 00000000 .space 72 25 00000000 25 00000000 25 00000000 25 00000000 26 .global hcan1 27 .section .bss.hcan1,"aw",%nobits 28 .align 2 31 hcan1: 32 0000 00000000 .space 40 32 00000000 32 00000000 32 00000000 32 00000000 33 .global hcan2 34 .section .bss.hcan2,"aw",%nobits 35 .align 2 38 hcan2: 39 0000 00000000 .space 40 39 00000000 39 00000000 39 00000000 39 00000000 40 .global htim2 41 .section .bss.htim2,"aw",%nobits 42 .align 2 45 htim2: 46 0000 00000000 .space 72 46 00000000 46 00000000 46 00000000 46 00000000 47 .global htim3 48 .section .bss.htim3,"aw",%nobits 49 .align 2 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 2 52 htim3: 53 0000 00000000 .space 72 53 00000000 53 00000000 53 00000000 53 00000000 54 .global htim4 55 .section .bss.htim4,"aw",%nobits 56 .align 2 59 htim4: 60 0000 00000000 .space 72 60 00000000 60 00000000 60 00000000 60 00000000 61 .global huart1 62 .section .bss.huart1,"aw",%nobits 63 .align 2 66 huart1: 67 0000 00000000 .space 68 67 00000000 67 00000000 67 00000000 67 00000000 68 .global hdma_usart1_rx 69 .section .bss.hdma_usart1_rx,"aw",%nobits 70 .align 2 73 hdma_usart1_rx: 74 0000 00000000 .space 96 74 00000000 74 00000000 74 00000000 74 00000000 75 .global hdma_usart1_tx 76 .section .bss.hdma_usart1_tx,"aw",%nobits 77 .align 2 80 hdma_usart1_tx: 81 0000 00000000 .space 96 81 00000000 81 00000000 81 00000000 81 00000000 82 .global update_flag 83 .section .bss.update_flag,"aw",%nobits 84 .align 1 87 update_flag: 88 0000 0000 .space 2 89 .global led_time 90 .section .bss.led_time,"aw",%nobits 91 .align 2 94 led_time: 95 0000 00000000 .space 4 96 .section .text.main,"ax",%progbits 97 .align 1 98 .global main 99 .syntax unified 100 .thumb ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 3 101 .thumb_func 103 main: 104 .LFB238: 105 .file 1 "Core/Src/main.c" 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ 2:Core/Src/main.c **** /** 3:Core/Src/main.c **** ****************************************************************************** 4:Core/Src/main.c **** * @file : main.c 5:Core/Src/main.c **** * @brief : Main program body 6:Core/Src/main.c **** ****************************************************************************** 7:Core/Src/main.c **** * @attention 8:Core/Src/main.c **** * 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. 10:Core/Src/main.c **** * All rights reserved. 11:Core/Src/main.c **** * 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/main.c **** * in the root directory of this software component. 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/main.c **** * 16:Core/Src/main.c **** ****************************************************************************** 17:Core/Src/main.c **** */ 18:Core/Src/main.c **** /* USER CODE END Header */ 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ 20:Core/Src/main.c **** #include "main.h" 21:Core/Src/main.c **** 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/main.c **** #include "soft_uart.h" 25:Core/Src/main.c **** #include "soft_flash.h" 26:Core/Src/main.c **** /* USER CODE END Includes */ 27:Core/Src/main.c **** 28:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 29:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 30:Core/Src/main.c **** 31:Core/Src/main.c **** /* USER CODE END PTD */ 32:Core/Src/main.c **** 33:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ 34:Core/Src/main.c **** /* USER CODE BEGIN PD */ 35:Core/Src/main.c **** 36:Core/Src/main.c **** /* USER CODE END PD */ 37:Core/Src/main.c **** 38:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ 39:Core/Src/main.c **** /* USER CODE BEGIN PM */ 40:Core/Src/main.c **** 41:Core/Src/main.c **** /* USER CODE END PM */ 42:Core/Src/main.c **** 43:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ 44:Core/Src/main.c **** ADC_HandleTypeDef hadc1; 45:Core/Src/main.c **** 46:Core/Src/main.c **** CAN_HandleTypeDef hcan1; 47:Core/Src/main.c **** CAN_HandleTypeDef hcan2; 48:Core/Src/main.c **** 49:Core/Src/main.c **** TIM_HandleTypeDef htim2; 50:Core/Src/main.c **** TIM_HandleTypeDef htim3; 51:Core/Src/main.c **** TIM_HandleTypeDef htim4; 52:Core/Src/main.c **** 53:Core/Src/main.c **** UART_HandleTypeDef huart1; ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 4 54:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_rx; 55:Core/Src/main.c **** DMA_HandleTypeDef hdma_usart1_tx; 56:Core/Src/main.c **** 57:Core/Src/main.c **** /* USER CODE BEGIN PV */ 58:Core/Src/main.c **** 59:Core/Src/main.c **** /* USER CODE END PV */ 60:Core/Src/main.c **** 61:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ 62:Core/Src/main.c **** void SystemClock_Config(void); 63:Core/Src/main.c **** static void MX_GPIO_Init(void); 64:Core/Src/main.c **** static void MX_DMA_Init(void); 65:Core/Src/main.c **** static void MX_ADC1_Init(void); 66:Core/Src/main.c **** static void MX_CAN1_Init(void); 67:Core/Src/main.c **** static void MX_TIM2_Init(void); 68:Core/Src/main.c **** static void MX_CAN2_Init(void); 69:Core/Src/main.c **** static void MX_TIM3_Init(void); 70:Core/Src/main.c **** static void MX_TIM4_Init(void); 71:Core/Src/main.c **** static void MX_USART1_UART_Init(void); 72:Core/Src/main.c **** /* USER CODE BEGIN PFP */ 73:Core/Src/main.c **** 74:Core/Src/main.c **** /* USER CODE END PFP */ 75:Core/Src/main.c **** 76:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ 77:Core/Src/main.c **** /* USER CODE BEGIN 0 */ 78:Core/Src/main.c **** uint16_t update_flag = 0; 79:Core/Src/main.c **** uint32_t led_time = 0; 80:Core/Src/main.c **** /* USER CODE END 0 */ 81:Core/Src/main.c **** 82:Core/Src/main.c **** /** 83:Core/Src/main.c **** * @brief The application entry point. 84:Core/Src/main.c **** * @retval int 85:Core/Src/main.c **** */ 86:Core/Src/main.c **** int main(void) 87:Core/Src/main.c **** { 106 .loc 1 87 1 107 .cfi_startproc 108 @ args = 0, pretend = 0, frame = 16 109 @ frame_needed = 1, uses_anonymous_args = 0 110 0000 80B5 push {r7, lr} 111 .LCFI0: 112 .cfi_def_cfa_offset 8 113 .cfi_offset 7, -8 114 .cfi_offset 14, -4 115 0002 84B0 sub sp, sp, #16 116 .LCFI1: 117 .cfi_def_cfa_offset 24 118 0004 00AF add r7, sp, #0 119 .LCFI2: 120 .cfi_def_cfa_register 7 88:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 89:Core/Src/main.c **** 90:Core/Src/main.c **** /* USER CODE END 1 */ 91:Core/Src/main.c **** 92:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ 93:Core/Src/main.c **** 94:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 95:Core/Src/main.c **** HAL_Init(); ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 5 121 .loc 1 95 3 122 0006 FFF7FEFF bl HAL_Init 96:Core/Src/main.c **** 97:Core/Src/main.c **** /* USER CODE BEGIN Init */ 98:Core/Src/main.c **** 99:Core/Src/main.c **** /* USER CODE END Init */ 100:Core/Src/main.c **** 101:Core/Src/main.c **** /* Configure the system clock */ 102:Core/Src/main.c **** SystemClock_Config(); 123 .loc 1 102 3 124 000a FFF7FEFF bl SystemClock_Config 103:Core/Src/main.c **** 104:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ 105:Core/Src/main.c **** 106:Core/Src/main.c **** /* USER CODE END SysInit */ 107:Core/Src/main.c **** 108:Core/Src/main.c **** /* Initialize all configured peripherals */ 109:Core/Src/main.c **** MX_GPIO_Init(); 125 .loc 1 109 3 126 000e FFF7FEFF bl MX_GPIO_Init 110:Core/Src/main.c **** MX_DMA_Init(); 127 .loc 1 110 3 128 0012 FFF7FEFF bl MX_DMA_Init 111:Core/Src/main.c **** MX_ADC1_Init(); 129 .loc 1 111 3 130 0016 FFF7FEFF bl MX_ADC1_Init 112:Core/Src/main.c **** MX_CAN1_Init(); 131 .loc 1 112 3 132 001a FFF7FEFF bl MX_CAN1_Init 113:Core/Src/main.c **** MX_TIM2_Init(); 133 .loc 1 113 3 134 001e FFF7FEFF bl MX_TIM2_Init 114:Core/Src/main.c **** MX_CAN2_Init(); 135 .loc 1 114 3 136 0022 FFF7FEFF bl MX_CAN2_Init 115:Core/Src/main.c **** MX_TIM3_Init(); 137 .loc 1 115 3 138 0026 FFF7FEFF bl MX_TIM3_Init 116:Core/Src/main.c **** MX_TIM4_Init(); 139 .loc 1 116 3 140 002a FFF7FEFF bl MX_TIM4_Init 117:Core/Src/main.c **** MX_USART1_UART_Init(); 141 .loc 1 117 3 142 002e FFF7FEFF bl MX_USART1_UART_Init 118:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 119:Core/Src/main.c **** SCB->VTOR = FLASH_BASE | 0x0000; 143 .loc 1 119 6 144 0032 334B ldr r3, .L8 145 .loc 1 119 13 146 0034 4FF00062 mov r2, #134217728 147 0038 9A60 str r2, [r3, #8] 120:Core/Src/main.c **** typedef void (*pFunction)(void); 121:Core/Src/main.c **** pFunction Jump_To_Application; 122:Core/Src/main.c **** uint32_t JumpAddress; 123:Core/Src/main.c **** 124:Core/Src/main.c **** //初始化串口 125:Core/Src/main.c **** __HAL_UART_ENABLE_IT(&huart1, UART_IT_IDLE); ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 6 148 .loc 1 125 3 149 003a 324B ldr r3, .L8+4 150 003c 1B68 ldr r3, [r3] 151 003e DA68 ldr r2, [r3, #12] 152 0040 304B ldr r3, .L8+4 153 0042 1B68 ldr r3, [r3] 154 0044 42F01002 orr r2, r2, #16 155 0048 DA60 str r2, [r3, #12] 126:Core/Src/main.c **** HAL_UART_Receive_DMA(&huart1, (uint8_t *)FMU_uart_buf, MAX_UART_BUF); 156 .loc 1 126 2 157 004a 4FF48072 mov r2, #256 158 004e 2E49 ldr r1, .L8+8 159 0050 2C48 ldr r0, .L8+4 160 0052 FFF7FEFF bl HAL_UART_Receive_DMA 127:Core/Src/main.c **** __HAL_UART_ENABLE_IT(&huart1, UART_IT_ERR); 161 .loc 1 127 2 162 0056 2B4B ldr r3, .L8+4 163 0058 1B68 ldr r3, [r3] 164 005a 5A69 ldr r2, [r3, #20] 165 005c 294B ldr r3, .L8+4 166 005e 1B68 ldr r3, [r3] 167 0060 42F00102 orr r2, r2, #1 168 0064 5A61 str r2, [r3, #20] 128:Core/Src/main.c **** //读取标志位 129:Core/Src/main.c **** update_flag = flash_read_updata_flag(); 169 .loc 1 129 17 170 0066 FFF7FEFF bl flash_read_updata_flag 171 006a 0346 mov r3, r0 172 .loc 1 129 15 173 006c 9AB2 uxth r2, r3 174 006e 274B ldr r3, .L8+12 175 0070 1A80 strh r2, [r3] @ movhi 176 .L7: 130:Core/Src/main.c **** /* USER CODE END 2 */ 131:Core/Src/main.c **** /* Infinite loop */ 132:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ 133:Core/Src/main.c **** //update_flag = IAP_FLAG; //test 134:Core/Src/main.c **** while (1) 135:Core/Src/main.c **** { 136:Core/Src/main.c **** /* USER CODE END WHILE */ 137:Core/Src/main.c **** if(update_flag == IAP_FLAG) 177 .loc 1 137 20 178 0072 264B ldr r3, .L8+12 179 0074 1B88 ldrh r3, [r3] 180 .loc 1 137 7 181 0076 4AF6CD32 movw r2, #43981 182 007a 9342 cmp r3, r2 183 007c 01D1 bne .L2 138:Core/Src/main.c **** { 139:Core/Src/main.c **** update_function(); 184 .loc 1 139 7 185 007e FFF7FEFF bl update_function 186 .L2: 140:Core/Src/main.c **** } 141:Core/Src/main.c **** 142:Core/Src/main.c **** if(update_complete == true || update_flag != IAP_FLAG) 187 .loc 1 142 24 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 7 188 0082 234B ldr r3, .L8+16 189 0084 1B78 ldrb r3, [r3] @ zero_extendqisi2 190 .loc 1 142 7 191 0086 002B cmp r3, #0 192 0088 05D1 bne .L3 193 .loc 1 142 47 discriminator 1 194 008a 204B ldr r3, .L8+12 195 008c 1B88 ldrh r3, [r3] 196 .loc 1 142 32 discriminator 1 197 008e 4AF6CD32 movw r2, #43981 198 0092 9342 cmp r3, r2 199 0094 1FD0 beq .L4 200 .L3: 201 .LBB10: 202 .LBB11: 203 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 8 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 9 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 204 .loc 2 142 3 205 .syntax unified 206 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 207 0096 72B6 cpsid i 208 @ 0 "" 2 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 209 .loc 2 143 1 210 .thumb 211 .syntax unified 212 0098 00BF nop 213 .LBE11: 214 .LBE10: 143:Core/Src/main.c **** { ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 10 144:Core/Src/main.c **** __disable_irq(); 145:Core/Src/main.c **** if ((*(__IO uint32_t *)FLASH_APP_ADDR) <= 0x20020000 && 215 .loc 1 145 12 216 009a 1E4B ldr r3, .L8+20 217 009c 1B68 ldr r3, [r3] 218 .loc 1 145 10 219 009e 1E4A ldr r2, .L8+24 220 00a0 9342 cmp r3, r2 221 00a2 16D8 bhi .L5 146:Core/Src/main.c **** (*(__IO uint32_t *)FLASH_APP_ADDR) >= 0x20000000) 222 .loc 1 146 12 discriminator 1 223 00a4 1B4B ldr r3, .L8+20 224 00a6 1B68 ldr r3, [r3] 145:Core/Src/main.c **** (*(__IO uint32_t *)FLASH_APP_ADDR) >= 0x20000000) 225 .loc 1 145 60 discriminator 1 226 00a8 B3F1005F cmp r3, #536870912 227 00ac 11D3 bcc .L5 147:Core/Src/main.c **** { 148:Core/Src/main.c **** HAL_DeInit(); 228 .loc 1 148 9 229 00ae FFF7FEFF bl HAL_DeInit 149:Core/Src/main.c **** HAL_RCC_DeInit(); 230 .loc 1 149 9 231 00b2 FFF7FEFF bl HAL_RCC_DeInit 150:Core/Src/main.c **** 151:Core/Src/main.c **** JumpAddress = *(__IO uint32_t *)(FLASH_APP_ADDR + 4); 232 .loc 1 151 23 233 00b6 194B ldr r3, .L8+28 234 .loc 1 151 21 235 00b8 1B68 ldr r3, [r3] 236 00ba FB60 str r3, [r7, #12] 152:Core/Src/main.c **** 153:Core/Src/main.c **** Jump_To_Application = (pFunction)JumpAddress; 237 .loc 1 153 29 238 00bc FB68 ldr r3, [r7, #12] 239 00be BB60 str r3, [r7, #8] 154:Core/Src/main.c **** 155:Core/Src/main.c **** __set_MSP(*(__IO uint32_t *)FLASH_APP_ADDR); 240 .loc 1 155 9 241 00c0 144B ldr r3, .L8+20 242 00c2 1B68 ldr r3, [r3] 243 00c4 7B60 str r3, [r7, #4] 244 .LBB12: 245 .LBB13: 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 11 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 12 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 13 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 14 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 246 .loc 2 333 3 247 00c6 7B68 ldr r3, [r7, #4] 248 .syntax unified 249 @ 333 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 250 00c8 83F30888 MSR msp, r3 251 @ 0 "" 2 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252 .loc 2 334 1 253 .thumb 254 .syntax unified 255 00cc 00BF nop 256 .LBE13: 257 .LBE12: 156:Core/Src/main.c **** //__set_CONTROL(0); 157:Core/Src/main.c **** Jump_To_Application(); 258 .loc 1 157 9 259 00ce BB68 ldr r3, [r7, #8] 260 00d0 9847 blx r3 261 .LVL0: 262 .L5: 263 .LBB14: 264 .LBB15: 131:Drivers/CMSIS/Include/cmsis_gcc.h **** } 265 .loc 2 131 3 266 .syntax unified 267 @ 131 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 268 00d2 62B6 cpsie i 269 @ 0 "" 2 132:Drivers/CMSIS/Include/cmsis_gcc.h **** 270 .loc 2 132 1 271 .thumb 272 .syntax unified 273 00d4 00BF nop 274 .L4: 275 .LBE15: 276 .LBE14: 158:Core/Src/main.c **** } 159:Core/Src/main.c **** __enable_irq(); 160:Core/Src/main.c **** 161:Core/Src/main.c **** /* USER CODE BEGIN 3 */ 162:Core/Src/main.c **** } 163:Core/Src/main.c **** 164:Core/Src/main.c **** if(HAL_GetTick() - led_time > 1000) 277 .loc 1 164 8 278 00d6 FFF7FEFF bl HAL_GetTick 279 00da 0246 mov r2, r0 280 .loc 1 164 22 281 00dc 104B ldr r3, .L8+32 282 00de 1B68 ldr r3, [r3] 283 00e0 D31A subs r3, r2, r3 284 .loc 1 164 7 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 15 285 00e2 B3F57A7F cmp r3, #1000 286 00e6 C4D9 bls .L7 165:Core/Src/main.c **** { 166:Core/Src/main.c **** HAL_GPIO_TogglePin(GPIOC,C10_LED_B_Pin|C10_LED_G_Pin); 287 .loc 1 166 7 288 00e8 4FF4A051 mov r1, #5120 289 00ec 0D48 ldr r0, .L8+36 290 00ee FFF7FEFF bl HAL_GPIO_TogglePin 167:Core/Src/main.c **** //HAL_GPIO_TogglePin(GPIOC,C10_LED_B_Pin); 168:Core/Src/main.c **** //HAL_GPIO_TogglePin(GPIOC,C10_LED_G_Pin); 169:Core/Src/main.c **** led_time = HAL_GetTick(); 291 .loc 1 169 18 292 00f2 FFF7FEFF bl HAL_GetTick 293 00f6 0346 mov r3, r0 294 .loc 1 169 16 295 00f8 094A ldr r2, .L8+32 296 00fa 1360 str r3, [r2] 137:Core/Src/main.c **** { 297 .loc 1 137 7 298 00fc B9E7 b .L7 299 .L9: 300 00fe 00BF .align 2 301 .L8: 302 0100 00ED00E0 .word -536810240 303 0104 00000000 .word huart1 304 0108 00000000 .word FMU_uart_buf 305 010c 00000000 .word update_flag 306 0110 00000000 .word update_complete 307 0114 00000208 .word 134348800 308 0118 00000220 .word 537001984 309 011c 04000208 .word 134348804 310 0120 00000000 .word led_time 311 0124 00080240 .word 1073874944 312 .cfi_endproc 313 .LFE238: 315 .section .text.SystemClock_Config,"ax",%progbits 316 .align 1 317 .global SystemClock_Config 318 .syntax unified 319 .thumb 320 .thumb_func 322 SystemClock_Config: 323 .LFB239: 170:Core/Src/main.c **** } 171:Core/Src/main.c **** 172:Core/Src/main.c **** 173:Core/Src/main.c **** 174:Core/Src/main.c **** /* USER CODE END 3 */ 175:Core/Src/main.c **** } 176:Core/Src/main.c **** } 177:Core/Src/main.c **** 178:Core/Src/main.c **** /** 179:Core/Src/main.c **** * @brief System Clock Configuration 180:Core/Src/main.c **** * @retval None 181:Core/Src/main.c **** */ 182:Core/Src/main.c **** void SystemClock_Config(void) 183:Core/Src/main.c **** { ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 16 324 .loc 1 183 1 325 .cfi_startproc 326 @ args = 0, pretend = 0, frame = 80 327 @ frame_needed = 1, uses_anonymous_args = 0 328 0000 80B5 push {r7, lr} 329 .LCFI3: 330 .cfi_def_cfa_offset 8 331 .cfi_offset 7, -8 332 .cfi_offset 14, -4 333 0002 94B0 sub sp, sp, #80 334 .LCFI4: 335 .cfi_def_cfa_offset 88 336 0004 00AF add r7, sp, #0 337 .LCFI5: 338 .cfi_def_cfa_register 7 184:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 339 .loc 1 184 22 340 0006 07F12003 add r3, r7, #32 341 000a 3022 movs r2, #48 342 000c 0021 movs r1, #0 343 000e 1846 mov r0, r3 344 0010 FFF7FEFF bl memset 185:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 345 .loc 1 185 22 346 0014 07F10C03 add r3, r7, #12 347 0018 0022 movs r2, #0 348 001a 1A60 str r2, [r3] 349 001c 5A60 str r2, [r3, #4] 350 001e 9A60 str r2, [r3, #8] 351 0020 DA60 str r2, [r3, #12] 352 0022 1A61 str r2, [r3, #16] 353 .LBB16: 186:Core/Src/main.c **** 187:Core/Src/main.c **** /** Configure the main internal regulator output voltage 188:Core/Src/main.c **** */ 189:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); 354 .loc 1 189 3 355 0024 0023 movs r3, #0 356 0026 BB60 str r3, [r7, #8] 357 0028 284B ldr r3, .L14 358 002a 1B6C ldr r3, [r3, #64] 359 002c 274A ldr r2, .L14 360 002e 43F08053 orr r3, r3, #268435456 361 0032 1364 str r3, [r2, #64] 362 0034 254B ldr r3, .L14 363 0036 1B6C ldr r3, [r3, #64] 364 0038 03F08053 and r3, r3, #268435456 365 003c BB60 str r3, [r7, #8] 366 003e BB68 ldr r3, [r7, #8] 367 .LBE16: 368 .LBB17: 190:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 369 .loc 1 190 3 370 0040 0023 movs r3, #0 371 0042 7B60 str r3, [r7, #4] 372 0044 224B ldr r3, .L14+4 373 0046 1B68 ldr r3, [r3] ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 17 374 0048 214A ldr r2, .L14+4 375 004a 43F48043 orr r3, r3, #16384 376 004e 1360 str r3, [r2] 377 0050 1F4B ldr r3, .L14+4 378 0052 1B68 ldr r3, [r3] 379 0054 03F48043 and r3, r3, #16384 380 0058 7B60 str r3, [r7, #4] 381 005a 7B68 ldr r3, [r7, #4] 382 .LBE17: 191:Core/Src/main.c **** 192:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters 193:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. 194:Core/Src/main.c **** */ 195:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 383 .loc 1 195 36 384 005c 0123 movs r3, #1 385 005e 3B62 str r3, [r7, #32] 196:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 386 .loc 1 196 30 387 0060 4FF48033 mov r3, #65536 388 0064 7B62 str r3, [r7, #36] 197:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 389 .loc 1 197 34 390 0066 0223 movs r3, #2 391 0068 BB63 str r3, [r7, #56] 198:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 392 .loc 1 198 35 393 006a 4FF48003 mov r3, #4194304 394 006e FB63 str r3, [r7, #60] 199:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 4; 395 .loc 1 199 30 396 0070 0423 movs r3, #4 397 0072 3B64 str r3, [r7, #64] 200:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 144; 398 .loc 1 200 30 399 0074 9023 movs r3, #144 400 0076 7B64 str r3, [r7, #68] 201:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 401 .loc 1 201 30 402 0078 0223 movs r3, #2 403 007a BB64 str r3, [r7, #72] 202:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 4; 404 .loc 1 202 30 405 007c 0423 movs r3, #4 406 007e FB64 str r3, [r7, #76] 203:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 407 .loc 1 203 7 408 0080 07F12003 add r3, r7, #32 409 0084 1846 mov r0, r3 410 0086 FFF7FEFF bl HAL_RCC_OscConfig 411 008a 0346 mov r3, r0 412 .loc 1 203 6 413 008c 002B cmp r3, #0 414 008e 01D0 beq .L11 204:Core/Src/main.c **** { 205:Core/Src/main.c **** Error_Handler(); 415 .loc 1 205 5 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 18 416 0090 FFF7FEFF bl Error_Handler 417 .L11: 206:Core/Src/main.c **** } 207:Core/Src/main.c **** 208:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks 209:Core/Src/main.c **** */ 210:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 418 .loc 1 210 31 419 0094 0F23 movs r3, #15 420 0096 FB60 str r3, [r7, #12] 211:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 212:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 421 .loc 1 212 34 422 0098 0223 movs r3, #2 423 009a 3B61 str r3, [r7, #16] 213:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 424 .loc 1 213 35 425 009c 0023 movs r3, #0 426 009e 7B61 str r3, [r7, #20] 214:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 427 .loc 1 214 36 428 00a0 4FF4A053 mov r3, #5120 429 00a4 BB61 str r3, [r7, #24] 215:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 430 .loc 1 215 36 431 00a6 4FF48053 mov r3, #4096 432 00aa FB61 str r3, [r7, #28] 216:Core/Src/main.c **** 217:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 433 .loc 1 217 7 434 00ac 07F10C03 add r3, r7, #12 435 00b0 0421 movs r1, #4 436 00b2 1846 mov r0, r3 437 00b4 FFF7FEFF bl HAL_RCC_ClockConfig 438 00b8 0346 mov r3, r0 439 .loc 1 217 6 440 00ba 002B cmp r3, #0 441 00bc 01D0 beq .L13 218:Core/Src/main.c **** { 219:Core/Src/main.c **** Error_Handler(); 442 .loc 1 219 5 443 00be FFF7FEFF bl Error_Handler 444 .L13: 220:Core/Src/main.c **** } 221:Core/Src/main.c **** } 445 .loc 1 221 1 446 00c2 00BF nop 447 00c4 5037 adds r7, r7, #80 448 .LCFI6: 449 .cfi_def_cfa_offset 8 450 00c6 BD46 mov sp, r7 451 .LCFI7: 452 .cfi_def_cfa_register 13 453 @ sp needed 454 00c8 80BD pop {r7, pc} 455 .L15: 456 00ca 00BF .align 2 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 19 457 .L14: 458 00cc 00380240 .word 1073887232 459 00d0 00700040 .word 1073770496 460 .cfi_endproc 461 .LFE239: 463 .section .text.MX_ADC1_Init,"ax",%progbits 464 .align 1 465 .syntax unified 466 .thumb 467 .thumb_func 469 MX_ADC1_Init: 470 .LFB240: 222:Core/Src/main.c **** 223:Core/Src/main.c **** /** 224:Core/Src/main.c **** * @brief ADC1 Initialization Function 225:Core/Src/main.c **** * @param None 226:Core/Src/main.c **** * @retval None 227:Core/Src/main.c **** */ 228:Core/Src/main.c **** static void MX_ADC1_Init(void) 229:Core/Src/main.c **** { 471 .loc 1 229 1 472 .cfi_startproc 473 @ args = 0, pretend = 0, frame = 16 474 @ frame_needed = 1, uses_anonymous_args = 0 475 0000 80B5 push {r7, lr} 476 .LCFI8: 477 .cfi_def_cfa_offset 8 478 .cfi_offset 7, -8 479 .cfi_offset 14, -4 480 0002 84B0 sub sp, sp, #16 481 .LCFI9: 482 .cfi_def_cfa_offset 24 483 0004 00AF add r7, sp, #0 484 .LCFI10: 485 .cfi_def_cfa_register 7 230:Core/Src/main.c **** 231:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ 232:Core/Src/main.c **** 233:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ 234:Core/Src/main.c **** 235:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 486 .loc 1 235 26 487 0006 3B46 mov r3, r7 488 0008 0022 movs r2, #0 489 000a 1A60 str r2, [r3] 490 000c 5A60 str r2, [r3, #4] 491 000e 9A60 str r2, [r3, #8] 492 0010 DA60 str r2, [r3, #12] 236:Core/Src/main.c **** 237:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 238:Core/Src/main.c **** 239:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ 240:Core/Src/main.c **** 241:Core/Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con 242:Core/Src/main.c **** */ 243:Core/Src/main.c **** hadc1.Instance = ADC1; 493 .loc 1 243 18 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 20 494 0012 214B ldr r3, .L20 495 0014 214A ldr r2, .L20+4 496 0016 1A60 str r2, [r3] 244:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; 497 .loc 1 244 29 498 0018 1F4B ldr r3, .L20 499 001a 0022 movs r2, #0 500 001c 5A60 str r2, [r3, #4] 245:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 501 .loc 1 245 25 502 001e 1E4B ldr r3, .L20 503 0020 0022 movs r2, #0 504 0022 9A60 str r2, [r3, #8] 246:Core/Src/main.c **** hadc1.Init.ScanConvMode = DISABLE; 505 .loc 1 246 27 506 0024 1C4B ldr r3, .L20 507 0026 0022 movs r2, #0 508 0028 1A61 str r2, [r3, #16] 247:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 509 .loc 1 247 33 510 002a 1B4B ldr r3, .L20 511 002c 0022 movs r2, #0 512 002e 1A76 strb r2, [r3, #24] 248:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 513 .loc 1 248 36 514 0030 194B ldr r3, .L20 515 0032 0022 movs r2, #0 516 0034 83F82020 strb r2, [r3, #32] 249:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 517 .loc 1 249 35 518 0038 174B ldr r3, .L20 519 003a 0022 movs r2, #0 520 003c DA62 str r2, [r3, #44] 250:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 521 .loc 1 250 31 522 003e 164B ldr r3, .L20 523 0040 174A ldr r2, .L20+8 524 0042 9A62 str r2, [r3, #40] 251:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 525 .loc 1 251 24 526 0044 144B ldr r3, .L20 527 0046 0022 movs r2, #0 528 0048 DA60 str r2, [r3, #12] 252:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 529 .loc 1 252 30 530 004a 134B ldr r3, .L20 531 004c 0122 movs r2, #1 532 004e DA61 str r2, [r3, #28] 253:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; 533 .loc 1 253 36 534 0050 114B ldr r3, .L20 535 0052 0022 movs r2, #0 536 0054 83F83020 strb r2, [r3, #48] 254:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 537 .loc 1 254 27 538 0058 0F4B ldr r3, .L20 539 005a 0122 movs r2, #1 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 21 540 005c 5A61 str r2, [r3, #20] 255:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 541 .loc 1 255 7 542 005e 0E48 ldr r0, .L20 543 0060 FFF7FEFF bl HAL_ADC_Init 544 0064 0346 mov r3, r0 545 .loc 1 255 6 546 0066 002B cmp r3, #0 547 0068 01D0 beq .L17 256:Core/Src/main.c **** { 257:Core/Src/main.c **** Error_Handler(); 548 .loc 1 257 5 549 006a FFF7FEFF bl Error_Handler 550 .L17: 258:Core/Src/main.c **** } 259:Core/Src/main.c **** 260:Core/Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it 261:Core/Src/main.c **** */ 262:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_4; 551 .loc 1 262 19 552 006e 0423 movs r3, #4 553 0070 3B60 str r3, [r7] 263:Core/Src/main.c **** sConfig.Rank = 1; 554 .loc 1 263 16 555 0072 0123 movs r3, #1 556 0074 7B60 str r3, [r7, #4] 264:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; 557 .loc 1 264 24 558 0076 0023 movs r3, #0 559 0078 BB60 str r3, [r7, #8] 265:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 560 .loc 1 265 7 561 007a 3B46 mov r3, r7 562 007c 1946 mov r1, r3 563 007e 0648 ldr r0, .L20 564 0080 FFF7FEFF bl HAL_ADC_ConfigChannel 565 0084 0346 mov r3, r0 566 .loc 1 265 6 567 0086 002B cmp r3, #0 568 0088 01D0 beq .L19 266:Core/Src/main.c **** { 267:Core/Src/main.c **** Error_Handler(); 569 .loc 1 267 5 570 008a FFF7FEFF bl Error_Handler 571 .L19: 268:Core/Src/main.c **** } 269:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ 270:Core/Src/main.c **** 271:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ 272:Core/Src/main.c **** 273:Core/Src/main.c **** } 572 .loc 1 273 1 573 008e 00BF nop 574 0090 1037 adds r7, r7, #16 575 .LCFI11: 576 .cfi_def_cfa_offset 8 577 0092 BD46 mov sp, r7 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 22 578 .LCFI12: 579 .cfi_def_cfa_register 13 580 @ sp needed 581 0094 80BD pop {r7, pc} 582 .L21: 583 0096 00BF .align 2 584 .L20: 585 0098 00000000 .word hadc1 586 009c 00200140 .word 1073815552 587 00a0 0100000F .word 251658241 588 .cfi_endproc 589 .LFE240: 591 .section .text.MX_CAN1_Init,"ax",%progbits 592 .align 1 593 .syntax unified 594 .thumb 595 .thumb_func 597 MX_CAN1_Init: 598 .LFB241: 274:Core/Src/main.c **** 275:Core/Src/main.c **** /** 276:Core/Src/main.c **** * @brief CAN1 Initialization Function 277:Core/Src/main.c **** * @param None 278:Core/Src/main.c **** * @retval None 279:Core/Src/main.c **** */ 280:Core/Src/main.c **** static void MX_CAN1_Init(void) 281:Core/Src/main.c **** { 599 .loc 1 281 1 600 .cfi_startproc 601 @ args = 0, pretend = 0, frame = 0 602 @ frame_needed = 1, uses_anonymous_args = 0 603 0000 80B5 push {r7, lr} 604 .LCFI13: 605 .cfi_def_cfa_offset 8 606 .cfi_offset 7, -8 607 .cfi_offset 14, -4 608 0002 00AF add r7, sp, #0 609 .LCFI14: 610 .cfi_def_cfa_register 7 282:Core/Src/main.c **** 283:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 0 */ 284:Core/Src/main.c **** 285:Core/Src/main.c **** /* USER CODE END CAN1_Init 0 */ 286:Core/Src/main.c **** 287:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 1 */ 288:Core/Src/main.c **** 289:Core/Src/main.c **** /* USER CODE END CAN1_Init 1 */ 290:Core/Src/main.c **** hcan1.Instance = CAN1; 611 .loc 1 290 18 612 0004 174B ldr r3, .L25 613 0006 184A ldr r2, .L25+4 614 0008 1A60 str r2, [r3] 291:Core/Src/main.c **** hcan1.Init.Prescaler = 3; 615 .loc 1 291 24 616 000a 164B ldr r3, .L25 617 000c 0322 movs r2, #3 618 000e 5A60 str r2, [r3, #4] ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 23 292:Core/Src/main.c **** hcan1.Init.Mode = CAN_MODE_NORMAL; 619 .loc 1 292 19 620 0010 144B ldr r3, .L25 621 0012 0022 movs r2, #0 622 0014 9A60 str r2, [r3, #8] 293:Core/Src/main.c **** hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ; 623 .loc 1 293 28 624 0016 134B ldr r3, .L25 625 0018 0022 movs r2, #0 626 001a DA60 str r2, [r3, #12] 294:Core/Src/main.c **** hcan1.Init.TimeSeg1 = CAN_BS1_9TQ; 627 .loc 1 294 23 628 001c 114B ldr r3, .L25 629 001e 4FF40022 mov r2, #524288 630 0022 1A61 str r2, [r3, #16] 295:Core/Src/main.c **** hcan1.Init.TimeSeg2 = CAN_BS2_2TQ; 631 .loc 1 295 23 632 0024 0F4B ldr r3, .L25 633 0026 4FF48012 mov r2, #1048576 634 002a 5A61 str r2, [r3, #20] 296:Core/Src/main.c **** hcan1.Init.TimeTriggeredMode = DISABLE; 635 .loc 1 296 32 636 002c 0D4B ldr r3, .L25 637 002e 0022 movs r2, #0 638 0030 1A76 strb r2, [r3, #24] 297:Core/Src/main.c **** hcan1.Init.AutoBusOff = ENABLE; 639 .loc 1 297 25 640 0032 0C4B ldr r3, .L25 641 0034 0122 movs r2, #1 642 0036 5A76 strb r2, [r3, #25] 298:Core/Src/main.c **** hcan1.Init.AutoWakeUp = DISABLE; 643 .loc 1 298 25 644 0038 0A4B ldr r3, .L25 645 003a 0022 movs r2, #0 646 003c 9A76 strb r2, [r3, #26] 299:Core/Src/main.c **** hcan1.Init.AutoRetransmission = DISABLE; 647 .loc 1 299 33 648 003e 094B ldr r3, .L25 649 0040 0022 movs r2, #0 650 0042 DA76 strb r2, [r3, #27] 300:Core/Src/main.c **** hcan1.Init.ReceiveFifoLocked = DISABLE; 651 .loc 1 300 32 652 0044 074B ldr r3, .L25 653 0046 0022 movs r2, #0 654 0048 1A77 strb r2, [r3, #28] 301:Core/Src/main.c **** hcan1.Init.TransmitFifoPriority = ENABLE; 655 .loc 1 301 35 656 004a 064B ldr r3, .L25 657 004c 0122 movs r2, #1 658 004e 5A77 strb r2, [r3, #29] 302:Core/Src/main.c **** if (HAL_CAN_Init(&hcan1) != HAL_OK) 659 .loc 1 302 7 660 0050 0448 ldr r0, .L25 661 0052 FFF7FEFF bl HAL_CAN_Init 662 0056 0346 mov r3, r0 663 .loc 1 302 6 664 0058 002B cmp r3, #0 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 24 665 005a 01D0 beq .L24 303:Core/Src/main.c **** { 304:Core/Src/main.c **** Error_Handler(); 666 .loc 1 304 5 667 005c FFF7FEFF bl Error_Handler 668 .L24: 305:Core/Src/main.c **** } 306:Core/Src/main.c **** /* USER CODE BEGIN CAN1_Init 2 */ 307:Core/Src/main.c **** 308:Core/Src/main.c **** /* USER CODE END CAN1_Init 2 */ 309:Core/Src/main.c **** 310:Core/Src/main.c **** } 669 .loc 1 310 1 670 0060 00BF nop 671 0062 80BD pop {r7, pc} 672 .L26: 673 .align 2 674 .L25: 675 0064 00000000 .word hcan1 676 0068 00640040 .word 1073767424 677 .cfi_endproc 678 .LFE241: 680 .section .text.MX_CAN2_Init,"ax",%progbits 681 .align 1 682 .syntax unified 683 .thumb 684 .thumb_func 686 MX_CAN2_Init: 687 .LFB242: 311:Core/Src/main.c **** 312:Core/Src/main.c **** /** 313:Core/Src/main.c **** * @brief CAN2 Initialization Function 314:Core/Src/main.c **** * @param None 315:Core/Src/main.c **** * @retval None 316:Core/Src/main.c **** */ 317:Core/Src/main.c **** static void MX_CAN2_Init(void) 318:Core/Src/main.c **** { 688 .loc 1 318 1 689 .cfi_startproc 690 @ args = 0, pretend = 0, frame = 0 691 @ frame_needed = 1, uses_anonymous_args = 0 692 0000 80B5 push {r7, lr} 693 .LCFI15: 694 .cfi_def_cfa_offset 8 695 .cfi_offset 7, -8 696 .cfi_offset 14, -4 697 0002 00AF add r7, sp, #0 698 .LCFI16: 699 .cfi_def_cfa_register 7 319:Core/Src/main.c **** 320:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 0 */ 321:Core/Src/main.c **** 322:Core/Src/main.c **** /* USER CODE END CAN2_Init 0 */ 323:Core/Src/main.c **** 324:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 1 */ 325:Core/Src/main.c **** 326:Core/Src/main.c **** /* USER CODE END CAN2_Init 1 */ ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 25 327:Core/Src/main.c **** hcan2.Instance = CAN2; 700 .loc 1 327 18 701 0004 174B ldr r3, .L30 702 0006 184A ldr r2, .L30+4 703 0008 1A60 str r2, [r3] 328:Core/Src/main.c **** hcan2.Init.Prescaler = 3; 704 .loc 1 328 24 705 000a 164B ldr r3, .L30 706 000c 0322 movs r2, #3 707 000e 5A60 str r2, [r3, #4] 329:Core/Src/main.c **** hcan2.Init.Mode = CAN_MODE_NORMAL; 708 .loc 1 329 19 709 0010 144B ldr r3, .L30 710 0012 0022 movs r2, #0 711 0014 9A60 str r2, [r3, #8] 330:Core/Src/main.c **** hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ; 712 .loc 1 330 28 713 0016 134B ldr r3, .L30 714 0018 0022 movs r2, #0 715 001a DA60 str r2, [r3, #12] 331:Core/Src/main.c **** hcan2.Init.TimeSeg1 = CAN_BS1_9TQ; 716 .loc 1 331 23 717 001c 114B ldr r3, .L30 718 001e 4FF40022 mov r2, #524288 719 0022 1A61 str r2, [r3, #16] 332:Core/Src/main.c **** hcan2.Init.TimeSeg2 = CAN_BS2_2TQ; 720 .loc 1 332 23 721 0024 0F4B ldr r3, .L30 722 0026 4FF48012 mov r2, #1048576 723 002a 5A61 str r2, [r3, #20] 333:Core/Src/main.c **** hcan2.Init.TimeTriggeredMode = DISABLE; 724 .loc 1 333 32 725 002c 0D4B ldr r3, .L30 726 002e 0022 movs r2, #0 727 0030 1A76 strb r2, [r3, #24] 334:Core/Src/main.c **** hcan2.Init.AutoBusOff = ENABLE; 728 .loc 1 334 25 729 0032 0C4B ldr r3, .L30 730 0034 0122 movs r2, #1 731 0036 5A76 strb r2, [r3, #25] 335:Core/Src/main.c **** hcan2.Init.AutoWakeUp = DISABLE; 732 .loc 1 335 25 733 0038 0A4B ldr r3, .L30 734 003a 0022 movs r2, #0 735 003c 9A76 strb r2, [r3, #26] 336:Core/Src/main.c **** hcan2.Init.AutoRetransmission = DISABLE; 736 .loc 1 336 33 737 003e 094B ldr r3, .L30 738 0040 0022 movs r2, #0 739 0042 DA76 strb r2, [r3, #27] 337:Core/Src/main.c **** hcan2.Init.ReceiveFifoLocked = DISABLE; 740 .loc 1 337 32 741 0044 074B ldr r3, .L30 742 0046 0022 movs r2, #0 743 0048 1A77 strb r2, [r3, #28] 338:Core/Src/main.c **** hcan2.Init.TransmitFifoPriority = ENABLE; 744 .loc 1 338 35 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 26 745 004a 064B ldr r3, .L30 746 004c 0122 movs r2, #1 747 004e 5A77 strb r2, [r3, #29] 339:Core/Src/main.c **** if (HAL_CAN_Init(&hcan2) != HAL_OK) 748 .loc 1 339 7 749 0050 0448 ldr r0, .L30 750 0052 FFF7FEFF bl HAL_CAN_Init 751 0056 0346 mov r3, r0 752 .loc 1 339 6 753 0058 002B cmp r3, #0 754 005a 01D0 beq .L29 340:Core/Src/main.c **** { 341:Core/Src/main.c **** Error_Handler(); 755 .loc 1 341 5 756 005c FFF7FEFF bl Error_Handler 757 .L29: 342:Core/Src/main.c **** } 343:Core/Src/main.c **** /* USER CODE BEGIN CAN2_Init 2 */ 344:Core/Src/main.c **** 345:Core/Src/main.c **** /* USER CODE END CAN2_Init 2 */ 346:Core/Src/main.c **** 347:Core/Src/main.c **** } 758 .loc 1 347 1 759 0060 00BF nop 760 0062 80BD pop {r7, pc} 761 .L31: 762 .align 2 763 .L30: 764 0064 00000000 .word hcan2 765 0068 00680040 .word 1073768448 766 .cfi_endproc 767 .LFE242: 769 .section .text.MX_TIM2_Init,"ax",%progbits 770 .align 1 771 .syntax unified 772 .thumb 773 .thumb_func 775 MX_TIM2_Init: 776 .LFB243: 348:Core/Src/main.c **** 349:Core/Src/main.c **** /** 350:Core/Src/main.c **** * @brief TIM2 Initialization Function 351:Core/Src/main.c **** * @param None 352:Core/Src/main.c **** * @retval None 353:Core/Src/main.c **** */ 354:Core/Src/main.c **** static void MX_TIM2_Init(void) 355:Core/Src/main.c **** { 777 .loc 1 355 1 778 .cfi_startproc 779 @ args = 0, pretend = 0, frame = 24 780 @ frame_needed = 1, uses_anonymous_args = 0 781 0000 80B5 push {r7, lr} 782 .LCFI17: 783 .cfi_def_cfa_offset 8 784 .cfi_offset 7, -8 785 .cfi_offset 14, -4 786 0002 86B0 sub sp, sp, #24 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 27 787 .LCFI18: 788 .cfi_def_cfa_offset 32 789 0004 00AF add r7, sp, #0 790 .LCFI19: 791 .cfi_def_cfa_register 7 356:Core/Src/main.c **** 357:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ 358:Core/Src/main.c **** 359:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */ 360:Core/Src/main.c **** 361:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 792 .loc 1 361 26 793 0006 07F10803 add r3, r7, #8 794 000a 0022 movs r2, #0 795 000c 1A60 str r2, [r3] 796 000e 5A60 str r2, [r3, #4] 797 0010 9A60 str r2, [r3, #8] 798 0012 DA60 str r2, [r3, #12] 362:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 799 .loc 1 362 27 800 0014 3B46 mov r3, r7 801 0016 0022 movs r2, #0 802 0018 1A60 str r2, [r3] 803 001a 5A60 str r2, [r3, #4] 363:Core/Src/main.c **** 364:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ 365:Core/Src/main.c **** 366:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */ 367:Core/Src/main.c **** htim2.Instance = TIM2; 804 .loc 1 367 18 805 001c 1D4B ldr r3, .L37 806 001e 4FF08042 mov r2, #1073741824 807 0022 1A60 str r2, [r3] 368:Core/Src/main.c **** htim2.Init.Prescaler = 72-1; 808 .loc 1 368 24 809 0024 1B4B ldr r3, .L37 810 0026 4722 movs r2, #71 811 0028 5A60 str r2, [r3, #4] 369:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 812 .loc 1 369 26 813 002a 1A4B ldr r3, .L37 814 002c 0022 movs r2, #0 815 002e 9A60 str r2, [r3, #8] 370:Core/Src/main.c **** htim2.Init.Period = 20000 -1 ; 816 .loc 1 370 21 817 0030 184B ldr r3, .L37 818 0032 44F61F62 movw r2, #19999 819 0036 DA60 str r2, [r3, #12] 371:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 820 .loc 1 371 28 821 0038 164B ldr r3, .L37 822 003a 0022 movs r2, #0 823 003c 1A61 str r2, [r3, #16] 372:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 824 .loc 1 372 32 825 003e 154B ldr r3, .L37 826 0040 0022 movs r2, #0 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 28 827 0042 9A61 str r2, [r3, #24] 373:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim2) != HAL_OK) 828 .loc 1 373 7 829 0044 1348 ldr r0, .L37 830 0046 FFF7FEFF bl HAL_TIM_Base_Init 831 004a 0346 mov r3, r0 832 .loc 1 373 6 833 004c 002B cmp r3, #0 834 004e 01D0 beq .L33 374:Core/Src/main.c **** { 375:Core/Src/main.c **** Error_Handler(); 835 .loc 1 375 5 836 0050 FFF7FEFF bl Error_Handler 837 .L33: 376:Core/Src/main.c **** } 377:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 838 .loc 1 377 34 839 0054 4FF48053 mov r3, #4096 840 0058 BB60 str r3, [r7, #8] 378:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) 841 .loc 1 378 7 842 005a 07F10803 add r3, r7, #8 843 005e 1946 mov r1, r3 844 0060 0C48 ldr r0, .L37 845 0062 FFF7FEFF bl HAL_TIM_ConfigClockSource 846 0066 0346 mov r3, r0 847 .loc 1 378 6 848 0068 002B cmp r3, #0 849 006a 01D0 beq .L34 379:Core/Src/main.c **** { 380:Core/Src/main.c **** Error_Handler(); 850 .loc 1 380 5 851 006c FFF7FEFF bl Error_Handler 852 .L34: 381:Core/Src/main.c **** } 382:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 853 .loc 1 382 37 854 0070 0023 movs r3, #0 855 0072 3B60 str r3, [r7] 383:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 856 .loc 1 383 33 857 0074 0023 movs r3, #0 858 0076 7B60 str r3, [r7, #4] 384:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 859 .loc 1 384 7 860 0078 3B46 mov r3, r7 861 007a 1946 mov r1, r3 862 007c 0548 ldr r0, .L37 863 007e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 864 0082 0346 mov r3, r0 865 .loc 1 384 6 866 0084 002B cmp r3, #0 867 0086 01D0 beq .L36 385:Core/Src/main.c **** { 386:Core/Src/main.c **** Error_Handler(); 868 .loc 1 386 5 869 0088 FFF7FEFF bl Error_Handler ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 29 870 .L36: 387:Core/Src/main.c **** } 388:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ 389:Core/Src/main.c **** 390:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */ 391:Core/Src/main.c **** 392:Core/Src/main.c **** } 871 .loc 1 392 1 872 008c 00BF nop 873 008e 1837 adds r7, r7, #24 874 .LCFI20: 875 .cfi_def_cfa_offset 8 876 0090 BD46 mov sp, r7 877 .LCFI21: 878 .cfi_def_cfa_register 13 879 @ sp needed 880 0092 80BD pop {r7, pc} 881 .L38: 882 .align 2 883 .L37: 884 0094 00000000 .word htim2 885 .cfi_endproc 886 .LFE243: 888 .section .text.MX_TIM3_Init,"ax",%progbits 889 .align 1 890 .syntax unified 891 .thumb 892 .thumb_func 894 MX_TIM3_Init: 895 .LFB244: 393:Core/Src/main.c **** 394:Core/Src/main.c **** /** 395:Core/Src/main.c **** * @brief TIM3 Initialization Function 396:Core/Src/main.c **** * @param None 397:Core/Src/main.c **** * @retval None 398:Core/Src/main.c **** */ 399:Core/Src/main.c **** static void MX_TIM3_Init(void) 400:Core/Src/main.c **** { 896 .loc 1 400 1 897 .cfi_startproc 898 @ args = 0, pretend = 0, frame = 24 899 @ frame_needed = 1, uses_anonymous_args = 0 900 0000 80B5 push {r7, lr} 901 .LCFI22: 902 .cfi_def_cfa_offset 8 903 .cfi_offset 7, -8 904 .cfi_offset 14, -4 905 0002 86B0 sub sp, sp, #24 906 .LCFI23: 907 .cfi_def_cfa_offset 32 908 0004 00AF add r7, sp, #0 909 .LCFI24: 910 .cfi_def_cfa_register 7 401:Core/Src/main.c **** 402:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */ 403:Core/Src/main.c **** 404:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */ ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 30 405:Core/Src/main.c **** 406:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 911 .loc 1 406 26 912 0006 07F10803 add r3, r7, #8 913 000a 0022 movs r2, #0 914 000c 1A60 str r2, [r3] 915 000e 5A60 str r2, [r3, #4] 916 0010 9A60 str r2, [r3, #8] 917 0012 DA60 str r2, [r3, #12] 407:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 918 .loc 1 407 27 919 0014 3B46 mov r3, r7 920 0016 0022 movs r2, #0 921 0018 1A60 str r2, [r3] 922 001a 5A60 str r2, [r3, #4] 408:Core/Src/main.c **** 409:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */ 410:Core/Src/main.c **** 411:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */ 412:Core/Src/main.c **** htim3.Instance = TIM3; 923 .loc 1 412 18 924 001c 1D4B ldr r3, .L44 925 001e 1E4A ldr r2, .L44+4 926 0020 1A60 str r2, [r3] 413:Core/Src/main.c **** htim3.Init.Prescaler = 72-1; 927 .loc 1 413 24 928 0022 1C4B ldr r3, .L44 929 0024 4722 movs r2, #71 930 0026 5A60 str r2, [r3, #4] 414:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 931 .loc 1 414 26 932 0028 1A4B ldr r3, .L44 933 002a 0022 movs r2, #0 934 002c 9A60 str r2, [r3, #8] 415:Core/Src/main.c **** htim3.Init.Period = 7200-1; 935 .loc 1 415 21 936 002e 194B ldr r3, .L44 937 0030 41F61F42 movw r2, #7199 938 0034 DA60 str r2, [r3, #12] 416:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 939 .loc 1 416 28 940 0036 174B ldr r3, .L44 941 0038 0022 movs r2, #0 942 003a 1A61 str r2, [r3, #16] 417:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 943 .loc 1 417 32 944 003c 154B ldr r3, .L44 945 003e 0022 movs r2, #0 946 0040 9A61 str r2, [r3, #24] 418:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim3) != HAL_OK) 947 .loc 1 418 7 948 0042 1448 ldr r0, .L44 949 0044 FFF7FEFF bl HAL_TIM_Base_Init 950 0048 0346 mov r3, r0 951 .loc 1 418 6 952 004a 002B cmp r3, #0 953 004c 01D0 beq .L40 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 31 419:Core/Src/main.c **** { 420:Core/Src/main.c **** Error_Handler(); 954 .loc 1 420 5 955 004e FFF7FEFF bl Error_Handler 956 .L40: 421:Core/Src/main.c **** } 422:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 957 .loc 1 422 34 958 0052 4FF48053 mov r3, #4096 959 0056 BB60 str r3, [r7, #8] 423:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) 960 .loc 1 423 7 961 0058 07F10803 add r3, r7, #8 962 005c 1946 mov r1, r3 963 005e 0D48 ldr r0, .L44 964 0060 FFF7FEFF bl HAL_TIM_ConfigClockSource 965 0064 0346 mov r3, r0 966 .loc 1 423 6 967 0066 002B cmp r3, #0 968 0068 01D0 beq .L41 424:Core/Src/main.c **** { 425:Core/Src/main.c **** Error_Handler(); 969 .loc 1 425 5 970 006a FFF7FEFF bl Error_Handler 971 .L41: 426:Core/Src/main.c **** } 427:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 972 .loc 1 427 37 973 006e 0023 movs r3, #0 974 0070 3B60 str r3, [r7] 428:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 975 .loc 1 428 33 976 0072 0023 movs r3, #0 977 0074 7B60 str r3, [r7, #4] 429:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 978 .loc 1 429 7 979 0076 3B46 mov r3, r7 980 0078 1946 mov r1, r3 981 007a 0648 ldr r0, .L44 982 007c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 983 0080 0346 mov r3, r0 984 .loc 1 429 6 985 0082 002B cmp r3, #0 986 0084 01D0 beq .L43 430:Core/Src/main.c **** { 431:Core/Src/main.c **** Error_Handler(); 987 .loc 1 431 5 988 0086 FFF7FEFF bl Error_Handler 989 .L43: 432:Core/Src/main.c **** } 433:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */ 434:Core/Src/main.c **** 435:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */ 436:Core/Src/main.c **** 437:Core/Src/main.c **** } 990 .loc 1 437 1 991 008a 00BF nop ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 32 992 008c 1837 adds r7, r7, #24 993 .LCFI25: 994 .cfi_def_cfa_offset 8 995 008e BD46 mov sp, r7 996 .LCFI26: 997 .cfi_def_cfa_register 13 998 @ sp needed 999 0090 80BD pop {r7, pc} 1000 .L45: 1001 0092 00BF .align 2 1002 .L44: 1003 0094 00000000 .word htim3 1004 0098 00040040 .word 1073742848 1005 .cfi_endproc 1006 .LFE244: 1008 .section .text.MX_TIM4_Init,"ax",%progbits 1009 .align 1 1010 .syntax unified 1011 .thumb 1012 .thumb_func 1014 MX_TIM4_Init: 1015 .LFB245: 438:Core/Src/main.c **** 439:Core/Src/main.c **** /** 440:Core/Src/main.c **** * @brief TIM4 Initialization Function 441:Core/Src/main.c **** * @param None 442:Core/Src/main.c **** * @retval None 443:Core/Src/main.c **** */ 444:Core/Src/main.c **** static void MX_TIM4_Init(void) 445:Core/Src/main.c **** { 1016 .loc 1 445 1 1017 .cfi_startproc 1018 @ args = 0, pretend = 0, frame = 24 1019 @ frame_needed = 1, uses_anonymous_args = 0 1020 0000 80B5 push {r7, lr} 1021 .LCFI27: 1022 .cfi_def_cfa_offset 8 1023 .cfi_offset 7, -8 1024 .cfi_offset 14, -4 1025 0002 86B0 sub sp, sp, #24 1026 .LCFI28: 1027 .cfi_def_cfa_offset 32 1028 0004 00AF add r7, sp, #0 1029 .LCFI29: 1030 .cfi_def_cfa_register 7 446:Core/Src/main.c **** 447:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ 448:Core/Src/main.c **** 449:Core/Src/main.c **** /* USER CODE END TIM4_Init 0 */ 450:Core/Src/main.c **** 451:Core/Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 1031 .loc 1 451 26 1032 0006 07F10803 add r3, r7, #8 1033 000a 0022 movs r2, #0 1034 000c 1A60 str r2, [r3] 1035 000e 5A60 str r2, [r3, #4] 1036 0010 9A60 str r2, [r3, #8] ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 33 1037 0012 DA60 str r2, [r3, #12] 452:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 1038 .loc 1 452 27 1039 0014 3B46 mov r3, r7 1040 0016 0022 movs r2, #0 1041 0018 1A60 str r2, [r3] 1042 001a 5A60 str r2, [r3, #4] 453:Core/Src/main.c **** 454:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ 455:Core/Src/main.c **** 456:Core/Src/main.c **** /* USER CODE END TIM4_Init 1 */ 457:Core/Src/main.c **** htim4.Instance = TIM4; 1043 .loc 1 457 18 1044 001c 1D4B ldr r3, .L51 1045 001e 1E4A ldr r2, .L51+4 1046 0020 1A60 str r2, [r3] 458:Core/Src/main.c **** htim4.Init.Prescaler = 72-1; 1047 .loc 1 458 24 1048 0022 1C4B ldr r3, .L51 1049 0024 4722 movs r2, #71 1050 0026 5A60 str r2, [r3, #4] 459:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 1051 .loc 1 459 26 1052 0028 1A4B ldr r3, .L51 1053 002a 0022 movs r2, #0 1054 002c 9A60 str r2, [r3, #8] 460:Core/Src/main.c **** htim4.Init.Period = 7200-1; 1055 .loc 1 460 21 1056 002e 194B ldr r3, .L51 1057 0030 41F61F42 movw r2, #7199 1058 0034 DA60 str r2, [r3, #12] 461:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 1059 .loc 1 461 28 1060 0036 174B ldr r3, .L51 1061 0038 0022 movs r2, #0 1062 003a 1A61 str r2, [r3, #16] 462:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1063 .loc 1 462 32 1064 003c 154B ldr r3, .L51 1065 003e 0022 movs r2, #0 1066 0040 9A61 str r2, [r3, #24] 463:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 1067 .loc 1 463 7 1068 0042 1448 ldr r0, .L51 1069 0044 FFF7FEFF bl HAL_TIM_Base_Init 1070 0048 0346 mov r3, r0 1071 .loc 1 463 6 1072 004a 002B cmp r3, #0 1073 004c 01D0 beq .L47 464:Core/Src/main.c **** { 465:Core/Src/main.c **** Error_Handler(); 1074 .loc 1 465 5 1075 004e FFF7FEFF bl Error_Handler 1076 .L47: 466:Core/Src/main.c **** } 467:Core/Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 1077 .loc 1 467 34 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 34 1078 0052 4FF48053 mov r3, #4096 1079 0056 BB60 str r3, [r7, #8] 468:Core/Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 1080 .loc 1 468 7 1081 0058 07F10803 add r3, r7, #8 1082 005c 1946 mov r1, r3 1083 005e 0D48 ldr r0, .L51 1084 0060 FFF7FEFF bl HAL_TIM_ConfigClockSource 1085 0064 0346 mov r3, r0 1086 .loc 1 468 6 1087 0066 002B cmp r3, #0 1088 0068 01D0 beq .L48 469:Core/Src/main.c **** { 470:Core/Src/main.c **** Error_Handler(); 1089 .loc 1 470 5 1090 006a FFF7FEFF bl Error_Handler 1091 .L48: 471:Core/Src/main.c **** } 472:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 1092 .loc 1 472 37 1093 006e 0023 movs r3, #0 1094 0070 3B60 str r3, [r7] 473:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1095 .loc 1 473 33 1096 0072 0023 movs r3, #0 1097 0074 7B60 str r3, [r7, #4] 474:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 1098 .loc 1 474 7 1099 0076 3B46 mov r3, r7 1100 0078 1946 mov r1, r3 1101 007a 0648 ldr r0, .L51 1102 007c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 1103 0080 0346 mov r3, r0 1104 .loc 1 474 6 1105 0082 002B cmp r3, #0 1106 0084 01D0 beq .L50 475:Core/Src/main.c **** { 476:Core/Src/main.c **** Error_Handler(); 1107 .loc 1 476 5 1108 0086 FFF7FEFF bl Error_Handler 1109 .L50: 477:Core/Src/main.c **** } 478:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ 479:Core/Src/main.c **** 480:Core/Src/main.c **** /* USER CODE END TIM4_Init 2 */ 481:Core/Src/main.c **** 482:Core/Src/main.c **** } 1110 .loc 1 482 1 1111 008a 00BF nop 1112 008c 1837 adds r7, r7, #24 1113 .LCFI30: 1114 .cfi_def_cfa_offset 8 1115 008e BD46 mov sp, r7 1116 .LCFI31: 1117 .cfi_def_cfa_register 13 1118 @ sp needed 1119 0090 80BD pop {r7, pc} ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 35 1120 .L52: 1121 0092 00BF .align 2 1122 .L51: 1123 0094 00000000 .word htim4 1124 0098 00080040 .word 1073743872 1125 .cfi_endproc 1126 .LFE245: 1128 .section .text.MX_USART1_UART_Init,"ax",%progbits 1129 .align 1 1130 .syntax unified 1131 .thumb 1132 .thumb_func 1134 MX_USART1_UART_Init: 1135 .LFB246: 483:Core/Src/main.c **** 484:Core/Src/main.c **** /** 485:Core/Src/main.c **** * @brief USART1 Initialization Function 486:Core/Src/main.c **** * @param None 487:Core/Src/main.c **** * @retval None 488:Core/Src/main.c **** */ 489:Core/Src/main.c **** static void MX_USART1_UART_Init(void) 490:Core/Src/main.c **** { 1136 .loc 1 490 1 1137 .cfi_startproc 1138 @ args = 0, pretend = 0, frame = 0 1139 @ frame_needed = 1, uses_anonymous_args = 0 1140 0000 80B5 push {r7, lr} 1141 .LCFI32: 1142 .cfi_def_cfa_offset 8 1143 .cfi_offset 7, -8 1144 .cfi_offset 14, -4 1145 0002 00AF add r7, sp, #0 1146 .LCFI33: 1147 .cfi_def_cfa_register 7 491:Core/Src/main.c **** 492:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ 493:Core/Src/main.c **** 494:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */ 495:Core/Src/main.c **** 496:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ 497:Core/Src/main.c **** 498:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */ 499:Core/Src/main.c **** huart1.Instance = USART1; 1148 .loc 1 499 19 1149 0004 114B ldr r3, .L56 1150 0006 124A ldr r2, .L56+4 1151 0008 1A60 str r2, [r3] 500:Core/Src/main.c **** huart1.Init.BaudRate = 115200; 1152 .loc 1 500 24 1153 000a 104B ldr r3, .L56 1154 000c 4FF4E132 mov r2, #115200 1155 0010 5A60 str r2, [r3, #4] 501:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 1156 .loc 1 501 26 1157 0012 0E4B ldr r3, .L56 1158 0014 0022 movs r2, #0 1159 0016 9A60 str r2, [r3, #8] ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 36 502:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 1160 .loc 1 502 24 1161 0018 0C4B ldr r3, .L56 1162 001a 0022 movs r2, #0 1163 001c DA60 str r2, [r3, #12] 503:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 1164 .loc 1 503 22 1165 001e 0B4B ldr r3, .L56 1166 0020 0022 movs r2, #0 1167 0022 1A61 str r2, [r3, #16] 504:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 1168 .loc 1 504 20 1169 0024 094B ldr r3, .L56 1170 0026 0C22 movs r2, #12 1171 0028 5A61 str r2, [r3, #20] 505:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 1172 .loc 1 505 25 1173 002a 084B ldr r3, .L56 1174 002c 0022 movs r2, #0 1175 002e 9A61 str r2, [r3, #24] 506:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 1176 .loc 1 506 28 1177 0030 064B ldr r3, .L56 1178 0032 0022 movs r2, #0 1179 0034 DA61 str r2, [r3, #28] 507:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK) 1180 .loc 1 507 7 1181 0036 0548 ldr r0, .L56 1182 0038 FFF7FEFF bl HAL_UART_Init 1183 003c 0346 mov r3, r0 1184 .loc 1 507 6 1185 003e 002B cmp r3, #0 1186 0040 01D0 beq .L55 508:Core/Src/main.c **** { 509:Core/Src/main.c **** Error_Handler(); 1187 .loc 1 509 5 1188 0042 FFF7FEFF bl Error_Handler 1189 .L55: 510:Core/Src/main.c **** } 511:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ 512:Core/Src/main.c **** 513:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */ 514:Core/Src/main.c **** 515:Core/Src/main.c **** } 1190 .loc 1 515 1 1191 0046 00BF nop 1192 0048 80BD pop {r7, pc} 1193 .L57: 1194 004a 00BF .align 2 1195 .L56: 1196 004c 00000000 .word huart1 1197 0050 00100140 .word 1073811456 1198 .cfi_endproc 1199 .LFE246: 1201 .section .text.MX_DMA_Init,"ax",%progbits 1202 .align 1 1203 .syntax unified ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 37 1204 .thumb 1205 .thumb_func 1207 MX_DMA_Init: 1208 .LFB247: 516:Core/Src/main.c **** 517:Core/Src/main.c **** /** 518:Core/Src/main.c **** * Enable DMA controller clock 519:Core/Src/main.c **** */ 520:Core/Src/main.c **** static void MX_DMA_Init(void) 521:Core/Src/main.c **** { 1209 .loc 1 521 1 1210 .cfi_startproc 1211 @ args = 0, pretend = 0, frame = 8 1212 @ frame_needed = 1, uses_anonymous_args = 0 1213 0000 80B5 push {r7, lr} 1214 .LCFI34: 1215 .cfi_def_cfa_offset 8 1216 .cfi_offset 7, -8 1217 .cfi_offset 14, -4 1218 0002 82B0 sub sp, sp, #8 1219 .LCFI35: 1220 .cfi_def_cfa_offset 16 1221 0004 00AF add r7, sp, #0 1222 .LCFI36: 1223 .cfi_def_cfa_register 7 1224 .LBB18: 522:Core/Src/main.c **** 523:Core/Src/main.c **** /* DMA controller clock enable */ 524:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 1225 .loc 1 524 3 1226 0006 0023 movs r3, #0 1227 0008 7B60 str r3, [r7, #4] 1228 000a 104B ldr r3, .L59 1229 000c 1B6B ldr r3, [r3, #48] 1230 000e 0F4A ldr r2, .L59 1231 0010 43F48003 orr r3, r3, #4194304 1232 0014 1363 str r3, [r2, #48] 1233 0016 0D4B ldr r3, .L59 1234 0018 1B6B ldr r3, [r3, #48] 1235 001a 03F48003 and r3, r3, #4194304 1236 001e 7B60 str r3, [r7, #4] 1237 0020 7B68 ldr r3, [r7, #4] 1238 .LBE18: 525:Core/Src/main.c **** 526:Core/Src/main.c **** /* DMA interrupt init */ 527:Core/Src/main.c **** /* DMA2_Stream2_IRQn interrupt configuration */ 528:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); 1239 .loc 1 528 3 1240 0022 0022 movs r2, #0 1241 0024 0021 movs r1, #0 1242 0026 3A20 movs r0, #58 1243 0028 FFF7FEFF bl HAL_NVIC_SetPriority 529:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); 1244 .loc 1 529 3 1245 002c 3A20 movs r0, #58 1246 002e FFF7FEFF bl HAL_NVIC_EnableIRQ 530:Core/Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 38 531:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); 1247 .loc 1 531 3 1248 0032 0022 movs r2, #0 1249 0034 0021 movs r1, #0 1250 0036 4620 movs r0, #70 1251 0038 FFF7FEFF bl HAL_NVIC_SetPriority 532:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); 1252 .loc 1 532 3 1253 003c 4620 movs r0, #70 1254 003e FFF7FEFF bl HAL_NVIC_EnableIRQ 533:Core/Src/main.c **** 534:Core/Src/main.c **** } 1255 .loc 1 534 1 1256 0042 00BF nop 1257 0044 0837 adds r7, r7, #8 1258 .LCFI37: 1259 .cfi_def_cfa_offset 8 1260 0046 BD46 mov sp, r7 1261 .LCFI38: 1262 .cfi_def_cfa_register 13 1263 @ sp needed 1264 0048 80BD pop {r7, pc} 1265 .L60: 1266 004a 00BF .align 2 1267 .L59: 1268 004c 00380240 .word 1073887232 1269 .cfi_endproc 1270 .LFE247: 1272 .section .text.MX_GPIO_Init,"ax",%progbits 1273 .align 1 1274 .syntax unified 1275 .thumb 1276 .thumb_func 1278 MX_GPIO_Init: 1279 .LFB248: 535:Core/Src/main.c **** 536:Core/Src/main.c **** /** 537:Core/Src/main.c **** * @brief GPIO Initialization Function 538:Core/Src/main.c **** * @param None 539:Core/Src/main.c **** * @retval None 540:Core/Src/main.c **** */ 541:Core/Src/main.c **** static void MX_GPIO_Init(void) 542:Core/Src/main.c **** { 1280 .loc 1 542 1 1281 .cfi_startproc 1282 @ args = 0, pretend = 0, frame = 40 1283 @ frame_needed = 1, uses_anonymous_args = 0 1284 0000 80B5 push {r7, lr} 1285 .LCFI39: 1286 .cfi_def_cfa_offset 8 1287 .cfi_offset 7, -8 1288 .cfi_offset 14, -4 1289 0002 8AB0 sub sp, sp, #40 1290 .LCFI40: 1291 .cfi_def_cfa_offset 48 1292 0004 00AF add r7, sp, #0 1293 .LCFI41: ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 39 1294 .cfi_def_cfa_register 7 543:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 1295 .loc 1 543 20 1296 0006 07F11403 add r3, r7, #20 1297 000a 0022 movs r2, #0 1298 000c 1A60 str r2, [r3] 1299 000e 5A60 str r2, [r3, #4] 1300 0010 9A60 str r2, [r3, #8] 1301 0012 DA60 str r2, [r3, #12] 1302 0014 1A61 str r2, [r3, #16] 1303 .LBB19: 544:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ 545:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 546:Core/Src/main.c **** 547:Core/Src/main.c **** /* GPIO Ports Clock Enable */ 548:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); 1304 .loc 1 548 3 1305 0016 0023 movs r3, #0 1306 0018 3B61 str r3, [r7, #16] 1307 001a 4B4B ldr r3, .L62 1308 001c 1B6B ldr r3, [r3, #48] 1309 001e 4A4A ldr r2, .L62 1310 0020 43F08003 orr r3, r3, #128 1311 0024 1363 str r3, [r2, #48] 1312 0026 484B ldr r3, .L62 1313 0028 1B6B ldr r3, [r3, #48] 1314 002a 03F08003 and r3, r3, #128 1315 002e 3B61 str r3, [r7, #16] 1316 0030 3B69 ldr r3, [r7, #16] 1317 .LBE19: 1318 .LBB20: 549:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 1319 .loc 1 549 3 1320 0032 0023 movs r3, #0 1321 0034 FB60 str r3, [r7, #12] 1322 0036 444B ldr r3, .L62 1323 0038 1B6B ldr r3, [r3, #48] 1324 003a 434A ldr r2, .L62 1325 003c 43F00403 orr r3, r3, #4 1326 0040 1363 str r3, [r2, #48] 1327 0042 414B ldr r3, .L62 1328 0044 1B6B ldr r3, [r3, #48] 1329 0046 03F00403 and r3, r3, #4 1330 004a FB60 str r3, [r7, #12] 1331 004c FB68 ldr r3, [r7, #12] 1332 .LBE20: 1333 .LBB21: 550:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 1334 .loc 1 550 3 1335 004e 0023 movs r3, #0 1336 0050 BB60 str r3, [r7, #8] 1337 0052 3D4B ldr r3, .L62 1338 0054 1B6B ldr r3, [r3, #48] 1339 0056 3C4A ldr r2, .L62 1340 0058 43F00103 orr r3, r3, #1 1341 005c 1363 str r3, [r2, #48] 1342 005e 3A4B ldr r3, .L62 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 40 1343 0060 1B6B ldr r3, [r3, #48] 1344 0062 03F00103 and r3, r3, #1 1345 0066 BB60 str r3, [r7, #8] 1346 0068 BB68 ldr r3, [r7, #8] 1347 .LBE21: 1348 .LBB22: 551:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 1349 .loc 1 551 3 1350 006a 0023 movs r3, #0 1351 006c 7B60 str r3, [r7, #4] 1352 006e 364B ldr r3, .L62 1353 0070 1B6B ldr r3, [r3, #48] 1354 0072 354A ldr r2, .L62 1355 0074 43F00203 orr r3, r3, #2 1356 0078 1363 str r3, [r2, #48] 1357 007a 334B ldr r3, .L62 1358 007c 1B6B ldr r3, [r3, #48] 1359 007e 03F00203 and r3, r3, #2 1360 0082 7B60 str r3, [r7, #4] 1361 0084 7B68 ldr r3, [r7, #4] 1362 .LBE22: 552:Core/Src/main.c **** 553:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 554:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, C0_CAN1_ENABLE_Pin|C9_CAN2_ENABLE_Pin, GPIO_PIN_RESET); 1363 .loc 1 554 3 1364 0086 0022 movs r2, #0 1365 0088 40F20121 movw r1, #513 1366 008c 2F48 ldr r0, .L62+4 1367 008e FFF7FEFF bl HAL_GPIO_WritePin 555:Core/Src/main.c **** 556:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, C10_LED_B_Pin|C11_LED_R_Pin|C10_LED_G_Pin, GPIO_PIN_SET); 1368 .loc 1 556 3 1369 0092 0122 movs r2, #1 1370 0094 4FF4E051 mov r1, #7168 1371 0098 2C48 ldr r0, .L62+4 1372 009a FFF7FEFF bl HAL_GPIO_WritePin 557:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 558:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_6 1373 .loc 1 558 3 1374 009e 0022 movs r2, #0 1375 00a0 C721 movs r1, #199 1376 00a2 2B48 ldr r0, .L62+8 1377 00a4 FFF7FEFF bl HAL_GPIO_WritePin 559:Core/Src/main.c **** |GPIO_PIN_7, GPIO_PIN_RESET); 560:Core/Src/main.c **** 561:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 562:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET); 1378 .loc 1 562 3 1379 00a8 0022 movs r2, #0 1380 00aa C021 movs r1, #192 1381 00ac 2948 ldr r0, .L62+12 1382 00ae FFF7FEFF bl HAL_GPIO_WritePin 563:Core/Src/main.c **** 564:Core/Src/main.c **** /*Configure GPIO pins : C0_CAN1_ENABLE_Pin C9_CAN2_ENABLE_Pin C10_LED_B_Pin C11_LED_R_Pin 565:Core/Src/main.c **** C10_LED_G_Pin */ 566:Core/Src/main.c **** GPIO_InitStruct.Pin = C0_CAN1_ENABLE_Pin|C9_CAN2_ENABLE_Pin|C10_LED_B_Pin|C11_LED_R_Pin 1383 .loc 1 566 23 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 41 1384 00b2 41F60163 movw r3, #7681 1385 00b6 7B61 str r3, [r7, #20] 567:Core/Src/main.c **** |C10_LED_G_Pin; 568:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 1386 .loc 1 568 24 1387 00b8 0123 movs r3, #1 1388 00ba BB61 str r3, [r7, #24] 569:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1389 .loc 1 569 24 1390 00bc 0023 movs r3, #0 1391 00be FB61 str r3, [r7, #28] 570:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1392 .loc 1 570 25 1393 00c0 0023 movs r3, #0 1394 00c2 3B62 str r3, [r7, #32] 571:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 1395 .loc 1 571 3 1396 00c4 07F11403 add r3, r7, #20 1397 00c8 1946 mov r1, r3 1398 00ca 2048 ldr r0, .L62+4 1399 00cc FFF7FEFF bl HAL_GPIO_Init 572:Core/Src/main.c **** 573:Core/Src/main.c **** /*Configure GPIO pins : PA0 PA1 PA2 PA6 574:Core/Src/main.c **** PA7 */ 575:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_6 1400 .loc 1 575 23 1401 00d0 C723 movs r3, #199 1402 00d2 7B61 str r3, [r7, #20] 576:Core/Src/main.c **** |GPIO_PIN_7; 577:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 1403 .loc 1 577 24 1404 00d4 0123 movs r3, #1 1405 00d6 BB61 str r3, [r7, #24] 578:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1406 .loc 1 578 24 1407 00d8 0023 movs r3, #0 1408 00da FB61 str r3, [r7, #28] 579:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1409 .loc 1 579 25 1410 00dc 0023 movs r3, #0 1411 00de 3B62 str r3, [r7, #32] 580:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1412 .loc 1 580 3 1413 00e0 07F11403 add r3, r7, #20 1414 00e4 1946 mov r1, r3 1415 00e6 1A48 ldr r0, .L62+8 1416 00e8 FFF7FEFF bl HAL_GPIO_Init 581:Core/Src/main.c **** 582:Core/Src/main.c **** /*Configure GPIO pin : A8_LIQUID_Pin */ 583:Core/Src/main.c **** GPIO_InitStruct.Pin = A8_LIQUID_Pin; 1417 .loc 1 583 23 1418 00ec 4FF48073 mov r3, #256 1419 00f0 7B61 str r3, [r7, #20] 584:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 1420 .loc 1 584 24 1421 00f2 0023 movs r3, #0 1422 00f4 BB61 str r3, [r7, #24] ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 42 585:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1423 .loc 1 585 24 1424 00f6 0023 movs r3, #0 1425 00f8 FB61 str r3, [r7, #28] 586:Core/Src/main.c **** HAL_GPIO_Init(A8_LIQUID_GPIO_Port, &GPIO_InitStruct); 1426 .loc 1 586 3 1427 00fa 07F11403 add r3, r7, #20 1428 00fe 1946 mov r1, r3 1429 0100 1348 ldr r0, .L62+8 1430 0102 FFF7FEFF bl HAL_GPIO_Init 587:Core/Src/main.c **** 588:Core/Src/main.c **** /*Configure GPIO pins : PB6 PB7 */ 589:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 1431 .loc 1 589 23 1432 0106 C023 movs r3, #192 1433 0108 7B61 str r3, [r7, #20] 590:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 1434 .loc 1 590 24 1435 010a 0123 movs r3, #1 1436 010c BB61 str r3, [r7, #24] 591:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1437 .loc 1 591 24 1438 010e 0023 movs r3, #0 1439 0110 FB61 str r3, [r7, #28] 592:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1440 .loc 1 592 25 1441 0112 0023 movs r3, #0 1442 0114 3B62 str r3, [r7, #32] 593:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1443 .loc 1 593 3 1444 0116 07F11403 add r3, r7, #20 1445 011a 1946 mov r1, r3 1446 011c 0D48 ldr r0, .L62+12 1447 011e FFF7FEFF bl HAL_GPIO_Init 594:Core/Src/main.c **** 595:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1, GPIO_PIN_RESET); //离心 1448 .loc 1 595 3 1449 0122 0022 movs r2, #0 1450 0124 0321 movs r1, #3 1451 0126 0A48 ldr r0, .L62+8 1452 0128 FFF7FEFF bl HAL_GPIO_WritePin 596:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET); //离心 1453 .loc 1 596 3 1454 012c 0022 movs r2, #0 1455 012e C021 movs r1, #192 1456 0130 0748 ldr r0, .L62+8 1457 0132 FFF7FEFF bl HAL_GPIO_WritePin 597:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET); //离心 1458 .loc 1 597 3 1459 0136 0022 movs r2, #0 1460 0138 C021 movs r1, #192 1461 013a 0648 ldr r0, .L62+12 1462 013c FFF7FEFF bl HAL_GPIO_WritePin 598:Core/Src/main.c **** 599:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ 600:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ 601:Core/Src/main.c **** } ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 43 1463 .loc 1 601 1 1464 0140 00BF nop 1465 0142 2837 adds r7, r7, #40 1466 .LCFI42: 1467 .cfi_def_cfa_offset 8 1468 0144 BD46 mov sp, r7 1469 .LCFI43: 1470 .cfi_def_cfa_register 13 1471 @ sp needed 1472 0146 80BD pop {r7, pc} 1473 .L63: 1474 .align 2 1475 .L62: 1476 0148 00380240 .word 1073887232 1477 014c 00080240 .word 1073874944 1478 0150 00000240 .word 1073872896 1479 0154 00040240 .word 1073873920 1480 .cfi_endproc 1481 .LFE248: 1483 .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits 1484 .align 1 1485 .global HAL_TIM_PeriodElapsedCallback 1486 .syntax unified 1487 .thumb 1488 .thumb_func 1490 HAL_TIM_PeriodElapsedCallback: 1491 .LFB249: 602:Core/Src/main.c **** 603:Core/Src/main.c **** /* USER CODE BEGIN 4 */ 604:Core/Src/main.c **** 605:Core/Src/main.c **** /* USER CODE END 4 */ 606:Core/Src/main.c **** 607:Core/Src/main.c **** /** 608:Core/Src/main.c **** * @brief Period elapsed callback in non blocking mode 609:Core/Src/main.c **** * @note This function is called when TIM9 interrupt took place, inside 610:Core/Src/main.c **** * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 611:Core/Src/main.c **** * a global variable "uwTick" used as application time base. 612:Core/Src/main.c **** * @param htim : TIM handle 613:Core/Src/main.c **** * @retval None 614:Core/Src/main.c **** */ 615:Core/Src/main.c **** void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 616:Core/Src/main.c **** { 1492 .loc 1 616 1 1493 .cfi_startproc 1494 @ args = 0, pretend = 0, frame = 8 1495 @ frame_needed = 1, uses_anonymous_args = 0 1496 0000 80B5 push {r7, lr} 1497 .LCFI44: 1498 .cfi_def_cfa_offset 8 1499 .cfi_offset 7, -8 1500 .cfi_offset 14, -4 1501 0002 82B0 sub sp, sp, #8 1502 .LCFI45: 1503 .cfi_def_cfa_offset 16 1504 0004 00AF add r7, sp, #0 1505 .LCFI46: 1506 .cfi_def_cfa_register 7 ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 44 1507 0006 7860 str r0, [r7, #4] 617:Core/Src/main.c **** /* USER CODE BEGIN Callback 0 */ 618:Core/Src/main.c **** 619:Core/Src/main.c **** /* USER CODE END Callback 0 */ 620:Core/Src/main.c **** if (htim->Instance == TIM9) { 1508 .loc 1 620 11 1509 0008 7B68 ldr r3, [r7, #4] 1510 000a 1B68 ldr r3, [r3] 1511 .loc 1 620 6 1512 000c 044A ldr r2, .L67 1513 000e 9342 cmp r3, r2 1514 0010 01D1 bne .L66 621:Core/Src/main.c **** HAL_IncTick(); 1515 .loc 1 621 5 1516 0012 FFF7FEFF bl HAL_IncTick 1517 .L66: 622:Core/Src/main.c **** } 623:Core/Src/main.c **** /* USER CODE BEGIN Callback 1 */ 624:Core/Src/main.c **** 625:Core/Src/main.c **** /* USER CODE END Callback 1 */ 626:Core/Src/main.c **** } 1518 .loc 1 626 1 1519 0016 00BF nop 1520 0018 0837 adds r7, r7, #8 1521 .LCFI47: 1522 .cfi_def_cfa_offset 8 1523 001a BD46 mov sp, r7 1524 .LCFI48: 1525 .cfi_def_cfa_register 13 1526 @ sp needed 1527 001c 80BD pop {r7, pc} 1528 .L68: 1529 001e 00BF .align 2 1530 .L67: 1531 0020 00400140 .word 1073823744 1532 .cfi_endproc 1533 .LFE249: 1535 .section .text.Error_Handler,"ax",%progbits 1536 .align 1 1537 .global Error_Handler 1538 .syntax unified 1539 .thumb 1540 .thumb_func 1542 Error_Handler: 1543 .LFB250: 627:Core/Src/main.c **** 628:Core/Src/main.c **** /** 629:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. 630:Core/Src/main.c **** * @retval None 631:Core/Src/main.c **** */ 632:Core/Src/main.c **** void Error_Handler(void) 633:Core/Src/main.c **** { 1544 .loc 1 633 1 1545 .cfi_startproc 1546 @ args = 0, pretend = 0, frame = 0 1547 @ frame_needed = 1, uses_anonymous_args = 0 1548 @ link register save eliminated. ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 45 1549 0000 80B4 push {r7} 1550 .LCFI49: 1551 .cfi_def_cfa_offset 4 1552 .cfi_offset 7, -4 1553 0002 00AF add r7, sp, #0 1554 .LCFI50: 1555 .cfi_def_cfa_register 7 1556 .LBB23: 1557 .LBB24: 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1558 .loc 2 142 3 1559 .syntax unified 1560 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1561 0004 72B6 cpsid i 1562 @ 0 "" 2 143:Drivers/CMSIS/Include/cmsis_gcc.h **** 1563 .loc 2 143 1 1564 .thumb 1565 .syntax unified 1566 0006 00BF nop 1567 .L70: 1568 .LBE24: 1569 .LBE23: 634:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ 635:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ 636:Core/Src/main.c **** __disable_irq(); 637:Core/Src/main.c **** while (1) 1570 .loc 1 637 9 discriminator 1 1571 0008 FEE7 b .L70 1572 .cfi_endproc 1573 .LFE250: 1575 .text 1576 .Letext0: 1577 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 1578 .file 4 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 1579 .file 5 "Drivers/CMSIS/Include/core_cm4.h" 1580 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h" 1581 .file 7 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 1582 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 1583 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" 1584 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" 1585 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 1586 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 1587 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" 1588 .file 14 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h" 1589 .file 15 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h" 1590 .file 16 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" 1591 .file 17 "Core/Inc/soft_uart.h" ARM GAS C:\Users\10728\AppData\Local\Temp\cclOsj9d.s page 46 DEFINED SYMBOLS *ABS*:00000000 main.c C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:24 .bss.hadc1:00000000 hadc1 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:21 .bss.hadc1:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:31 .bss.hcan1:00000000 hcan1 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:28 .bss.hcan1:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:38 .bss.hcan2:00000000 hcan2 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:35 .bss.hcan2:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:45 .bss.htim2:00000000 htim2 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:42 .bss.htim2:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:52 .bss.htim3:00000000 htim3 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:49 .bss.htim3:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:59 .bss.htim4:00000000 htim4 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:56 .bss.htim4:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:66 .bss.huart1:00000000 huart1 C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:63 .bss.huart1:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:73 .bss.hdma_usart1_rx:00000000 hdma_usart1_rx C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:70 .bss.hdma_usart1_rx:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:80 .bss.hdma_usart1_tx:00000000 hdma_usart1_tx C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:77 .bss.hdma_usart1_tx:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:87 .bss.update_flag:00000000 update_flag C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:84 .bss.update_flag:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:94 .bss.led_time:00000000 led_time C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:91 .bss.led_time:00000000 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:97 .text.main:00000000 $t C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:103 .text.main:00000000 main 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HAL_TIM_PeriodElapsedCallback C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1531 .text.HAL_TIM_PeriodElapsedCallback:00000020 $d C:\Users\10728\AppData\Local\Temp\cclOsj9d.s:1536 .text.Error_Handler:00000000 $t UNDEFINED SYMBOLS HAL_Init HAL_UART_Receive_DMA flash_read_updata_flag update_function HAL_DeInit HAL_RCC_DeInit HAL_GetTick HAL_GPIO_TogglePin FMU_uart_buf update_complete memset HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_ADC_Init HAL_ADC_ConfigChannel HAL_CAN_Init HAL_TIM_Base_Init HAL_TIM_ConfigClockSource HAL_TIMEx_MasterConfigSynchronization HAL_UART_Init HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_GPIO_WritePin HAL_GPIO_Init HAL_IncTick