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
  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [board2\board2.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image board2\board2.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 6230001: Last Updated: Thu Feb 26 10:48:38 2026
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        624 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. __rt_entry_main &rArr; main &rArr; MX_ADC1_Init &rArr; HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[6]">SecureFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">SecureFault_Handler</a><BR>
    15. 

  15.  <LI><a href="#[4f]">ADC2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4f]">ADC2_IRQHandler</a><BR>
    16. 

  16. </UL>
    17. 

  17. <P>
    18. 

  18. <H3>
    19. 

  19. Function Pointers
    20. 

  20. </H3><UL>
    21. 

  21.  <LI><a href="#[2f]">ADC1_IRQHandler</a> from stm32h5xx_it.o(.text.ADC1_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    22. 

  22.  <LI><a href="#[4f]">ADC2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    23. 

  23.  <LI><a href="#[75]">ADC_DMAConvCplt</a> from stm32h5xx_hal_adc.o(.text.ADC_DMAConvCplt) referenced 2 times from stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    24. 

  24.  <LI><a href="#[77]">ADC_DMAError</a> from stm32h5xx_hal_adc.o(.text.ADC_DMAError) referenced 2 times from stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    25. 

  25.  <LI><a href="#[76]">ADC_DMAHalfConvCplt</a> from stm32h5xx_hal_adc.o(.text.ADC_DMAHalfConvCplt) referenced 2 times from stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    26. 

  26.  <LI><a href="#[4]">BusFault_Handler</a> from stm32h5xx_it.o(.text.BusFault_Handler) referenced from startup_stm32h523xx.o(RESET)
    27. 

  27.  <LI><a href="#[6d]">CEC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    28. 

  28.  <LI><a href="#[53]">CRS_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    29. 

  29.  <LI><a href="#[30]">DAC1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    30. 

  30.  <LI><a href="#[66]">DCACHE1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    31. 

  31.  <LI><a href="#[67]">DCMI_PSSI_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    32. 

  32.  <LI><a href="#[6a]">DTS_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    33. 

  33.  <LI><a href="#[8]">DebugMon_Handler</a> from stm32h5xx_it.o(.text.DebugMon_Handler) referenced from startup_stm32h523xx.o(RESET)
    34. 

  34.  <LI><a href="#[16]">EXTI0_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    35. 

  35.  <LI><a href="#[20]">EXTI10_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    36. 

  36.  <LI><a href="#[21]">EXTI11_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    37. 

  37.  <LI><a href="#[22]">EXTI12_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    38. 

  38.  <LI><a href="#[23]">EXTI13_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    39. 

  39.  <LI><a href="#[24]">EXTI14_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    40. 

  40.  <LI><a href="#[25]">EXTI15_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    41. 

  41.  <LI><a href="#[17]">EXTI1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    42. 

  42.  <LI><a href="#[18]">EXTI2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    43. 

  43.  <LI><a href="#[19]">EXTI3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    44. 

  44.  <LI><a href="#[1a]">EXTI4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    45. 

  45.  <LI><a href="#[1b]">EXTI5_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    46. 

  46.  <LI><a href="#[1c]">EXTI6_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    47. 

  47.  <LI><a href="#[1d]">EXTI7_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    48. 

  48.  <LI><a href="#[1e]">EXTI8_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    49. 

  49.  <LI><a href="#[1f]">EXTI9_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    50. 

  50.  <LI><a href="#[31]">FDCAN1_IT0_IRQHandler</a> from stm32h5xx_it.o(.text.FDCAN1_IT0_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    51. 

  51.  <LI><a href="#[32]">FDCAN1_IT1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    52. 

  52.  <LI><a href="#[68]">FDCAN2_IT0_IRQHandler</a> from stm32h5xx_it.o(.text.FDCAN2_IT0_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    53. 

  53.  <LI><a href="#[69]">FDCAN2_IT1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    54. 

  54.  <LI><a href="#[11]">FLASH_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    55. 

  55.  <LI><a href="#[12]">FLASH_S_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    56. 

  56.  <LI><a href="#[55]">FMC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    57. 

  57.  <LI><a href="#[64]">FPU_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    58. 

  58.  <LI><a href="#[7b]">Filter_Init</a> from weight_read.o(.text.Filter_Init) referenced from weight_read.o(.data.__ops)
    59. 

  59.  <LI><a href="#[26]">GPDMA1_Channel0_IRQHandler</a> from stm32h5xx_it.o(.text.GPDMA1_Channel0_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    60. 

  60.  <LI><a href="#[27]">GPDMA1_Channel1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    61. 

  61.  <LI><a href="#[28]">GPDMA1_Channel2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    62. 

  62.  <LI><a href="#[29]">GPDMA1_Channel3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    63. 

  63.  <LI><a href="#[2a]">GPDMA1_Channel4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    64. 

  64.  <LI><a href="#[2b]">GPDMA1_Channel5_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    65. 

  65.  <LI><a href="#[2c]">GPDMA1_Channel6_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    66. 

  66.  <LI><a href="#[2d]">GPDMA1_Channel7_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    67. 

  67.  <LI><a href="#[5c]">GPDMA2_Channel0_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    68. 

  68.  <LI><a href="#[5d]">GPDMA2_Channel1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    69. 

  69.  <LI><a href="#[5e]">GPDMA2_Channel2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    70. 

  70.  <LI><a href="#[5f]">GPDMA2_Channel3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    71. 

  71.  <LI><a href="#[60]">GPDMA2_Channel4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    72. 

  72.  <LI><a href="#[61]">GPDMA2_Channel5_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    73. 

  73.  <LI><a href="#[62]">GPDMA2_Channel6_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    74. 

  74.  <LI><a href="#[63]">GPDMA2_Channel7_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    75. 

  75.  <LI><a href="#[13]">GTZC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    76. 

  76.  <LI><a href="#[79]">Get_All_GrossWeight</a> from weight_read.o(.text.Get_All_GrossWeight) referenced from weight_read.o(.data.__ops)
    77. 

  77.  <LI><a href="#[78]">Get_Weight</a> from weight_read.o(.text.Get_Weight) referenced from weight_read.o(.data.__ops)
    78. 

  78.  <LI><a href="#[6c]">HASH_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    79. 

  79.  <LI><a href="#[2]">HardFault_Handler</a> from stm32h5xx_it.o(.text.HardFault_Handler) referenced from startup_stm32h523xx.o(RESET)
    80. 

  80.  <LI><a href="#[3e]">I2C1_ER_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    81. 

  81.  <LI><a href="#[3d]">I2C1_EV_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    82. 

  82.  <LI><a href="#[40]">I2C2_ER_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    83. 

  83.  <LI><a href="#[3f]">I2C2_EV_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    84. 

  84.  <LI><a href="#[59]">I2C3_ER_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    85. 

  85.  <LI><a href="#[58]">I2C3_EV_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    86. 

  86.  <LI><a href="#[70]">I3C1_ER_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    87. 

  87.  <LI><a href="#[6f]">I3C1_EV_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    88. 

  88.  <LI><a href="#[72]">I3C2_ER_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    89. 

  89.  <LI><a href="#[71]">I3C2_EV_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    90. 

  90.  <LI><a href="#[65]">ICACHE_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    91. 

  91.  <LI><a href="#[2e]">IWDG_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    92. 

  92.  <LI><a href="#[4a]">LPTIM1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    93. 

  93.  <LI><a href="#[50]">LPTIM2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    94. 

  94.  <LI><a href="#[49]">LPUART1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    95. 

  95.  <LI><a href="#[3]">MemManage_Handler</a> from stm32h5xx_it.o(.text.MemManage_Handler) referenced from startup_stm32h523xx.o(RESET)
    96. 

  96.  <LI><a href="#[1]">NMI_Handler</a> from stm32h5xx_it.o(.text.NMI_Handler) referenced from startup_stm32h523xx.o(RESET)
    97. 

  97.  <LI><a href="#[56]">OCTOSPI1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    98. 

  98.  <LI><a href="#[c]">PVD_AVD_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    99. 

  99.  <LI><a href="#[9]">PendSV_Handler</a> from stm32h5xx_it.o(.text.PendSV_Handler) referenced from startup_stm32h523xx.o(RESET)
    100. 

  100.  <LI><a href="#[7a]">Processing_Data</a> from weight_read.o(.text.Processing_Data) referenced from weight_read.o(.data.__ops)
    101. 

  101.  <LI><a href="#[10]">RAMCFG_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    102. 

  102.  <LI><a href="#[14]">RCC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    103. 

  103.  <LI><a href="#[15]">RCC_S_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    104. 

  104.  <LI><a href="#[6b]">RNG_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    105. 

  105.  <LI><a href="#[d]">RTC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    106. 

  106.  <LI><a href="#[e]">RTC_S_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    107. 

  107.  <LI><a href="#[7f]">Read_Value</a> from weight_read.o(.text.Read_Value) referenced from weight_read.o(.data.read)
    108. 

  108.  <LI><a href="#[0]">Reset_Handler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    109. 

  109.  <LI><a href="#[57]">SDMMC1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    110. 

  110.  <LI><a href="#[41]">SPI1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    111. 

  111.  <LI><a href="#[42]">SPI2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    112. 

  112.  <LI><a href="#[43]">SPI3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    113. 

  113.  <LI><a href="#[5a]">SPI4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    114. 

  114.  <LI><a href="#[7]">SVC_Handler</a> from stm32h5xx_it.o(.text.SVC_Handler) referenced from startup_stm32h523xx.o(RESET)
    115. 

  115.  <LI><a href="#[6]">SecureFault_Handler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    116. 

  116.  <LI><a href="#[a]">SysTick_Handler</a> from stm32h5xx_it.o(.text.SysTick_Handler) referenced from startup_stm32h523xx.o(RESET)
    117. 

  117.  <LI><a href="#[73]">SystemInit</a> from system_stm32h5xx.o(.text.SystemInit) referenced from startup_stm32h523xx.o(.text)
    118. 

  118.  <LI><a href="#[f]">TAMP_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    119. 

  119.  <LI><a href="#[6e]">TIM12_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    120. 

  120.  <LI><a href="#[51]">TIM15_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    121. 

  121.  <LI><a href="#[33]">TIM1_BRK_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    122. 

  122.  <LI><a href="#[36]">TIM1_CC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    123. 

  123.  <LI><a href="#[35]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    124. 

  124.  <LI><a href="#[34]">TIM1_UP_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    125. 

  125.  <LI><a href="#[37]">TIM2_IRQHandler</a> from stm32h5xx_it.o(.text.TIM2_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    126. 

  126.  <LI><a href="#[38]">TIM3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    127. 

  127.  <LI><a href="#[39]">TIM4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    128. 

  128.  <LI><a href="#[3a]">TIM5_IRQHandler</a> from stm32h5xx_it.o(.text.TIM5_IRQHandler) referenced from startup_stm32h523xx.o(RESET)
    129. 

  129.  <LI><a href="#[3b]">TIM6_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    130. 

  130.  <LI><a href="#[3c]">TIM7_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    131. 

  131.  <LI><a href="#[4b]">TIM8_BRK_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    132. 

  132.  <LI><a href="#[4e]">TIM8_CC_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    133. 

  133.  <LI><a href="#[4d]">TIM8_TRG_COM_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    134. 

  134.  <LI><a href="#[4c]">TIM8_UP_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    135. 

  135.  <LI><a href="#[47]">UART4_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    136. 

  136.  <LI><a href="#[48]">UART5_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    137. 

  137.  <LI><a href="#[54]">UCPD1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    138. 

  138.  <LI><a href="#[44]">USART1_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    139. 

  139.  <LI><a href="#[45]">USART2_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    140. 

  140.  <LI><a href="#[46]">USART3_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    141. 

  141.  <LI><a href="#[5b]">USART6_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    142. 

  142.  <LI><a href="#[52]">USB_DRD_FS_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    143. 

  143.  <LI><a href="#[5]">UsageFault_Handler</a> from stm32h5xx_it.o(.text.UsageFault_Handler) referenced from startup_stm32h523xx.o(RESET)
    144. 

  144.  <LI><a href="#[b]">WWDG_IRQHandler</a> from startup_stm32h523xx.o(.text) referenced from startup_stm32h523xx.o(RESET)
    145. 

  145.  <LI><a href="#[74]">__main</a> from __main.o(!!!main) referenced from startup_stm32h523xx.o(.text)
    146. 

  146.  <LI><a href="#[7e]">bsp_erase_cpu_flash</a> from chipflash.o(.text.bsp_erase_cpu_flash) referenced from chipflash.o(.data._flash_ops)
    147. 

  147.  <LI><a href="#[7c]">bsp_read_cpu_flash</a> from chipflash.o(.text.bsp_read_cpu_flash) referenced from chipflash.o(.data._flash_ops)
    148. 

  148.  <LI><a href="#[7d]">bsp_write_cpu_flash</a> from chipflash.o(.text.bsp_write_cpu_flash) referenced from chipflash.o(.data._flash_ops)
    149. 

  149. </UL>
    150. 

  150. <P>
    151. 

  151. <H3>
    152. 

  152. Global Symbols
    153. 

  153. </H3>
    154. 

  154. <P><STRONG><a name="[74]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
    155. 

  155. <BR><BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    156. 

  156. <LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
    157. 

  157. </UL>
    158. 

  158. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(.text)
    159. 

  159. </UL>
    160. 

  160. <P><STRONG><a name="[80]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
    161. 

  161. <BR><BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
    162. 

  162. </UL>
    163. 

  163. 

  164. <P><STRONG><a name="[82]"></a>__scatterload_rt2</STRONG> (Thumb, 84 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
    165. 

  165. <BR><BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
    166. 

  166. </UL>
    167. 

  167. 

  168. <P><STRONG><a name="[1aa]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
    169. 

  169. 

  170. <P><STRONG><a name="[1ab]"></a>__scatterload_loop</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
    171. 

  171. 

  172. <P><STRONG><a name="[83]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
    173. 

  173. <BR><BR>[Calls]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
    174. 

  174. </UL>
    175. 

  175. <BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
    176. 

  176. </UL>
    177. 

  177. 

  178. <P><STRONG><a name="[1ac]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, __scatter.o(!!handler_null), UNUSED)
    179. 

  179. 

  180. <P><STRONG><a name="[1ad]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)
    181. 

  181. 

  182. <P><STRONG><a name="[89]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
    183. 

  183. <BR><BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li
    184. 

  184. </UL>
    185. 

  185. 

  186. <P><STRONG><a name="[84]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000001))
    187. 

  187. <BR><BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_init
    188. 

  188. </UL>
    189. 

  189. 

  190. <P><STRONG><a name="[1ae]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))
    191. 

  191. 

  192. <P><STRONG><a name="[1af]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))
    193. 

  193. 

  194. <P><STRONG><a name="[1b0]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))
    195. 

  195. 

  196. <P><STRONG><a name="[1b1]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))
    197. 

  197. 

  198. <P><STRONG><a name="[1b2]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000034))
    199. 

  199. 

  200. <P><STRONG><a name="[1b3]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))
    201. 

  201. 

  202. <P><STRONG><a name="[1b4]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))
    203. 

  203. 

  204. <P><STRONG><a name="[1b5]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))
    205. 

  205. 

  206. <P><STRONG><a name="[1b6]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))
    207. 

  207. 

  208. <P><STRONG><a name="[1b7]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))
    209. 

  209. 

  210. <P><STRONG><a name="[1b8]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))
    211. 

  211. 

  212. <P><STRONG><a name="[1b9]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))
    213. 

  213. 

  214. <P><STRONG><a name="[1ba]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))
    215. 

  215. 

  216. <P><STRONG><a name="[1bb]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))
    217. 

  217. 

  218. <P><STRONG><a name="[1bc]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000006))
    219. 

  219. 

  220. <P><STRONG><a name="[1bd]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000010))
    221. 

  221. 

  222. <P><STRONG><a name="[1be]"></a>__rt_lib_init_relocate_pie_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))
    223. 

  223. 

  224. <P><STRONG><a name="[1bf]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000035))
    225. 

  225. 

  226. <P><STRONG><a name="[1c0]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))
    227. 

  227. 

  228. <P><STRONG><a name="[1c1]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000027))
    229. 

  229. 

  230. <P><STRONG><a name="[1c2]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))
    231. 

  231. 

  232. <P><STRONG><a name="[8e]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
    233. 

  233. <BR><BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls
    234. 

  234. </UL>
    235. 

  235. 

  236. <P><STRONG><a name="[1c3]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))
    237. 

  237. 

  238. <P><STRONG><a name="[1c4]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007))
    239. 

  239. 

  240. <P><STRONG><a name="[1c5]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F))
    241. 

  241. 

  242. <P><STRONG><a name="[1c6]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010))
    243. 

  243. 

  244. <P><STRONG><a name="[1c7]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A))
    245. 

  245. 

  246. <P><STRONG><a name="[1c8]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))
    247. 

  247. 

  248. <P><STRONG><a name="[1c9]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))
    249. 

  249. 

  250. <P><STRONG><a name="[81]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
    251. 

  251. <BR><BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2
    252. 

  252. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
    253. 

  253. </UL>
    254. 

  254. 

  255. <P><STRONG><a name="[1ca]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))
    256. 

  256. 

  257. <P><STRONG><a name="[86]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
    258. 

  258. <BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
    259. 

  259. <LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap
    260. 

  260. </UL>
    261. 

  261. <BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
    262. 

  262. </UL>
    263. 

  263. 

  264. <P><STRONG><a name="[88]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
    265. 

  265. <BR><BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init
    266. 

  266. </UL>
    267. 

  267. 

  268. <P><STRONG><a name="[1cb]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))
    269. 

  269. 

  270. <P><STRONG><a name="[8a]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
    271. 

  271. <BR><BR>[Stack]<UL><LI>Max Depth = 624 + Unknown Stack Size
    272. 

  272. <LI>Call Chain = __rt_entry_main &rArr; main &rArr; MX_ADC1_Init &rArr; HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    273. 

  273. </UL>
    274. 

  274. <BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    275. 

  275. <LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
    276. 

  276. </UL>
    277. 

  277. 

  278. <P><STRONG><a name="[1cc]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))
    279. 

  279. 

  280. <P><STRONG><a name="[97]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
    281. 

  281. <BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
    282. 

  282. </UL>
    283. 

  283. 

  284. <P><STRONG><a name="[8d]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
    285. 

  285. <BR><BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
    286. 

  286. </UL>
    287. 

  287. 

  288. <P><STRONG><a name="[1cd]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))
    289. 

  289. 

  290. <P><STRONG><a name="[8f]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
    291. 

  291. <BR><BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
    292. 

  292. </UL>
    293. 

  293. 

  294. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    295. 

  295. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    296. 

  296. </UL>
    297. 

  297. <P><STRONG><a name="[6]"></a>SecureFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    298. 

  298. <BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SecureFault_Handler
    299. 

  299. </UL>
    300. 

  300. <BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SecureFault_Handler
    301. 

  301. </UL>
    302. 

  302. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    303. 

  303. </UL>
    304. 

  304. <P><STRONG><a name="[4f]"></a>ADC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    305. 

  305. <BR><BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC2_IRQHandler
    306. 

  306. </UL>
    307. 

  307. <BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC2_IRQHandler
    308. 

  308. </UL>
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[6d]"></a>CEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    312. 

  312. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    313. 

  313. </UL>
    314. 

  314. <P><STRONG><a name="[53]"></a>CRS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    315. 

  315. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    316. 

  316. </UL>
    317. 

  317. <P><STRONG><a name="[30]"></a>DAC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    318. 

  318. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    319. 

  319. </UL>
    320. 

  320. <P><STRONG><a name="[66]"></a>DCACHE1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    321. 

  321. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    322. 

  322. </UL>
    323. 

  323. <P><STRONG><a name="[67]"></a>DCMI_PSSI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    324. 

  324. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    325. 

  325. </UL>
    326. 

  326. <P><STRONG><a name="[6a]"></a>DTS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    327. 

  327. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    328. 

  328. </UL>
    329. 

  329. <P><STRONG><a name="[16]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    330. 

  330. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    331. 

  331. </UL>
    332. 

  332. <P><STRONG><a name="[20]"></a>EXTI10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    333. 

  333. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    334. 

  334. </UL>
    335. 

  335. <P><STRONG><a name="[21]"></a>EXTI11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    336. 

  336. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    337. 

  337. </UL>
    338. 

  338. <P><STRONG><a name="[22]"></a>EXTI12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    339. 

  339. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    340. 

  340. </UL>
    341. 

  341. <P><STRONG><a name="[23]"></a>EXTI13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    342. 

  342. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    343. 

  343. </UL>
    344. 

  344. <P><STRONG><a name="[24]"></a>EXTI14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    345. 

  345. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    346. 

  346. </UL>
    347. 

  347. <P><STRONG><a name="[25]"></a>EXTI15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    348. 

  348. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    349. 

  349. </UL>
    350. 

  350. <P><STRONG><a name="[17]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    351. 

  351. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    352. 

  352. </UL>
    353. 

  353. <P><STRONG><a name="[18]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    354. 

  354. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    355. 

  355. </UL>
    356. 

  356. <P><STRONG><a name="[19]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    357. 

  357. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    358. 

  358. </UL>
    359. 

  359. <P><STRONG><a name="[1a]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    360. 

  360. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    361. 

  361. </UL>
    362. 

  362. <P><STRONG><a name="[1b]"></a>EXTI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    363. 

  363. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    364. 

  364. </UL>
    365. 

  365. <P><STRONG><a name="[1c]"></a>EXTI6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    366. 

  366. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    367. 

  367. </UL>
    368. 

  368. <P><STRONG><a name="[1d]"></a>EXTI7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    369. 

  369. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    370. 

  370. </UL>
    371. 

  371. <P><STRONG><a name="[1e]"></a>EXTI8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    372. 

  372. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    373. 

  373. </UL>
    374. 

  374. <P><STRONG><a name="[1f]"></a>EXTI9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    375. 

  375. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    376. 

  376. </UL>
    377. 

  377. <P><STRONG><a name="[32]"></a>FDCAN1_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    378. 

  378. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    379. 

  379. </UL>
    380. 

  380. <P><STRONG><a name="[69]"></a>FDCAN2_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    381. 

  381. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    382. 

  382. </UL>
    383. 

  383. <P><STRONG><a name="[11]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    384. 

  384. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    385. 

  385. </UL>
    386. 

  386. <P><STRONG><a name="[12]"></a>FLASH_S_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    387. 

  387. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    388. 

  388. </UL>
    389. 

  389. <P><STRONG><a name="[55]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    390. 

  390. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    391. 

  391. </UL>
    392. 

  392. <P><STRONG><a name="[64]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    393. 

  393. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    394. 

  394. </UL>
    395. 

  395. <P><STRONG><a name="[27]"></a>GPDMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    396. 

  396. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    397. 

  397. </UL>
    398. 

  398. <P><STRONG><a name="[28]"></a>GPDMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    399. 

  399. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    400. 

  400. </UL>
    401. 

  401. <P><STRONG><a name="[29]"></a>GPDMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    402. 

  402. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    403. 

  403. </UL>
    404. 

  404. <P><STRONG><a name="[2a]"></a>GPDMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    405. 

  405. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    406. 

  406. </UL>
    407. 

  407. <P><STRONG><a name="[2b]"></a>GPDMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    408. 

  408. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    409. 

  409. </UL>
    410. 

  410. <P><STRONG><a name="[2c]"></a>GPDMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    411. 

  411. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    412. 

  412. </UL>
    413. 

  413. <P><STRONG><a name="[2d]"></a>GPDMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    414. 

  414. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    415. 

  415. </UL>
    416. 

  416. <P><STRONG><a name="[5c]"></a>GPDMA2_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    417. 

  417. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    418. 

  418. </UL>
    419. 

  419. <P><STRONG><a name="[5d]"></a>GPDMA2_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    420. 

  420. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    421. 

  421. </UL>
    422. 

  422. <P><STRONG><a name="[5e]"></a>GPDMA2_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    423. 

  423. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    424. 

  424. </UL>
    425. 

  425. <P><STRONG><a name="[5f]"></a>GPDMA2_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    426. 

  426. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    427. 

  427. </UL>
    428. 

  428. <P><STRONG><a name="[60]"></a>GPDMA2_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    429. 

  429. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    430. 

  430. </UL>
    431. 

  431. <P><STRONG><a name="[61]"></a>GPDMA2_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    432. 

  432. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    433. 

  433. </UL>
    434. 

  434. <P><STRONG><a name="[62]"></a>GPDMA2_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    435. 

  435. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    436. 

  436. </UL>
    437. 

  437. <P><STRONG><a name="[63]"></a>GPDMA2_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    438. 

  438. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    439. 

  439. </UL>
    440. 

  440. <P><STRONG><a name="[13]"></a>GTZC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    441. 

  441. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    442. 

  442. </UL>
    443. 

  443. <P><STRONG><a name="[6c]"></a>HASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    444. 

  444. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    445. 

  445. </UL>
    446. 

  446. <P><STRONG><a name="[3e]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    447. 

  447. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    448. 

  448. </UL>
    449. 

  449. <P><STRONG><a name="[3d]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    450. 

  450. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    451. 

  451. </UL>
    452. 

  452. <P><STRONG><a name="[40]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    453. 

  453. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    454. 

  454. </UL>
    455. 

  455. <P><STRONG><a name="[3f]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    456. 

  456. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    457. 

  457. </UL>
    458. 

  458. <P><STRONG><a name="[59]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    459. 

  459. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    460. 

  460. </UL>
    461. 

  461. <P><STRONG><a name="[58]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    462. 

  462. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    463. 

  463. </UL>
    464. 

  464. <P><STRONG><a name="[70]"></a>I3C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    465. 

  465. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    466. 

  466. </UL>
    467. 

  467. <P><STRONG><a name="[6f]"></a>I3C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    468. 

  468. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    469. 

  469. </UL>
    470. 

  470. <P><STRONG><a name="[72]"></a>I3C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    471. 

  471. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    472. 

  472. </UL>
    473. 

  473. <P><STRONG><a name="[71]"></a>I3C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    474. 

  474. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    475. 

  475. </UL>
    476. 

  476. <P><STRONG><a name="[65]"></a>ICACHE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    477. 

  477. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    478. 

  478. </UL>
    479. 

  479. <P><STRONG><a name="[2e]"></a>IWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    480. 

  480. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    481. 

  481. </UL>
    482. 

  482. <P><STRONG><a name="[4a]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    483. 

  483. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    484. 

  484. </UL>
    485. 

  485. <P><STRONG><a name="[50]"></a>LPTIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    486. 

  486. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    487. 

  487. </UL>
    488. 

  488. <P><STRONG><a name="[49]"></a>LPUART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    489. 

  489. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    490. 

  490. </UL>
    491. 

  491. <P><STRONG><a name="[56]"></a>OCTOSPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    492. 

  492. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    493. 

  493. </UL>
    494. 

  494. <P><STRONG><a name="[c]"></a>PVD_AVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    495. 

  495. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    496. 

  496. </UL>
    497. 

  497. <P><STRONG><a name="[10]"></a>RAMCFG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    498. 

  498. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    499. 

  499. </UL>
    500. 

  500. <P><STRONG><a name="[14]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    501. 

  501. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    502. 

  502. </UL>
    503. 

  503. <P><STRONG><a name="[15]"></a>RCC_S_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    504. 

  504. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    505. 

  505. </UL>
    506. 

  506. <P><STRONG><a name="[6b]"></a>RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    507. 

  507. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    508. 

  508. </UL>
    509. 

  509. <P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    510. 

  510. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    511. 

  511. </UL>
    512. 

  512. <P><STRONG><a name="[e]"></a>RTC_S_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    513. 

  513. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    514. 

  514. </UL>
    515. 

  515. <P><STRONG><a name="[57]"></a>SDMMC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    516. 

  516. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    517. 

  517. </UL>
    518. 

  518. <P><STRONG><a name="[41]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    519. 

  519. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    520. 

  520. </UL>
    521. 

  521. <P><STRONG><a name="[42]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    522. 

  522. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    523. 

  523. </UL>
    524. 

  524. <P><STRONG><a name="[43]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    525. 

  525. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    526. 

  526. </UL>
    527. 

  527. <P><STRONG><a name="[5a]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    528. 

  528. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    529. 

  529. </UL>
    530. 

  530. <P><STRONG><a name="[f]"></a>TAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    531. 

  531. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    532. 

  532. </UL>
    533. 

  533. <P><STRONG><a name="[6e]"></a>TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    534. 

  534. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    535. 

  535. </UL>
    536. 

  536. <P><STRONG><a name="[51]"></a>TIM15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    537. 

  537. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    538. 

  538. </UL>
    539. 

  539. <P><STRONG><a name="[33]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    540. 

  540. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    541. 

  541. </UL>
    542. 

  542. <P><STRONG><a name="[36]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    543. 

  543. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    544. 

  544. </UL>
    545. 

  545. <P><STRONG><a name="[35]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    546. 

  546. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    547. 

  547. </UL>
    548. 

  548. <P><STRONG><a name="[34]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    549. 

  549. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    550. 

  550. </UL>
    551. 

  551. <P><STRONG><a name="[38]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    552. 

  552. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    553. 

  553. </UL>
    554. 

  554. <P><STRONG><a name="[39]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    555. 

  555. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    556. 

  556. </UL>
    557. 

  557. <P><STRONG><a name="[3b]"></a>TIM6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    558. 

  558. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    559. 

  559. </UL>
    560. 

  560. <P><STRONG><a name="[3c]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    561. 

  561. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    562. 

  562. </UL>
    563. 

  563. <P><STRONG><a name="[4b]"></a>TIM8_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    564. 

  564. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    565. 

  565. </UL>
    566. 

  566. <P><STRONG><a name="[4e]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    567. 

  567. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    568. 

  568. </UL>
    569. 

  569. <P><STRONG><a name="[4d]"></a>TIM8_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    570. 

  570. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    571. 

  571. </UL>
    572. 

  572. <P><STRONG><a name="[4c]"></a>TIM8_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    573. 

  573. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    574. 

  574. </UL>
    575. 

  575. <P><STRONG><a name="[47]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    576. 

  576. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    577. 

  577. </UL>
    578. 

  578. <P><STRONG><a name="[48]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    579. 

  579. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    580. 

  580. </UL>
    581. 

  581. <P><STRONG><a name="[54]"></a>UCPD1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    582. 

  582. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    583. 

  583. </UL>
    584. 

  584. <P><STRONG><a name="[44]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    585. 

  585. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    586. 

  586. </UL>
    587. 

  587. <P><STRONG><a name="[45]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    588. 

  588. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    589. 

  589. </UL>
    590. 

  590. <P><STRONG><a name="[46]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    591. 

  591. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    592. 

  592. </UL>
    593. 

  593. <P><STRONG><a name="[5b]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    594. 

  594. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    595. 

  595. </UL>
    596. 

  596. <P><STRONG><a name="[52]"></a>USB_DRD_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    597. 

  597. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    598. 

  598. </UL>
    599. 

  599. <P><STRONG><a name="[b]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    600. 

  600. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    601. 

  601. </UL>
    602. 

  602. <P><STRONG><a name="[96]"></a>__user_initial_stackheap</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, startup_stm32h523xx.o(.text))
    603. 

  603. <BR><BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
    604. 

  604. </UL>
    605. 

  605. 

  606. <P><STRONG><a name="[19b]"></a>__aeabi_memcpy</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text))
    607. 

  607. <BR><BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_write_cpu_flash
    608. 

  608. <LI><a href="#[19c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rkfifo_copy_out
    609. 

  609. <LI><a href="#[19a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rkfifo_copy_in
    610. 

  610. </UL>
    611. 

  611. 

  612. <P><STRONG><a name="[91]"></a>__rt_memcpy</STRONG> (Thumb, 138 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text), UNUSED)
    613. 

  613. <BR><BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
    614. 

  614. </UL>
    615. 

  615. 

  616. <P><STRONG><a name="[1ce]"></a>_memcpy_lastbytes</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_v6.o(.text), UNUSED)
    617. 

  617. 

  618. <P><STRONG><a name="[11b]"></a>__aeabi_memclr</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr.o(.text))
    619. 

  619. <BR><BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    620. 

  620. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    621. 

  621. </UL>
    622. 

  622. 

  623. <P><STRONG><a name="[1cf]"></a>__rt_memclr</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr.o(.text), UNUSED)
    624. 

  624. 

  625. <P><STRONG><a name="[93]"></a>_memset</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, rt_memclr.o(.text), UNUSED)
    626. 

  626. <BR><BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset_w
    627. 

  627. </UL>
    628. 

  628. 

  629. <P><STRONG><a name="[f1]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text))
    630. 

  630. <BR><BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    631. 

  631. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    632. 

  632. <LI><a href="#[192]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    633. 

  633. <LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    634. 

  634. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    635. 

  635. </UL>
    636. 

  636. 

  637. <P><STRONG><a name="[f2]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text))
    638. 

  638. <BR><BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    639. 

  639. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    640. 

  640. </UL>
    641. 

  641. 

  642. <P><STRONG><a name="[1d0]"></a>__rt_memclr_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
    643. 

  643. 

  644. <P><STRONG><a name="[94]"></a>_memset_w</STRONG> (Thumb, 74 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
    645. 

  645. <BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset
    646. 

  646. </UL>
    647. 

  647. 

  648. <P><STRONG><a name="[1d1]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
    649. 

  649. 

  650. <P><STRONG><a name="[1d2]"></a>__rt_heap_escrow$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
    651. 

  651. 

  652. <P><STRONG><a name="[1d3]"></a>__rt_heap_expand$2region</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
    653. 

  653. 

  654. <P><STRONG><a name="[92]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
    655. 

  655. <BR><BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memcpy
    656. 

  656. </UL>
    657. 

  657. 

  658. <P><STRONG><a name="[1d4]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
    659. 

  659. 

  660. <P><STRONG><a name="[1d5]"></a>__rt_memcpy_w</STRONG> (Thumb, 100 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
    661. 

  661. 

  662. <P><STRONG><a name="[1d6]"></a>_memcpy_lastbytes_aligned</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_w.o(.text), UNUSED)
    663. 

  663. 

  664. <P><STRONG><a name="[87]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
    665. 

  665. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __user_setup_stackheap
    666. 

  666. </UL>
    667. 

  667. <BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap
    668. 

  668. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace
    669. 

  669. </UL>
    670. 

  670. <BR>[Called By]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh
    671. 

  671. </UL>
    672. 

  672. 

  673. <P><STRONG><a name="[8c]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
    674. 

  674. <BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
    675. 

  675. <LI>Call Chain = exit
    676. 

  676. </UL>
    677. 

  677. <BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit
    678. 

  678. </UL>
    679. 

  679. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
    680. 

  680. </UL>
    681. 

  681. 

  682. <P><STRONG><a name="[1d7]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
    683. 

  683. 

  684. <P><STRONG><a name="[95]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
    685. 

  685. <BR><BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
    686. 

  686. </UL>
    687. 

  687. 

  688. <P><STRONG><a name="[1d8]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
    689. 

  689. 

  690. <P><STRONG><a name="[90]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
    691. 

  691. <BR><BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit
    692. 

  692. </UL>
    693. 

  693. 

  694. <P><STRONG><a name="[1d9]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
    695. 

  695. 

  696. <P><STRONG><a name="[1da]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
    697. 

  697. 

  698. <P><STRONG><a name="[1db]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, indicate_semi.o(.text), UNUSED)
    699. 

  699. 

  700. <P><STRONG><a name="[2f]"></a>ADC1_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.ADC1_IRQHandler))
    701. 

  701. <BR><BR>[Stack]<UL><LI>Max Depth = 288<LI>Call Chain = ADC1_IRQHandler &rArr; HAL_ADC_IRQHandler &rArr; HAL_ADC_ErrorCallback &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    702. 

  702. </UL>
    703. 

  703. <BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    704. 

  704. </UL>
    705. 

  705. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    706. 

  706. </UL>
    707. 

  707. <P><STRONG><a name="[99]"></a>ADC_ConversionStop</STRONG> (Thumb, 400 bytes, Stack size 48 bytes, stm32h5xx_hal_adc.o(.text.ADC_ConversionStop))
    708. 

  708. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = ADC_ConversionStop &rArr; LL_ADC_INJ_StopConversion
    709. 

  709. </UL>
    710. 

  710. <BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_StopConversion
    711. 

  711. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_StopConversion
    712. 

  712. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsDisableOngoing
    713. 

  713. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    714. 

  714. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    715. 

  715. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    716. 

  716. </UL>
    717. 

  717. <BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Stop_DMA
    718. 

  718. </UL>
    719. 

  719. 

  720. <P><STRONG><a name="[75]"></a>ADC_DMAConvCplt</STRONG> (Thumb, 212 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.ADC_DMAConvCplt))
    721. 

  721. <BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = ADC_DMAConvCplt &rArr; HAL_ADC_ErrorCallback &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    722. 

  722. </UL>
    723. 

  723. <BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsTriggerSourceSWStart
    724. 

  724. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConvCpltCallback
    725. 

  725. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ErrorCallback
    726. 

  726. </UL>
    727. 

  727. <BR>[Address Reference Count : 1]<UL><LI> stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    728. 

  728. </UL>
    729. 

  729. <P><STRONG><a name="[77]"></a>ADC_DMAError</STRONG> (Thumb, 42 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.ADC_DMAError))
    730. 

  730. <BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = ADC_DMAError &rArr; HAL_ADC_ErrorCallback &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    731. 

  731. </UL>
    732. 

  732. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ErrorCallback
    733. 

  733. </UL>
    734. 

  734. <BR>[Address Reference Count : 1]<UL><LI> stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    735. 

  735. </UL>
    736. 

  736. <P><STRONG><a name="[76]"></a>ADC_DMAHalfConvCplt</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.ADC_DMAHalfConvCplt))
    737. 

  737. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = ADC_DMAHalfConvCplt &rArr; HAL_ADC_ConvHalfCpltCallback
    738. 

  738. </UL>
    739. 

  739. <BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConvHalfCpltCallback
    740. 

  740. </UL>
    741. 

  741. <BR>[Address Reference Count : 1]<UL><LI> stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA)
    742. 

  742. </UL>
    743. 

  743. <P><STRONG><a name="[a4]"></a>ADC_Disable</STRONG> (Thumb, 196 bytes, Stack size 24 bytes, stm32h5xx_hal_adc.o(.text.ADC_Disable))
    744. 

  744. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = ADC_Disable &rArr; LL_ADC_Disable
    745. 

  745. </UL>
    746. 

  746. <BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_Disable
    747. 

  747. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsDisableOngoing
    748. 

  748. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    749. 

  749. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    750. 

  750. </UL>
    751. 

  751. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_Calibration_Start
    752. 

  752. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Stop_DMA
    753. 

  753. </UL>
    754. 

  754. 

  755. <P><STRONG><a name="[a7]"></a>ADC_Enable</STRONG> (Thumb, 268 bytes, Stack size 24 bytes, stm32h5xx_hal_adc.o(.text.ADC_Enable))
    756. 

  756. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = ADC_Enable &rArr; LL_ADC_GetCommonPathInternalCh
    757. 

  757. </UL>
    758. 

  758. <BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetCommonPathInternalCh
    759. 

  759. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_Enable
    760. 

  760. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    761. 

  761. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    762. 

  762. </UL>
    763. 

  763. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    764. 

  764. </UL>
    765. 

  765. 

  766. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.BusFault_Handler))
    767. 

  767. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    768. 

  768. </UL>
    769. 

  769. <P><STRONG><a name="[b0]"></a>CAN2PMU_Send</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, soft_can.o(.text.CAN2PMU_Send))
    770. 

  770. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = CAN2PMU_Send &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    771. 

  771. </UL>
    772. 

  772. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    773. 

  773. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Txmsg_Init
    774. 

  774. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    775. 

  775. </UL>
    776. 

  776. <BR>[Called By]<UL><LI><a href="#[193]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_10_hz
    777. 

  777. </UL>
    778. 

  778. 

  779. <P><STRONG><a name="[182]"></a>CAN_HEADER_Init</STRONG> (Thumb, 68 bytes, Stack size 4 bytes, soft_can.o(.text.CAN_HEADER_Init))
    780. 

  780. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = CAN_HEADER_Init
    781. 

  781. </UL>
    782. 

  782. <BR>[Called By]<UL><LI><a href="#[181]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_CAN_INIT
    783. 

  783. </UL>
    784. 

  784. 

  785. <P><STRONG><a name="[11e]"></a>CanGetHalDataLengthToDec</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, can_link.o(.text.CanGetHalDataLengthToDec))
    786. 

  786. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = CanGetHalDataLengthToDec
    787. 

  787. </UL>
    788. 

  788. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    789. 

  789. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    790. 

  790. </UL>
    791. 

  791. 

  792. <P><STRONG><a name="[b3]"></a>Can_Ack_Pmu</STRONG> (Thumb, 586 bytes, Stack size 32 bytes, soft_can.o(.text.Can_Ack_Pmu))
    793. 

  793. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Can_Ack_Pmu &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    794. 

  794. </UL>
    795. 

  795. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    796. 

  796. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
    797. 

  797. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Txmsg_Init
    798. 

  798. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    799. 

  799. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_isnan
    800. 

  800. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_isnanf
    801. 

  801. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ackmsg_Init
    802. 

  802. </UL>
    803. 

  803. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    804. 

  804. </UL>
    805. 

  805. 

  806. <P><STRONG><a name="[ba]"></a>Can_Rx_Decode</STRONG> (Thumb, 500 bytes, Stack size 40 bytes, soft_can.o(.text.Can_Rx_Decode))
    807. 

  807. <BR><BR>[Stack]<UL><LI>Max Depth = 236<LI>Call Chain = Can_Rx_Decode &rArr; Weight_Calib &rArr; Auto_Calib &rArr; Read_Value &rArr; delay_us &rArr; HAL_TIM_Base_Start
    808. 

  808. </UL>
    809. 

  809. <BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    810. 

  810. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    811. 

  811. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_To_Flash
    812. 

  812. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    813. 

  813. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    814. 

  814. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    815. 

  815. <LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_out
    816. 

  816. </UL>
    817. 

  817. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    818. 

  818. </UL>
    819. 

  819. 

  820. <P><STRONG><a name="[b1]"></a>Can_Txmsg_Init</STRONG> (Thumb, 38 bytes, Stack size 4 bytes, soft_can.o(.text.Can_Txmsg_Init))
    821. 

  821. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Can_Txmsg_Init
    822. 

  822. </UL>
    823. 

  823. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN2PMU_Send
    824. 

  824. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    825. 

  825. </UL>
    826. 

  826. 

  827. <P><STRONG><a name="[c8]"></a>Can_Txmsg_Target_Init</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, soft_can.o(.text.Can_Txmsg_Target_Init))
    828. 

  828. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Can_Txmsg_Target_Init
    829. 

  829. </UL>
    830. 

  830. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    831. 

  831. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    832. 

  832. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flow_Function
    833. 

  833. </UL>
    834. 

  834. 

  835. <P><STRONG><a name="[189]"></a>Convert_Into_Weight</STRONG> (Thumb, 128 bytes, Stack size 12 bytes, weight_read.o(.text.Convert_Into_Weight))
    836. 

  836. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = Convert_Into_Weight
    837. 

  837. </UL>
    838. 

  838. <BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Processing_Data
    839. 

  839. </UL>
    840. 

  840. 

  841. <P><STRONG><a name="[8]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.DebugMon_Handler))
    842. 

  842. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    843. 

  843. </UL>
    844. 

  844. <P><STRONG><a name="[f4]"></a>Error_Handler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, main.o(.text.Error_Handler))
    845. 

  845. <BR><BR>[Called By]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    846. 

  846. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    847. 

  847. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    848. 

  848. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    849. 

  849. <LI><a href="#[170]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ICACHE_Init
    850. 

  850. <LI><a href="#[172]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM12_Init
    851. 

  851. <LI><a href="#[179]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM5_Init
    852. 

  852. <LI><a href="#[178]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    853. 

  853. <LI><a href="#[177]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    854. 

  854. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    855. 

  855. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    856. 

  856. <LI><a href="#[16c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN2_Init
    857. 

  857. <LI><a href="#[16b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN1_Init
    858. 

  858. <LI><a href="#[16a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    859. 

  859. <LI><a href="#[192]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    860. 

  860. </UL>
    861. 

  861. 

  862. <P><STRONG><a name="[31]"></a>FDCAN1_IT0_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.FDCAN1_IT0_IRQHandler))
    863. 

  863. <BR><BR>[Stack]<UL><LI>Max Depth = 328 + Unknown Stack Size
    864. 

  864. <LI>Call Chain = FDCAN1_IT0_IRQHandler &rArr; HAL_FDCAN_IRQHandler &rArr; HAL_FDCAN_RxFifo1Callback &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    865. 

  865. </UL>
    866. 

  866. <BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    867. 

  867. </UL>
    868. 

  868. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    869. 

  869. </UL>
    870. 

  870. <P><STRONG><a name="[68]"></a>FDCAN2_IT0_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.FDCAN2_IT0_IRQHandler))
    871. 

  871. <BR><BR>[Stack]<UL><LI>Max Depth = 328 + Unknown Stack Size
    872. 

  872. <LI>Call Chain = FDCAN2_IT0_IRQHandler &rArr; HAL_FDCAN_IRQHandler &rArr; HAL_FDCAN_RxFifo1Callback &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    873. 

  873. </UL>
    874. 

  874. <BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    875. 

  875. </UL>
    876. 

  876. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    877. 

  877. </UL>
    878. 

  878. <P><STRONG><a name="[127]"></a>FLASH_Erase_Sector</STRONG> (Thumb, 96 bytes, Stack size 12 bytes, stm32h5xx_hal_flash_ex.o(.text.FLASH_Erase_Sector))
    879. 

  879. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = FLASH_Erase_Sector
    880. 

  880. </UL>
    881. 

  881. <BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASHEx_Erase
    882. 

  882. </UL>
    883. 

  883. 

  884. <P><STRONG><a name="[c3]"></a>FLASH_WaitForLastOperation</STRONG> (Thumb, 176 bytes, Stack size 32 bytes, stm32h5xx_hal_flash.o(.text.FLASH_WaitForLastOperation))
    885. 

  885. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = FLASH_WaitForLastOperation
    886. 

  886. </UL>
    887. 

  887. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    888. 

  888. </UL>
    889. 

  889. <BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASHEx_Erase
    890. 

  890. <LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    891. 

  891. </UL>
    892. 

  892. 

  893. <P><STRONG><a name="[ad]"></a>Filter_Value</STRONG> (Thumb, 220 bytes, Stack size 24 bytes, weight_read.o(.text.Filter_Value))
    894. 

  894. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = Filter_Value &rArr; meanApply
    895. 

  895. </UL>
    896. 

  896. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wait_front_data
    897. 

  897. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;meanApply
    898. 

  898. </UL>
    899. 

  899. <BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Processing_Data
    900. 

  900. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    901. 

  901. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    902. 

  902. </UL>
    903. 

  903. 

  904. <P><STRONG><a name="[c7]"></a>Flow_Function</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, soft_flow.o(.text.Flow_Function))
    905. 

  905. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = Flow_Function &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    906. 

  906. </UL>
    907. 

  907. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    908. 

  908. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Txmsg_Target_Init
    909. 

  909. </UL>
    910. 

  910. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    911. 

  911. </UL>
    912. 

  912. 

  913. <P><STRONG><a name="[26]"></a>GPDMA1_Channel0_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.GPDMA1_Channel0_IRQHandler))
    914. 

  914. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = GPDMA1_Channel0_IRQHandler &rArr; HAL_DMA_IRQHandler
    915. 

  915. </UL>
    916. 

  916. <BR>[Calls]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
    917. 

  917. </UL>
    918. 

  918. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    919. 

  919. </UL>
    920. 

  920. <P><STRONG><a name="[ab]"></a>Get_Device_Handle</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, weight_read.o(.text.Get_Device_Handle))
    921. 

  921. <BR><BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    922. 

  922. <LI><a href="#[185]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_WEIGHT_INIT
    923. 

  923. <LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_GrossWeight
    924. 

  924. <LI><a href="#[169]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Load_Param
    925. 

  925. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Warn_Licence
    926. 

  926. <LI><a href="#[18b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Record_First_InitValue
    927. 

  927. <LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    928. 

  928. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Check_Err
    929. 

  929. <LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Sensor_Status
    930. 

  930. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN2PMU_Send
    931. 

  931. <LI><a href="#[198]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can2Pmu_3hz_info
    932. 

  932. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    933. 

  933. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    934. 

  934. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    935. 

  935. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    936. 

  936. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    937. 

  937. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    938. 

  938. </UL>
    939. 

  939. 

  940. <P><STRONG><a name="[cb]"></a>Get_Sensor_Status</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, warn.o(.text.Get_Sensor_Status))
    941. 

  941. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = Get_Sensor_Status &rArr; Warn_Check &rArr; Error_Led &rArr; SET_RED_LED &rArr; HAL_GPIO_WritePin
    942. 

  942. </UL>
    943. 

  943. <BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Warn_Check
    944. 

  944. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    945. 

  945. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Tx_Msg
    946. 

  946. </UL>
    947. 

  947. <BR>[Called By]<UL><LI><a href="#[193]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_10_hz
    948. 

  948. </UL>
    949. 

  949. 

  950. <P><STRONG><a name="[cc]"></a>Get_Tx_Msg</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, soft_can.o(.text.Get_Tx_Msg))
    951. 

  951. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Sensor_Status
    952. 

  952. </UL>
    953. 

  953. 

  954. <P><STRONG><a name="[cf]"></a>HAL_ADCEx_Calibration_Start</STRONG> (Thumb, 224 bytes, Stack size 32 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_Calibration_Start))
    955. 

  955. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = HAL_ADCEx_Calibration_Start &rArr; ADC_Disable &rArr; LL_ADC_Disable
    956. 

  956. </UL>
    957. 

  957. <BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsCalibrationOnGoing
    958. 

  958. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_StartCalibration
    959. 

  959. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    960. 

  960. </UL>
    961. 

  961. <BR>[Called By]<UL><LI><a href="#[180]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_ADC_INIT
    962. 

  962. </UL>
    963. 

  963. 

  964. <P><STRONG><a name="[e2]"></a>HAL_ADCEx_EndOfSamplingCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_EndOfSamplingCallback))
    965. 

  965. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADCEx_EndOfSamplingCallback
    966. 

  966. </UL>
    967. 

  967. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    968. 

  968. </UL>
    969. 

  969. 

  970. <P><STRONG><a name="[e4]"></a>HAL_ADCEx_InjectedConvCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_InjectedConvCpltCallback))
    971. 

  971. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADCEx_InjectedConvCpltCallback
    972. 

  972. </UL>
    973. 

  973. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    974. 

  974. </UL>
    975. 

  975. 

  976. <P><STRONG><a name="[e9]"></a>HAL_ADCEx_InjectedQueueOverflowCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_InjectedQueueOverflowCallback))
    977. 

  977. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADCEx_InjectedQueueOverflowCallback
    978. 

  978. </UL>
    979. 

  979. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    980. 

  980. </UL>
    981. 

  981. 

  982. <P><STRONG><a name="[e6]"></a>HAL_ADCEx_LevelOutOfWindow2Callback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_LevelOutOfWindow2Callback))
    983. 

  983. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADCEx_LevelOutOfWindow2Callback
    984. 

  984. </UL>
    985. 

  985. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    986. 

  986. </UL>
    987. 

  987. 

  988. <P><STRONG><a name="[e7]"></a>HAL_ADCEx_LevelOutOfWindow3Callback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.HAL_ADCEx_LevelOutOfWindow3Callback))
    989. 

  989. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADCEx_LevelOutOfWindow3Callback
    990. 

  990. </UL>
    991. 

  991. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    992. 

  992. </UL>
    993. 

  993. 

  994. <P><STRONG><a name="[d2]"></a>HAL_ADC_ConfigChannel</STRONG> (Thumb, 2110 bytes, Stack size 264 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_ConfigChannel))
    995. 

  995. <BR><BR>[Stack]<UL><LI>Max Depth = 284<LI>Call Chain = HAL_ADC_ConfigChannel &rArr; LL_ADC_SetOffset
    996. 

  996. </UL>
    997. 

  997. <BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_EnableChannelVDDcore
    998. 

  998. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetCommonPathInternalCh
    999. 

  999. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetChannelSingleDiff
    1000. 

  1000. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetOffsetState
    1001. 

  1001. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetOffsetChannel
    1002. 

  1002. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetOffsetSaturation
    1003. 

  1003. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetOffsetSign
    1004. 

  1004. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetOffset
    1005. 

  1005. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetSamplingTimeCommonConfig
    1006. 

  1006. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetChannelSamplingTime
    1007. 

  1007. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_SetSequencerRanks
    1008. 

  1008. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_EnableChannel0_GPIO
    1009. 

  1009. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetCommonPathInternalCh
    1010. 

  1010. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    1011. 

  1011. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    1012. 

  1012. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    1013. 

  1013. </UL>
    1014. 

  1014. <BR>[Called By]<UL><LI><a href="#[16a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    1015. 

  1015. </UL>
    1016. 

  1016. 

  1017. <P><STRONG><a name="[a1]"></a>HAL_ADC_ConvCpltCallback</STRONG> (Thumb, 260 bytes, Stack size 20 bytes, adc.o(.text.HAL_ADC_ConvCpltCallback))
    1018. 

  1018. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_ADC_ConvCpltCallback
    1019. 

  1019. </UL>
    1020. 

  1020. <BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMAConvCplt
    1021. 

  1021. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    1022. 

  1022. </UL>
    1023. 

  1023. 

  1024. <P><STRONG><a name="[a3]"></a>HAL_ADC_ConvHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_ConvHalfCpltCallback))
    1025. 

  1025. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADC_ConvHalfCpltCallback
    1026. 

  1026. </UL>
    1027. 

  1027. <BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMAHalfConvCplt
    1028. 

  1028. </UL>
    1029. 

  1029. 

  1030. <P><STRONG><a name="[a2]"></a>HAL_ADC_ErrorCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, adc.o(.text.HAL_ADC_ErrorCallback))
    1031. 

  1031. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = HAL_ADC_ErrorCallback &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1032. 

  1032. </UL>
    1033. 

  1033. <BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    1034. 

  1034. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Stop_DMA
    1035. 

  1035. </UL>
    1036. 

  1036. <BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMAError
    1037. 

  1037. <LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMAConvCplt
    1038. 

  1038. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    1039. 

  1039. </UL>
    1040. 

  1040. 

  1041. <P><STRONG><a name="[98]"></a>HAL_ADC_IRQHandler</STRONG> (Thumb, 1210 bytes, Stack size 64 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_IRQHandler))
    1042. 

  1042. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = HAL_ADC_IRQHandler &rArr; HAL_ADC_ErrorCallback &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1043. 

  1043. </UL>
    1044. 

  1044. <BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_InjectedQueueOverflowCallback
    1045. 

  1045. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_LevelOutOfWindow3Callback
    1046. 

  1046. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_LevelOutOfWindow2Callback
    1047. 

  1047. <LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_LevelOutOfWindowCallback
    1048. 

  1048. <LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_InjectedConvCpltCallback
    1049. 

  1049. <LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_EndOfSamplingCallback
    1050. 

  1050. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsTriggerSourceSWStart
    1051. 

  1051. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsTriggerSourceSWStart
    1052. 

  1052. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetMultiDMATransfer
    1053. 

  1053. <LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetMultimode
    1054. 

  1054. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    1055. 

  1055. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    1056. 

  1056. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConvCpltCallback
    1057. 

  1057. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ErrorCallback
    1058. 

  1058. </UL>
    1059. 

  1059. <BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_IRQHandler
    1060. 

  1060. </UL>
    1061. 

  1061. 

  1062. <P><STRONG><a name="[ea]"></a>HAL_ADC_Init</STRONG> (Thumb, 708 bytes, Stack size 40 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_Init))
    1063. 

  1063. <BR><BR>[Stack]<UL><LI>Max Depth = 560 + Unknown Stack Size
    1064. 

  1064. <LI>Call Chain = HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1065. 

  1065. </UL>
    1066. 

  1066. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    1067. 

  1067. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetCommonClock
    1068. 

  1068. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    1069. 

  1069. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    1070. 

  1070. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_EnableInternalRegulator
    1071. 

  1071. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsInternalRegulatorEnabled
    1072. 

  1072. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_DisableDeepPowerDown
    1073. 

  1073. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsDeepPowerDownEnabled
    1074. 

  1074. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1075. 

  1075. </UL>
    1076. 

  1076. <BR>[Called By]<UL><LI><a href="#[16a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    1077. 

  1077. </UL>
    1078. 

  1078. 

  1079. <P><STRONG><a name="[e5]"></a>HAL_ADC_LevelOutOfWindowCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_LevelOutOfWindowCallback))
    1080. 

  1080. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_ADC_LevelOutOfWindowCallback
    1081. 

  1081. </UL>
    1082. 

  1082. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    1083. 

  1083. </UL>
    1084. 

  1084. 

  1085. <P><STRONG><a name="[eb]"></a>HAL_ADC_MspInit</STRONG> (Thumb, 438 bytes, Stack size 368 bytes, adc.o(.text.HAL_ADC_MspInit))
    1086. 

  1086. <BR><BR>[Stack]<UL><LI>Max Depth = 520 + Unknown Stack Size
    1087. 

  1087. <LI>Call Chain = HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1088. 

  1088. </UL>
    1089. 

  1089. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1090. 

  1090. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1091. 

  1091. <LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_ConfigChannelAttributes
    1092. 

  1092. <LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_LinkQ
    1093. 

  1093. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_Init
    1094. 

  1094. <LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_SetCircularMode
    1095. 

  1095. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_InsertNode
    1096. 

  1096. <LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_BuildNode
    1097. 

  1097. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1098. 

  1098. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1099. 

  1099. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1100. 

  1100. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr8
    1101. 

  1101. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1102. 

  1102. </UL>
    1103. 

  1103. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    1104. 

  1104. </UL>
    1105. 

  1105. 

  1106. <P><STRONG><a name="[e0]"></a>HAL_ADC_Start_DMA</STRONG> (Thumb, 636 bytes, Stack size 152 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_Start_DMA))
    1107. 

  1107. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1108. 

  1108. </UL>
    1109. 

  1109. <BR>[Calls]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
    1110. 

  1110. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_Start_IT
    1111. 

  1111. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_GetNodeConfig
    1112. 

  1112. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Enable
    1113. 

  1113. <LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_StartConversion
    1114. 

  1114. <LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_GetMultimode
    1115. 

  1115. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    1116. 

  1116. </UL>
    1117. 

  1117. <BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ErrorCallback
    1118. 

  1118. <LI><a href="#[180]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_ADC_INIT
    1119. 

  1119. </UL>
    1120. 

  1120. 

  1121. <P><STRONG><a name="[df]"></a>HAL_ADC_Stop_DMA</STRONG> (Thumb, 220 bytes, Stack size 24 bytes, stm32h5xx_hal_adc.o(.text.HAL_ADC_Stop_DMA))
    1122. 

  1122. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = HAL_ADC_Stop_DMA &rArr; ADC_ConversionStop &rArr; LL_ADC_INJ_StopConversion
    1123. 

  1123. </UL>
    1124. 

  1124. <BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
    1125. 

  1125. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    1126. 

  1126. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    1127. 

  1127. </UL>
    1128. 

  1128. <BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ErrorCallback
    1129. 

  1129. </UL>
    1130. 

  1130. 

  1131. <P><STRONG><a name="[f6]"></a>HAL_DMAEx_List_BuildNode</STRONG> (Thumb, 90 bytes, Stack size 24 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_BuildNode))
    1132. 

  1132. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_DMAEx_List_BuildNode &rArr; DMA_List_BuildNode
    1133. 

  1133. </UL>
    1134. 

  1134. <BR>[Calls]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_BuildNode
    1135. 

  1135. </UL>
    1136. 

  1136. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1137. 

  1137. </UL>
    1138. 

  1138. 

  1139. <P><STRONG><a name="[fe]"></a>HAL_DMAEx_List_GetNodeConfig</STRONG> (Thumb, 52 bytes, Stack size 24 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_GetNodeConfig))
    1140. 

  1140. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_DMAEx_List_GetNodeConfig &rArr; DMA_List_GetNodeConfig
    1141. 

  1141. </UL>
    1142. 

  1142. <BR>[Calls]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_GetNodeConfig
    1143. 

  1143. </UL>
    1144. 

  1144. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    1145. 

  1145. </UL>
    1146. 

  1146. 

  1147. <P><STRONG><a name="[f9]"></a>HAL_DMAEx_List_Init</STRONG> (Thumb, 898 bytes, Stack size 24 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_Init))
    1148. 

  1148. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_DMAEx_List_Init &rArr; DMA_List_Init
    1149. 

  1149. </UL>
    1150. 

  1150. <BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_Init
    1151. 

  1151. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1152. 

  1152. </UL>
    1153. 

  1153. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1154. 

  1154. </UL>
    1155. 

  1155. 

  1156. <P><STRONG><a name="[f7]"></a>HAL_DMAEx_List_InsertNode</STRONG> (Thumb, 410 bytes, Stack size 56 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_InsertNode))
    1157. 

  1157. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = HAL_DMAEx_List_InsertNode &rArr; DMA_List_FindNode
    1158. 

  1158. </UL>
    1159. 

  1159. <BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_FindNode
    1160. 

  1160. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_CheckNodesTypes
    1161. 

  1161. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_CheckNodesBaseAddresses
    1162. 

  1162. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_GetCLLRNodeInfo
    1163. 

  1163. </UL>
    1164. 

  1164. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1165. 

  1165. </UL>
    1166. 

  1166. 

  1167. <P><STRONG><a name="[fa]"></a>HAL_DMAEx_List_LinkQ</STRONG> (Thumb, 418 bytes, Stack size 20 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_LinkQ))
    1168. 

  1168. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_DMAEx_List_LinkQ
    1169. 

  1169. </UL>
    1170. 

  1170. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1171. 

  1171. </UL>
    1172. 

  1172. 

  1173. <P><STRONG><a name="[f8]"></a>HAL_DMAEx_List_SetCircularMode</STRONG> (Thumb, 202 bytes, Stack size 48 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_SetCircularMode))
    1174. 

  1174. <BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = HAL_DMAEx_List_SetCircularMode &rArr; DMA_List_FindNode
    1175. 

  1175. </UL>
    1176. 

  1176. <BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_FindNode
    1177. 

  1177. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_GetCLLRNodeInfo
    1178. 

  1178. </UL>
    1179. 

  1179. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1180. 

  1180. </UL>
    1181. 

  1181. 

  1182. <P><STRONG><a name="[ff]"></a>HAL_DMAEx_List_Start_IT</STRONG> (Thumb, 326 bytes, Stack size 32 bytes, stm32h5xx_hal_dma_ex.o(.text.HAL_DMAEx_List_Start_IT))
    1183. 

  1183. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_DMAEx_List_Start_IT &rArr; DMA_List_GetCLLRNodeInfo
    1184. 

  1184. </UL>
    1185. 

  1185. <BR>[Calls]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_List_GetCLLRNodeInfo
    1186. 

  1186. </UL>
    1187. 

  1187. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    1188. 

  1188. </UL>
    1189. 

  1189. 

  1190. <P><STRONG><a name="[102]"></a>HAL_DMA_Abort</STRONG> (Thumb, 278 bytes, Stack size 24 bytes, stm32h5xx_hal_dma.o(.text.HAL_DMA_Abort))
    1191. 

  1191. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_Abort
    1192. 

  1192. </UL>
    1193. 

  1193. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1194. 

  1194. </UL>
    1195. 

  1195. <BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Stop_DMA
    1196. 

  1196. </UL>
    1197. 

  1197. 

  1198. <P><STRONG><a name="[fb]"></a>HAL_DMA_ConfigChannelAttributes</STRONG> (Thumb, 114 bytes, Stack size 20 bytes, stm32h5xx_hal_dma.o(.text.HAL_DMA_ConfigChannelAttributes))
    1199. 

  1199. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_DMA_ConfigChannelAttributes
    1200. 

  1200. </UL>
    1201. 

  1201. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1202. 

  1202. </UL>
    1203. 

  1203. 

  1204. <P><STRONG><a name="[c9]"></a>HAL_DMA_IRQHandler</STRONG> (Thumb, 724 bytes, Stack size 24 bytes, stm32h5xx_hal_dma.o(.text.HAL_DMA_IRQHandler))
    1205. 

  1205. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_IRQHandler
    1206. 

  1206. </UL>
    1207. 

  1207. <BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GPDMA1_Channel0_IRQHandler
    1208. 

  1208. </UL>
    1209. 

  1209. 

  1210. <P><STRONG><a name="[100]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 226 bytes, Stack size 32 bytes, stm32h5xx_hal_dma.o(.text.HAL_DMA_Start_IT))
    1211. 

  1211. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1212. 

  1212. </UL>
    1213. 

  1213. <BR>[Calls]<UL><LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
    1214. 

  1214. </UL>
    1215. 

  1215. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    1216. 

  1216. </UL>
    1217. 

  1217. 

  1218. <P><STRONG><a name="[ac]"></a>HAL_Delay</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, stm32h5xx_hal.o(.text.HAL_Delay))
    1219. 

  1219. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_Delay
    1220. 

  1220. </UL>
    1221. 

  1221. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1222. 

  1222. </UL>
    1223. 

  1223. <BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    1224. 

  1224. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    1225. 

  1225. </UL>
    1226. 

  1226. 

  1227. <P><STRONG><a name="[17d]"></a>HAL_FDCAN_ActivateNotification</STRONG> (Thumb, 522 bytes, Stack size 24 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_ActivateNotification))
    1228. 

  1228. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_FDCAN_ActivateNotification
    1229. 

  1229. </UL>
    1230. 

  1230. <BR>[Called By]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    1231. 

  1231. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    1232. 

  1232. </UL>
    1233. 

  1233. 

  1234. <P><STRONG><a name="[10b]"></a>HAL_FDCAN_AddMessageToTxFifoQ</STRONG> (Thumb, 154 bytes, Stack size 32 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_AddMessageToTxFifoQ))
    1235. 

  1235. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    1236. 

  1236. </UL>
    1237. 

  1237. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FDCAN_CopyMessageToRAM
    1238. 

  1238. </UL>
    1239. 

  1239. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    1240. 

  1240. </UL>
    1241. 

  1241. 

  1242. <P><STRONG><a name="[17b]"></a>HAL_FDCAN_ConfigFilter</STRONG> (Thumb, 182 bytes, Stack size 28 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_ConfigFilter))
    1243. 

  1243. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_FDCAN_ConfigFilter
    1244. 

  1244. </UL>
    1245. 

  1245. <BR>[Called By]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    1246. 

  1246. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    1247. 

  1247. </UL>
    1248. 

  1248. 

  1249. <P><STRONG><a name="[17c]"></a>HAL_FDCAN_ConfigGlobalFilter</STRONG> (Thumb, 102 bytes, Stack size 20 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_ConfigGlobalFilter))
    1250. 

  1250. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_FDCAN_ConfigGlobalFilter
    1251. 

  1251. </UL>
    1252. 

  1252. <BR>[Called By]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    1253. 

  1253. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    1254. 

  1254. </UL>
    1255. 

  1255. 

  1256. <P><STRONG><a name="[117]"></a>HAL_FDCAN_ErrorCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_ErrorCallback))
    1257. 

  1257. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FDCAN_ErrorCallback
    1258. 

  1258. </UL>
    1259. 

  1259. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1260. 

  1260. </UL>
    1261. 

  1261. 

  1262. <P><STRONG><a name="[116]"></a>HAL_FDCAN_ErrorStatusCallback</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_ErrorStatusCallback))
    1263. 

  1263. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_FDCAN_ErrorStatusCallback
    1264. 

  1264. </UL>
    1265. 

  1265. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1266. 

  1266. </UL>
    1267. 

  1267. 

  1268. <P><STRONG><a name="[11d]"></a>HAL_FDCAN_GetRxFifoFillLevel</STRONG> (Thumb, 52 bytes, Stack size 12 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_GetRxFifoFillLevel))
    1269. 

  1269. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_FDCAN_GetRxFifoFillLevel
    1270. 

  1270. </UL>
    1271. 

  1271. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    1272. 

  1272. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    1273. 

  1273. </UL>
    1274. 

  1274. 

  1275. <P><STRONG><a name="[11c]"></a>HAL_FDCAN_GetRxMessage</STRONG> (Thumb, 560 bytes, Stack size 40 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_GetRxMessage))
    1276. 

  1276. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_FDCAN_GetRxMessage
    1277. 

  1277. </UL>
    1278. 

  1278. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    1279. 

  1279. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    1280. 

  1280. </UL>
    1281. 

  1281. 

  1282. <P><STRONG><a name="[10d]"></a>HAL_FDCAN_HighPriorityMessageCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_HighPriorityMessageCallback))
    1283. 

  1283. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FDCAN_HighPriorityMessageCallback
    1284. 

  1284. </UL>
    1285. 

  1285. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1286. 

  1286. </UL>
    1287. 

  1287. 

  1288. <P><STRONG><a name="[c2]"></a>HAL_FDCAN_IRQHandler</STRONG> (Thumb, 696 bytes, Stack size 48 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_IRQHandler))
    1289. 

  1289. <BR><BR>[Stack]<UL><LI>Max Depth = 320 + Unknown Stack Size
    1290. 

  1290. <LI>Call Chain = HAL_FDCAN_IRQHandler &rArr; HAL_FDCAN_RxFifo1Callback &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    1291. 

  1291. </UL>
    1292. 

  1292. <BR>[Calls]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    1293. 

  1293. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    1294. 

  1294. <LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ErrorCallback
    1295. 

  1295. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ErrorStatusCallback
    1296. 

  1296. <LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TimeoutOccurredCallback
    1297. 

  1297. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TimestampWraparoundCallback
    1298. 

  1298. <LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TxBufferCompleteCallback
    1299. 

  1299. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TxFifoEmptyCallback
    1300. 

  1300. <LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TxEventFifoCallback
    1301. 

  1301. <LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_TxBufferAbortCallback
    1302. 

  1302. <LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_HighPriorityMessageCallback
    1303. 

  1303. </UL>
    1304. 

  1304. <BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FDCAN2_IT0_IRQHandler
    1305. 

  1305. <LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FDCAN1_IT0_IRQHandler
    1306. 

  1306. </UL>
    1307. 

  1307. 

  1308. <P><STRONG><a name="[118]"></a>HAL_FDCAN_Init</STRONG> (Thumb, 716 bytes, Stack size 24 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_Init))
    1309. 

  1309. <BR><BR>[Stack]<UL><LI>Max Depth = 448 + Unknown Stack Size
    1310. 

  1310. <LI>Call Chain = HAL_FDCAN_Init &rArr; HAL_FDCAN_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1311. 

  1311. </UL>
    1312. 

  1312. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1313. 

  1313. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    1314. 

  1314. <LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FDCAN_CalcultateRamBlockAddresses
    1315. 

  1315. </UL>
    1316. 

  1316. <BR>[Called By]<UL><LI><a href="#[16c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN2_Init
    1317. 

  1317. <LI><a href="#[16b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN1_Init
    1318. 

  1318. </UL>
    1319. 

  1319. 

  1320. <P><STRONG><a name="[119]"></a>HAL_FDCAN_MspInit</STRONG> (Thumb, 398 bytes, Stack size 272 bytes, fdcan.o(.text.HAL_FDCAN_MspInit))
    1321. 

  1321. <BR><BR>[Stack]<UL><LI>Max Depth = 424 + Unknown Stack Size
    1322. 

  1322. <LI>Call Chain = HAL_FDCAN_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1323. 

  1323. </UL>
    1324. 

  1324. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1325. 

  1325. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1326. 

  1326. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1327. 

  1327. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1328. 

  1328. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1329. 

  1329. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr8
    1330. 

  1330. </UL>
    1331. 

  1331. <BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Init
    1332. 

  1332. </UL>
    1333. 

  1333. 

  1334. <P><STRONG><a name="[110]"></a>HAL_FDCAN_RxFifo0Callback</STRONG> (Thumb, 152 bytes, Stack size 128 bytes, can_link.o(.text.HAL_FDCAN_RxFifo0Callback))
    1335. 

  1335. <BR><BR>[Stack]<UL><LI>Max Depth = 216 + Unknown Stack Size
    1336. 

  1336. <LI>Call Chain = HAL_FDCAN_RxFifo0Callback &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    1337. 

  1337. </UL>
    1338. 

  1338. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    1339. 

  1339. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Txmsg_Target_Init
    1340. 

  1340. <LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CanGetHalDataLengthToDec
    1341. 

  1341. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_GetRxFifoFillLevel
    1342. 

  1342. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_GetRxMessage
    1343. 

  1343. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1344. 

  1344. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    1345. 

  1345. </UL>
    1346. 

  1346. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1347. 

  1347. </UL>
    1348. 

  1348. 

  1349. <P><STRONG><a name="[111]"></a>HAL_FDCAN_RxFifo1Callback</STRONG> (Thumb, 338 bytes, Stack size 184 bytes, can_link.o(.text.HAL_FDCAN_RxFifo1Callback))
    1350. 

  1350. <BR><BR>[Stack]<UL><LI>Max Depth = 272 + Unknown Stack Size
    1351. 

  1351. <LI>Call Chain = HAL_FDCAN_RxFifo1Callback &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    1352. 

  1352. </UL>
    1353. 

  1353. <BR>[Calls]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPRAY2_PWM_CONTROL
    1354. 

  1354. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPRAY1_PWM_CONTROL
    1355. 

  1355. <LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PUMP2_PWM_CONTROL
    1356. 

  1356. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PUMP1_PWM_CONTROL
    1357. 

  1357. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_in
    1358. 

  1358. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    1359. 

  1359. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Txmsg_Target_Init
    1360. 

  1360. <LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CanGetHalDataLengthToDec
    1361. 

  1361. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_GetRxFifoFillLevel
    1362. 

  1362. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_GetRxMessage
    1363. 

  1363. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1364. 

  1364. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    1365. 

  1365. </UL>
    1366. 

  1366. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1367. 

  1367. </UL>
    1368. 

  1368. 

  1369. <P><STRONG><a name="[17e]"></a>HAL_FDCAN_Start</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_Start))
    1370. 

  1370. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_FDCAN_Start
    1371. 

  1371. </UL>
    1372. 

  1372. <BR>[Called By]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    1373. 

  1373. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    1374. 

  1374. </UL>
    1375. 

  1375. 

  1376. <P><STRONG><a name="[115]"></a>HAL_FDCAN_TimeoutOccurredCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TimeoutOccurredCallback))
    1377. 

  1377. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FDCAN_TimeoutOccurredCallback
    1378. 

  1378. </UL>
    1379. 

  1379. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1380. 

  1380. </UL>
    1381. 

  1381. 

  1382. <P><STRONG><a name="[114]"></a>HAL_FDCAN_TimestampWraparoundCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TimestampWraparoundCallback))
    1383. 

  1383. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FDCAN_TimestampWraparoundCallback
    1384. 

  1384. </UL>
    1385. 

  1385. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1386. 

  1386. </UL>
    1387. 

  1387. 

  1388. <P><STRONG><a name="[10e]"></a>HAL_FDCAN_TxBufferAbortCallback</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TxBufferAbortCallback))
    1389. 

  1389. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_FDCAN_TxBufferAbortCallback
    1390. 

  1390. </UL>
    1391. 

  1391. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1392. 

  1392. </UL>
    1393. 

  1393. 

  1394. <P><STRONG><a name="[113]"></a>HAL_FDCAN_TxBufferCompleteCallback</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TxBufferCompleteCallback))
    1395. 

  1395. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_FDCAN_TxBufferCompleteCallback
    1396. 

  1396. </UL>
    1397. 

  1397. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1398. 

  1398. </UL>
    1399. 

  1399. 

  1400. <P><STRONG><a name="[10f]"></a>HAL_FDCAN_TxEventFifoCallback</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TxEventFifoCallback))
    1401. 

  1401. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_FDCAN_TxEventFifoCallback
    1402. 

  1402. </UL>
    1403. 

  1403. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1404. 

  1404. </UL>
    1405. 

  1405. 

  1406. <P><STRONG><a name="[112]"></a>HAL_FDCAN_TxFifoEmptyCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_fdcan.o(.text.HAL_FDCAN_TxFifoEmptyCallback))
    1407. 

  1407. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FDCAN_TxFifoEmptyCallback
    1408. 

  1408. </UL>
    1409. 

  1409. <BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_IRQHandler
    1410. 

  1410. </UL>
    1411. 

  1411. 

  1412. <P><STRONG><a name="[124]"></a>HAL_FLASHEx_Erase</STRONG> (Thumb, 322 bytes, Stack size 32 bytes, stm32h5xx_hal_flash_ex.o(.text.HAL_FLASHEx_Erase))
    1413. 

  1413. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_FLASHEx_Erase &rArr; FLASH_WaitForLastOperation
    1414. 

  1414. </UL>
    1415. 

  1415. <BR>[Calls]<UL><LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_OBKErase
    1416. 

  1416. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_MassErase
    1417. 

  1417. <LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Erase_Sector
    1418. 

  1418. <LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1419. 

  1419. </UL>
    1420. 

  1420. <BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_erase_cpu_flash
    1421. 

  1421. </UL>
    1422. 

  1422. 

  1423. <P><STRONG><a name="[19f]"></a>HAL_FLASH_Lock</STRONG> (Thumb, 48 bytes, Stack size 4 bytes, stm32h5xx_hal_flash.o(.text.HAL_FLASH_Lock))
    1424. 

  1424. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FLASH_Lock
    1425. 

  1425. </UL>
    1426. 

  1426. <BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_erase_cpu_flash
    1427. 

  1427. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_write_cpu_flash
    1428. 

  1428. </UL>
    1429. 

  1429. 

  1430. <P><STRONG><a name="[128]"></a>HAL_FLASH_Program</STRONG> (Thumb, 276 bytes, Stack size 32 bytes, stm32h5xx_hal_flash.o(.text.HAL_FLASH_Program))
    1431. 

  1431. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_FLASH_Program &rArr; FLASH_Program_QuadWord_OBK
    1432. 

  1432. </UL>
    1433. 

  1433. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1434. 

  1434. <LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Program_Word
    1435. 

  1435. <LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Program_HalfWord
    1436. 

  1436. <LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Program_QuadWord_OBK
    1437. 

  1437. <LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_Program_QuadWord
    1438. 

  1438. </UL>
    1439. 

  1439. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_write_cpu_flash
    1440. 

  1440. </UL>
    1441. 

  1441. 

  1442. <P><STRONG><a name="[19d]"></a>HAL_FLASH_Unlock</STRONG> (Thumb, 86 bytes, Stack size 4 bytes, stm32h5xx_hal_flash.o(.text.HAL_FLASH_Unlock))
    1443. 

  1443. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_FLASH_Unlock
    1444. 

  1444. </UL>
    1445. 

  1445. <BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_erase_cpu_flash
    1446. 

  1446. <LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_write_cpu_flash
    1447. 

  1447. </UL>
    1448. 

  1448. 

  1449. <P><STRONG><a name="[f5]"></a>HAL_GPIO_Init</STRONG> (Thumb, 746 bytes, Stack size 20 bytes, stm32h5xx_hal_gpio.o(.text.HAL_GPIO_Init))
    1450. 

  1450. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_GPIO_Init
    1451. 

  1451. </UL>
    1452. 

  1452. <BR>[Called By]<UL><LI><a href="#[167]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1453. 

  1453. <LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1454. 

  1454. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    1455. 

  1455. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1456. 

  1456. <LI><a href="#[16e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    1457. 

  1457. </UL>
    1458. 

  1458. 

  1459. <P><STRONG><a name="[18c]"></a>HAL_GPIO_ReadPin</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, stm32h5xx_hal_gpio.o(.text.HAL_GPIO_ReadPin))
    1460. 

  1460. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_ReadPin
    1461. 

  1461. </UL>
    1462. 

  1462. <BR>[Called By]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    1463. 

  1463. </UL>
    1464. 

  1464. 

  1465. <P><STRONG><a name="[16f]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, stm32h5xx_hal_gpio.o(.text.HAL_GPIO_WritePin))
    1466. 

  1466. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_WritePin
    1467. 

  1467. </UL>
    1468. 

  1468. <BR>[Called By]<UL><LI><a href="#[183]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_TIM_PWM_INIT
    1469. 

  1469. <LI><a href="#[16e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    1470. 

  1470. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SET_RED_LED
    1471. 

  1471. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    1472. 

  1472. </UL>
    1473. 

  1473. 

  1474. <P><STRONG><a name="[9f]"></a>HAL_GetTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32h5xx_hal.o(.text.HAL_GetTick))
    1475. 

  1475. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;FLASH_WaitForLastOperation
    1476. 

  1476. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
    1477. 

  1477. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
    1478. 

  1478. <LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
    1479. 

  1479. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Enable
    1480. 

  1480. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    1481. 

  1481. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    1482. 

  1482. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Init
    1483. 

  1483. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_Init
    1484. 

  1484. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1485. 

  1485. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1486. 

  1486. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    1487. 

  1487. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    1488. 

  1488. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    1489. 

  1489. </UL>
    1490. 

  1490. 

  1491. <P><STRONG><a name="[171]"></a>HAL_ICACHE_Enable</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32h5xx_hal_icache.o(.text.HAL_ICACHE_Enable))
    1492. 

  1492. <BR><BR>[Called By]<UL><LI><a href="#[170]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ICACHE_Init
    1493. 

  1493. </UL>
    1494. 

  1494. 

  1495. <P><STRONG><a name="[191]"></a>HAL_IncTick</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32h5xx_hal.o(.text.HAL_IncTick))
    1496. 

  1496. <BR><BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
    1497. 

  1497. </UL>
    1498. 

  1498. 

  1499. <P><STRONG><a name="[12d]"></a>HAL_Init</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, stm32h5xx_hal.o(.text.HAL_Init))
    1500. 

  1500. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1501. 

  1501. </UL>
    1502. 

  1502. <BR>[Calls]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1503. 

  1503. <LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1504. 

  1504. <LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
    1505. 

  1505. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_CLKSourceConfig
    1506. 

  1506. <LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
    1507. 

  1507. </UL>
    1508. 

  1508. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1509. 

  1509. </UL>
    1510. 

  1510. 

  1511. <P><STRONG><a name="[131]"></a>HAL_InitTick</STRONG> (Thumb, 276 bytes, Stack size 32 bytes, stm32h5xx_hal.o(.text.HAL_InitTick))
    1512. 

  1512. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1513. 

  1513. </UL>
    1514. 

  1514. <BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1515. 

  1515. <LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_GetCLKSourceConfig
    1516. 

  1516. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
    1517. 

  1517. </UL>
    1518. 

  1518. <BR>[Called By]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1519. 

  1519. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    1520. 

  1520. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1521. 

  1521. </UL>
    1522. 

  1522. 

  1523. <P><STRONG><a name="[132]"></a>HAL_MspInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h5xx_hal_msp.o(.text.HAL_MspInit))
    1524. 

  1524. <BR><BR>[Called By]<UL><LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1525. 

  1525. </UL>
    1526. 

  1526. 

  1527. <P><STRONG><a name="[fd]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, stm32h5xx_hal_cortex.o(.text.HAL_NVIC_EnableIRQ))
    1528. 

  1528. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_NVIC_EnableIRQ &rArr; __NVIC_EnableIRQ
    1529. 

  1529. </UL>
    1530. 

  1530. <BR>[Calls]<UL><LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
    1531. 

  1531. </UL>
    1532. 

  1532. <BR>[Called By]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
    1533. 

  1533. <LI><a href="#[167]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1534. 

  1534. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    1535. 

  1535. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1536. 

  1536. <LI><a href="#[16d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPDMA1_Init
    1537. 

  1537. </UL>
    1538. 

  1538. 

  1539. <P><STRONG><a name="[fc]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 46 bytes, Stack size 32 bytes, stm32h5xx_hal_cortex.o(.text.HAL_NVIC_SetPriority))
    1540. 

  1540. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1541. 

  1541. </UL>
    1542. 

  1542. <BR>[Calls]<UL><LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
    1543. 

  1543. <LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_EncodePriority
    1544. 

  1544. <LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_GetPriorityGrouping
    1545. 

  1545. </UL>
    1546. 

  1546. <BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1547. 

  1547. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
    1548. 

  1548. <LI><a href="#[167]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1549. 

  1549. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    1550. 

  1550. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1551. 

  1551. <LI><a href="#[16d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPDMA1_Init
    1552. 

  1552. </UL>
    1553. 

  1553. 

  1554. <P><STRONG><a name="[12e]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, stm32h5xx_hal_cortex.o(.text.HAL_NVIC_SetPriorityGrouping))
    1555. 

  1555. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_NVIC_SetPriorityGrouping &rArr; __NVIC_SetPriorityGrouping
    1556. 

  1556. </UL>
    1557. 

  1557. <BR>[Calls]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriorityGrouping
    1558. 

  1558. </UL>
    1559. 

  1559. <BR>[Called By]<UL><LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1560. 

  1560. </UL>
    1561. 

  1561. 

  1562. <P><STRONG><a name="[f3]"></a>HAL_RCCEx_PeriphCLKConfig</STRONG> (Thumb, 3998 bytes, Stack size 128 bytes, stm32h5xx_hal_rcc_ex.o(.text.HAL_RCCEx_PeriphCLKConfig))
    1563. 

  1563. <BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1564. 

  1564. </UL>
    1565. 

  1565. <BR>[Calls]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
    1566. 

  1566. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
    1567. 

  1567. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1568. 

  1568. </UL>
    1569. 

  1569. <BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_MspInit
    1570. 

  1570. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1571. 

  1571. </UL>
    1572. 

  1572. 

  1573. <P><STRONG><a name="[13c]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 1172 bytes, Stack size 32 bytes, stm32h5xx_hal_rcc.o(.text.HAL_RCC_ClockConfig))
    1574. 

  1574. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1575. 

  1575. </UL>
    1576. 

  1576. <BR>[Calls]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1577. 

  1577. <LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1578. 

  1578. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1579. 

  1579. </UL>
    1580. 

  1580. <BR>[Called By]<UL><LI><a href="#[192]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1581. 

  1581. </UL>
    1582. 

  1582. 

  1583. <P><STRONG><a name="[13d]"></a>HAL_RCC_GetHCLKFreq</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, stm32h5xx_hal_rcc.o(.text.HAL_RCC_GetHCLKFreq))
    1584. 

  1584. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1585. 

  1585. </UL>
    1586. 

  1586. <BR>[Calls]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1587. 

  1587. </UL>
    1588. 

  1588. <BR>[Called By]<UL><LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    1589. 

  1589. </UL>
    1590. 

  1590. 

  1591. <P><STRONG><a name="[12f]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 700 bytes, Stack size 36 bytes, stm32h5xx_hal_rcc.o(.text.HAL_RCC_GetSysClockFreq))
    1592. 

  1592. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_RCC_GetSysClockFreq
    1593. 

  1593. </UL>
    1594. 

  1594. <BR>[Called By]<UL><LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1595. 

  1595. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1596. 

  1596. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1597. 

  1597. </UL>
    1598. 

  1598. 

  1599. <P><STRONG><a name="[13e]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 2556 bytes, Stack size 40 bytes, stm32h5xx_hal_rcc.o(.text.HAL_RCC_OscConfig))
    1600. 

  1600. <BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = HAL_RCC_OscConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1601. 

  1601. </UL>
    1602. 

  1602. <BR>[Calls]<UL><LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1603. 

  1603. <LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1604. 

  1604. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1605. 

  1605. </UL>
    1606. 

  1606. <BR>[Called By]<UL><LI><a href="#[192]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1607. 

  1607. </UL>
    1608. 

  1608. 

  1609. <P><STRONG><a name="[130]"></a>HAL_SYSTICK_CLKSourceConfig</STRONG> (Thumb, 154 bytes, Stack size 8 bytes, stm32h5xx_hal_cortex.o(.text.HAL_SYSTICK_CLKSourceConfig))
    1610. 

  1610. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SYSTICK_CLKSourceConfig
    1611. 

  1611. </UL>
    1612. 

  1612. <BR>[Called By]<UL><LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1613. 

  1613. </UL>
    1614. 

  1614. 

  1615. <P><STRONG><a name="[134]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, stm32h5xx_hal_cortex.o(.text.HAL_SYSTICK_Config))
    1616. 

  1616. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SYSTICK_Config
    1617. 

  1617. </UL>
    1618. 

  1618. <BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1619. 

  1619. </UL>
    1620. 

  1620. 

  1621. <P><STRONG><a name="[133]"></a>HAL_SYSTICK_GetCLKSourceConfig</STRONG> (Thumb, 98 bytes, Stack size 12 bytes, stm32h5xx_hal_cortex.o(.text.HAL_SYSTICK_GetCLKSourceConfig))
    1622. 

  1622. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_SYSTICK_GetCLKSourceConfig
    1623. 

  1623. </UL>
    1624. 

  1624. <BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1625. 

  1625. </UL>
    1626. 

  1626. 

  1627. <P><STRONG><a name="[157]"></a>HAL_TIMEx_Break2Callback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_Break2Callback))
    1628. 

  1628. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_Break2Callback
    1629. 

  1629. </UL>
    1630. 

  1630. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1631. 

  1631. </UL>
    1632. 

  1632. 

  1633. <P><STRONG><a name="[156]"></a>HAL_TIMEx_BreakCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_BreakCallback))
    1634. 

  1634. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_BreakCallback
    1635. 

  1635. </UL>
    1636. 

  1636. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1637. 

  1637. </UL>
    1638. 

  1638. 

  1639. <P><STRONG><a name="[159]"></a>HAL_TIMEx_CommutCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_CommutCallback))
    1640. 

  1640. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_CommutCallback
    1641. 

  1641. </UL>
    1642. 

  1642. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1643. 

  1643. </UL>
    1644. 

  1644. 

  1645. <P><STRONG><a name="[175]"></a>HAL_TIMEx_ConfigBreakDeadTime</STRONG> (Thumb, 340 bytes, Stack size 16 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_ConfigBreakDeadTime))
    1646. 

  1646. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIMEx_ConfigBreakDeadTime
    1647. 

  1647. </UL>
    1648. 

  1648. <BR>[Called By]<UL><LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1649. 

  1649. </UL>
    1650. 

  1650. 

  1651. <P><STRONG><a name="[15b]"></a>HAL_TIMEx_DirectionChangeCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_DirectionChangeCallback))
    1652. 

  1652. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_DirectionChangeCallback
    1653. 

  1653. </UL>
    1654. 

  1654. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1655. 

  1655. </UL>
    1656. 

  1656. 

  1657. <P><STRONG><a name="[15a]"></a>HAL_TIMEx_EncoderIndexCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_EncoderIndexCallback))
    1658. 

  1658. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_EncoderIndexCallback
    1659. 

  1659. </UL>
    1660. 

  1660. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1661. 

  1661. </UL>
    1662. 

  1662. 

  1663. <P><STRONG><a name="[15c]"></a>HAL_TIMEx_IndexErrorCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_IndexErrorCallback))
    1664. 

  1664. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_IndexErrorCallback
    1665. 

  1665. </UL>
    1666. 

  1666. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1667. 

  1667. </UL>
    1668. 

  1668. 

  1669. <P><STRONG><a name="[174]"></a>HAL_TIMEx_MasterConfigSynchronization</STRONG> (Thumb, 530 bytes, Stack size 20 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_MasterConfigSynchronization))
    1670. 

  1670. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_TIMEx_MasterConfigSynchronization
    1671. 

  1671. </UL>
    1672. 

  1672. <BR>[Called By]<UL><LI><a href="#[179]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM5_Init
    1673. 

  1673. <LI><a href="#[178]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1674. 

  1674. <LI><a href="#[177]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1675. 

  1675. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1676. 

  1676. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1677. 

  1677. </UL>
    1678. 

  1678. 

  1679. <P><STRONG><a name="[15d]"></a>HAL_TIMEx_TransitionErrorCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim_ex.o(.text.HAL_TIMEx_TransitionErrorCallback))
    1680. 

  1680. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIMEx_TransitionErrorCallback
    1681. 

  1681. </UL>
    1682. 

  1682. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1683. 

  1683. </UL>
    1684. 

  1684. 

  1685. <P><STRONG><a name="[13f]"></a>HAL_TIM_Base_Init</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_Base_Init))
    1686. 

  1686. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_TIM_Base_Init &rArr; HAL_TIM_Base_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1687. 

  1687. </UL>
    1688. 

  1688. <BR>[Calls]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
    1689. 

  1689. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1690. 

  1690. </UL>
    1691. 

  1691. <BR>[Called By]<UL><LI><a href="#[179]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM5_Init
    1692. 

  1692. <LI><a href="#[177]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1693. 

  1693. </UL>
    1694. 

  1694. 

  1695. <P><STRONG><a name="[140]"></a>HAL_TIM_Base_MspInit</STRONG> (Thumb, 130 bytes, Stack size 24 bytes, tim.o(.text.HAL_TIM_Base_MspInit))
    1696. 

  1696. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_TIM_Base_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1697. 

  1697. </UL>
    1698. 

  1698. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1699. 

  1699. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1700. 

  1700. </UL>
    1701. 

  1701. <BR>[Called By]<UL><LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    1702. 

  1702. </UL>
    1703. 

  1703. 

  1704. <P><STRONG><a name="[1a1]"></a>HAL_TIM_Base_Start</STRONG> (Thumb, 390 bytes, Stack size 12 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_Base_Start))
    1705. 

  1705. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_TIM_Base_Start
    1706. 

  1706. </UL>
    1707. 

  1707. <BR>[Called By]<UL><LI><a href="#[18a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
    1708. 

  1708. </UL>
    1709. 

  1709. 

  1710. <P><STRONG><a name="[184]"></a>HAL_TIM_Base_Start_IT</STRONG> (Thumb, 402 bytes, Stack size 12 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_Base_Start_IT))
    1711. 

  1711. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_TIM_Base_Start_IT
    1712. 

  1712. </UL>
    1713. 

  1713. <BR>[Called By]<UL><LI><a href="#[183]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_TIM_PWM_INIT
    1714. 

  1714. </UL>
    1715. 

  1715. 

  1716. <P><STRONG><a name="[1a2]"></a>HAL_TIM_Base_Stop</STRONG> (Thumb, 70 bytes, Stack size 4 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_Base_Stop))
    1717. 

  1717. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_Base_Stop
    1718. 

  1718. </UL>
    1719. 

  1719. <BR>[Called By]<UL><LI><a href="#[18a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
    1720. 

  1720. </UL>
    1721. 

  1721. 

  1722. <P><STRONG><a name="[142]"></a>HAL_TIM_ConfigClockSource</STRONG> (Thumb, 520 bytes, Stack size 32 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_ConfigClockSource))
    1723. 

  1723. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = HAL_TIM_ConfigClockSource &rArr; TIM_ETR_SetConfig
    1724. 

  1724. </UL>
    1725. 

  1725. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETR_SetConfig
    1726. 

  1726. <LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI2_ConfigInputStage
    1727. 

  1727. <LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITRx_SetConfig
    1728. 

  1728. <LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI1_ConfigInputStage
    1729. 

  1729. </UL>
    1730. 

  1730. <BR>[Called By]<UL><LI><a href="#[179]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM5_Init
    1731. 

  1731. <LI><a href="#[177]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1732. 

  1732. </UL>
    1733. 

  1733. 

  1734. <P><STRONG><a name="[147]"></a>HAL_TIM_IC_CaptureCallback</STRONG> (Thumb, 250 bytes, Stack size 48 bytes, soft_flow.o(.text.HAL_TIM_IC_CaptureCallback))
    1735. 

  1735. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_TIM_IC_CaptureCallback &rArr; HAL_TIM_ReadCapturedValue
    1736. 

  1736. </UL>
    1737. 

  1737. <BR>[Calls]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ReadCapturedValue
    1738. 

  1738. </UL>
    1739. 

  1739. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1740. 

  1740. </UL>
    1741. 

  1741. 

  1742. <P><STRONG><a name="[149]"></a>HAL_TIM_IC_ConfigChannel</STRONG> (Thumb, 304 bytes, Stack size 32 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_IC_ConfigChannel))
    1743. 

  1743. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = HAL_TIM_IC_ConfigChannel &rArr; TIM_TI1_SetConfig
    1744. 

  1744. </UL>
    1745. 

  1745. <BR>[Calls]<UL><LI><a href="#[14a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI1_SetConfig
    1746. 

  1746. <LI><a href="#[14d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI4_SetConfig
    1747. 

  1747. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI3_SetConfig
    1748. 

  1748. <LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI2_SetConfig
    1749. 

  1749. </UL>
    1750. 

  1750. <BR>[Called By]<UL><LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1751. 

  1751. </UL>
    1752. 

  1752. 

  1753. <P><STRONG><a name="[14e]"></a>HAL_TIM_IC_Init</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_IC_Init))
    1754. 

  1754. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_TIM_IC_Init &rArr; TIM_Base_SetConfig
    1755. 

  1755. </UL>
    1756. 

  1756. <BR>[Calls]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_MspInit
    1757. 

  1757. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1758. 

  1758. </UL>
    1759. 

  1759. <BR>[Called By]<UL><LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1760. 

  1760. </UL>
    1761. 

  1761. 

  1762. <P><STRONG><a name="[14f]"></a>HAL_TIM_IC_MspInit</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_IC_MspInit))
    1763. 

  1763. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_IC_MspInit
    1764. 

  1764. </UL>
    1765. 

  1765. <BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_Init
    1766. 

  1766. </UL>
    1767. 

  1767. 

  1768. <P><STRONG><a name="[150]"></a>HAL_TIM_IC_Start_IT</STRONG> (Thumb, 936 bytes, Stack size 96 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_IC_Start_IT))
    1769. 

  1769. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_TIM_IC_Start_IT &rArr; TIM_CCxChannelCmd
    1770. 

  1770. </UL>
    1771. 

  1771. <BR>[Calls]<UL><LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CCxChannelCmd
    1772. 

  1772. </UL>
    1773. 

  1773. <BR>[Called By]<UL><LI><a href="#[183]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_TIM_PWM_INIT
    1774. 

  1774. </UL>
    1775. 

  1775. 

  1776. <P><STRONG><a name="[152]"></a>HAL_TIM_IRQHandler</STRONG> (Thumb, 768 bytes, Stack size 24 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_IRQHandler))
    1777. 

  1777. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_TIM_IRQHandler &rArr; HAL_TIM_IC_CaptureCallback &rArr; HAL_TIM_ReadCapturedValue
    1778. 

  1778. </UL>
    1779. 

  1779. <BR>[Calls]<UL><LI><a href="#[15d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_TransitionErrorCallback
    1780. 

  1780. <LI><a href="#[15c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_IndexErrorCallback
    1781. 

  1781. <LI><a href="#[15b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_DirectionChangeCallback
    1782. 

  1782. <LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_EncoderIndexCallback
    1783. 

  1783. <LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_CommutCallback
    1784. 

  1784. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_TriggerCallback
    1785. 

  1785. <LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_Break2Callback
    1786. 

  1786. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_BreakCallback
    1787. 

  1787. <LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_OC_DelayElapsedCallback
    1788. 

  1788. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_PulseFinishedCallback
    1789. 

  1789. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
    1790. 

  1790. <LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_CaptureCallback
    1791. 

  1791. </UL>
    1792. 

  1792. <BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM5_IRQHandler
    1793. 

  1793. <LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM2_IRQHandler
    1794. 

  1794. </UL>
    1795. 

  1795. 

  1796. <P><STRONG><a name="[15e]"></a>HAL_TIM_MspPostInit</STRONG> (Thumb, 264 bytes, Stack size 48 bytes, tim.o(.text.HAL_TIM_MspPostInit))
    1797. 

  1797. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1798. 

  1798. </UL>
    1799. 

  1799. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1800. 

  1800. </UL>
    1801. 

  1801. <BR>[Called By]<UL><LI><a href="#[172]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM12_Init
    1802. 

  1802. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1803. 

  1803. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1804. 

  1804. </UL>
    1805. 

  1805. 

  1806. <P><STRONG><a name="[153]"></a>HAL_TIM_OC_DelayElapsedCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_OC_DelayElapsedCallback))
    1807. 

  1807. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_OC_DelayElapsedCallback
    1808. 

  1808. </UL>
    1809. 

  1809. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1810. 

  1810. </UL>
    1811. 

  1811. 

  1812. <P><STRONG><a name="[15f]"></a>HAL_TIM_PWM_ConfigChannel</STRONG> (Thumb, 432 bytes, Stack size 32 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_PWM_ConfigChannel))
    1813. 

  1813. <BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = HAL_TIM_PWM_ConfigChannel &rArr; TIM_OC2_SetConfig
    1814. 

  1814. </UL>
    1815. 

  1815. <BR>[Calls]<UL><LI><a href="#[161]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC2_SetConfig
    1816. 

  1816. <LI><a href="#[165]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC6_SetConfig
    1817. 

  1817. <LI><a href="#[164]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC5_SetConfig
    1818. 

  1818. <LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC4_SetConfig
    1819. 

  1819. <LI><a href="#[162]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC3_SetConfig
    1820. 

  1820. <LI><a href="#[160]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC1_SetConfig
    1821. 

  1821. </UL>
    1822. 

  1822. <BR>[Called By]<UL><LI><a href="#[172]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM12_Init
    1823. 

  1823. <LI><a href="#[178]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1824. 

  1824. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1825. 

  1825. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1826. 

  1826. </UL>
    1827. 

  1827. 

  1828. <P><STRONG><a name="[166]"></a>HAL_TIM_PWM_Init</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_PWM_Init))
    1829. 

  1829. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1830. 

  1830. </UL>
    1831. 

  1831. <BR>[Calls]<UL><LI><a href="#[167]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1832. 

  1832. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1833. 

  1833. </UL>
    1834. 

  1834. <BR>[Called By]<UL><LI><a href="#[172]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM12_Init
    1835. 

  1835. <LI><a href="#[178]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1836. 

  1836. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    1837. 

  1837. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1838. 

  1838. </UL>
    1839. 

  1839. 

  1840. <P><STRONG><a name="[167]"></a>HAL_TIM_PWM_MspInit</STRONG> (Thumb, 302 bytes, Stack size 64 bytes, tim.o(.text.HAL_TIM_PWM_MspInit))
    1841. 

  1841. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1842. 

  1842. </UL>
    1843. 

  1843. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1844. 

  1844. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1845. 

  1845. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1846. 

  1846. </UL>
    1847. 

  1847. <BR>[Called By]<UL><LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1848. 

  1848. </UL>
    1849. 

  1849. 

  1850. <P><STRONG><a name="[154]"></a>HAL_TIM_PWM_PulseFinishedCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_PWM_PulseFinishedCallback))
    1851. 

  1851. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_PWM_PulseFinishedCallback
    1852. 

  1852. </UL>
    1853. 

  1853. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1854. 

  1854. </UL>
    1855. 

  1855. 

  1856. <P><STRONG><a name="[168]"></a>HAL_TIM_PWM_Start</STRONG> (Thumb, 804 bytes, Stack size 72 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_PWM_Start))
    1857. 

  1857. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_TIM_PWM_Start &rArr; TIM_CCxChannelCmd
    1858. 

  1858. </UL>
    1859. 

  1859. <BR>[Calls]<UL><LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CCxChannelCmd
    1860. 

  1860. </UL>
    1861. 

  1861. <BR>[Called By]<UL><LI><a href="#[183]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_TIM_PWM_INIT
    1862. 

  1862. <LI><a href="#[180]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_ADC_INIT
    1863. 

  1863. </UL>
    1864. 

  1864. 

  1865. <P><STRONG><a name="[155]"></a>HAL_TIM_PeriodElapsedCallback</STRONG> (Thumb, 232 bytes, Stack size 4 bytes, soft_flow.o(.text.HAL_TIM_PeriodElapsedCallback))
    1866. 

  1866. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_PeriodElapsedCallback
    1867. 

  1867. </UL>
    1868. 

  1868. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1869. 

  1869. </UL>
    1870. 

  1870. 

  1871. <P><STRONG><a name="[148]"></a>HAL_TIM_ReadCapturedValue</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_ReadCapturedValue))
    1872. 

  1872. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIM_ReadCapturedValue
    1873. 

  1873. </UL>
    1874. 

  1874. <BR>[Called By]<UL><LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_CaptureCallback
    1875. 

  1875. </UL>
    1876. 

  1876. 

  1877. <P><STRONG><a name="[158]"></a>HAL_TIM_TriggerCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32h5xx_hal_tim.o(.text.HAL_TIM_TriggerCallback))
    1878. 

  1878. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_TIM_TriggerCallback
    1879. 

  1879. </UL>
    1880. 

  1880. <BR>[Called By]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1881. 

  1881. </UL>
    1882. 

  1882. 

  1883. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.HardFault_Handler))
    1884. 

  1884. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    1885. 

  1885. </UL>
    1886. 

  1886. <P><STRONG><a name="[16a]"></a>MX_ADC1_Init</STRONG> (Thumb, 318 bytes, Stack size 48 bytes, adc.o(.text.MX_ADC1_Init))
    1887. 

  1887. <BR><BR>[Stack]<UL><LI>Max Depth = 608 + Unknown Stack Size
    1888. 

  1888. <LI>Call Chain = MX_ADC1_Init &rArr; HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1889. 

  1889. </UL>
    1890. 

  1890. <BR>[Calls]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    1891. 

  1891. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    1892. 

  1892. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1893. 

  1893. </UL>
    1894. 

  1894. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1895. 

  1895. </UL>
    1896. 

  1896. 

  1897. <P><STRONG><a name="[16b]"></a>MX_FDCAN1_Init</STRONG> (Thumb, 90 bytes, Stack size 16 bytes, fdcan.o(.text.MX_FDCAN1_Init))
    1898. 

  1898. <BR><BR>[Stack]<UL><LI>Max Depth = 464 + Unknown Stack Size
    1899. 

  1899. <LI>Call Chain = MX_FDCAN1_Init &rArr; HAL_FDCAN_Init &rArr; HAL_FDCAN_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1900. 

  1900. </UL>
    1901. 

  1901. <BR>[Calls]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Init
    1902. 

  1902. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1903. 

  1903. </UL>
    1904. 

  1904. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1905. 

  1905. </UL>
    1906. 

  1906. 

  1907. <P><STRONG><a name="[16c]"></a>MX_FDCAN2_Init</STRONG> (Thumb, 90 bytes, Stack size 16 bytes, fdcan.o(.text.MX_FDCAN2_Init))
    1908. 

  1908. <BR><BR>[Stack]<UL><LI>Max Depth = 464 + Unknown Stack Size
    1909. 

  1909. <LI>Call Chain = MX_FDCAN2_Init &rArr; HAL_FDCAN_Init &rArr; HAL_FDCAN_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1910. 

  1910. </UL>
    1911. 

  1911. <BR>[Calls]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Init
    1912. 

  1912. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1913. 

  1913. </UL>
    1914. 

  1914. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1915. 

  1915. </UL>
    1916. 

  1916. 

  1917. <P><STRONG><a name="[16d]"></a>MX_GPDMA1_Init</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, gpdma.o(.text.MX_GPDMA1_Init))
    1918. 

  1918. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = MX_GPDMA1_Init &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1919. 

  1919. </UL>
    1920. 

  1920. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1921. 

  1921. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1922. 

  1922. </UL>
    1923. 

  1923. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1924. 

  1924. </UL>
    1925. 

  1925. 

  1926. <P><STRONG><a name="[16e]"></a>MX_GPIO_Init</STRONG> (Thumb, 284 bytes, Stack size 72 bytes, gpio.o(.text.MX_GPIO_Init))
    1927. 

  1927. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
    1928. 

  1928. </UL>
    1929. 

  1929. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1930. 

  1930. <LI><a href="#[16f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    1931. 

  1931. </UL>
    1932. 

  1932. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1933. 

  1933. </UL>
    1934. 

  1934. 

  1935. <P><STRONG><a name="[170]"></a>MX_ICACHE_Init</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, icache.o(.text.MX_ICACHE_Init))
    1936. 

  1936. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = MX_ICACHE_Init
    1937. 

  1937. </UL>
    1938. 

  1938. <BR>[Calls]<UL><LI><a href="#[171]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ICACHE_Enable
    1939. 

  1939. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1940. 

  1940. </UL>
    1941. 

  1941. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1942. 

  1942. </UL>
    1943. 

  1943. 

  1944. <P><STRONG><a name="[172]"></a>MX_TIM12_Init</STRONG> (Thumb, 154 bytes, Stack size 40 bytes, tim.o(.text.MX_TIM12_Init))
    1945. 

  1945. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = MX_TIM12_Init &rArr; HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1946. 

  1946. </UL>
    1947. 

  1947. <BR>[Calls]<UL><LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1948. 

  1948. <LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1949. 

  1949. <LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1950. 

  1950. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1951. 

  1951. </UL>
    1952. 

  1952. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1953. 

  1953. </UL>
    1954. 

  1954. 

  1955. <P><STRONG><a name="[173]"></a>MX_TIM1_Init</STRONG> (Thumb, 274 bytes, Stack size 112 bytes, tim.o(.text.MX_TIM1_Init))
    1956. 

  1956. <BR><BR>[Stack]<UL><LI>Max Depth = 256 + Unknown Stack Size
    1957. 

  1957. <LI>Call Chain = MX_TIM1_Init &rArr; HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1958. 

  1958. </UL>
    1959. 

  1959. <BR>[Calls]<UL><LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1960. 

  1960. <LI><a href="#[175]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_ConfigBreakDeadTime
    1961. 

  1961. <LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1962. 

  1962. <LI><a href="#[174]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1963. 

  1963. <LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1964. 

  1964. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1965. 

  1965. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1966. 

  1966. </UL>
    1967. 

  1967. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1968. 

  1968. </UL>
    1969. 

  1969. 

  1970. <P><STRONG><a name="[176]"></a>MX_TIM2_Init</STRONG> (Thumb, 280 bytes, Stack size 72 bytes, tim.o(.text.MX_TIM2_Init))
    1971. 

  1971. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = MX_TIM2_Init &rArr; HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1972. 

  1972. </UL>
    1973. 

  1973. <BR>[Calls]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_ConfigChannel
    1974. 

  1974. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_Init
    1975. 

  1975. <LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1976. 

  1976. <LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1977. 

  1977. <LI><a href="#[174]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1978. 

  1978. <LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1979. 

  1979. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1980. 

  1980. </UL>
    1981. 

  1981. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1982. 

  1982. </UL>
    1983. 

  1983. 

  1984. <P><STRONG><a name="[177]"></a>MX_TIM3_Init</STRONG> (Thumb, 136 bytes, Stack size 40 bytes, tim.o(.text.MX_TIM3_Init))
    1985. 

  1985. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = MX_TIM3_Init &rArr; HAL_TIM_Base_Init &rArr; HAL_TIM_Base_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1986. 

  1986. </UL>
    1987. 

  1987. <BR>[Calls]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    1988. 

  1988. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    1989. 

  1989. <LI><a href="#[174]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1990. 

  1990. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1991. 

  1991. </UL>
    1992. 

  1992. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1993. 

  1993. </UL>
    1994. 

  1994. 

  1995. <P><STRONG><a name="[178]"></a>MX_TIM4_Init</STRONG> (Thumb, 154 bytes, Stack size 56 bytes, tim.o(.text.MX_TIM4_Init))
    1996. 

  1996. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = MX_TIM4_Init &rArr; HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    1997. 

  1997. </UL>
    1998. 

  1998. <BR>[Calls]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1999. 

  1999. <LI><a href="#[174]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    2000. 

  2000. <LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    2001. 

  2001. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    2002. 

  2002. </UL>
    2003. 

  2003. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2004. 

  2004. </UL>
    2005. 

  2005. 

  2006. <P><STRONG><a name="[179]"></a>MX_TIM5_Init</STRONG> (Thumb, 134 bytes, Stack size 40 bytes, tim.o(.text.MX_TIM5_Init))
    2007. 

  2007. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = MX_TIM5_Init &rArr; HAL_TIM_Base_Init &rArr; HAL_TIM_Base_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    2008. 

  2008. </UL>
    2009. 

  2009. <BR>[Calls]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2010. 

  2010. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    2011. 

  2011. <LI><a href="#[174]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    2012. 

  2012. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    2013. 

  2013. </UL>
    2014. 

  2014. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2015. 

  2015. </UL>
    2016. 

  2016. 

  2017. <P><STRONG><a name="[17a]"></a>MYADD_FDCAN1_InitFilter</STRONG> (Thumb, 174 bytes, Stack size 48 bytes, fdcan.o(.text.MYADD_FDCAN1_InitFilter))
    2018. 

  2018. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = MYADD_FDCAN1_InitFilter &rArr; HAL_FDCAN_ConfigFilter
    2019. 

  2019. </UL>
    2020. 

  2020. <BR>[Calls]<UL><LI><a href="#[17e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Start
    2021. 

  2021. <LI><a href="#[17d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ActivateNotification
    2022. 

  2022. <LI><a href="#[17c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ConfigGlobalFilter
    2023. 

  2023. <LI><a href="#[17b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ConfigFilter
    2024. 

  2024. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    2025. 

  2025. </UL>
    2026. 

  2026. <BR>[Called By]<UL><LI><a href="#[181]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_CAN_INIT
    2027. 

  2027. </UL>
    2028. 

  2028. 

  2029. <P><STRONG><a name="[17f]"></a>MYADD_FDCAN2_InitFilter</STRONG> (Thumb, 170 bytes, Stack size 48 bytes, fdcan.o(.text.MYADD_FDCAN2_InitFilter))
    2030. 

  2030. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = MYADD_FDCAN2_InitFilter &rArr; HAL_FDCAN_ConfigFilter
    2031. 

  2031. </UL>
    2032. 

  2032. <BR>[Calls]<UL><LI><a href="#[17e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Start
    2033. 

  2033. <LI><a href="#[17d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ActivateNotification
    2034. 

  2034. <LI><a href="#[17c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ConfigGlobalFilter
    2035. 

  2035. <LI><a href="#[17b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_ConfigFilter
    2036. 

  2036. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    2037. 

  2037. </UL>
    2038. 

  2038. <BR>[Called By]<UL><LI><a href="#[181]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_CAN_INIT
    2039. 

  2039. </UL>
    2040. 

  2040. 

  2041. <P><STRONG><a name="[180]"></a>MY_ADC_INIT</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, adc.o(.text.MY_ADC_INIT))
    2042. 

  2042. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = MY_ADC_INIT &rArr; HAL_ADC_Start_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    2043. 

  2043. </UL>
    2044. 

  2044. <BR>[Calls]<UL><LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Start
    2045. 

  2045. <LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_Calibration_Start
    2046. 

  2046. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    2047. 

  2047. </UL>
    2048. 

  2048. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2049. 

  2049. </UL>
    2050. 

  2050. 

  2051. <P><STRONG><a name="[181]"></a>MY_CAN_INIT</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, soft_can.o(.text.MY_CAN_INIT))
    2052. 

  2052. <BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = MY_CAN_INIT &rArr; MYADD_FDCAN2_InitFilter &rArr; HAL_FDCAN_ConfigFilter
    2053. 

  2053. </UL>
    2054. 

  2054. <BR>[Calls]<UL><LI><a href="#[17f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN2_InitFilter
    2055. 

  2055. <LI><a href="#[17a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MYADD_FDCAN1_InitFilter
    2056. 

  2056. <LI><a href="#[182]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_HEADER_Init
    2057. 

  2057. <LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Fifo_Init
    2058. 

  2058. </UL>
    2059. 

  2059. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2060. 

  2060. </UL>
    2061. 

  2061. 

  2062. <P><STRONG><a name="[183]"></a>MY_TIM_PWM_INIT</STRONG> (Thumb, 172 bytes, Stack size 32 bytes, tim.o(.text.MY_TIM_PWM_INIT))
    2063. 

  2063. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = MY_TIM_PWM_INIT &rArr; HAL_TIM_IC_Start_IT &rArr; TIM_CCxChannelCmd
    2064. 

  2064. </UL>
    2065. 

  2065. <BR>[Calls]<UL><LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_Start_IT
    2066. 

  2066. <LI><a href="#[184]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Start_IT
    2067. 

  2067. <LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Start
    2068. 

  2068. <LI><a href="#[16f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    2069. 

  2069. </UL>
    2070. 

  2070. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2071. 

  2071. </UL>
    2072. 

  2072. 

  2073. <P><STRONG><a name="[185]"></a>MY_WEIGHT_INIT</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, weight_init.o(.text.MY_WEIGHT_INIT))
    2074. 

  2074. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = MY_WEIGHT_INIT &rArr; Read_Params &rArr; Load_Param
    2075. 

  2075. </UL>
    2076. 

  2076. <BR>[Calls]<UL><LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    2077. 

  2077. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2078. 

  2078. <LI><a href="#[187]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Ack_Status
    2079. 

  2079. </UL>
    2080. 

  2080. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2081. 

  2081. </UL>
    2082. 

  2082. 

  2083. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.MemManage_Handler))
    2084. 

  2084. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2085. 

  2085. </UL>
    2086. 

  2086. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.NMI_Handler))
    2087. 

  2087. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2088. 

  2088. </UL>
    2089. 

  2089. <P><STRONG><a name="[120]"></a>PUMP1_PWM_CONTROL</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, tim.o(.text.PUMP1_PWM_CONTROL))
    2090. 

  2090. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = PUMP1_PWM_CONTROL
    2091. 

  2091. </UL>
    2092. 

  2092. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2093. 

  2093. </UL>
    2094. 

  2094. 

  2095. <P><STRONG><a name="[121]"></a>PUMP2_PWM_CONTROL</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, tim.o(.text.PUMP2_PWM_CONTROL))
    2096. 

  2096. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = PUMP2_PWM_CONTROL
    2097. 

  2097. </UL>
    2098. 

  2098. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2099. 

  2099. </UL>
    2100. 

  2100. 

  2101. <P><STRONG><a name="[9]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.PendSV_Handler))
    2102. 

  2102. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2103. 

  2103. </UL>
    2104. 

  2104. <P><STRONG><a name="[7f]"></a>Read_Value</STRONG> (Thumb, 220 bytes, Stack size 32 bytes, weight_read.o(.text.Read_Value))
    2105. 

  2105. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = Read_Value &rArr; delay_us &rArr; HAL_TIM_Base_Start
    2106. 

  2106. </UL>
    2107. 

  2107. <BR>[Calls]<UL><LI><a href="#[18a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
    2108. 

  2108. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2109. 

  2109. <LI><a href="#[16f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    2110. 

  2110. <LI><a href="#[18c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
    2111. 

  2111. </UL>
    2112. 

  2112. <BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    2113. 

  2113. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    2114. 

  2114. </UL>
    2115. 

  2115. <BR>[Address Reference Count : 1]<UL><LI> weight_read.o(.data.read)
    2116. 

  2116. </UL>
    2117. 

  2117. <P><STRONG><a name="[c1]"></a>SET_RED_LED</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, soft_led.o(.text.SET_RED_LED))
    2118. 

  2118. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SET_RED_LED &rArr; HAL_GPIO_WritePin
    2119. 

  2119. </UL>
    2120. 

  2120. <BR>[Calls]<UL><LI><a href="#[16f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    2121. 

  2121. </UL>
    2122. 

  2122. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Led
    2123. 

  2123. </UL>
    2124. 

  2124. 

  2125. <P><STRONG><a name="[122]"></a>SPRAY1_PWM_CONTROL</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, tim.o(.text.SPRAY1_PWM_CONTROL))
    2126. 

  2126. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = SPRAY1_PWM_CONTROL
    2127. 

  2127. </UL>
    2128. 

  2128. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2129. 

  2129. </UL>
    2130. 

  2130. 

  2131. <P><STRONG><a name="[123]"></a>SPRAY2_PWM_CONTROL</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, tim.o(.text.SPRAY2_PWM_CONTROL))
    2132. 

  2132. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = SPRAY2_PWM_CONTROL
    2133. 

  2133. </UL>
    2134. 

  2134. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2135. 

  2135. </UL>
    2136. 

  2136. 

  2137. <P><STRONG><a name="[7]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.SVC_Handler))
    2138. 

  2138. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2139. 

  2139. </UL>
    2140. 

  2140. <P><STRONG><a name="[187]"></a>Set_Ack_Status</STRONG> (Thumb, 24 bytes, Stack size 4 bytes, soft_can.o(.text.Set_Ack_Status))
    2141. 

  2141. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Set_Ack_Status
    2142. 

  2142. </UL>
    2143. 

  2143. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    2144. 

  2144. <LI><a href="#[185]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_WEIGHT_INIT
    2145. 

  2145. </UL>
    2146. 

  2146. 

  2147. <P><STRONG><a name="[a]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.SysTick_Handler))
    2148. 

  2148. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
    2149. 

  2149. </UL>
    2150. 

  2150. <BR>[Calls]<UL><LI><a href="#[191]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
    2151. 

  2151. </UL>
    2152. 

  2152. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2153. 

  2153. </UL>
    2154. 

  2154. <P><STRONG><a name="[192]"></a>SystemClock_Config</STRONG> (Thumb, 194 bytes, Stack size 120 bytes, main.o(.text.SystemClock_Config))
    2155. 

  2155. <BR><BR>[Stack]<UL><LI>Max Depth = 256 + Unknown Stack Size
    2156. 

  2156. <LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_OscConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
    2157. 

  2157. </UL>
    2158. 

  2158. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    2159. 

  2159. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    2160. 

  2160. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    2161. 

  2161. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    2162. 

  2162. </UL>
    2163. 

  2163. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2164. 

  2164. </UL>
    2165. 

  2165. 

  2166. <P><STRONG><a name="[73]"></a>SystemInit</STRONG> (Thumb, 310 bytes, Stack size 8 bytes, system_stm32h5xx.o(.text.SystemInit))
    2167. 

  2167. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SystemInit
    2168. 

  2168. </UL>
    2169. 

  2169. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(.text)
    2170. 

  2170. </UL>
    2171. 

  2171. <P><STRONG><a name="[37]"></a>TIM2_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.TIM2_IRQHandler))
    2172. 

  2172. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = TIM2_IRQHandler &rArr; HAL_TIM_IRQHandler &rArr; HAL_TIM_IC_CaptureCallback &rArr; HAL_TIM_ReadCapturedValue
    2173. 

  2173. </UL>
    2174. 

  2174. <BR>[Calls]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    2175. 

  2175. </UL>
    2176. 

  2176. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2177. 

  2177. </UL>
    2178. 

  2178. <P><STRONG><a name="[3a]"></a>TIM5_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32h5xx_it.o(.text.TIM5_IRQHandler))
    2179. 

  2179. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = TIM5_IRQHandler &rArr; HAL_TIM_IRQHandler &rArr; HAL_TIM_IC_CaptureCallback &rArr; HAL_TIM_ReadCapturedValue
    2180. 

  2180. </UL>
    2181. 

  2181. <BR>[Calls]<UL><LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    2182. 

  2182. </UL>
    2183. 

  2183. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2184. 

  2184. </UL>
    2185. 

  2185. <P><STRONG><a name="[141]"></a>TIM_Base_SetConfig</STRONG> (Thumb, 650 bytes, Stack size 12 bytes, stm32h5xx_hal_tim.o(.text.TIM_Base_SetConfig))
    2186. 

  2186. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_Base_SetConfig
    2187. 

  2187. </UL>
    2188. 

  2188. <BR>[Called By]<UL><LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    2189. 

  2189. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_Init
    2190. 

  2190. <LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    2191. 

  2191. </UL>
    2192. 

  2192. 

  2193. <P><STRONG><a name="[151]"></a>TIM_CCxChannelCmd</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, stm32h5xx_hal_tim.o(.text.TIM_CCxChannelCmd))
    2194. 

  2194. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TIM_CCxChannelCmd
    2195. 

  2195. </UL>
    2196. 

  2196. <BR>[Called By]<UL><LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_Start_IT
    2197. 

  2197. <LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Start
    2198. 

  2198. </UL>
    2199. 

  2199. 

  2200. <P><STRONG><a name="[143]"></a>TIM_ETR_SetConfig</STRONG> (Thumb, 52 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_ETR_SetConfig))
    2201. 

  2201. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_ETR_SetConfig
    2202. 

  2202. </UL>
    2203. 

  2203. <BR>[Called By]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2204. 

  2204. </UL>
    2205. 

  2205. 

  2206. <P><STRONG><a name="[161]"></a>TIM_OC2_SetConfig</STRONG> (Thumb, 388 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC2_SetConfig))
    2207. 

  2207. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC2_SetConfig
    2208. 

  2208. </UL>
    2209. 

  2209. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2210. 

  2210. </UL>
    2211. 

  2211. 

  2212. <P><STRONG><a name="[14a]"></a>TIM_TI1_SetConfig</STRONG> (Thumb, 440 bytes, Stack size 28 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI1_SetConfig))
    2213. 

  2213. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = TIM_TI1_SetConfig
    2214. 

  2214. </UL>
    2215. 

  2215. <BR>[Called By]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_ConfigChannel
    2216. 

  2216. </UL>
    2217. 

  2217. 

  2218. <P><STRONG><a name="[196]"></a>Task_Polling</STRONG> (Thumb, 186 bytes, Stack size 16 bytes, task.o(.text.Task_Polling))
    2219. 

  2219. <BR><BR>[Stack]<UL><LI>Max Depth = 252<LI>Call Chain = Task_Polling &rArr; Can_Rx_Decode &rArr; Weight_Calib &rArr; Auto_Calib &rArr; Read_Value &rArr; delay_us &rArr; HAL_TIM_Base_Start
    2220. 

  2220. </UL>
    2221. 

  2221. <BR>[Calls]<UL><LI><a href="#[194]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_1hz
    2222. 

  2222. <LI><a href="#[193]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_10_hz
    2223. 

  2223. <LI><a href="#[197]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_80_hz
    2224. 

  2224. <LI><a href="#[198]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can2Pmu_3hz_info
    2225. 

  2225. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2226. 

  2226. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2227. 

  2227. <LI><a href="#[187]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Ack_Status
    2228. 

  2228. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flow_Function
    2229. 

  2229. </UL>
    2230. 

  2230. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    2231. 

  2231. </UL>
    2232. 

  2232. 

  2233. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h5xx_it.o(.text.UsageFault_Handler))
    2234. 

  2234. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h523xx.o(RESET)
    2235. 

  2235. </UL>
    2236. 

  2236. <P><STRONG><a name="[af]"></a>Write_To_Flash</STRONG> (Thumb, 54 bytes, Stack size 32 bytes, soft_can.o(.text.Write_To_Flash))
    2237. 

  2237. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Write_To_Flash
    2238. 

  2238. </UL>
    2239. 

  2239. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2240. 

  2240. <LI><a href="#[18d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Check
    2241. 

  2241. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    2242. 

  2242. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2243. 

  2243. </UL>
    2244. 

  2244. 

  2245. <P><STRONG><a name="[198]"></a>can2Pmu_3hz_info</STRONG> (Thumb, 148 bytes, Stack size 16 bytes, soft_can.o(.text.can2Pmu_3hz_info))
    2246. 

  2246. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = can2Pmu_3hz_info &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    2247. 

  2247. </UL>
    2248. 

  2248. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send
    2249. 

  2249. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2250. 

  2250. </UL>
    2251. 

  2251. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    2252. 

  2252. </UL>
    2253. 

  2253. 

  2254. <P><STRONG><a name="[b2]"></a>can_send</STRONG> (Thumb, 80 bytes, Stack size 24 bytes, soft_can.o(.text.can_send))
    2255. 

  2255. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    2256. 

  2256. </UL>
    2257. 

  2257. <BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_AddMessageToTxFifoQ
    2258. 

  2258. </UL>
    2259. 

  2259. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2260. 

  2260. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo0Callback
    2261. 

  2261. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN2PMU_Send
    2262. 

  2262. <LI><a href="#[198]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can2Pmu_3hz_info
    2263. 

  2263. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    2264. 

  2264. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Flow_Function
    2265. 

  2265. </UL>
    2266. 

  2266. 

  2267. <P><STRONG><a name="[18a]"></a>delay_us</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, tim.o(.text.delay_us))
    2268. 

  2268. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = delay_us &rArr; HAL_TIM_Base_Start
    2269. 

  2269. </UL>
    2270. 

  2270. <BR>[Calls]<UL><LI><a href="#[1a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Stop
    2271. 

  2271. <LI><a href="#[1a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Start
    2272. 

  2272. </UL>
    2273. 

  2273. <BR>[Called By]<UL><LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    2274. 

  2274. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    2275. 

  2275. </UL>
    2276. 

  2276. 

  2277. <P><STRONG><a name="[8b]"></a>main</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, main.o(.text.main))
    2278. 

  2278. <BR><BR>[Stack]<UL><LI>Max Depth = 624 + Unknown Stack Size
    2279. 

  2279. <LI>Call Chain = main &rArr; MX_ADC1_Init &rArr; HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    2280. 

  2280. </UL>
    2281. 

  2281. <BR>[Calls]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    2282. 

  2282. <LI><a href="#[185]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_WEIGHT_INIT
    2283. 

  2283. <LI><a href="#[183]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_TIM_PWM_INIT
    2284. 

  2284. <LI><a href="#[181]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_CAN_INIT
    2285. 

  2285. <LI><a href="#[180]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_ADC_INIT
    2286. 

  2286. <LI><a href="#[170]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ICACHE_Init
    2287. 

  2287. <LI><a href="#[172]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM12_Init
    2288. 

  2288. <LI><a href="#[179]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM5_Init
    2289. 

  2289. <LI><a href="#[178]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    2290. 

  2290. <LI><a href="#[177]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    2291. 

  2291. <LI><a href="#[176]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM2_Init
    2292. 

  2292. <LI><a href="#[173]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    2293. 

  2293. <LI><a href="#[16c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN2_Init
    2294. 

  2294. <LI><a href="#[16b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FDCAN1_Init
    2295. 

  2295. <LI><a href="#[16a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    2296. 

  2296. <LI><a href="#[16d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPDMA1_Init
    2297. 

  2297. <LI><a href="#[16e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    2298. 

  2298. <LI><a href="#[192]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    2299. 

  2299. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    2300. 

  2300. </UL>
    2301. 

  2301. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
    2302. 

  2302. </UL>
    2303. 

  2303. 

  2304. <P><STRONG><a name="[11f]"></a>rkfifo_in</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, rkfifo.o(.text.rkfifo_in))
    2305. 

  2305. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rkfifo_in &rArr; __rkfifo_copy_in
    2306. 

  2306. </UL>
    2307. 

  2307. <BR>[Calls]<UL><LI><a href="#[19a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rkfifo_copy_in
    2308. 

  2308. <LI><a href="#[1a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;kfifo_unused
    2309. 

  2309. </UL>
    2310. 

  2310. <BR>[Called By]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_RxFifo1Callback
    2311. 

  2311. </UL>
    2312. 

  2312. 

  2313. <P><STRONG><a name="[b9]"></a>rkfifo_init</STRONG> (Thumb, 112 bytes, Stack size 32 bytes, rkfifo.o(.text.rkfifo_init))
    2314. 

  2314. <BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = rkfifo_init &rArr; rounddown_pow_of_two &rArr; fls_int
    2315. 

  2315. </UL>
    2316. 

  2316. <BR>[Calls]<UL><LI><a href="#[1a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rounddown_pow_of_two
    2317. 

  2317. </UL>
    2318. 

  2318. <BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Fifo_Init
    2319. 

  2319. </UL>
    2320. 

  2320. 

  2321. <P><STRONG><a name="[bb]"></a>rkfifo_out</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, rkfifo.o(.text.rkfifo_out))
    2322. 

  2322. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = rkfifo_out &rArr; rkfifo_out_peek &rArr; __rkfifo_copy_out
    2323. 

  2323. </UL>
    2324. 

  2324. <BR>[Calls]<UL><LI><a href="#[1a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_out_peek
    2325. 

  2325. </UL>
    2326. 

  2326. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2327. 

  2327. </UL>
    2328. 

  2328. 

  2329. <P><STRONG><a name="[1a5]"></a>rkfifo_out_peek</STRONG> (Thumb, 54 bytes, Stack size 24 bytes, rkfifo.o(.text.rkfifo_out_peek))
    2330. 

  2330. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rkfifo_out_peek &rArr; __rkfifo_copy_out
    2331. 

  2331. </UL>
    2332. 

  2332. <BR>[Calls]<UL><LI><a href="#[19c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rkfifo_copy_out
    2333. 

  2333. </UL>
    2334. 

  2334. <BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_out
    2335. 

  2335. </UL>
    2336. 

  2336. 

  2337. <P><STRONG><a name="[1a9]"></a>__fpl_dretinf</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, dretinf.o(x$fpl$dretinf), UNUSED)
    2338. 

  2338. <BR><BR>[Called By]<UL><LI><a href="#[1a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_f2d
    2339. 

  2339. </UL>
    2340. 

  2340. 

  2341. <P><STRONG><a name="[b6]"></a>__aeabi_f2d</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, f2d.o(x$fpl$f2d))
    2342. 

  2342. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_f2d
    2343. 

  2343. </UL>
    2344. 

  2344. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    2345. 

  2345. </UL>
    2346. 

  2346. 

  2347. <P><STRONG><a name="[1a7]"></a>_f2d</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, f2d.o(x$fpl$f2d), UNUSED)
    2348. 

  2348. <BR><BR>[Calls]<UL><LI><a href="#[1a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fnaninf
    2349. 

  2349. <LI><a href="#[1a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dretinf
    2350. 

  2350. </UL>
    2351. 

  2351. 

  2352. <P><STRONG><a name="[1a8]"></a>__fpl_fnaninf</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, fnaninf.o(x$fpl$fnaninf), UNUSED)
    2353. 

  2353. <BR><BR>[Called By]<UL><LI><a href="#[1a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_f2d
    2354. 

  2354. </UL>
    2355. 

  2355. 

  2356. <P><STRONG><a name="[85]"></a>_fp_init</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, fpinit.o(x$fpl$fpinit))
    2357. 

  2357. <BR><BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_fp_1
    2358. 

  2358. </UL>
    2359. 

  2359. 

  2360. <P><STRONG><a name="[1dc]"></a>__fplib_config_fpu_vfp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)
    2361. 

  2361. 

  2362. <P><STRONG><a name="[1dd]"></a>__fplib_config_pureend_doubles</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)
    2363. 

  2363. <P>
    2364. 

  2364. <H3>
    2365. 

  2365. Local Symbols
    2366. 

  2366. </H3>
    2367. 

  2367. <P><STRONG><a name="[ec]"></a>LL_ADC_IsDeepPowerDownEnabled</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_IsDeepPowerDownEnabled))
    2368. 

  2368. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_IsDeepPowerDownEnabled
    2369. 

  2369. </UL>
    2370. 

  2370. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2371. 

  2371. </UL>
    2372. 

  2372. 

  2373. <P><STRONG><a name="[ed]"></a>LL_ADC_DisableDeepPowerDown</STRONG> (Thumb, 24 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_DisableDeepPowerDown))
    2374. 

  2374. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_DisableDeepPowerDown
    2375. 

  2375. </UL>
    2376. 

  2376. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2377. 

  2377. </UL>
    2378. 

  2378. 

  2379. <P><STRONG><a name="[ee]"></a>LL_ADC_IsInternalRegulatorEnabled</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_IsInternalRegulatorEnabled))
    2380. 

  2380. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_IsInternalRegulatorEnabled
    2381. 

  2381. </UL>
    2382. 

  2382. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2383. 

  2383. </UL>
    2384. 

  2384. 

  2385. <P><STRONG><a name="[ef]"></a>LL_ADC_EnableInternalRegulator</STRONG> (Thumb, 30 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_EnableInternalRegulator))
    2386. 

  2386. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_EnableInternalRegulator
    2387. 

  2387. </UL>
    2388. 

  2388. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2389. 

  2389. </UL>
    2390. 

  2390. 

  2391. <P><STRONG><a name="[9a]"></a>LL_ADC_REG_IsConversionOngoing</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_REG_IsConversionOngoing))
    2392. 

  2392. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_REG_IsConversionOngoing
    2393. 

  2393. </UL>
    2394. 

  2394. <BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    2395. 

  2395. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2396. 

  2396. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    2397. 

  2397. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2398. 

  2398. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2399. 

  2399. </UL>
    2400. 

  2400. 

  2401. <P><STRONG><a name="[a5]"></a>LL_ADC_IsEnabled</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_IsEnabled))
    2402. 

  2402. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_IsEnabled
    2403. 

  2403. </UL>
    2404. 

  2404. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Enable
    2405. 

  2405. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    2406. 

  2406. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2407. 

  2407. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2408. 

  2408. </UL>
    2409. 

  2409. 

  2410. <P><STRONG><a name="[f0]"></a>LL_ADC_SetCommonClock</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetCommonClock))
    2411. 

  2411. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_ADC_SetCommonClock
    2412. 

  2412. </UL>
    2413. 

  2413. <BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2414. 

  2414. </UL>
    2415. 

  2415. 

  2416. <P><STRONG><a name="[9b]"></a>LL_ADC_INJ_IsConversionOngoing</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_INJ_IsConversionOngoing))
    2417. 

  2417. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_INJ_IsConversionOngoing
    2418. 

  2418. </UL>
    2419. 

  2419. <BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    2420. 

  2420. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2421. 

  2421. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2422. 

  2422. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2423. 

  2423. </UL>
    2424. 

  2424. 

  2425. <P><STRONG><a name="[9c]"></a>LL_ADC_IsDisableOngoing</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_IsDisableOngoing))
    2426. 

  2426. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_IsDisableOngoing
    2427. 

  2427. </UL>
    2428. 

  2428. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    2429. 

  2429. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    2430. 

  2430. </UL>
    2431. 

  2431. 

  2432. <P><STRONG><a name="[9d]"></a>LL_ADC_REG_StopConversion</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_REG_StopConversion))
    2433. 

  2433. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_REG_StopConversion
    2434. 

  2434. </UL>
    2435. 

  2435. <BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    2436. 

  2436. </UL>
    2437. 

  2437. 

  2438. <P><STRONG><a name="[9e]"></a>LL_ADC_INJ_StopConversion</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_INJ_StopConversion))
    2439. 

  2439. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_INJ_StopConversion
    2440. 

  2440. </UL>
    2441. 

  2441. <BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConversionStop
    2442. 

  2442. </UL>
    2443. 

  2443. 

  2444. <P><STRONG><a name="[a6]"></a>LL_ADC_Disable</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_Disable))
    2445. 

  2445. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_Disable
    2446. 

  2446. </UL>
    2447. 

  2447. <BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Disable
    2448. 

  2448. </UL>
    2449. 

  2449. 

  2450. <P><STRONG><a name="[e1]"></a>LL_ADC_GetMultimode</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_GetMultimode))
    2451. 

  2451. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_GetMultimode
    2452. 

  2452. </UL>
    2453. 

  2453. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2454. 

  2454. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    2455. 

  2455. </UL>
    2456. 

  2456. 

  2457. <P><STRONG><a name="[101]"></a>LL_ADC_REG_StartConversion</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_REG_StartConversion))
    2458. 

  2458. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_REG_StartConversion
    2459. 

  2459. </UL>
    2460. 

  2460. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Start_DMA
    2461. 

  2461. </UL>
    2462. 

  2462. 

  2463. <P><STRONG><a name="[a8]"></a>LL_ADC_Enable</STRONG> (Thumb, 28 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_Enable))
    2464. 

  2464. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_Enable
    2465. 

  2465. </UL>
    2466. 

  2466. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Enable
    2467. 

  2467. </UL>
    2468. 

  2468. 

  2469. <P><STRONG><a name="[a9]"></a>LL_ADC_GetCommonPathInternalCh</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_GetCommonPathInternalCh))
    2470. 

  2470. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_GetCommonPathInternalCh
    2471. 

  2471. </UL>
    2472. 

  2472. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_Enable
    2473. 

  2473. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2474. 

  2474. </UL>
    2475. 

  2475. 

  2476. <P><STRONG><a name="[e8]"></a>LL_ADC_GetMultiDMATransfer</STRONG> (Thumb, 16 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_GetMultiDMATransfer))
    2477. 

  2477. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_GetMultiDMATransfer
    2478. 

  2478. </UL>
    2479. 

  2479. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2480. 

  2480. </UL>
    2481. 

  2481. 

  2482. <P><STRONG><a name="[a0]"></a>LL_ADC_REG_IsTriggerSourceSWStart</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_REG_IsTriggerSourceSWStart))
    2483. 

  2483. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_REG_IsTriggerSourceSWStart
    2484. 

  2484. </UL>
    2485. 

  2485. <BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_DMAConvCplt
    2486. 

  2486. <LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2487. 

  2487. </UL>
    2488. 

  2488. 

  2489. <P><STRONG><a name="[e3]"></a>LL_ADC_INJ_IsTriggerSourceSWStart</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_INJ_IsTriggerSourceSWStart))
    2490. 

  2490. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_INJ_IsTriggerSourceSWStart
    2491. 

  2491. </UL>
    2492. 

  2492. <BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_IRQHandler
    2493. 

  2493. </UL>
    2494. 

  2494. 

  2495. <P><STRONG><a name="[d3]"></a>LL_ADC_EnableChannel0_GPIO</STRONG> (Thumb, 24 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_EnableChannel0_GPIO))
    2496. 

  2496. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_EnableChannel0_GPIO
    2497. 

  2497. </UL>
    2498. 

  2498. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2499. 

  2499. </UL>
    2500. 

  2500. 

  2501. <P><STRONG><a name="[d4]"></a>LL_ADC_REG_SetSequencerRanks</STRONG> (Thumb, 58 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_REG_SetSequencerRanks))
    2502. 

  2502. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_REG_SetSequencerRanks
    2503. 

  2503. </UL>
    2504. 

  2504. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2505. 

  2505. </UL>
    2506. 

  2506. 

  2507. <P><STRONG><a name="[d5]"></a>LL_ADC_SetChannelSamplingTime</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetChannelSamplingTime))
    2508. 

  2508. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_SetChannelSamplingTime
    2509. 

  2509. </UL>
    2510. 

  2510. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2511. 

  2511. </UL>
    2512. 

  2512. 

  2513. <P><STRONG><a name="[d6]"></a>LL_ADC_SetSamplingTimeCommonConfig</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetSamplingTimeCommonConfig))
    2514. 

  2514. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_ADC_SetSamplingTimeCommonConfig
    2515. 

  2515. </UL>
    2516. 

  2516. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2517. 

  2517. </UL>
    2518. 

  2518. 

  2519. <P><STRONG><a name="[d7]"></a>LL_ADC_SetOffset</STRONG> (Thumb, 60 bytes, Stack size 20 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetOffset))
    2520. 

  2520. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = LL_ADC_SetOffset
    2521. 

  2521. </UL>
    2522. 

  2522. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2523. 

  2523. </UL>
    2524. 

  2524. 

  2525. <P><STRONG><a name="[d8]"></a>LL_ADC_SetOffsetSign</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetOffsetSign))
    2526. 

  2526. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_SetOffsetSign
    2527. 

  2527. </UL>
    2528. 

  2528. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2529. 

  2529. </UL>
    2530. 

  2530. 

  2531. <P><STRONG><a name="[d9]"></a>LL_ADC_SetOffsetSaturation</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetOffsetSaturation))
    2532. 

  2532. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_SetOffsetSaturation
    2533. 

  2533. </UL>
    2534. 

  2534. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2535. 

  2535. </UL>
    2536. 

  2536. 

  2537. <P><STRONG><a name="[da]"></a>LL_ADC_GetOffsetChannel</STRONG> (Thumb, 30 bytes, Stack size 12 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_GetOffsetChannel))
    2538. 

  2538. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = LL_ADC_GetOffsetChannel
    2539. 

  2539. </UL>
    2540. 

  2540. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2541. 

  2541. </UL>
    2542. 

  2542. 

  2543. <P><STRONG><a name="[db]"></a>LL_ADC_SetOffsetState</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetOffsetState))
    2544. 

  2544. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_SetOffsetState
    2545. 

  2545. </UL>
    2546. 

  2546. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2547. 

  2547. </UL>
    2548. 

  2548. 

  2549. <P><STRONG><a name="[dc]"></a>LL_ADC_SetChannelSingleDiff</STRONG> (Thumb, 52 bytes, Stack size 12 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetChannelSingleDiff))
    2550. 

  2550. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = LL_ADC_SetChannelSingleDiff
    2551. 

  2551. </UL>
    2552. 

  2552. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2553. 

  2553. </UL>
    2554. 

  2554. 

  2555. <P><STRONG><a name="[dd]"></a>LL_ADC_SetCommonPathInternalCh</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_SetCommonPathInternalCh))
    2556. 

  2556. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_ADC_SetCommonPathInternalCh
    2557. 

  2557. </UL>
    2558. 

  2558. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2559. 

  2559. </UL>
    2560. 

  2560. 

  2561. <P><STRONG><a name="[de]"></a>LL_ADC_EnableChannelVDDcore</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, stm32h5xx_hal_adc.o(.text.LL_ADC_EnableChannelVDDcore))
    2562. 

  2562. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_EnableChannelVDDcore
    2563. 

  2563. </UL>
    2564. 

  2564. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2565. 

  2565. </UL>
    2566. 

  2566. 

  2567. <P><STRONG><a name="[d0]"></a>LL_ADC_StartCalibration</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, stm32h5xx_hal_adc_ex.o(.text.LL_ADC_StartCalibration))
    2568. 

  2568. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_ADC_StartCalibration
    2569. 

  2569. </UL>
    2570. 

  2570. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_Calibration_Start
    2571. 

  2571. </UL>
    2572. 

  2572. 

  2573. <P><STRONG><a name="[d1]"></a>LL_ADC_IsCalibrationOnGoing</STRONG> (Thumb, 14 bytes, Stack size 4 bytes, stm32h5xx_hal_adc_ex.o(.text.LL_ADC_IsCalibrationOnGoing))
    2574. 

  2574. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = LL_ADC_IsCalibrationOnGoing
    2575. 

  2575. </UL>
    2576. 

  2576. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_Calibration_Start
    2577. 

  2577. </UL>
    2578. 

  2578. 

  2579. <P><STRONG><a name="[10a]"></a>DMA_SetConfig</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, stm32h5xx_hal_dma.o(.text.DMA_SetConfig))
    2580. 

  2580. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA_SetConfig
    2581. 

  2581. </UL>
    2582. 

  2582. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
    2583. 

  2583. </UL>
    2584. 

  2584. 

  2585. <P><STRONG><a name="[105]"></a>DMA_List_Init</STRONG> (Thumb, 1040 bytes, Stack size 16 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_Init))
    2586. 

  2586. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA_List_Init
    2587. 

  2587. </UL>
    2588. 

  2588. <BR>[Called By]<UL><LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_Init
    2589. 

  2589. </UL>
    2590. 

  2590. 

  2591. <P><STRONG><a name="[108]"></a>DMA_List_GetCLLRNodeInfo</STRONG> (Thumb, 94 bytes, Stack size 12 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_GetCLLRNodeInfo))
    2592. 

  2592. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_List_GetCLLRNodeInfo
    2593. 

  2593. </UL>
    2594. 

  2594. <BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_Start_IT
    2595. 

  2595. <LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_SetCircularMode
    2596. 

  2596. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_InsertNode
    2597. 

  2597. </UL>
    2598. 

  2598. 

  2599. <P><STRONG><a name="[103]"></a>DMA_List_BuildNode</STRONG> (Thumb, 728 bytes, Stack size 12 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_BuildNode))
    2600. 

  2600. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_List_BuildNode
    2601. 

  2601. </UL>
    2602. 

  2602. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_BuildNode
    2603. 

  2603. </UL>
    2604. 

  2604. 

  2605. <P><STRONG><a name="[104]"></a>DMA_List_GetNodeConfig</STRONG> (Thumb, 532 bytes, Stack size 12 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_GetNodeConfig))
    2606. 

  2606. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_List_GetNodeConfig
    2607. 

  2607. </UL>
    2608. 

  2608. <BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_GetNodeConfig
    2609. 

  2609. </UL>
    2610. 

  2610. 

  2611. <P><STRONG><a name="[106]"></a>DMA_List_CheckNodesBaseAddresses</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_CheckNodesBaseAddresses))
    2612. 

  2612. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = DMA_List_CheckNodesBaseAddresses
    2613. 

  2613. </UL>
    2614. 

  2614. <BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_InsertNode
    2615. 

  2615. </UL>
    2616. 

  2616. 

  2617. <P><STRONG><a name="[107]"></a>DMA_List_CheckNodesTypes</STRONG> (Thumb, 134 bytes, Stack size 20 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_CheckNodesTypes))
    2618. 

  2618. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = DMA_List_CheckNodesTypes
    2619. 

  2619. </UL>
    2620. 

  2620. <BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_InsertNode
    2621. 

  2621. </UL>
    2622. 

  2622. 

  2623. <P><STRONG><a name="[109]"></a>DMA_List_FindNode</STRONG> (Thumb, 326 bytes, Stack size 36 bytes, stm32h5xx_hal_dma_ex.o(.text.DMA_List_FindNode))
    2624. 

  2624. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = DMA_List_FindNode
    2625. 

  2625. </UL>
    2626. 

  2626. <BR>[Called By]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_SetCircularMode
    2627. 

  2627. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMAEx_List_InsertNode
    2628. 

  2628. </UL>
    2629. 

  2629. 

  2630. <P><STRONG><a name="[13a]"></a>RCCEx_PLL2_Config</STRONG> (Thumb, 364 bytes, Stack size 24 bytes, stm32h5xx_hal_rcc_ex.o(.text.RCCEx_PLL2_Config))
    2631. 

  2631. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLL2_Config
    2632. 

  2632. </UL>
    2633. 

  2633. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2634. 

  2634. </UL>
    2635. 

  2635. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    2636. 

  2636. </UL>
    2637. 

  2637. 

  2638. <P><STRONG><a name="[13b]"></a>RCCEx_PLL3_Config</STRONG> (Thumb, 364 bytes, Stack size 24 bytes, stm32h5xx_hal_rcc_ex.o(.text.RCCEx_PLL3_Config))
    2639. 

  2639. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLL3_Config
    2640. 

  2640. </UL>
    2641. 

  2641. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2642. 

  2642. </UL>
    2643. 

  2643. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    2644. 

  2644. </UL>
    2645. 

  2645. 

  2646. <P><STRONG><a name="[129]"></a>FLASH_Program_QuadWord</STRONG> (Thumb, 110 bytes, Stack size 36 bytes, stm32h5xx_hal_flash.o(.text.FLASH_Program_QuadWord))
    2647. 

  2647. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = FLASH_Program_QuadWord
    2648. 

  2648. </UL>
    2649. 

  2649. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    2650. 

  2650. </UL>
    2651. 

  2651. 

  2652. <P><STRONG><a name="[12a]"></a>FLASH_Program_QuadWord_OBK</STRONG> (Thumb, 142 bytes, Stack size 40 bytes, stm32h5xx_hal_flash.o(.text.FLASH_Program_QuadWord_OBK))
    2653. 

  2653. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = FLASH_Program_QuadWord_OBK
    2654. 

  2654. </UL>
    2655. 

  2655. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    2656. 

  2656. </UL>
    2657. 

  2657. 

  2658. <P><STRONG><a name="[12b]"></a>FLASH_Program_HalfWord</STRONG> (Thumb, 38 bytes, Stack size 12 bytes, stm32h5xx_hal_flash.o(.text.FLASH_Program_HalfWord))
    2659. 

  2659. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = FLASH_Program_HalfWord
    2660. 

  2660. </UL>
    2661. 

  2661. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    2662. 

  2662. </UL>
    2663. 

  2663. 

  2664. <P><STRONG><a name="[12c]"></a>FLASH_Program_Word</STRONG> (Thumb, 38 bytes, Stack size 12 bytes, stm32h5xx_hal_flash.o(.text.FLASH_Program_Word))
    2665. 

  2665. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = FLASH_Program_Word
    2666. 

  2666. </UL>
    2667. 

  2667. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    2668. 

  2668. </UL>
    2669. 

  2669. 

  2670. <P><STRONG><a name="[125]"></a>FLASH_MassErase</STRONG> (Thumb, 106 bytes, Stack size 8 bytes, stm32h5xx_hal_flash_ex.o(.text.FLASH_MassErase))
    2671. 

  2671. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = FLASH_MassErase
    2672. 

  2672. </UL>
    2673. 

  2673. <BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASHEx_Erase
    2674. 

  2674. </UL>
    2675. 

  2675. 

  2676. <P><STRONG><a name="[126]"></a>FLASH_OBKErase</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, stm32h5xx_hal_flash_ex.o(.text.FLASH_OBKErase))
    2677. 

  2677. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = FLASH_OBKErase
    2678. 

  2678. </UL>
    2679. 

  2679. <BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASHEx_Erase
    2680. 

  2680. </UL>
    2681. 

  2681. 

  2682. <P><STRONG><a name="[139]"></a>__NVIC_SetPriorityGrouping</STRONG> (Thumb, 60 bytes, Stack size 12 bytes, stm32h5xx_hal_cortex.o(.text.__NVIC_SetPriorityGrouping))
    2683. 

  2683. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = __NVIC_SetPriorityGrouping
    2684. 

  2684. </UL>
    2685. 

  2685. <BR>[Called By]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
    2686. 

  2686. </UL>
    2687. 

  2687. 

  2688. <P><STRONG><a name="[136]"></a>__NVIC_GetPriorityGrouping</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32h5xx_hal_cortex.o(.text.__NVIC_GetPriorityGrouping))
    2689. 

  2689. <BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2690. 

  2690. </UL>
    2691. 

  2691. 

  2692. <P><STRONG><a name="[137]"></a>NVIC_EncodePriority</STRONG> (Thumb, 108 bytes, Stack size 32 bytes, stm32h5xx_hal_cortex.o(.text.NVIC_EncodePriority))
    2693. 

  2693. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = NVIC_EncodePriority
    2694. 

  2694. </UL>
    2695. 

  2695. <BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2696. 

  2696. </UL>
    2697. 

  2697. 

  2698. <P><STRONG><a name="[138]"></a>__NVIC_SetPriority</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, stm32h5xx_hal_cortex.o(.text.__NVIC_SetPriority))
    2699. 

  2699. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
    2700. 

  2700. </UL>
    2701. 

  2701. <BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2702. 

  2702. </UL>
    2703. 

  2703. 

  2704. <P><STRONG><a name="[135]"></a>__NVIC_EnableIRQ</STRONG> (Thumb, 48 bytes, Stack size 4 bytes, stm32h5xx_hal_cortex.o(.text.__NVIC_EnableIRQ))
    2705. 

  2705. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __NVIC_EnableIRQ
    2706. 

  2706. </UL>
    2707. 

  2707. <BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    2708. 

  2708. </UL>
    2709. 

  2709. 

  2710. <P><STRONG><a name="[11a]"></a>FDCAN_CalcultateRamBlockAddresses</STRONG> (Thumb, 186 bytes, Stack size 12 bytes, stm32h5xx_hal_fdcan.o(.text.FDCAN_CalcultateRamBlockAddresses))
    2711. 

  2711. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = FDCAN_CalcultateRamBlockAddresses
    2712. 

  2712. </UL>
    2713. 

  2713. <BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_Init
    2714. 

  2714. </UL>
    2715. 

  2715. 

  2716. <P><STRONG><a name="[10c]"></a>FDCAN_CopyMessageToRAM</STRONG> (Thumb, 182 bytes, Stack size 32 bytes, stm32h5xx_hal_fdcan.o(.text.FDCAN_CopyMessageToRAM))
    2717. 

  2717. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = FDCAN_CopyMessageToRAM
    2718. 

  2718. </UL>
    2719. 

  2719. <BR>[Called By]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FDCAN_AddMessageToTxFifoQ
    2720. 

  2720. </UL>
    2721. 

  2721. 

  2722. <P><STRONG><a name="[160]"></a>TIM_OC1_SetConfig</STRONG> (Thumb, 372 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC1_SetConfig))
    2723. 

  2723. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC1_SetConfig
    2724. 

  2724. </UL>
    2725. 

  2725. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2726. 

  2726. </UL>
    2727. 

  2727. 

  2728. <P><STRONG><a name="[162]"></a>TIM_OC3_SetConfig</STRONG> (Thumb, 386 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC3_SetConfig))
    2729. 

  2729. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC3_SetConfig
    2730. 

  2730. </UL>
    2731. 

  2731. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2732. 

  2732. </UL>
    2733. 

  2733. 

  2734. <P><STRONG><a name="[163]"></a>TIM_OC4_SetConfig</STRONG> (Thumb, 388 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC4_SetConfig))
    2735. 

  2735. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC4_SetConfig
    2736. 

  2736. </UL>
    2737. 

  2737. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2738. 

  2738. </UL>
    2739. 

  2739. 

  2740. <P><STRONG><a name="[164]"></a>TIM_OC5_SetConfig</STRONG> (Thumb, 226 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC5_SetConfig))
    2741. 

  2741. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC5_SetConfig
    2742. 

  2742. </UL>
    2743. 

  2743. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2744. 

  2744. </UL>
    2745. 

  2745. 

  2746. <P><STRONG><a name="[165]"></a>TIM_OC6_SetConfig</STRONG> (Thumb, 228 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_OC6_SetConfig))
    2747. 

  2747. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_OC6_SetConfig
    2748. 

  2748. </UL>
    2749. 

  2749. <BR>[Called By]<UL><LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2750. 

  2750. </UL>
    2751. 

  2751. 

  2752. <P><STRONG><a name="[14b]"></a>TIM_TI2_SetConfig</STRONG> (Thumb, 108 bytes, Stack size 24 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI2_SetConfig))
    2753. 

  2753. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = TIM_TI2_SetConfig
    2754. 

  2754. </UL>
    2755. 

  2755. <BR>[Called By]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_ConfigChannel
    2756. 

  2756. </UL>
    2757. 

  2757. 

  2758. <P><STRONG><a name="[14c]"></a>TIM_TI3_SetConfig</STRONG> (Thumb, 106 bytes, Stack size 24 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI3_SetConfig))
    2759. 

  2759. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = TIM_TI3_SetConfig
    2760. 

  2760. </UL>
    2761. 

  2761. <BR>[Called By]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_ConfigChannel
    2762. 

  2762. </UL>
    2763. 

  2763. 

  2764. <P><STRONG><a name="[14d]"></a>TIM_TI4_SetConfig</STRONG> (Thumb, 108 bytes, Stack size 24 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI4_SetConfig))
    2765. 

  2765. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = TIM_TI4_SetConfig
    2766. 

  2766. </UL>
    2767. 

  2767. <BR>[Called By]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_ConfigChannel
    2768. 

  2768. </UL>
    2769. 

  2769. 

  2770. <P><STRONG><a name="[144]"></a>TIM_TI1_ConfigInputStage</STRONG> (Thumb, 80 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI1_ConfigInputStage))
    2771. 

  2771. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_TI1_ConfigInputStage
    2772. 

  2772. </UL>
    2773. 

  2773. <BR>[Called By]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2774. 

  2774. </UL>
    2775. 

  2775. 

  2776. <P><STRONG><a name="[145]"></a>TIM_ITRx_SetConfig</STRONG> (Thumb, 48 bytes, Stack size 12 bytes, stm32h5xx_hal_tim.o(.text.TIM_ITRx_SetConfig))
    2777. 

  2777. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_ITRx_SetConfig
    2778. 

  2778. </UL>
    2779. 

  2779. <BR>[Called By]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2780. 

  2780. </UL>
    2781. 

  2781. 

  2782. <P><STRONG><a name="[146]"></a>TIM_TI2_ConfigInputStage</STRONG> (Thumb, 82 bytes, Stack size 20 bytes, stm32h5xx_hal_tim.o(.text.TIM_TI2_ConfigInputStage))
    2783. 

  2783. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_TI2_ConfigInputStage
    2784. 

  2784. </UL>
    2785. 

  2785. <BR>[Called By]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2786. 

  2786. </UL>
    2787. 

  2787. 

  2788. <P><STRONG><a name="[7c]"></a>bsp_read_cpu_flash</STRONG> (Thumb, 106 bytes, Stack size 20 bytes, chipflash.o(.text.bsp_read_cpu_flash))
    2789. 

  2789. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = bsp_read_cpu_flash
    2790. 

  2790. </UL>
    2791. 

  2791. <BR>[Address Reference Count : 1]<UL><LI> chipflash.o(.data._flash_ops)
    2792. 

  2792. </UL>
    2793. 

  2793. <P><STRONG><a name="[7d]"></a>bsp_write_cpu_flash</STRONG> (Thumb, 322 bytes, Stack size 88 bytes, chipflash.o(.text.bsp_write_cpu_flash))
    2794. 

  2794. <BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = bsp_write_cpu_flash &rArr; HAL_FLASH_Program &rArr; FLASH_Program_QuadWord_OBK
    2795. 

  2795. </UL>
    2796. 

  2796. <BR>[Calls]<UL><LI><a href="#[19f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Lock
    2797. 

  2797. <LI><a href="#[19d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Unlock
    2798. 

  2798. <LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Program
    2799. 

  2799. <LI><a href="#[1a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_cmp_cpu_flash
    2800. 

  2800. <LI><a href="#[19b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2801. 

  2801. </UL>
    2802. 

  2802. <BR>[Address Reference Count : 1]<UL><LI> chipflash.o(.data._flash_ops)
    2803. 

  2803. </UL>
    2804. 

  2804. <P><STRONG><a name="[1a0]"></a>bsp_cmp_cpu_flash</STRONG> (Thumb, 176 bytes, Stack size 24 bytes, chipflash.o(.text.bsp_cmp_cpu_flash))
    2805. 

  2805. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = bsp_cmp_cpu_flash
    2806. 

  2806. </UL>
    2807. 

  2807. <BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_write_cpu_flash
    2808. 

  2808. </UL>
    2809. 

  2809. 

  2810. <P><STRONG><a name="[7e]"></a>bsp_erase_cpu_flash</STRONG> (Thumb, 128 bytes, Stack size 64 bytes, chipflash.o(.text.bsp_erase_cpu_flash))
    2811. 

  2811. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = bsp_erase_cpu_flash &rArr; HAL_FLASHEx_Erase &rArr; FLASH_WaitForLastOperation
    2812. 

  2812. </UL>
    2813. 

  2813. <BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASHEx_Erase
    2814. 

  2814. <LI><a href="#[19f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Lock
    2815. 

  2815. <LI><a href="#[19d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_FLASH_Unlock
    2816. 

  2816. <LI><a href="#[19e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_get_sector
    2817. 

  2817. </UL>
    2818. 

  2818. <BR>[Address Reference Count : 1]<UL><LI> chipflash.o(.data._flash_ops)
    2819. 

  2819. </UL>
    2820. 

  2820. <P><STRONG><a name="[19e]"></a>bsp_get_sector</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, chipflash.o(.text.bsp_get_sector))
    2821. 

  2821. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = bsp_get_sector
    2822. 

  2822. </UL>
    2823. 

  2823. <BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bsp_erase_cpu_flash
    2824. 

  2824. </UL>
    2825. 

  2825. 

  2826. <P><STRONG><a name="[1a4]"></a>rounddown_pow_of_two</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, rkfifo.o(.text.rounddown_pow_of_two))
    2827. 

  2827. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = rounddown_pow_of_two &rArr; fls_int
    2828. 

  2828. </UL>
    2829. 

  2829. <BR>[Calls]<UL><LI><a href="#[1a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fls_int
    2830. 

  2830. </UL>
    2831. 

  2831. <BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_init
    2832. 

  2832. </UL>
    2833. 

  2833. 

  2834. <P><STRONG><a name="[1a6]"></a>fls_int</STRONG> (Thumb, 154 bytes, Stack size 12 bytes, rkfifo.o(.text.fls_int))
    2835. 

  2835. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = fls_int
    2836. 

  2836. </UL>
    2837. 

  2837. <BR>[Called By]<UL><LI><a href="#[1a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rounddown_pow_of_two
    2838. 

  2838. </UL>
    2839. 

  2839. 

  2840. <P><STRONG><a name="[1a3]"></a>kfifo_unused</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, rkfifo.o(.text.kfifo_unused))
    2841. 

  2841. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = kfifo_unused
    2842. 

  2842. </UL>
    2843. 

  2843. <BR>[Called By]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_in
    2844. 

  2844. </UL>
    2845. 

  2845. 

  2846. <P><STRONG><a name="[19a]"></a>__rkfifo_copy_in</STRONG> (Thumb, 156 bytes, Stack size 56 bytes, rkfifo.o(.text.__rkfifo_copy_in))
    2847. 

  2847. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __rkfifo_copy_in
    2848. 

  2848. </UL>
    2849. 

  2849. <BR>[Calls]<UL><LI><a href="#[19b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2850. 

  2850. </UL>
    2851. 

  2851. <BR>[Called By]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_in
    2852. 

  2852. </UL>
    2853. 

  2853. 

  2854. <P><STRONG><a name="[19c]"></a>__rkfifo_copy_out</STRONG> (Thumb, 156 bytes, Stack size 56 bytes, rkfifo.o(.text.__rkfifo_copy_out))
    2855. 

  2855. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __rkfifo_copy_out
    2856. 

  2856. </UL>
    2857. 

  2857. <BR>[Calls]<UL><LI><a href="#[19b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2858. 

  2858. </UL>
    2859. 

  2859. <BR>[Called By]<UL><LI><a href="#[1a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_out_peek
    2860. 

  2860. </UL>
    2861. 

  2861. 

  2862. <P><STRONG><a name="[b8]"></a>Can_Fifo_Init</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, soft_can.o(.text.Can_Fifo_Init))
    2863. 

  2863. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = Can_Fifo_Init &rArr; rkfifo_init &rArr; rounddown_pow_of_two &rArr; fls_int
    2864. 

  2864. </UL>
    2865. 

  2865. <BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rkfifo_init
    2866. 

  2866. </UL>
    2867. 

  2867. <BR>[Called By]<UL><LI><a href="#[181]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_CAN_INIT
    2868. 

  2868. </UL>
    2869. 

  2869. 

  2870. <P><STRONG><a name="[bc]"></a>Peeling_Calib</STRONG> (Thumb, 360 bytes, Stack size 72 bytes, soft_can.o(.text.Peeling_Calib))
    2871. 

  2871. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = Peeling_Calib &rArr; Save_GrossWeight &rArr; Write_Check &rArr; Write_To_Flash
    2872. 

  2872. </UL>
    2873. 

  2873. <BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2874. 

  2874. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Value
    2875. 

  2875. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    2876. 

  2876. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2877. 

  2877. <LI><a href="#[188]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_GrossWeight
    2878. 

  2878. </UL>
    2879. 

  2879. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2880. 

  2880. </UL>
    2881. 

  2881. 

  2882. <P><STRONG><a name="[bd]"></a>Weight_Calib</STRONG> (Thumb, 106 bytes, Stack size 24 bytes, soft_can.o(.text.Weight_Calib))
    2883. 

  2883. <BR><BR>[Stack]<UL><LI>Max Depth = 196<LI>Call Chain = Weight_Calib &rArr; Auto_Calib &rArr; Read_Value &rArr; delay_us &rArr; HAL_TIM_Base_Start
    2884. 

  2884. </UL>
    2885. 

  2885. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2886. 

  2886. <LI><a href="#[18d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Check
    2887. 

  2887. <LI><a href="#[199]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;K_Value_Init
    2888. 

  2888. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    2889. 

  2889. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2890. 

  2890. </UL>
    2891. 

  2891. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2892. 

  2892. </UL>
    2893. 

  2893. 

  2894. <P><STRONG><a name="[be]"></a>Save_K</STRONG> (Thumb, 452 bytes, Stack size 48 bytes, soft_can.o(.text.Save_K))
    2895. 

  2895. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = Save_K &rArr; Write_Check &rArr; Write_To_Flash
    2896. 

  2896. </UL>
    2897. 

  2897. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2898. 

  2898. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_To_Flash
    2899. 

  2899. <LI><a href="#[190]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_K
    2900. 

  2900. <LI><a href="#[18f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SystemReset
    2901. 

  2901. <LI><a href="#[18e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Restore_Factory_Setting
    2902. 

  2902. <LI><a href="#[18d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Check
    2903. 

  2903. </UL>
    2904. 

  2904. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Rx_Decode
    2905. 

  2905. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    2906. 

  2906. </UL>
    2907. 

  2907. 

  2908. <P><STRONG><a name="[188]"></a>Save_GrossWeight</STRONG> (Thumb, 148 bytes, Stack size 24 bytes, soft_can.o(.text.Save_GrossWeight))
    2909. 

  2909. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = Save_GrossWeight &rArr; Write_Check &rArr; Write_To_Flash
    2910. 

  2910. </UL>
    2911. 

  2911. <BR>[Calls]<UL><LI><a href="#[18d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_Check
    2912. 

  2912. </UL>
    2913. 

  2913. <BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Peeling_Calib
    2914. 

  2914. </UL>
    2915. 

  2915. 

  2916. <P><STRONG><a name="[aa]"></a>Auto_Calib</STRONG> (Thumb, 678 bytes, Stack size 104 bytes, soft_can.o(.text.Auto_Calib))
    2917. 

  2917. <BR><BR>[Stack]<UL><LI>Max Depth = 172<LI>Call Chain = Auto_Calib &rArr; Read_Value &rArr; delay_us &rArr; HAL_TIM_Base_Start
    2918. 

  2918. </UL>
    2919. 

  2919. <BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2920. 

  2920. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Value
    2921. 

  2921. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Value
    2922. 

  2922. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    2923. 

  2923. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_To_Flash
    2924. 

  2924. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Scale_Is_Nan
    2925. 

  2925. </UL>
    2926. 

  2926. <BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    2927. 

  2927. </UL>
    2928. 

  2928. 

  2929. <P><STRONG><a name="[199]"></a>K_Value_Init</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, soft_can.o(.text.K_Value_Init))
    2930. 

  2930. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = K_Value_Init
    2931. 

  2931. </UL>
    2932. 

  2932. <BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    2933. 

  2933. </UL>
    2934. 

  2934. 

  2935. <P><STRONG><a name="[18d]"></a>Write_Check</STRONG> (Thumb, 42 bytes, Stack size 16 bytes, soft_can.o(.text.Write_Check))
    2936. 

  2936. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = Write_Check &rArr; Write_To_Flash
    2937. 

  2937. </UL>
    2938. 

  2938. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Write_To_Flash
    2939. 

  2939. </UL>
    2940. 

  2940. <BR>[Called By]<UL><LI><a href="#[188]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_GrossWeight
    2941. 

  2941. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2942. 

  2942. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Weight_Calib
    2943. 

  2943. </UL>
    2944. 

  2944. 

  2945. <P><STRONG><a name="[18e]"></a>Restore_Factory_Setting</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, soft_can.o(.text.Restore_Factory_Setting))
    2946. 

  2946. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Restore_Factory_Setting
    2947. 

  2947. </UL>
    2948. 

  2948. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2949. 

  2949. </UL>
    2950. 

  2950. 

  2951. <P><STRONG><a name="[18f]"></a>__NVIC_SystemReset</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, soft_can.o(.text.__NVIC_SystemReset))
    2952. 

  2952. <BR><BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2953. 

  2953. </UL>
    2954. 

  2954. 

  2955. <P><STRONG><a name="[190]"></a>Get_K</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, soft_can.o(.text.Get_K))
    2956. 

  2956. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Get_K
    2957. 

  2957. </UL>
    2958. 

  2958. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Save_K
    2959. 

  2959. </UL>
    2960. 

  2960. 

  2961. <P><STRONG><a name="[b4]"></a>Can_Ackmsg_Init</STRONG> (Thumb, 62 bytes, Stack size 4 bytes, soft_can.o(.text.Can_Ackmsg_Init))
    2962. 

  2962. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Can_Ackmsg_Init
    2963. 

  2963. </UL>
    2964. 

  2964. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    2965. 

  2965. </UL>
    2966. 

  2966. 

  2967. <P><STRONG><a name="[b5]"></a>__ARM_isnanf</STRONG> (Thumb, 24 bytes, Stack size 4 bytes, soft_can.o(.text.__ARM_isnanf))
    2968. 

  2968. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __ARM_isnanf
    2969. 

  2969. </UL>
    2970. 

  2970. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    2971. 

  2971. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Scale_Is_Nan
    2972. 

  2972. </UL>
    2973. 

  2973. 

  2974. <P><STRONG><a name="[b7]"></a>__ARM_isnan</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, soft_can.o(.text.__ARM_isnan))
    2975. 

  2975. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __ARM_isnan
    2976. 

  2976. </UL>
    2977. 

  2977. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Ack_Pmu
    2978. 

  2978. </UL>
    2979. 

  2979. 

  2980. <P><STRONG><a name="[ae]"></a>Scale_Is_Nan</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, soft_can.o(.text.Scale_Is_Nan))
    2981. 

  2981. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = Scale_Is_Nan &rArr; __ARM_isnanf
    2982. 

  2982. </UL>
    2983. 

  2983. <BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_isnanf
    2984. 

  2984. </UL>
    2985. 

  2985. <BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_Calib
    2986. 

  2986. </UL>
    2987. 

  2987. 

  2988. <P><STRONG><a name="[197]"></a>Task_80_hz</STRONG> (Thumb, 18 bytes, Stack size 16 bytes, task.o(.text.Task_80_hz))
    2989. 

  2989. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Task_80_hz
    2990. 

  2990. </UL>
    2991. 

  2991. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    2992. 

  2992. </UL>
    2993. 

  2993. 

  2994. <P><STRONG><a name="[193]"></a>Task_10_hz</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, task.o(.text.Task_10_hz))
    2995. 

  2995. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = Task_10_hz &rArr; CAN2PMU_Send &rArr; can_send &rArr; HAL_FDCAN_AddMessageToTxFifoQ &rArr; FDCAN_CopyMessageToRAM
    2996. 

  2996. </UL>
    2997. 

  2997. <BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Sensor_Status
    2998. 

  2998. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN2PMU_Send
    2999. 

  2999. </UL>
    3000. 

  3000. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    3001. 

  3001. </UL>
    3002. 

  3002. 

  3003. <P><STRONG><a name="[194]"></a>Task_1hz</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, task.o(.text.Task_1hz))
    3004. 

  3004. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = Task_1hz &rArr; Compute_Rate
    3005. 

  3005. </UL>
    3006. 

  3006. <BR>[Calls]<UL><LI><a href="#[195]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Compute_Rate
    3007. 

  3007. </UL>
    3008. 

  3008. <BR>[Called By]<UL><LI><a href="#[196]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_Polling
    3009. 

  3009. </UL>
    3010. 

  3010. 

  3011. <P><STRONG><a name="[195]"></a>Compute_Rate</STRONG> (Thumb, 112 bytes, Stack size 4 bytes, task.o(.text.Compute_Rate))
    3012. 

  3012. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Compute_Rate
    3013. 

  3013. </UL>
    3014. 

  3014. <BR>[Called By]<UL><LI><a href="#[194]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task_1hz
    3015. 

  3015. </UL>
    3016. 

  3016. 

  3017. <P><STRONG><a name="[cd]"></a>Warn_Check</STRONG> (Thumb, 136 bytes, Stack size 16 bytes, warn.o(.text.Warn_Check))
    3018. 

  3018. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = Warn_Check &rArr; Error_Led &rArr; SET_RED_LED &rArr; HAL_GPIO_WritePin
    3019. 

  3019. </UL>
    3020. 

  3020. <BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Led
    3021. 

  3021. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Check_Err
    3022. 

  3022. </UL>
    3023. 

  3023. <BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Sensor_Status
    3024. 

  3024. </UL>
    3025. 

  3025. 

  3026. <P><STRONG><a name="[bf]"></a>Check_Err</STRONG> (Thumb, 126 bytes, Stack size 24 bytes, warn.o(.text.Check_Err))
    3027. 

  3027. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Check_Err
    3028. 

  3028. </UL>
    3029. 

  3029. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3030. 

  3030. </UL>
    3031. 

  3031. <BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Warn_Check
    3032. 

  3032. </UL>
    3033. 

  3033. 

  3034. <P><STRONG><a name="[c0]"></a>Error_Led</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, warn.o(.text.Error_Led))
    3035. 

  3035. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Error_Led &rArr; SET_RED_LED &rArr; HAL_GPIO_WritePin
    3036. 

  3036. </UL>
    3037. 

  3037. <BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SET_RED_LED
    3038. 

  3038. </UL>
    3039. 

  3039. <BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Warn_Check
    3040. 

  3040. </UL>
    3041. 

  3041. 

  3042. <P><STRONG><a name="[186]"></a>Read_Params</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, weight_init.o(.text.Read_Params))
    3043. 

  3043. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = Read_Params &rArr; Load_Param
    3044. 

  3044. </UL>
    3045. 

  3045. <BR>[Calls]<UL><LI><a href="#[18a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
    3046. 

  3046. <LI><a href="#[169]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Load_Param
    3047. 

  3047. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Warn_Licence
    3048. 

  3048. <LI><a href="#[18b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Record_First_InitValue
    3049. 

  3049. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3050. 

  3050. </UL>
    3051. 

  3051. <BR>[Called By]<UL><LI><a href="#[185]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MY_WEIGHT_INIT
    3052. 

  3052. </UL>
    3053. 

  3053. 

  3054. <P><STRONG><a name="[18b]"></a>Record_First_InitValue</STRONG> (Thumb, 164 bytes, Stack size 24 bytes, weight_init.o(.text.Record_First_InitValue))
    3055. 

  3055. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Record_First_InitValue
    3056. 

  3056. </UL>
    3057. 

  3057. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3058. 

  3058. </UL>
    3059. 

  3059. <BR>[Called By]<UL><LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    3060. 

  3060. </UL>
    3061. 

  3061. 

  3062. <P><STRONG><a name="[ce]"></a>Get_Warn_Licence</STRONG> (Thumb, 176 bytes, Stack size 32 bytes, weight_init.o(.text.Get_Warn_Licence))
    3063. 

  3063. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Get_Warn_Licence
    3064. 

  3064. </UL>
    3065. 

  3065. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3066. 

  3066. </UL>
    3067. 

  3067. <BR>[Called By]<UL><LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    3068. 

  3068. </UL>
    3069. 

  3069. 

  3070. <P><STRONG><a name="[169]"></a>Load_Param</STRONG> (Thumb, 318 bytes, Stack size 48 bytes, weight_init.o(.text.Load_Param))
    3071. 

  3071. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = Load_Param
    3072. 

  3072. </UL>
    3073. 

  3073. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3074. 

  3074. </UL>
    3075. 

  3075. <BR>[Called By]<UL><LI><a href="#[186]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_Params
    3076. 

  3076. </UL>
    3077. 

  3077. 

  3078. <P><STRONG><a name="[c5]"></a>meanApply</STRONG> (Thumb, 136 bytes, Stack size 16 bytes, weight_read.o(.text.meanApply))
    3079. 

  3079. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = meanApply
    3080. 

  3080. </UL>
    3081. 

  3081. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Value
    3082. 

  3082. </UL>
    3083. 

  3083. 

  3084. <P><STRONG><a name="[c6]"></a>wait_front_data</STRONG> (Thumb, 60 bytes, Stack size 4 bytes, weight_read.o(.text.wait_front_data))
    3085. 

  3085. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = wait_front_data
    3086. 

  3086. </UL>
    3087. 

  3087. <BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Value
    3088. 

  3088. </UL>
    3089. 

  3089. 

  3090. <P><STRONG><a name="[78]"></a>Get_Weight</STRONG> (Thumb, 136 bytes, Stack size 24 bytes, weight_read.o(.text.Get_Weight))
    3091. 

  3091. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Get_Weight
    3092. 

  3092. </UL>
    3093. 

  3093. <BR>[Address Reference Count : 1]<UL><LI> weight_read.o(.data.__ops)
    3094. 

  3094. </UL>
    3095. 

  3095. <P><STRONG><a name="[79]"></a>Get_All_GrossWeight</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, weight_read.o(.text.Get_All_GrossWeight))
    3096. 

  3096. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = Get_All_GrossWeight &rArr; Get_GrossWeight
    3097. 

  3097. </UL>
    3098. 

  3098. <BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_GrossWeight
    3099. 

  3099. </UL>
    3100. 

  3100. <BR>[Address Reference Count : 1]<UL><LI> weight_read.o(.data.__ops)
    3101. 

  3101. </UL>
    3102. 

  3102. <P><STRONG><a name="[ca]"></a>Get_GrossWeight</STRONG> (Thumb, 334 bytes, Stack size 72 bytes, weight_read.o(.text.Get_GrossWeight))
    3103. 

  3103. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = Get_GrossWeight
    3104. 

  3104. </UL>
    3105. 

  3105. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_Device_Handle
    3106. 

  3106. </UL>
    3107. 

  3107. <BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_All_GrossWeight
    3108. 

  3108. </UL>
    3109. 

  3109. 

  3110. <P><STRONG><a name="[7a]"></a>Processing_Data</STRONG> (Thumb, 232 bytes, Stack size 32 bytes, weight_read.o(.text.Processing_Data))
    3111. 

  3111. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = Processing_Data &rArr; Filter_Value &rArr; meanApply
    3112. 

  3112. </UL>
    3113. 

  3113. <BR>[Calls]<UL><LI><a href="#[189]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Convert_Into_Weight
    3114. 

  3114. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Value
    3115. 

  3115. </UL>
    3116. 

  3116. <BR>[Address Reference Count : 1]<UL><LI> weight_read.o(.data.__ops)
    3117. 

  3117. </UL>
    3118. 

  3118. <P><STRONG><a name="[7b]"></a>Filter_Init</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, weight_read.o(.text.Filter_Init))
    3119. 

  3119. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = Filter_Init &rArr; MeanFilterInit
    3120. 

  3120. </UL>
    3121. 

  3121. <BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MeanFilterInit
    3122. 

  3122. </UL>
    3123. 

  3123. <BR>[Address Reference Count : 1]<UL><LI> weight_read.o(.data.__ops)
    3124. 

  3124. </UL>
    3125. 

  3125. <P><STRONG><a name="[c4]"></a>MeanFilterInit</STRONG> (Thumb, 120 bytes, Stack size 20 bytes, weight_read.o(.text.MeanFilterInit))
    3126. 

  3126. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = MeanFilterInit
    3127. 

  3127. </UL>
    3128. 

  3128. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Filter_Init
    3129. 

  3129. </UL>
    3130. 

  3130. <P>
    3131. 

  3131. <H3>
    3132. 

  3132. Undefined Global Symbols
    3133. 

  3133. </H3><HR></body></html>
    3134.