stm32h5xx_hal_pwr_ex.h 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562
  1. /**
  2. ******************************************************************************
  3. * @file stm32h5xx_hal_pwr_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2023 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32H5xx_HAL_PWR_EX_H
  20. #define STM32H5xx_HAL_PWR_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif /* __cplusplus */
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32h5xx_hal_def.h"
  26. /** @addtogroup STM32H5xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup PWREx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup PWREx_Exported_Types PWR Extended Exported Types
  34. * @{
  35. */
  36. /**
  37. * @brief PWREx AVD configuration structure definition
  38. */
  39. typedef struct
  40. {
  41. uint32_t AVDLevel; /*!< AVDLevel: Specifies the AVD detection level. This
  42. parameter can be a value of @ref
  43. PWREx_AVD_detection_level
  44. */
  45. uint32_t Mode; /*!< Mode: Specifies the EXTI operating mode for the AVD
  46. event. This parameter can be a value of @ref
  47. PWREx_AVD_Mode.
  48. */
  49. } PWREx_AVDTypeDef;
  50. /**
  51. * @brief PWREx Wakeup pin configuration structure definition
  52. */
  53. typedef struct
  54. {
  55. uint32_t WakeUpPin; /*!< WakeUpPin: Specifies the Wake-Up pin to be enabled.
  56. This parameter can be a value of @ref
  57. PWREx_WakeUp_Pins
  58. */
  59. uint32_t PinPolarity; /*!< PinPolarity: Specifies the Wake-Up pin polarity.
  60. This parameter can be a value of @ref
  61. PWREx_PIN_Polarity
  62. */
  63. uint32_t PinPull; /*!< PinPull: Specifies the Wake-Up pin pull. This
  64. parameter can be a value of @ref
  65. PWREx_PIN_Pull
  66. */
  67. } PWREx_WakeupPinTypeDef;
  68. /**
  69. * @}
  70. */
  71. /* Exported constants --------------------------------------------------------*/
  72. /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants
  73. * @{
  74. */
  75. /** @defgroup PWREx_Supply_configuration PWREx Supply configuration
  76. * @{
  77. */
  78. #define PWR_EXTERNAL_SOURCE_SUPPLY PWR_SCCR_BYPASS /*!< The SMPS disabled and the LDO Bypass. The Core domains
  79. are supplied from an external source */
  80. #if defined (SMPS)
  81. #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_SMPSEN | PWR_SCCR_LDOEN | PWR_SCCR_BYPASS)
  82. #else
  83. #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_LDOEN | PWR_SCCR_BYPASS)
  84. #endif /* defined (SMPS) */
  85. /**
  86. * @}
  87. */
  88. /** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration
  89. * @{
  90. */
  91. #define PWR_PIN_POLARITY_HIGH (0x00000000U)
  92. #define PWR_PIN_POLARITY_LOW (0x00000001U)
  93. /**
  94. * @}
  95. */
  96. /** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration
  97. * @{
  98. */
  99. #define PWR_PIN_NO_PULL (0x00000000U)
  100. #define PWR_PIN_PULL_UP (0x00000001U)
  101. #define PWR_PIN_PULL_DOWN (0x00000002U)
  102. /**
  103. * @}
  104. */
  105. /** @defgroup PWREx_AVD_detection_level PWREx AVD detection level
  106. * @{
  107. */
  108. #define PWR_AVDLEVEL_0 (0x00000000U) /*!< Analog voltage detector level 0 selection : 1V7 */
  109. #define PWR_AVDLEVEL_1 PWR_VMCR_ALS_0 /*!< Analog voltage detector level 1 selection : 2V1 */
  110. #define PWR_AVDLEVEL_2 PWR_VMCR_ALS_1 /*!< Analog voltage detector level 2 selection : 2V5 */
  111. #define PWR_AVDLEVEL_3 PWR_VMCR_ALS /*!< Analog voltage detector level 3 selection : 2V8 */
  112. /**
  113. * @}
  114. */
  115. /** @defgroup PWREx_AVD_Mode PWREx AVD Mode
  116. * @{
  117. */
  118. #define PWR_AVD_MODE_NORMAL (0x00000000U)/*!< Basic mode is used */
  119. #define PWR_AVD_MODE_IT_RISING (0x00010001U)/*!< External Interrupt Mode with Rising edge trigger detection*/
  120. #define PWR_AVD_MODE_IT_FALLING (0x00010002U)/*!< External Interrupt Mode with
  121. Falling edge trigger detection */
  122. #define PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U)/*!< External Interrupt Mode with
  123. Rising/Falling edge trigger detection */
  124. #define PWR_AVD_MODE_EVENT_RISING (0x00020001U)/*!< Event Mode with Rising edge trigger detection */
  125. #define PWR_AVD_MODE_EVENT_FALLING (0x00020002U)/*!< Event Mode with Falling edge trigger detection */
  126. #define PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U)/*!< Event Mode with Rising/Falling edge trigger detection */
  127. /**
  128. * @}
  129. */
  130. /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
  131. * @{
  132. */
  133. #define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_VOSCR_VOS /*!< Voltage scaling range 0 */
  134. #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_VOSCR_VOS_1 /*!< Voltage scaling range 1 */
  135. #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_VOSCR_VOS_0 /*!< Voltage scaling range 2 */
  136. #define PWR_REGULATOR_VOLTAGE_SCALE3 (0U) /*!< Voltage scaling range 3 */
  137. /**
  138. * @}
  139. */
  140. /** @defgroup PWREx_System_Stop_Mode_Voltage_Scale PWREx System Stop Mode Voltage Scale
  141. * @{
  142. */
  143. #define PWR_REGULATOR_SVOS_SCALE5 (PWR_PMCR_SVOS_0)
  144. #define PWR_REGULATOR_SVOS_SCALE4 (PWR_PMCR_SVOS_1)
  145. #define PWR_REGULATOR_SVOS_SCALE3 (PWR_PMCR_SVOS_0 | PWR_PMCR_SVOS_1)
  146. /**
  147. * @}
  148. */
  149. /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR Extended Battery Charging Resistor Selection
  150. * @{
  151. */
  152. #define PWR_BATTERY_CHARGING_RESISTOR_5 (0U) /*!< VBAT charging through a 5 kOhms resistor */
  153. #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_BDCR_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */
  154. /**
  155. * @}
  156. */
  157. /** @defgroup PWREx_Memory_Shut_Off Memory shut-off block selection
  158. * @{
  159. */
  160. #define PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO /*!< RAM1 shut-off control in Stop mode */
  161. #if defined (PWR_PMCR_SRAM2_16SO)
  162. #define PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO /*!< RAM2 16k byte shut-off control in Stop mode */
  163. #define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */
  164. #elif defined (PWR_PMCR_SRAM2_16LSO)
  165. #define PWR_RAM2_LOW_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16LSO /*!< RAM2 low 16k byte shut-off control in Stop mode */
  166. #define PWR_RAM2_HIGH_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16HSO /*!< RAM2 High 16k byte shut-off control in Stop mode */
  167. #define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */
  168. #else
  169. #define PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO /*!< RAM2 shut-off control in Stop mode */
  170. #endif /* PWR_PMCR_SRAM2_16SO */
  171. #if defined (PWR_PMCR_SRAM3SO)
  172. #define PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO /*!< RAM3 shut-off control in Stop mode */
  173. #endif /* PWR_PMCR_SRAM3SO */
  174. #if defined (PWR_PMCR_ETHERNETSO)
  175. #define PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO /*!< Ethernet shut-off control in Stop mode */
  176. #endif /* PWR_PMCR_ETHERNETSO */
  177. /**
  178. * @}
  179. */
  180. /** @defgroup PWREx_AVD_EXTI_Line PWREx AVD EXTI Line 16
  181. * @{
  182. */
  183. #define PWR_EXTI_LINE_AVD EXTI_IMR1_IM16 /*!< External interrupt line 16
  184. Connected to the AVD EXTI Line */
  185. /**
  186. * @}
  187. */
  188. /**
  189. * @}
  190. */
  191. /* Exported macros -----------------------------------------------------------*/
  192. /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros
  193. * @{
  194. */
  195. /**
  196. * @brief Enable the AVD EXTI Line 16.
  197. * @retval None.
  198. */
  199. #define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
  200. /**
  201. * @brief Disable the AVD EXTI Line 16
  202. * @retval None.
  203. */
  204. #define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD)
  205. /**
  206. * @brief Enable event on AVD EXTI Line 16.
  207. * @retval None.
  208. */
  209. #define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
  210. /**
  211. * @brief Disable event on AVD EXTI Line 16.
  212. * @retval None.
  213. */
  214. #define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD)
  215. /**
  216. * @brief Enable the AVD Extended Interrupt Rising Trigger.
  217. * @retval None.
  218. */
  219. #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
  220. /**
  221. * @brief Disable the AVD Extended Interrupt Rising Trigger.
  222. * @retval None.
  223. */
  224. #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD)
  225. /**
  226. * @brief Enable the AVD Extended Interrupt Falling Trigger.
  227. * @retval None.
  228. */
  229. #define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
  230. /**
  231. * @brief Disable the AVD Extended Interrupt Falling Trigger.
  232. * @retval None.
  233. */
  234. #define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD)
  235. /**
  236. * @brief Enable the AVD Extended Interrupt Rising and Falling Trigger.
  237. * @retval None.
  238. */
  239. #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  240. do { \
  241. __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \
  242. __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \
  243. } while(0);
  244. /**
  245. * @brief Disable the AVD Extended Interrupt Rising & Falling Trigger.
  246. * @retval None.
  247. */
  248. #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  249. do { \
  250. __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \
  251. __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \
  252. } while(0);
  253. /**
  254. * @brief Check whether the specified AVD EXTI Rising interrupt flag is set or not.
  255. * @retval EXTI AVD Line Status.
  256. */
  257. #define __HAL_PWR_PVD_AVD_EXTI_GET_RISING_FLAG() ((READ_BIT(EXTI->RPR1, PWR_EXTI_LINE_AVD)\
  258. == PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
  259. /**
  260. * @brief Check whether the specified AVD EXTI Falling interrupt flag is set or not.
  261. * @retval EXTI AVD Line Status.
  262. */
  263. #define __HAL_PWR_PVD_AVD_EXTI_GET_FALLING_FLAG() ((READ_BIT(EXTI->FPR1, PWR_EXTI_LINE_AVD)\
  264. == PWR_EXTI_LINE_AVD) ? 1UL : 0UL)
  265. /**
  266. * @brief Clear the AVD EXTI flag.
  267. * @retval None.
  268. */
  269. #define __HAL_PWR_PVD_AVD_EXTI_CLEAR_FLAG() \
  270. do \
  271. { \
  272. WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_AVD); \
  273. WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_AVD); \
  274. } while(0)
  275. /**
  276. * @brief Generates a Software interrupt on AVD EXTI line.
  277. * @retval None.
  278. */
  279. #define __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD)
  280. /**
  281. * @brief Configure the main internal regulator output voltage.
  282. * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but
  283. * doesn't check whether or not VOSREADY flag is set. User may resort
  284. * to __HAL_PWR_GET_FLAG() macro to check VOSF bit state.
  285. * @param __REGULATOR__ : Specifies the regulator output voltage to achieve a
  286. * tradeoff between performance and power consumption.
  287. * This parameter can be one of the following values :
  288. * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output scale 0.
  289. * Provides a typical output voltage at 1.2 V.
  290. * Used when system clock frequency is up to 160 MHz.
  291. * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output scale 1.
  292. * Provides a typical output voltage at 1.1 V.
  293. * Used when system clock frequency is up to 100 MHz.
  294. * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output scale 2.
  295. * Provides a typical output voltage at 1.0 V.
  296. * Used when system clock frequency is up to 50 MHz.
  297. * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output scale 3.
  298. * Provides a typical output voltage at 0.9 V.
  299. * Used when system clock frequency is up to 24 MHz.
  300. * @retval None.
  301. */
  302. #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) \
  303. do \
  304. { \
  305. __IO uint32_t tmpreg; \
  306. MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, (__REGULATOR__)); \
  307. /* Delay after an RCC peripheral clock enabling */ \
  308. tmpreg = READ_BIT(PWR->VOSCR, PWR_VOSCR_VOS); \
  309. UNUSED(tmpreg); \
  310. } while(0)
  311. /**
  312. * @}
  313. */
  314. /* Private constants ---------------------------------------------------------*/
  315. /** @defgroup PWREx_Private_Constants PWR Extended Private Constants
  316. * @{
  317. */
  318. /** @defgroup PWREx_AVD_Mode_Mask PWR Extended AVD Mode Mask
  319. * @{
  320. */
  321. #define AVD_MODE_IT (0x00010000U)
  322. #define AVD_MODE_EVT (0x00020000U)
  323. #define AVD_RISING_EDGE (0x00000001U)
  324. #define AVD_FALLING_EDGE (0x00000002U)
  325. #define AVD_RISING_FALLING_EDGE (0x00000003U)
  326. /**
  327. * @}
  328. */
  329. /**
  330. * @}
  331. */
  332. /* Private macros --------------------------------------------------------*/
  333. /** @defgroup PWREx_Private_Macros PWR Extended Private Macros
  334. * @{
  335. */
  336. /* Check PWR regulator configuration parameter */
  337. #define IS_PWR_SUPPLY(PWR_SOURCE) ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY)
  338. /* Check wake up pin polarity parameter */
  339. #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) ||\
  340. ((POLARITY) == PWR_PIN_POLARITY_LOW))
  341. /* Check wake up pin pull configuration parameter */
  342. #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) ||\
  343. ((PULL) == PWR_PIN_PULL_UP) ||\
  344. ((PULL) == PWR_PIN_PULL_DOWN))
  345. /* Check wake up flag parameter */
  346. #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\
  347. ((FLAG) == PWR_WAKEUP_FLAG2) ||\
  348. ((FLAG) == PWR_WAKEUP_FLAG3) ||\
  349. ((FLAG) == PWR_WAKEUP_FLAG4) ||\
  350. ((FLAG) == PWR_WAKEUP_FLAG5) ||\
  351. ((FLAG) == PWR_WAKEUP_FLAG6) ||\
  352. ((FLAG) == PWR_WAKEUP_FLAG_ALL))
  353. /* Voltage scaling range check macro */
  354. #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE0) ||\
  355. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) ||\
  356. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) ||\
  357. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
  358. /* Check PWR regulator configuration in STOP mode parameter */
  359. #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) ||\
  360. ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) ||\
  361. ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5))
  362. /* Battery charging resistor selection check macro */
  363. #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
  364. ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
  365. /* Check memory block parameter */
  366. #if defined (PWR_PMCR_SRAM2_16SO)
  367. #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_ETHERNET_MEMORY_BLOCK) || \
  368. ((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \
  369. ((BLOCK) == PWR_RAM2_16_MEMORY_BLOCK) || \
  370. ((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \
  371. ((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
  372. #elif defined (PWR_PMCR_SRAM2_16LSO)
  373. #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \
  374. ((BLOCK) == PWR_RAM2_LOW_16_MEMORY_BLOCK) || \
  375. ((BLOCK) == PWR_RAM2_HIGH_16_MEMORY_BLOCK) || \
  376. ((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \
  377. ((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
  378. #else
  379. #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM2_MEMORY_BLOCK) || \
  380. ((BLOCK) == PWR_RAM1_MEMORY_BLOCK))
  381. #endif /* PWR_PMCR_SRAM2_16SO */
  382. /* Check wake up flag parameter */
  383. #define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) ||\
  384. ((LEVEL) == PWR_AVDLEVEL_1) ||\
  385. ((LEVEL) == PWR_AVDLEVEL_2) ||\
  386. ((LEVEL) == PWR_AVDLEVEL_3))
  387. /* Check AVD mode parameter */
  388. #define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING) ||\
  389. ((MODE) == PWR_AVD_MODE_IT_FALLING) ||\
  390. ((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) ||\
  391. ((MODE) == PWR_AVD_MODE_EVENT_RISING) ||\
  392. ((MODE) == PWR_AVD_MODE_EVENT_FALLING) ||\
  393. ((MODE) == PWR_AVD_MODE_NORMAL) ||\
  394. ((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING))
  395. /**
  396. * @}
  397. */
  398. /** @addtogroup PWREx_Exported_Functions
  399. * @{
  400. */
  401. /** @addtogroup PWREx_Exported_Functions_Group1
  402. * @{
  403. */
  404. HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource);
  405. uint32_t HAL_PWREx_GetSupplyConfig(void);
  406. HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
  407. uint32_t HAL_PWREx_GetVoltageRange(void);
  408. HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling);
  409. uint32_t HAL_PWREx_GetStopModeVoltageRange(void);
  410. /**
  411. * @}
  412. */
  413. /** @addtogroup PWREx_Exported_Functions_Group2
  414. * @{
  415. */
  416. void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD);
  417. void HAL_PWREx_EnableAVD(void);
  418. void HAL_PWREx_DisableAVD(void);
  419. #if defined (PWR_USBSCR_USB33DEN)
  420. void HAL_PWREx_EnableUSBVoltageDetector(void);
  421. void HAL_PWREx_DisableUSBVoltageDetector(void);
  422. void HAL_PWREx_EnableVddUSB(void);
  423. void HAL_PWREx_DisableVddUSB(void);
  424. #endif /* PWR_USBSCR_USB33DEN */
  425. void HAL_PWREx_EnableMonitoring(void);
  426. void HAL_PWREx_DisableMonitoring(void);
  427. void HAL_PWREx_EnableUCPDStandbyMode(void);
  428. void HAL_PWREx_DisableUCPDStandbyMode(void);
  429. void HAL_PWREx_EnableUCPDDeadBattery(void);
  430. void HAL_PWREx_DisableUCPDDeadBattery(void);
  431. void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue);
  432. void HAL_PWREx_DisableBatteryCharging(void);
  433. void HAL_PWREx_EnableAnalogBooster(void);
  434. void HAL_PWREx_DisableAnalogBooster(void);
  435. void HAL_PWREx_PVD_AVD_IRQHandler(void);
  436. void HAL_PWREx_PVD_AVD_Rising_Callback(void);
  437. void HAL_PWREx_PVD_AVD_Falling_Callback(void);
  438. /**
  439. * @}
  440. */
  441. /** @addtogroup PWREx_Exported_Functions_Group3
  442. * @{
  443. */
  444. void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams);
  445. void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx);
  446. /**
  447. * @}
  448. */
  449. /** @addtogroup PWREx_Exported_Functions_Group4
  450. * @{
  451. */
  452. void HAL_PWREx_EnableFlashPowerDown(void);
  453. void HAL_PWREx_DisableFlashPowerDown(void);
  454. void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock);
  455. void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock);
  456. HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void);
  457. void HAL_PWREx_DisableBkupRAMRetention(void);
  458. /**
  459. * @}
  460. */
  461. /** @addtogroup PWREx_Exported_Functions_Group5
  462. * @{
  463. */
  464. void HAL_PWREx_EnableStandbyIORetention(void);
  465. void HAL_PWREx_DisableStandbyIORetention(void);
  466. void HAL_PWREx_EnableStandbyJTAGIORetention(void);
  467. void HAL_PWREx_DisableStandbyJTAGIORetention(void);
  468. /**
  469. * @}
  470. */
  471. /**
  472. * @}
  473. */
  474. /**
  475. * @}
  476. */
  477. /**
  478. * @}
  479. */
  480. #ifdef __cplusplus
  481. }
  482. #endif /* __cplusplus */
  483. #endif /* STM32H5xx_HAL_PWR_EX_H */