stm32l4xx_ll_dma2d.h 88 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32L4xx_LL_DMA2D_H
  20. #define STM32L4xx_LL_DMA2D_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32l4xx.h"
  26. /** @addtogroup STM32L4xx_LL_Driver
  27. * @{
  28. */
  29. #if defined (DMA2D)
  30. /** @defgroup DMA2D_LL DMA2D
  31. * @{
  32. */
  33. /* Private types -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private constants ---------------------------------------------------------*/
  36. /* Private macros ------------------------------------------------------------*/
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  39. * @{
  40. */
  41. /**
  42. * @}
  43. */
  44. #endif /*USE_FULL_LL_DRIVER*/
  45. /* Exported types ------------------------------------------------------------*/
  46. #if defined(USE_FULL_LL_DRIVER)
  47. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  48. * @{
  49. */
  50. /**
  51. * @brief LL DMA2D Init Structure Definition
  52. */
  53. typedef struct
  54. {
  55. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  56. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  57. This parameter can be modified afterwards,
  58. using unitary function @ref LL_DMA2D_SetMode(). */
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using,
  62. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  63. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  64. - This parameter must be a number between:
  65. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  66. - This parameter must be a number between:
  67. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  68. - This parameter must be a number between:
  69. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  70. - This parameter must be a number between:
  71. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  72. - This parameter must be a number between:
  73. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  74. This parameter can be modified afterwards,
  75. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  76. function @ref LL_DMA2D_ConfigOutputColor(). */
  77. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  78. - This parameter must be a number between:
  79. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between:
  81. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  82. - This parameter must be a number between:
  83. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  84. - This parameter must be a number between:
  85. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  86. - This parameter must be a number between:
  87. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  88. This parameter can be modified afterwards
  89. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  90. function @ref LL_DMA2D_ConfigOutputColor(). */
  91. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  92. - This parameter must be a number between:
  93. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  94. - This parameter must be a number between:
  95. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  96. - This parameter must be a number between:
  97. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between:
  99. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  100. - This parameter must be a number between:
  101. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards
  103. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  104. function @ref LL_DMA2D_ConfigOutputColor(). */
  105. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  106. - This parameter must be a number between:
  107. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  108. - This parameter must be a number between:
  109. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  110. - This parameter must be a number between:
  111. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  112. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  113. This parameter can be modified afterwards using,
  114. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  115. function @ref LL_DMA2D_ConfigOutputColor(). */
  116. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  117. - This parameter must be a number between:
  118. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  119. This parameter can be modified afterwards,
  120. using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  121. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  122. uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image.
  123. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE.
  124. This parameter can be modified afterwards,
  125. using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */
  126. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  127. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  128. uint32_t LineOffsetMode; /*!< Specifies the output line offset mode.
  129. - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE.
  130. This parameter can be modified afterwards,
  131. using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */
  132. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  133. uint32_t LineOffset; /*!< Specifies the output line offset value.
  134. - This parameter must be a number between:
  135. Min_Data = 0x0000 and Max_Data = 0x3FFF on devices
  136. where the Line Offset Mode feature is available.
  137. else between Min_Data = 0x0000 and Max_Data = 0xFFFF on other devices.
  138. This parameter can be modified afterwards,
  139. using unitary function @ref LL_DMA2D_SetLineOffset(). */
  140. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  141. - This parameter must be a number between:
  142. Min_Data = 0x0000 and Max_Data = 0xFFFF.
  143. This parameter can be modified afterwards,
  144. using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  145. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred.
  146. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  147. This parameter can be modified afterwards using,
  148. unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  149. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  150. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  151. This parameter can be modified afterwards,
  152. using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  153. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  154. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  155. This parameter can be modified afterwards,
  156. using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  157. } LL_DMA2D_InitTypeDef;
  158. /**
  159. * @brief LL DMA2D Layer Configuration Structure Definition
  160. */
  161. typedef struct
  162. {
  163. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  164. - This parameter must be a number between:
  165. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  166. This parameter can be modified afterwards using unitary functions
  167. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  168. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  169. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  170. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  171. This parameter can be modified afterwards using unitary functions
  172. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  173. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  174. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  175. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  176. This parameter can be modified afterwards using unitary functions
  177. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  178. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  179. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  180. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  181. This parameter can be modified afterwards using unitary functions
  182. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  183. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  184. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  185. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  186. This parameter can be modified afterwards using unitary functions
  187. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  188. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  189. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  190. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  191. This parameter can be modified afterwards using unitary functions
  192. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  193. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  194. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  195. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  196. This parameter can be modified afterwards using unitary functions
  197. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  198. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  199. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  200. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  201. This parameter can be modified afterwards using unitary functions
  202. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  203. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  204. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  205. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  206. This parameter can be modified afterwards using unitary functions
  207. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  208. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  209. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  210. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  211. This parameter can be modified afterwards using unitary functions
  212. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  213. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  214. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  215. - This parameter must be a number between:
  216. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  217. This parameter can be modified afterwards using unitary functions
  218. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  219. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  220. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  221. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  222. This parameter can be modified afterwards using unitary functions
  223. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  224. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  225. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  226. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  227. This parameter can be modified afterwards using unitary functions
  228. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  229. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  230. } LL_DMA2D_LayerCfgTypeDef;
  231. /**
  232. * @brief LL DMA2D Output Color Structure Definition
  233. */
  234. typedef struct
  235. {
  236. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  237. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  238. This parameter can be modified afterwards using
  239. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  240. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  241. - This parameter must be a number between:
  242. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  243. - This parameter must be a number between:
  244. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  245. - This parameter must be a number between:
  246. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  247. - This parameter must be a number between:
  248. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  249. - This parameter must be a number between:
  250. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  251. This parameter can be modified afterwards using,
  252. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  253. function @ref LL_DMA2D_ConfigOutputColor(). */
  254. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  255. - This parameter must be a number between:
  256. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  257. - This parameter must be a number between
  258. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  259. - This parameter must be a number between:
  260. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  261. - This parameter must be a number between:
  262. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  263. - This parameter must be a number between:
  264. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  265. This parameter can be modified afterwards,
  266. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  267. function @ref LL_DMA2D_ConfigOutputColor(). */
  268. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  269. - This parameter must be a number between:
  270. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  271. - This parameter must be a number between:
  272. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  273. - This parameter must be a number between:
  274. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  275. - This parameter must be a number between:
  276. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  277. - This parameter must be a number between:
  278. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  279. This parameter can be modified afterwards,
  280. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  281. function @ref LL_DMA2D_ConfigOutputColor(). */
  282. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  283. - This parameter must be a number between:
  284. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  285. - This parameter must be a number between:
  286. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  287. - This parameter must be a number between:
  288. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  289. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  290. This parameter can be modified afterwards,
  291. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  292. function @ref LL_DMA2D_ConfigOutputColor(). */
  293. } LL_DMA2D_ColorTypeDef;
  294. /**
  295. * @}
  296. */
  297. #endif /* USE_FULL_LL_DRIVER */
  298. /* Exported constants --------------------------------------------------------*/
  299. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  300. * @{
  301. */
  302. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  303. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  304. * @{
  305. */
  306. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  307. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  308. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  309. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  310. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  311. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  312. /**
  313. * @}
  314. */
  315. /** @defgroup DMA2D_LL_EC_IT IT Defines
  316. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  317. * @{
  318. */
  319. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  320. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  321. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  322. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  323. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  324. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  325. /**
  326. * @}
  327. */
  328. /** @defgroup DMA2D_LL_EC_MODE Mode
  329. * @{
  330. */
  331. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  332. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  333. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  334. #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */
  335. #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT)
  336. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */
  337. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */
  338. #endif /* DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT */
  339. /**
  340. * @}
  341. */
  342. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  343. * @{
  344. */
  345. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  346. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  347. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  348. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  349. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  350. /**
  351. * @}
  352. */
  353. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  354. * @{
  355. */
  356. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  357. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  358. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  359. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  360. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  361. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  362. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  363. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  364. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  365. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  366. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  367. /**
  368. * @}
  369. */
  370. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  371. * @{
  372. */
  373. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  374. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by
  375. programmed alpha value */
  376. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by
  377. programmed alpha value with,
  378. original alpha channel value */
  379. /**
  380. * @}
  381. */
  382. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  383. /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode
  384. * @{
  385. */
  386. #define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U /*!< Regular order */
  387. #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */
  388. /**
  389. * @}
  390. */
  391. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  392. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  393. * @{
  394. */
  395. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  396. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  397. /**
  398. * @}
  399. */
  400. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  401. * @{
  402. */
  403. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  404. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  405. /**
  406. * @}
  407. */
  408. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  409. /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode
  410. * @{
  411. */
  412. #define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U /*!< Line offsets are expressed in pixels */
  413. #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */
  414. /**
  415. * @}
  416. */
  417. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  418. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  419. * @{
  420. */
  421. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  422. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  423. /**
  424. * @}
  425. */
  426. /**
  427. * @}
  428. */
  429. /* Exported macro ------------------------------------------------------------*/
  430. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  431. * @{
  432. */
  433. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  434. * @{
  435. */
  436. /**
  437. * @brief Write a value in DMA2D register.
  438. * @param __INSTANCE__ DMA2D Instance
  439. * @param __REG__ Register to be written
  440. * @param __VALUE__ Value to be written in the register
  441. * @retval None
  442. */
  443. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  444. /**
  445. * @brief Read a value in DMA2D register.
  446. * @param __INSTANCE__ DMA2D Instance
  447. * @param __REG__ Register to be read
  448. * @retval Register value
  449. */
  450. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  451. /**
  452. * @}
  453. */
  454. /**
  455. * @}
  456. */
  457. /* Exported functions --------------------------------------------------------*/
  458. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  459. * @{
  460. */
  461. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  462. * @{
  463. */
  464. /**
  465. * @brief Start a DMA2D transfer.
  466. * @rmtoll CR START LL_DMA2D_Start
  467. * @param DMA2Dx DMA2D Instance
  468. * @retval None
  469. */
  470. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  471. {
  472. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  473. }
  474. /**
  475. * @brief Indicate if a DMA2D transfer is ongoing.
  476. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  477. * @param DMA2Dx DMA2D Instance
  478. * @retval State of bit (1 or 0).
  479. */
  480. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(const DMA2D_TypeDef *DMA2Dx)
  481. {
  482. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  483. }
  484. /**
  485. * @brief Suspend DMA2D transfer.
  486. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  487. * @rmtoll CR SUSP LL_DMA2D_Suspend
  488. * @param DMA2Dx DMA2D Instance
  489. * @retval None
  490. */
  491. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  492. {
  493. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  494. }
  495. /**
  496. * @brief Resume DMA2D transfer.
  497. * @note This API can be used to resume automatic foreground or background CLUT loading.
  498. * @rmtoll CR SUSP LL_DMA2D_Resume
  499. * @param DMA2Dx DMA2D Instance
  500. * @retval None
  501. */
  502. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  503. {
  504. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  505. }
  506. /**
  507. * @brief Indicate if DMA2D transfer is suspended.
  508. * @note This API can be used to indicate whether or not automatic foreground or
  509. * background CLUT loading is suspended.
  510. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  511. * @param DMA2Dx DMA2D Instance
  512. * @retval State of bit (1 or 0).
  513. */
  514. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(const DMA2D_TypeDef *DMA2Dx)
  515. {
  516. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  517. }
  518. /**
  519. * @brief Abort DMA2D transfer.
  520. * @note This API can be used to abort automatic foreground or background CLUT loading.
  521. * @rmtoll CR ABORT LL_DMA2D_Abort
  522. * @param DMA2Dx DMA2D Instance
  523. * @retval None
  524. */
  525. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  526. {
  527. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  528. }
  529. /**
  530. * @brief Indicate if DMA2D transfer is aborted.
  531. * @note This API can be used to indicate whether or not automatic foreground or
  532. * background CLUT loading is aborted.
  533. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  534. * @param DMA2Dx DMA2D Instance
  535. * @retval State of bit (1 or 0).
  536. */
  537. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(const DMA2D_TypeDef *DMA2Dx)
  538. {
  539. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  540. }
  541. /**
  542. * @brief Set DMA2D mode.
  543. * @rmtoll CR MODE LL_DMA2D_SetMode
  544. * @param DMA2Dx DMA2D Instance
  545. * @param Mode This parameter can be one of the following values:
  546. * @arg @ref LL_DMA2D_MODE_M2M
  547. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  548. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  549. * @arg @ref LL_DMA2D_MODE_R2M
  550. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*)
  551. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*)
  552. *
  553. * (*) value not defined in all devices.
  554. * @retval None
  555. */
  556. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  557. {
  558. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  559. }
  560. /**
  561. * @brief Return DMA2D mode
  562. * @rmtoll CR MODE LL_DMA2D_GetMode
  563. * @param DMA2Dx DMA2D Instance
  564. * @retval Returned value can be one of the following values:
  565. * @arg @ref LL_DMA2D_MODE_M2M
  566. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  567. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  568. * @arg @ref LL_DMA2D_MODE_R2M
  569. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*)
  570. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*)
  571. *
  572. * (*) value not defined in all devices.
  573. */
  574. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(const DMA2D_TypeDef *DMA2Dx)
  575. {
  576. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  577. }
  578. /**
  579. * @brief Set DMA2D output color mode.
  580. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  581. * @param DMA2Dx DMA2D Instance
  582. * @param ColorMode This parameter can be one of the following values:
  583. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  584. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  585. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  586. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  587. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  588. * @retval None
  589. */
  590. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  591. {
  592. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  593. }
  594. /**
  595. * @brief Return DMA2D output color mode.
  596. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  597. * @param DMA2Dx DMA2D Instance
  598. * @retval Returned value can be one of the following values:
  599. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  600. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  601. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  602. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  603. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  604. */
  605. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(const DMA2D_TypeDef *DMA2Dx)
  606. {
  607. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  608. }
  609. /**
  610. * @brief Set DMA2D output Red Blue swap mode.
  611. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  612. * @param DMA2Dx DMA2D Instance
  613. * @param RBSwapMode This parameter can be one of the following values:
  614. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  615. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  616. * @retval None
  617. */
  618. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  619. {
  620. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  621. }
  622. /**
  623. * @brief Return DMA2D output Red Blue swap mode.
  624. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  625. * @param DMA2Dx DMA2D Instance
  626. * @retval Returned value can be one of the following values:
  627. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  628. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  629. */
  630. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(const DMA2D_TypeDef *DMA2Dx)
  631. {
  632. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  633. }
  634. /**
  635. * @brief Set DMA2D output alpha inversion mode.
  636. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  637. * @param DMA2Dx DMA2D Instance
  638. * @param AlphaInversionMode This parameter can be one of the following values:
  639. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  640. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  641. * @retval None
  642. */
  643. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  644. {
  645. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  646. }
  647. /**
  648. * @brief Return DMA2D output alpha inversion mode.
  649. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  650. * @param DMA2Dx DMA2D Instance
  651. * @retval Returned value can be one of the following values:
  652. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  653. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  654. */
  655. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(const DMA2D_TypeDef *DMA2Dx)
  656. {
  657. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  658. }
  659. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  660. /**
  661. * @brief Set DMA2D output swap mode.
  662. * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode
  663. * @param DMA2Dx DMA2D Instance
  664. * @param OutputSwapMode This parameter can be one of the following values:
  665. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  666. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  667. * @retval None
  668. */
  669. __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode)
  670. {
  671. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode);
  672. }
  673. /**
  674. * @brief Return DMA2D output swap mode.
  675. * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode
  676. * @param DMA2Dx DMA2D Instance
  677. * @retval Returned value can be one of the following values:
  678. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  679. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  680. */
  681. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx)
  682. {
  683. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB));
  684. }
  685. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  686. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  687. /**
  688. * @brief Set DMA2D line offset mode.
  689. * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode
  690. * @param DMA2Dx DMA2D Instance
  691. * @param LineOffsetMode This parameter can be one of the following values:
  692. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  693. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  694. * @retval None
  695. */
  696. __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode)
  697. {
  698. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode);
  699. }
  700. /**
  701. * @brief Return DMA2D line offset mode.
  702. * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode
  703. * @param DMA2Dx DMA2D Instance
  704. * @retval Returned value can be one of the following values:
  705. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  706. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  707. */
  708. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(const DMA2D_TypeDef *DMA2Dx)
  709. {
  710. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM));
  711. }
  712. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  713. /**
  714. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  715. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  716. * @param DMA2Dx DMA2D Instance
  717. @if DMA2D_LINE_OFFSET_MODE_SUPPORT
  718. * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF
  719. @else
  720. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  721. @endif
  722. * @retval None
  723. */
  724. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  725. {
  726. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  727. }
  728. /**
  729. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  730. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  731. * @param DMA2Dx DMA2D Instance
  732. @if DMA2D_LINE_OFFSET_MODE_SUPPORT
  733. * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF
  734. @else
  735. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  736. @endif
  737. */
  738. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  739. {
  740. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  741. }
  742. /**
  743. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  744. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  745. * @param DMA2Dx DMA2D Instance
  746. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  747. * @retval None
  748. */
  749. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  750. {
  751. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  752. }
  753. /**
  754. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  755. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  756. * @param DMA2Dx DMA2D Instance
  757. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  758. */
  759. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(const DMA2D_TypeDef *DMA2Dx)
  760. {
  761. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  762. }
  763. /**
  764. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  765. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  766. * @param DMA2Dx DMA2D Instance
  767. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  768. * @retval None
  769. */
  770. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  771. {
  772. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  773. }
  774. /**
  775. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  776. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  777. * @param DMA2Dx DMA2D Instance
  778. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  779. */
  780. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(const DMA2D_TypeDef *DMA2Dx)
  781. {
  782. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  783. }
  784. /**
  785. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  786. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  787. * @param DMA2Dx DMA2D Instance
  788. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  789. * @retval None
  790. */
  791. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  792. {
  793. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  794. }
  795. /**
  796. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  797. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  798. * @param DMA2Dx DMA2D Instance
  799. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  800. */
  801. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(const DMA2D_TypeDef *DMA2Dx)
  802. {
  803. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  804. }
  805. /**
  806. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  807. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  808. * RGB565, ARGB1555 or ARGB4444.
  809. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  810. * with respect to color mode is not done by the user code.
  811. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  812. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  813. * OCOLR RED LL_DMA2D_SetOutputColor\n
  814. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  815. * @param DMA2Dx DMA2D Instance
  816. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  817. * @retval None
  818. */
  819. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  820. {
  821. WRITE_REG(DMA2Dx->OCOLR, OutputColor);
  822. }
  823. /**
  824. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  825. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  826. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  827. * as set by @ref LL_DMA2D_SetOutputColorMode.
  828. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  829. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  830. * OCOLR RED LL_DMA2D_GetOutputColor\n
  831. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  832. * @param DMA2Dx DMA2D Instance
  833. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  834. */
  835. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(const DMA2D_TypeDef *DMA2Dx)
  836. {
  837. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  838. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  839. }
  840. /**
  841. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  842. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  843. * @param DMA2Dx DMA2D Instance
  844. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  845. * @retval None
  846. */
  847. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  848. {
  849. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  850. }
  851. /**
  852. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  853. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  854. * @param DMA2Dx DMA2D Instance
  855. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  856. */
  857. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(const DMA2D_TypeDef *DMA2Dx)
  858. {
  859. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  860. }
  861. /**
  862. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  863. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  864. * @param DMA2Dx DMA2D Instance
  865. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  866. * @retval None
  867. */
  868. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  869. {
  870. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  871. }
  872. /**
  873. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  874. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  875. * @param DMA2Dx DMA2D Instance
  876. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  877. */
  878. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(const DMA2D_TypeDef *DMA2Dx)
  879. {
  880. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  881. }
  882. /**
  883. * @brief Enable DMA2D dead time functionality.
  884. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  885. * @param DMA2Dx DMA2D Instance
  886. * @retval None
  887. */
  888. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  889. {
  890. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  891. }
  892. /**
  893. * @brief Disable DMA2D dead time functionality.
  894. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  895. * @param DMA2Dx DMA2D Instance
  896. * @retval None
  897. */
  898. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  899. {
  900. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  901. }
  902. /**
  903. * @brief Indicate if DMA2D dead time functionality is enabled.
  904. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  905. * @param DMA2Dx DMA2D Instance
  906. * @retval State of bit (1 or 0).
  907. */
  908. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(const DMA2D_TypeDef *DMA2Dx)
  909. {
  910. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  911. }
  912. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  913. * @{
  914. */
  915. /**
  916. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  917. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  918. * @param DMA2Dx DMA2D Instance
  919. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  920. * @retval None
  921. */
  922. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  923. {
  924. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  925. }
  926. /**
  927. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  928. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  929. * @param DMA2Dx DMA2D Instance
  930. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  931. */
  932. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx)
  933. {
  934. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  935. }
  936. /**
  937. * @brief Enable DMA2D foreground CLUT loading.
  938. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  939. * @param DMA2Dx DMA2D Instance
  940. * @retval None
  941. */
  942. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  943. {
  944. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  945. }
  946. /**
  947. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  948. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  949. * @param DMA2Dx DMA2D Instance
  950. * @retval State of bit (1 or 0).
  951. */
  952. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx)
  953. {
  954. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  955. }
  956. /**
  957. * @brief Set DMA2D foreground color mode.
  958. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  959. * @param DMA2Dx DMA2D Instance
  960. * @param ColorMode This parameter can be one of the following values:
  961. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  962. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  963. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  964. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  965. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  966. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  967. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  968. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  969. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  970. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  971. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  972. * @retval None
  973. */
  974. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  975. {
  976. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  977. }
  978. /**
  979. * @brief Return DMA2D foreground color mode.
  980. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  981. * @param DMA2Dx DMA2D Instance
  982. * @retval Returned value can be one of the following values:
  983. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  984. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  985. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  986. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  987. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  988. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  989. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  990. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  991. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  992. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  993. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  994. */
  995. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx)
  996. {
  997. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  998. }
  999. /**
  1000. * @brief Set DMA2D foreground alpha mode.
  1001. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  1002. * @param DMA2Dx DMA2D Instance
  1003. * @param AphaMode This parameter can be one of the following values:
  1004. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1005. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1006. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1007. * @retval None
  1008. */
  1009. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1010. {
  1011. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  1012. }
  1013. /**
  1014. * @brief Return DMA2D foreground alpha mode.
  1015. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  1016. * @param DMA2Dx DMA2D Instance
  1017. * @retval Returned value can be one of the following values:
  1018. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1019. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1020. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1021. */
  1022. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx)
  1023. {
  1024. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  1025. }
  1026. /**
  1027. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  1028. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  1029. * @param DMA2Dx DMA2D Instance
  1030. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1031. * @retval None
  1032. */
  1033. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1034. {
  1035. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  1036. }
  1037. /**
  1038. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  1039. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  1040. * @param DMA2Dx DMA2D Instance
  1041. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1042. */
  1043. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx)
  1044. {
  1045. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  1046. }
  1047. /**
  1048. * @brief Set DMA2D foreground Red Blue swap mode.
  1049. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  1050. * @param DMA2Dx DMA2D Instance
  1051. * @param RBSwapMode This parameter can be one of the following values:
  1052. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1053. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1054. * @retval None
  1055. */
  1056. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1057. {
  1058. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  1059. }
  1060. /**
  1061. * @brief Return DMA2D foreground Red Blue swap mode.
  1062. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  1063. * @param DMA2Dx DMA2D Instance
  1064. * @retval Returned value can be one of the following values:
  1065. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1066. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1067. */
  1068. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(const DMA2D_TypeDef *DMA2Dx)
  1069. {
  1070. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  1071. }
  1072. /**
  1073. * @brief Set DMA2D foreground alpha inversion mode.
  1074. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  1075. * @param DMA2Dx DMA2D Instance
  1076. * @param AlphaInversionMode This parameter can be one of the following values:
  1077. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1078. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1079. * @retval None
  1080. */
  1081. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1082. {
  1083. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  1084. }
  1085. /**
  1086. * @brief Return DMA2D foreground alpha inversion mode.
  1087. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  1088. * @param DMA2Dx DMA2D Instance
  1089. * @retval Returned value can be one of the following values:
  1090. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1091. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1092. */
  1093. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(const DMA2D_TypeDef *DMA2Dx)
  1094. {
  1095. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  1096. }
  1097. /**
  1098. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1099. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  1100. * @param DMA2Dx DMA2D Instance
  1101. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1102. * @retval None
  1103. */
  1104. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1105. {
  1106. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  1107. }
  1108. /**
  1109. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1110. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  1111. * @param DMA2Dx DMA2D Instance
  1112. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  1113. */
  1114. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  1115. {
  1116. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  1117. }
  1118. /**
  1119. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  1120. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  1121. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  1122. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  1123. * @param DMA2Dx DMA2D Instance
  1124. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1125. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1126. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1127. * @retval None
  1128. */
  1129. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1130. {
  1131. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  1132. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  1133. }
  1134. /**
  1135. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1136. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  1137. * @param DMA2Dx DMA2D Instance
  1138. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1139. * @retval None
  1140. */
  1141. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1142. {
  1143. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  1144. }
  1145. /**
  1146. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1147. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1148. * @param DMA2Dx DMA2D Instance
  1149. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1150. */
  1151. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx)
  1152. {
  1153. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1154. }
  1155. /**
  1156. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1157. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1158. * @param DMA2Dx DMA2D Instance
  1159. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1160. * @retval None
  1161. */
  1162. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1163. {
  1164. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1165. }
  1166. /**
  1167. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1168. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1169. * @param DMA2Dx DMA2D Instance
  1170. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1171. */
  1172. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx)
  1173. {
  1174. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1175. }
  1176. /**
  1177. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1178. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1179. * @param DMA2Dx DMA2D Instance
  1180. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1181. * @retval None
  1182. */
  1183. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1184. {
  1185. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1186. }
  1187. /**
  1188. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1189. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1190. * @param DMA2Dx DMA2D Instance
  1191. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1192. */
  1193. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx)
  1194. {
  1195. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1196. }
  1197. /**
  1198. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1199. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1200. * @param DMA2Dx DMA2D Instance
  1201. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1202. * @retval None
  1203. */
  1204. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1205. {
  1206. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1207. }
  1208. /**
  1209. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1210. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1211. * @param DMA2Dx DMA2D Instance
  1212. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1213. */
  1214. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx)
  1215. {
  1216. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1217. }
  1218. /**
  1219. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1220. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1221. * @param DMA2Dx DMA2D Instance
  1222. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1223. * @retval None
  1224. */
  1225. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1226. {
  1227. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1228. }
  1229. /**
  1230. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1231. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1232. * @param DMA2Dx DMA2D Instance
  1233. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1234. */
  1235. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx)
  1236. {
  1237. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1238. }
  1239. /**
  1240. * @brief Set DMA2D foreground CLUT color mode.
  1241. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1242. * @param DMA2Dx DMA2D Instance
  1243. * @param CLUTColorMode This parameter can be one of the following values:
  1244. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1245. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1246. * @retval None
  1247. */
  1248. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1249. {
  1250. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1251. }
  1252. /**
  1253. * @brief Return DMA2D foreground CLUT color mode.
  1254. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1255. * @param DMA2Dx DMA2D Instance
  1256. * @retval Returned value can be one of the following values:
  1257. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1258. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1259. */
  1260. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx)
  1261. {
  1262. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1263. }
  1264. /**
  1265. * @}
  1266. */
  1267. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1268. * @{
  1269. */
  1270. /**
  1271. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1272. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1273. * @param DMA2Dx DMA2D Instance
  1274. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1275. * @retval None
  1276. */
  1277. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1278. {
  1279. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1280. }
  1281. /**
  1282. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1283. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1284. * @param DMA2Dx DMA2D Instance
  1285. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1286. */
  1287. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(const DMA2D_TypeDef *DMA2Dx)
  1288. {
  1289. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1290. }
  1291. /**
  1292. * @brief Enable DMA2D background CLUT loading.
  1293. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1294. * @param DMA2Dx DMA2D Instance
  1295. * @retval None
  1296. */
  1297. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1298. {
  1299. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1300. }
  1301. /**
  1302. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1303. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1304. * @param DMA2Dx DMA2D Instance
  1305. * @retval State of bit (1 or 0).
  1306. */
  1307. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(const DMA2D_TypeDef *DMA2Dx)
  1308. {
  1309. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1310. }
  1311. /**
  1312. * @brief Set DMA2D background color mode.
  1313. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1314. * @param DMA2Dx DMA2D Instance
  1315. * @param ColorMode This parameter can be one of the following values:
  1316. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1317. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1318. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1319. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1320. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1321. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1322. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1323. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1324. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1325. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1326. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1327. * @retval None
  1328. */
  1329. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1330. {
  1331. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1332. }
  1333. /**
  1334. * @brief Return DMA2D background color mode.
  1335. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1336. * @param DMA2Dx DMA2D Instance
  1337. * @retval Returned value can be one of the following values:
  1338. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1339. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1340. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1341. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1342. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1343. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1344. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1345. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1346. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1347. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1348. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1349. */
  1350. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(const DMA2D_TypeDef *DMA2Dx)
  1351. {
  1352. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1353. }
  1354. /**
  1355. * @brief Set DMA2D background alpha mode.
  1356. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1357. * @param DMA2Dx DMA2D Instance
  1358. * @param AphaMode This parameter can be one of the following values:
  1359. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1360. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1361. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1362. * @retval None
  1363. */
  1364. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1365. {
  1366. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1367. }
  1368. /**
  1369. * @brief Return DMA2D background alpha mode.
  1370. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1371. * @param DMA2Dx DMA2D Instance
  1372. * @retval Returned value can be one of the following values:
  1373. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1374. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1375. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1376. */
  1377. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(const DMA2D_TypeDef *DMA2Dx)
  1378. {
  1379. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1380. }
  1381. /**
  1382. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1383. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1384. * @param DMA2Dx DMA2D Instance
  1385. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1386. * @retval None
  1387. */
  1388. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1389. {
  1390. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1391. }
  1392. /**
  1393. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1394. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1395. * @param DMA2Dx DMA2D Instance
  1396. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1397. */
  1398. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(const DMA2D_TypeDef *DMA2Dx)
  1399. {
  1400. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1401. }
  1402. /**
  1403. * @brief Set DMA2D background Red Blue swap mode.
  1404. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1405. * @param DMA2Dx DMA2D Instance
  1406. * @param RBSwapMode This parameter can be one of the following values:
  1407. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1408. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1409. * @retval None
  1410. */
  1411. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1412. {
  1413. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1414. }
  1415. /**
  1416. * @brief Return DMA2D background Red Blue swap mode.
  1417. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1418. * @param DMA2Dx DMA2D Instance
  1419. * @retval Returned value can be one of the following values:
  1420. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1421. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1422. */
  1423. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(const DMA2D_TypeDef *DMA2Dx)
  1424. {
  1425. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1426. }
  1427. /**
  1428. * @brief Set DMA2D background alpha inversion mode.
  1429. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1430. * @param DMA2Dx DMA2D Instance
  1431. * @param AlphaInversionMode This parameter can be one of the following values:
  1432. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1433. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1434. * @retval None
  1435. */
  1436. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1437. {
  1438. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1439. }
  1440. /**
  1441. * @brief Return DMA2D background alpha inversion mode.
  1442. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1443. * @param DMA2Dx DMA2D Instance
  1444. * @retval Returned value can be one of the following values:
  1445. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1446. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1447. */
  1448. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(const DMA2D_TypeDef *DMA2Dx)
  1449. {
  1450. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1451. }
  1452. /**
  1453. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1454. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1455. * @param DMA2Dx DMA2D Instance
  1456. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1457. * @retval None
  1458. */
  1459. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1460. {
  1461. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1462. }
  1463. /**
  1464. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1465. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1466. * @param DMA2Dx DMA2D Instance
  1467. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1468. */
  1469. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(const DMA2D_TypeDef *DMA2Dx)
  1470. {
  1471. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1472. }
  1473. /**
  1474. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1475. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1476. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1477. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1478. * @param DMA2Dx DMA2D Instance
  1479. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1480. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1481. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1482. * @retval None
  1483. */
  1484. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1485. {
  1486. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1487. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1488. }
  1489. /**
  1490. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1491. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1492. * @param DMA2Dx DMA2D Instance
  1493. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1494. * @retval None
  1495. */
  1496. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1497. {
  1498. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1499. }
  1500. /**
  1501. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1502. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1503. * @param DMA2Dx DMA2D Instance
  1504. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1505. */
  1506. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(const DMA2D_TypeDef *DMA2Dx)
  1507. {
  1508. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1509. }
  1510. /**
  1511. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1512. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1513. * @param DMA2Dx DMA2D Instance
  1514. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1515. * @retval None
  1516. */
  1517. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1518. {
  1519. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1520. }
  1521. /**
  1522. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1523. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1524. * @param DMA2Dx DMA2D Instance
  1525. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1526. */
  1527. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(const DMA2D_TypeDef *DMA2Dx)
  1528. {
  1529. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1530. }
  1531. /**
  1532. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1533. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1534. * @param DMA2Dx DMA2D Instance
  1535. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1536. * @retval None
  1537. */
  1538. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1539. {
  1540. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1541. }
  1542. /**
  1543. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1544. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1545. * @param DMA2Dx DMA2D Instance
  1546. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1547. */
  1548. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(const DMA2D_TypeDef *DMA2Dx)
  1549. {
  1550. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1551. }
  1552. /**
  1553. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1554. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1555. * @param DMA2Dx DMA2D Instance
  1556. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1557. * @retval None
  1558. */
  1559. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1560. {
  1561. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1562. }
  1563. /**
  1564. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1565. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1566. * @param DMA2Dx DMA2D Instance
  1567. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1568. */
  1569. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(const DMA2D_TypeDef *DMA2Dx)
  1570. {
  1571. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1572. }
  1573. /**
  1574. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1575. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1576. * @param DMA2Dx DMA2D Instance
  1577. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1578. * @retval None
  1579. */
  1580. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1581. {
  1582. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1583. }
  1584. /**
  1585. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1586. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1587. * @param DMA2Dx DMA2D Instance
  1588. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1589. */
  1590. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(const DMA2D_TypeDef *DMA2Dx)
  1591. {
  1592. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1593. }
  1594. /**
  1595. * @brief Set DMA2D background CLUT color mode.
  1596. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1597. * @param DMA2Dx DMA2D Instance
  1598. * @param CLUTColorMode This parameter can be one of the following values:
  1599. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1600. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1601. * @retval None
  1602. */
  1603. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1604. {
  1605. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1606. }
  1607. /**
  1608. * @brief Return DMA2D background CLUT color mode.
  1609. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1610. * @param DMA2Dx DMA2D Instance
  1611. * @retval Returned value can be one of the following values:
  1612. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1613. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1614. */
  1615. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(const DMA2D_TypeDef *DMA2Dx)
  1616. {
  1617. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1618. }
  1619. /**
  1620. * @}
  1621. */
  1622. /**
  1623. * @}
  1624. */
  1625. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1626. * @{
  1627. */
  1628. /**
  1629. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1630. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1631. * @param DMA2Dx DMA2D Instance
  1632. * @retval State of bit (1 or 0).
  1633. */
  1634. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(const DMA2D_TypeDef *DMA2Dx)
  1635. {
  1636. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1637. }
  1638. /**
  1639. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1640. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1641. * @param DMA2Dx DMA2D Instance
  1642. * @retval State of bit (1 or 0).
  1643. */
  1644. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(const DMA2D_TypeDef *DMA2Dx)
  1645. {
  1646. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1647. }
  1648. /**
  1649. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1650. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1651. * @param DMA2Dx DMA2D Instance
  1652. * @retval State of bit (1 or 0).
  1653. */
  1654. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(const DMA2D_TypeDef *DMA2Dx)
  1655. {
  1656. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1657. }
  1658. /**
  1659. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1660. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1661. * @param DMA2Dx DMA2D Instance
  1662. * @retval State of bit (1 or 0).
  1663. */
  1664. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(const DMA2D_TypeDef *DMA2Dx)
  1665. {
  1666. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1667. }
  1668. /**
  1669. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1670. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1671. * @param DMA2Dx DMA2D Instance
  1672. * @retval State of bit (1 or 0).
  1673. */
  1674. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(const DMA2D_TypeDef *DMA2Dx)
  1675. {
  1676. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1677. }
  1678. /**
  1679. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1680. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1681. * @param DMA2Dx DMA2D Instance
  1682. * @retval State of bit (1 or 0).
  1683. */
  1684. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(const DMA2D_TypeDef *DMA2Dx)
  1685. {
  1686. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1687. }
  1688. /**
  1689. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1690. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1691. * @param DMA2Dx DMA2D Instance
  1692. * @retval None
  1693. */
  1694. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1695. {
  1696. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1697. }
  1698. /**
  1699. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1700. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1701. * @param DMA2Dx DMA2D Instance
  1702. * @retval None
  1703. */
  1704. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1705. {
  1706. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1707. }
  1708. /**
  1709. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1710. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1711. * @param DMA2Dx DMA2D Instance
  1712. * @retval None
  1713. */
  1714. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1715. {
  1716. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1717. }
  1718. /**
  1719. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1720. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1721. * @param DMA2Dx DMA2D Instance
  1722. * @retval None
  1723. */
  1724. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1725. {
  1726. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1727. }
  1728. /**
  1729. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1730. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1731. * @param DMA2Dx DMA2D Instance
  1732. * @retval None
  1733. */
  1734. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1735. {
  1736. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1737. }
  1738. /**
  1739. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1740. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1741. * @param DMA2Dx DMA2D Instance
  1742. * @retval None
  1743. */
  1744. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1745. {
  1746. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1747. }
  1748. /**
  1749. * @}
  1750. */
  1751. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1752. * @{
  1753. */
  1754. /**
  1755. * @brief Enable Configuration Error Interrupt
  1756. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1757. * @param DMA2Dx DMA2D Instance
  1758. * @retval None
  1759. */
  1760. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1761. {
  1762. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1763. }
  1764. /**
  1765. * @brief Enable CLUT Transfer Complete Interrupt
  1766. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1767. * @param DMA2Dx DMA2D Instance
  1768. * @retval None
  1769. */
  1770. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1771. {
  1772. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1773. }
  1774. /**
  1775. * @brief Enable CLUT Access Error Interrupt
  1776. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1777. * @param DMA2Dx DMA2D Instance
  1778. * @retval None
  1779. */
  1780. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1781. {
  1782. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1783. }
  1784. /**
  1785. * @brief Enable Transfer Watermark Interrupt
  1786. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1787. * @param DMA2Dx DMA2D Instance
  1788. * @retval None
  1789. */
  1790. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1791. {
  1792. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1793. }
  1794. /**
  1795. * @brief Enable Transfer Complete Interrupt
  1796. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1797. * @param DMA2Dx DMA2D Instance
  1798. * @retval None
  1799. */
  1800. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1801. {
  1802. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1803. }
  1804. /**
  1805. * @brief Enable Transfer Error Interrupt
  1806. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1807. * @param DMA2Dx DMA2D Instance
  1808. * @retval None
  1809. */
  1810. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1811. {
  1812. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1813. }
  1814. /**
  1815. * @brief Disable Configuration Error Interrupt
  1816. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1817. * @param DMA2Dx DMA2D Instance
  1818. * @retval None
  1819. */
  1820. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1821. {
  1822. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1823. }
  1824. /**
  1825. * @brief Disable CLUT Transfer Complete Interrupt
  1826. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1827. * @param DMA2Dx DMA2D Instance
  1828. * @retval None
  1829. */
  1830. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1831. {
  1832. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1833. }
  1834. /**
  1835. * @brief Disable CLUT Access Error Interrupt
  1836. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1837. * @param DMA2Dx DMA2D Instance
  1838. * @retval None
  1839. */
  1840. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1841. {
  1842. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1843. }
  1844. /**
  1845. * @brief Disable Transfer Watermark Interrupt
  1846. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1847. * @param DMA2Dx DMA2D Instance
  1848. * @retval None
  1849. */
  1850. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1851. {
  1852. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1853. }
  1854. /**
  1855. * @brief Disable Transfer Complete Interrupt
  1856. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1857. * @param DMA2Dx DMA2D Instance
  1858. * @retval None
  1859. */
  1860. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1861. {
  1862. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1863. }
  1864. /**
  1865. * @brief Disable Transfer Error Interrupt
  1866. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1867. * @param DMA2Dx DMA2D Instance
  1868. * @retval None
  1869. */
  1870. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1871. {
  1872. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1873. }
  1874. /**
  1875. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1876. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1877. * @param DMA2Dx DMA2D Instance
  1878. * @retval State of bit (1 or 0).
  1879. */
  1880. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(const DMA2D_TypeDef *DMA2Dx)
  1881. {
  1882. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1883. }
  1884. /**
  1885. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1886. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1887. * @param DMA2Dx DMA2D Instance
  1888. * @retval State of bit (1 or 0).
  1889. */
  1890. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(const DMA2D_TypeDef *DMA2Dx)
  1891. {
  1892. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1893. }
  1894. /**
  1895. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1896. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1897. * @param DMA2Dx DMA2D Instance
  1898. * @retval State of bit (1 or 0).
  1899. */
  1900. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(const DMA2D_TypeDef *DMA2Dx)
  1901. {
  1902. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1903. }
  1904. /**
  1905. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1906. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1907. * @param DMA2Dx DMA2D Instance
  1908. * @retval State of bit (1 or 0).
  1909. */
  1910. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(const DMA2D_TypeDef *DMA2Dx)
  1911. {
  1912. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1913. }
  1914. /**
  1915. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1916. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1917. * @param DMA2Dx DMA2D Instance
  1918. * @retval State of bit (1 or 0).
  1919. */
  1920. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(const DMA2D_TypeDef *DMA2Dx)
  1921. {
  1922. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1923. }
  1924. /**
  1925. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1926. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1927. * @param DMA2Dx DMA2D Instance
  1928. * @retval State of bit (1 or 0).
  1929. */
  1930. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(const DMA2D_TypeDef *DMA2Dx)
  1931. {
  1932. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1933. }
  1934. /**
  1935. * @}
  1936. */
  1937. #if defined(USE_FULL_LL_DRIVER)
  1938. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1939. * @{
  1940. */
  1941. ErrorStatus LL_DMA2D_DeInit(const DMA2D_TypeDef *DMA2Dx);
  1942. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1943. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1944. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1945. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1946. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1947. uint32_t LL_DMA2D_GetOutputBlueColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1948. uint32_t LL_DMA2D_GetOutputGreenColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1949. uint32_t LL_DMA2D_GetOutputRedColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1950. uint32_t LL_DMA2D_GetOutputAlphaColor(const DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1951. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1952. /**
  1953. * @}
  1954. */
  1955. #endif /* USE_FULL_LL_DRIVER */
  1956. /**
  1957. * @}
  1958. */
  1959. /**
  1960. * @}
  1961. */
  1962. #endif /* defined (DMA2D) */
  1963. /**
  1964. * @}
  1965. */
  1966. #ifdef __cplusplus
  1967. }
  1968. #endif
  1969. #endif /* STM32L4xx_LL_DMA2D_H */